bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 1 | /* |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 2 | * Virtual page mapping |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 18 | */ |
bellard | 67b915a | 2004-03-31 23:37:16 +0000 | [diff] [blame] | 19 | #include "config.h" |
bellard | d5a8f07 | 2004-09-29 21:15:28 +0000 | [diff] [blame] | 20 | #ifdef _WIN32 |
| 21 | #include <windows.h> |
| 22 | #else |
bellard | a98d49b | 2004-11-14 16:22:05 +0000 | [diff] [blame] | 23 | #include <sys/types.h> |
bellard | d5a8f07 | 2004-09-29 21:15:28 +0000 | [diff] [blame] | 24 | #include <sys/mman.h> |
| 25 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 26 | |
Stefan Weil | 055403b | 2010-10-22 23:03:32 +0200 | [diff] [blame] | 27 | #include "qemu-common.h" |
bellard | 6180a18 | 2003-09-30 21:04:53 +0000 | [diff] [blame] | 28 | #include "cpu.h" |
bellard | b67d9a5 | 2008-05-23 09:57:34 +0000 | [diff] [blame] | 29 | #include "tcg.h" |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 30 | #include "hw/hw.h" |
Alex Williamson | cc9e98c | 2010-06-25 11:09:43 -0600 | [diff] [blame] | 31 | #include "hw/qdev.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 32 | #include "qemu/osdep.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 33 | #include "sysemu/kvm.h" |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 34 | #include "sysemu/sysemu.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 35 | #include "hw/xen/xen.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 36 | #include "qemu/timer.h" |
| 37 | #include "qemu/config-file.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 38 | #include "exec/memory.h" |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 39 | #include "sysemu/dma.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 40 | #include "exec/address-spaces.h" |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 41 | #if defined(CONFIG_USER_ONLY) |
| 42 | #include <qemu.h> |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 43 | #else /* !CONFIG_USER_ONLY */ |
Paolo Bonzini | 9c17d61 | 2012-12-17 18:20:04 +0100 | [diff] [blame] | 44 | #include "sysemu/xen-mapcache.h" |
Stefano Stabellini | 6506e4f | 2011-05-19 18:35:44 +0100 | [diff] [blame] | 45 | #include "trace.h" |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 46 | #endif |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 47 | #include "exec/cpu-all.h" |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 48 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 49 | #include "exec/cputlb.h" |
Blue Swirl | 5b6dd86 | 2012-12-02 16:04:43 +0000 | [diff] [blame] | 50 | #include "translate-all.h" |
Blue Swirl | 0cac1b6 | 2012-04-09 16:50:52 +0000 | [diff] [blame] | 51 | |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 52 | #include "exec/memory-internal.h" |
Avi Kivity | 67d95c1 | 2011-12-15 15:25:22 +0200 | [diff] [blame] | 53 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 54 | //#define DEBUG_SUBPAGE |
ths | 1196be3 | 2007-03-17 15:17:58 +0000 | [diff] [blame] | 55 | |
pbrook | 99773bd | 2006-04-16 15:14:59 +0000 | [diff] [blame] | 56 | #if !defined(CONFIG_USER_ONLY) |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 57 | static int in_migration; |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 58 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 59 | RAMList ram_list = { .blocks = QTAILQ_HEAD_INITIALIZER(ram_list.blocks) }; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 60 | |
| 61 | static MemoryRegion *system_memory; |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 62 | static MemoryRegion *system_io; |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 63 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 64 | AddressSpace address_space_io; |
| 65 | AddressSpace address_space_memory; |
Avi Kivity | 2673a5d | 2012-10-02 18:49:28 +0200 | [diff] [blame] | 66 | |
Paolo Bonzini | 0844e00 | 2013-05-24 14:37:28 +0200 | [diff] [blame] | 67 | MemoryRegion io_mem_rom, io_mem_notdirty; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 68 | static MemoryRegion io_mem_unassigned; |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 69 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 70 | #endif |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 71 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 72 | struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 73 | /* current CPU in the current thread. It is only valid inside |
| 74 | cpu_exec() */ |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 75 | DEFINE_TLS(CPUState *, current_cpu); |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 76 | /* 0 = Do not count executed instructions. |
ths | bf20dc0 | 2008-06-30 17:22:19 +0000 | [diff] [blame] | 77 | 1 = Precise instruction counting. |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 78 | 2 = Adaptive rate instruction counting. */ |
Paolo Bonzini | 5708fc6 | 2012-11-26 15:36:40 +0100 | [diff] [blame] | 79 | int use_icount; |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 80 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 81 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | 4346ae3 | 2012-02-10 17:00:01 +0200 | [diff] [blame] | 82 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 83 | typedef struct PhysPageEntry PhysPageEntry; |
| 84 | |
| 85 | struct PhysPageEntry { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 86 | /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame^] | 87 | uint32_t skip : 6; |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 88 | /* index into phys_sections (!skip) or phys_map_nodes (skip) */ |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame^] | 89 | uint32_t ptr : 26; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 90 | }; |
| 91 | |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame^] | 92 | #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6) |
| 93 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 94 | /* Size of the L2 (and L3, etc) page tables. */ |
| 95 | #define ADDR_SPACE_BITS TARGET_PHYS_ADDR_SPACE_BITS |
| 96 | |
| 97 | #define P_L2_BITS 10 |
| 98 | #define P_L2_SIZE (1 << P_L2_BITS) |
| 99 | |
| 100 | #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1) |
| 101 | |
| 102 | typedef PhysPageEntry Node[P_L2_SIZE]; |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 103 | |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 104 | struct AddressSpaceDispatch { |
| 105 | /* This is a multi-level map on the physical address space. |
| 106 | * The bottom level has pointers to MemoryRegionSections. |
| 107 | */ |
| 108 | PhysPageEntry phys_map; |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 109 | Node *nodes; |
| 110 | MemoryRegionSection *sections; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 111 | AddressSpace *as; |
Paolo Bonzini | 1db8abb | 2013-05-21 12:07:21 +0200 | [diff] [blame] | 112 | }; |
| 113 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 114 | #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) |
| 115 | typedef struct subpage_t { |
| 116 | MemoryRegion iomem; |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 117 | AddressSpace *as; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 118 | hwaddr base; |
| 119 | uint16_t sub_section[TARGET_PAGE_SIZE]; |
| 120 | } subpage_t; |
| 121 | |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 122 | #define PHYS_SECTION_UNASSIGNED 0 |
| 123 | #define PHYS_SECTION_NOTDIRTY 1 |
| 124 | #define PHYS_SECTION_ROM 2 |
| 125 | #define PHYS_SECTION_WATCH 3 |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 126 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 127 | typedef struct PhysPageMap { |
| 128 | unsigned sections_nb; |
| 129 | unsigned sections_nb_alloc; |
| 130 | unsigned nodes_nb; |
| 131 | unsigned nodes_nb_alloc; |
| 132 | Node *nodes; |
| 133 | MemoryRegionSection *sections; |
| 134 | } PhysPageMap; |
| 135 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 136 | static PhysPageMap *prev_map; |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 137 | static PhysPageMap next_map; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 138 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 139 | static void io_mem_init(void); |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 140 | static void memory_map_init(void); |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 141 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 142 | static MemoryRegion io_mem_watch; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 143 | #endif |
bellard | 5493600 | 2003-05-13 00:25:15 +0000 | [diff] [blame] | 144 | |
Paul Brook | 6d9a130 | 2010-02-28 23:55:53 +0000 | [diff] [blame] | 145 | #if !defined(CONFIG_USER_ONLY) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 146 | |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 147 | static void phys_map_node_reserve(unsigned nodes) |
| 148 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 149 | if (next_map.nodes_nb + nodes > next_map.nodes_nb_alloc) { |
| 150 | next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc * 2, |
| 151 | 16); |
| 152 | next_map.nodes_nb_alloc = MAX(next_map.nodes_nb_alloc, |
| 153 | next_map.nodes_nb + nodes); |
| 154 | next_map.nodes = g_renew(Node, next_map.nodes, |
| 155 | next_map.nodes_nb_alloc); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 156 | } |
| 157 | } |
| 158 | |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame^] | 159 | static uint32_t phys_map_node_alloc(void) |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 160 | { |
| 161 | unsigned i; |
Michael S. Tsirkin | 8b79576 | 2013-11-11 14:51:56 +0200 | [diff] [blame^] | 162 | uint32_t ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 163 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 164 | ret = next_map.nodes_nb++; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 165 | assert(ret != PHYS_MAP_NODE_NIL); |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 166 | assert(ret != next_map.nodes_nb_alloc); |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 167 | for (i = 0; i < P_L2_SIZE; ++i) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 168 | next_map.nodes[ret][i].skip = 1; |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 169 | next_map.nodes[ret][i].ptr = PHYS_MAP_NODE_NIL; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 170 | } |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 171 | return ret; |
Avi Kivity | d6f2ea2 | 2012-02-12 20:12:49 +0200 | [diff] [blame] | 172 | } |
| 173 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 174 | static void phys_page_set_level(PhysPageEntry *lp, hwaddr *index, |
| 175 | hwaddr *nb, uint16_t leaf, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 176 | int level) |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 177 | { |
| 178 | PhysPageEntry *p; |
| 179 | int i; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 180 | hwaddr step = (hwaddr)1 << (level * P_L2_BITS); |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 181 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 182 | if (lp->skip && lp->ptr == PHYS_MAP_NODE_NIL) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 183 | lp->ptr = phys_map_node_alloc(); |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 184 | p = next_map.nodes[lp->ptr]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 185 | if (level == 0) { |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 186 | for (i = 0; i < P_L2_SIZE; i++) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 187 | p[i].skip = 0; |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 188 | p[i].ptr = PHYS_SECTION_UNASSIGNED; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 189 | } |
| 190 | } |
| 191 | } else { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 192 | p = next_map.nodes[lp->ptr]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 193 | } |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 194 | lp = &p[(*index >> (level * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 195 | |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 196 | while (*nb && lp < &p[P_L2_SIZE]) { |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 197 | if ((*index & (step - 1)) == 0 && *nb >= step) { |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 198 | lp->skip = 0; |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 199 | lp->ptr = leaf; |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 200 | *index += step; |
| 201 | *nb -= step; |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 202 | } else { |
| 203 | phys_page_set_level(lp, index, nb, leaf, level - 1); |
| 204 | } |
| 205 | ++lp; |
Avi Kivity | f7bf546 | 2012-02-13 20:12:05 +0200 | [diff] [blame] | 206 | } |
| 207 | } |
| 208 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 209 | static void phys_page_set(AddressSpaceDispatch *d, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 210 | hwaddr index, hwaddr nb, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 211 | uint16_t leaf) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 212 | { |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 213 | /* Wildly overreserve - it doesn't matter much. */ |
Avi Kivity | 07f07b3 | 2012-02-13 20:45:32 +0200 | [diff] [blame] | 214 | phys_map_node_reserve(3 * P_L2_LEVELS); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 215 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 216 | phys_page_set_level(&d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1); |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 217 | } |
| 218 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 219 | static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr index, |
| 220 | Node *nodes, MemoryRegionSection *sections) |
bellard | 92e873b | 2004-05-21 14:52:29 +0000 | [diff] [blame] | 221 | { |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 222 | PhysPageEntry *p; |
| 223 | int i; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 224 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 225 | for (i = P_L2_LEVELS; lp.skip && (i -= lp.skip) >= 0;) { |
Avi Kivity | c19e880 | 2012-02-13 20:25:31 +0200 | [diff] [blame] | 226 | if (lp.ptr == PHYS_MAP_NODE_NIL) { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 227 | return §ions[PHYS_SECTION_UNASSIGNED]; |
Avi Kivity | 31ab2b4 | 2012-02-13 16:44:19 +0200 | [diff] [blame] | 228 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 229 | p = nodes[lp.ptr]; |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 230 | lp = p[(index >> (i * P_L2_BITS)) & (P_L2_SIZE - 1)]; |
Avi Kivity | f1f6e3b | 2011-11-20 17:52:22 +0200 | [diff] [blame] | 231 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 232 | return §ions[lp.ptr]; |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 233 | } |
| 234 | |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 235 | bool memory_region_is_unassigned(MemoryRegion *mr) |
| 236 | { |
Paolo Bonzini | 2a8e749 | 2013-05-24 14:34:08 +0200 | [diff] [blame] | 237 | return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 238 | && mr != &io_mem_watch; |
| 239 | } |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 240 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 241 | static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 242 | hwaddr addr, |
| 243 | bool resolve_subpage) |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 244 | { |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 245 | MemoryRegionSection *section; |
| 246 | subpage_t *subpage; |
| 247 | |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 248 | section = phys_page_find(d->phys_map, addr >> TARGET_PAGE_BITS, |
| 249 | d->nodes, d->sections); |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 250 | if (resolve_subpage && section->mr->subpage) { |
| 251 | subpage = container_of(section->mr, subpage_t, iomem); |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 252 | section = &d->sections[subpage->sub_section[SUBPAGE_IDX(addr)]]; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 253 | } |
| 254 | return section; |
Jan Kiszka | 9f02960 | 2013-05-06 16:48:02 +0200 | [diff] [blame] | 255 | } |
| 256 | |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 257 | static MemoryRegionSection * |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 258 | address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat, |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 259 | hwaddr *plen, bool resolve_subpage) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 260 | { |
| 261 | MemoryRegionSection *section; |
| 262 | Int128 diff; |
| 263 | |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 264 | section = address_space_lookup_region(d, addr, resolve_subpage); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 265 | /* Compute offset within MemoryRegionSection */ |
| 266 | addr -= section->offset_within_address_space; |
| 267 | |
| 268 | /* Compute offset within MemoryRegion */ |
| 269 | *xlat = addr + section->offset_within_region; |
| 270 | |
| 271 | diff = int128_sub(section->mr->size, int128_make64(addr)); |
Peter Maydell | 3752a03 | 2013-06-20 15:18:04 +0100 | [diff] [blame] | 272 | *plen = int128_get64(int128_min(diff, int128_make64(*plen))); |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 273 | return section; |
| 274 | } |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 275 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 276 | MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, |
| 277 | hwaddr *xlat, hwaddr *plen, |
| 278 | bool is_write) |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 279 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 280 | IOMMUTLBEntry iotlb; |
| 281 | MemoryRegionSection *section; |
| 282 | MemoryRegion *mr; |
| 283 | hwaddr len = *plen; |
| 284 | |
| 285 | for (;;) { |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 286 | section = address_space_translate_internal(as->dispatch, addr, &addr, plen, true); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 287 | mr = section->mr; |
| 288 | |
| 289 | if (!mr->iommu_ops) { |
| 290 | break; |
| 291 | } |
| 292 | |
| 293 | iotlb = mr->iommu_ops->translate(mr, addr); |
| 294 | addr = ((iotlb.translated_addr & ~iotlb.addr_mask) |
| 295 | | (addr & iotlb.addr_mask)); |
| 296 | len = MIN(len, (addr | iotlb.addr_mask) - addr + 1); |
| 297 | if (!(iotlb.perm & (1 << is_write))) { |
| 298 | mr = &io_mem_unassigned; |
| 299 | break; |
| 300 | } |
| 301 | |
| 302 | as = iotlb.target_as; |
| 303 | } |
| 304 | |
| 305 | *plen = len; |
| 306 | *xlat = addr; |
| 307 | return mr; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 308 | } |
| 309 | |
| 310 | MemoryRegionSection * |
| 311 | address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat, |
| 312 | hwaddr *plen) |
| 313 | { |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 314 | MemoryRegionSection *section; |
Paolo Bonzini | c7086b4 | 2013-06-02 15:27:39 +0200 | [diff] [blame] | 315 | section = address_space_translate_internal(as->dispatch, addr, xlat, plen, false); |
Avi Kivity | 3095115 | 2012-10-30 13:47:46 +0200 | [diff] [blame] | 316 | |
| 317 | assert(!section->mr->iommu_ops); |
| 318 | return section; |
Jan Kiszka | 90260c6 | 2013-05-26 21:46:51 +0200 | [diff] [blame] | 319 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 320 | #endif |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 321 | |
Jan Kiszka | d5ab971 | 2011-08-02 16:10:21 +0200 | [diff] [blame] | 322 | void cpu_exec_init_all(void) |
| 323 | { |
| 324 | #if !defined(CONFIG_USER_ONLY) |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 325 | qemu_mutex_init(&ram_list.mutex); |
Jan Kiszka | d5ab971 | 2011-08-02 16:10:21 +0200 | [diff] [blame] | 326 | memory_map_init(); |
| 327 | io_mem_init(); |
| 328 | #endif |
| 329 | } |
| 330 | |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 331 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 332 | |
Juan Quintela | e59fb37 | 2009-09-29 22:48:21 +0200 | [diff] [blame] | 333 | static int cpu_common_post_load(void *opaque, int version_id) |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 334 | { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 335 | CPUState *cpu = opaque; |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 336 | |
aurel32 | 3098dba | 2009-03-07 21:28:24 +0000 | [diff] [blame] | 337 | /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the |
| 338 | version_id is increased. */ |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 339 | cpu->interrupt_request &= ~0x01; |
| 340 | tlb_flush(cpu->env_ptr, 1); |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 341 | |
| 342 | return 0; |
| 343 | } |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 344 | |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 345 | const VMStateDescription vmstate_cpu_common = { |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 346 | .name = "cpu_common", |
| 347 | .version_id = 1, |
| 348 | .minimum_version_id = 1, |
| 349 | .minimum_version_id_old = 1, |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 350 | .post_load = cpu_common_post_load, |
| 351 | .fields = (VMStateField []) { |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 352 | VMSTATE_UINT32(halted, CPUState), |
| 353 | VMSTATE_UINT32(interrupt_request, CPUState), |
Juan Quintela | e7f4eff | 2009-09-10 03:04:33 +0200 | [diff] [blame] | 354 | VMSTATE_END_OF_LIST() |
| 355 | } |
| 356 | }; |
Andreas Färber | 1a1562f | 2013-06-17 04:09:11 +0200 | [diff] [blame] | 357 | |
pbrook | 9656f32 | 2008-07-01 20:01:19 +0000 | [diff] [blame] | 358 | #endif |
| 359 | |
Andreas Färber | 38d8f5c | 2012-12-17 19:47:15 +0100 | [diff] [blame] | 360 | CPUState *qemu_get_cpu(int index) |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 361 | { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 362 | CPUState *cpu; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 363 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 364 | CPU_FOREACH(cpu) { |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 365 | if (cpu->cpu_index == index) { |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 366 | return cpu; |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 367 | } |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 368 | } |
| 369 | |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 370 | return NULL; |
Glauber Costa | 950f147 | 2009-06-09 12:15:18 -0400 | [diff] [blame] | 371 | } |
| 372 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 373 | void cpu_exec_init(CPUArchState *env) |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 374 | { |
Andreas Färber | 9f09e18 | 2012-05-03 06:59:07 +0200 | [diff] [blame] | 375 | CPUState *cpu = ENV_GET_CPU(env); |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 376 | CPUClass *cc = CPU_GET_CLASS(cpu); |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 377 | CPUState *some_cpu; |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 378 | int cpu_index; |
| 379 | |
pbrook | c276471 | 2009-03-07 15:24:59 +0000 | [diff] [blame] | 380 | #if defined(CONFIG_USER_ONLY) |
| 381 | cpu_list_lock(); |
| 382 | #endif |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 383 | cpu_index = 0; |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 384 | CPU_FOREACH(some_cpu) { |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 385 | cpu_index++; |
| 386 | } |
Andreas Färber | 55e5c28 | 2012-12-17 06:18:02 +0100 | [diff] [blame] | 387 | cpu->cpu_index = cpu_index; |
Andreas Färber | 1b1ed8d | 2012-12-17 04:22:03 +0100 | [diff] [blame] | 388 | cpu->numa_node = 0; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 389 | QTAILQ_INIT(&env->breakpoints); |
| 390 | QTAILQ_INIT(&env->watchpoints); |
Jan Kiszka | dc7a09c | 2011-03-15 12:26:31 +0100 | [diff] [blame] | 391 | #ifndef CONFIG_USER_ONLY |
Andreas Färber | 9f09e18 | 2012-05-03 06:59:07 +0200 | [diff] [blame] | 392 | cpu->thread_id = qemu_get_thread_id(); |
Jan Kiszka | dc7a09c | 2011-03-15 12:26:31 +0100 | [diff] [blame] | 393 | #endif |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 394 | QTAILQ_INSERT_TAIL(&cpus, cpu, node); |
pbrook | c276471 | 2009-03-07 15:24:59 +0000 | [diff] [blame] | 395 | #if defined(CONFIG_USER_ONLY) |
| 396 | cpu_list_unlock(); |
| 397 | #endif |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 398 | if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { |
| 399 | vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu); |
| 400 | } |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 401 | #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY) |
Alex Williamson | 0be71e3 | 2010-06-25 11:09:07 -0600 | [diff] [blame] | 402 | register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION, |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 403 | cpu_save, cpu_load, env); |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 404 | assert(cc->vmsd == NULL); |
Andreas Färber | e0d4794 | 2013-07-29 04:07:50 +0200 | [diff] [blame] | 405 | assert(qdev_get_vmsd(DEVICE(cpu)) == NULL); |
pbrook | b3c7724 | 2008-06-30 16:31:04 +0000 | [diff] [blame] | 406 | #endif |
Andreas Färber | b170fce | 2013-01-20 20:23:22 +0100 | [diff] [blame] | 407 | if (cc->vmsd != NULL) { |
| 408 | vmstate_register(NULL, cpu_index, cc->vmsd, cpu); |
| 409 | } |
bellard | fd6ce8f | 2003-05-14 19:00:11 +0000 | [diff] [blame] | 410 | } |
| 411 | |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 412 | #if defined(TARGET_HAS_ICE) |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 413 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 414 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 415 | { |
| 416 | tb_invalidate_phys_page_range(pc, pc + 1, 0); |
| 417 | } |
| 418 | #else |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 419 | static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) |
Max Filippov | 1e7855a | 2012-04-10 02:48:17 +0400 | [diff] [blame] | 420 | { |
Max Filippov | e8262a1 | 2013-09-27 22:29:17 +0400 | [diff] [blame] | 421 | hwaddr phys = cpu_get_phys_page_debug(cpu, pc); |
| 422 | if (phys != -1) { |
| 423 | tb_invalidate_phys_addr(phys | (pc & ~TARGET_PAGE_MASK)); |
| 424 | } |
Max Filippov | 1e7855a | 2012-04-10 02:48:17 +0400 | [diff] [blame] | 425 | } |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 426 | #endif |
Paul Brook | 94df27f | 2010-02-28 23:47:45 +0000 | [diff] [blame] | 427 | #endif /* TARGET_HAS_ICE */ |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 428 | |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 429 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 430 | void cpu_watchpoint_remove_all(CPUArchState *env, int mask) |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 431 | |
| 432 | { |
| 433 | } |
| 434 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 435 | int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len, |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 436 | int flags, CPUWatchpoint **watchpoint) |
| 437 | { |
| 438 | return -ENOSYS; |
| 439 | } |
| 440 | #else |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 441 | /* Add a watchpoint. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 442 | int cpu_watchpoint_insert(CPUArchState *env, target_ulong addr, target_ulong len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 443 | int flags, CPUWatchpoint **watchpoint) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 444 | { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 445 | target_ulong len_mask = ~(len - 1); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 446 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 447 | |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 448 | /* sanity checks: allow power-of-2 lengths, deny unaligned watchpoints */ |
Max Filippov | 0dc2382 | 2012-01-29 03:15:23 +0400 | [diff] [blame] | 449 | if ((len & (len - 1)) || (addr & ~len_mask) || |
| 450 | len == 0 || len > TARGET_PAGE_SIZE) { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 451 | fprintf(stderr, "qemu: tried to set invalid watchpoint at " |
| 452 | TARGET_FMT_lx ", len=" TARGET_FMT_lu "\n", addr, len); |
| 453 | return -EINVAL; |
| 454 | } |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 455 | wp = g_malloc(sizeof(*wp)); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 456 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 457 | wp->vaddr = addr; |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 458 | wp->len_mask = len_mask; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 459 | wp->flags = flags; |
| 460 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 461 | /* keep all GDB-injected watchpoints in front */ |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 462 | if (flags & BP_GDB) |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 463 | QTAILQ_INSERT_HEAD(&env->watchpoints, wp, entry); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 464 | else |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 465 | QTAILQ_INSERT_TAIL(&env->watchpoints, wp, entry); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 466 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 467 | tlb_flush_page(env, addr); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 468 | |
| 469 | if (watchpoint) |
| 470 | *watchpoint = wp; |
| 471 | return 0; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 472 | } |
| 473 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 474 | /* Remove a specific watchpoint. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 475 | int cpu_watchpoint_remove(CPUArchState *env, target_ulong addr, target_ulong len, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 476 | int flags) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 477 | { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 478 | target_ulong len_mask = ~(len - 1); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 479 | CPUWatchpoint *wp; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 480 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 481 | QTAILQ_FOREACH(wp, &env->watchpoints, entry) { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 482 | if (addr == wp->vaddr && len_mask == wp->len_mask |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 483 | && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 484 | cpu_watchpoint_remove_by_ref(env, wp); |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 485 | return 0; |
| 486 | } |
| 487 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 488 | return -ENOENT; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 489 | } |
| 490 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 491 | /* Remove a specific watchpoint by reference. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 492 | void cpu_watchpoint_remove_by_ref(CPUArchState *env, CPUWatchpoint *watchpoint) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 493 | { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 494 | QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 495 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 496 | tlb_flush_page(env, watchpoint->vaddr); |
| 497 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 498 | g_free(watchpoint); |
edgar_igl | 7d03f82 | 2008-05-17 18:58:29 +0000 | [diff] [blame] | 499 | } |
| 500 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 501 | /* Remove all matching watchpoints. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 502 | void cpu_watchpoint_remove_all(CPUArchState *env, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 503 | { |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 504 | CPUWatchpoint *wp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 505 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 506 | QTAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 507 | if (wp->flags & mask) |
| 508 | cpu_watchpoint_remove_by_ref(env, wp); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 509 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 510 | } |
Paul Brook | c527ee8 | 2010-03-01 03:31:14 +0000 | [diff] [blame] | 511 | #endif |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 512 | |
| 513 | /* Add a breakpoint. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 514 | int cpu_breakpoint_insert(CPUArchState *env, target_ulong pc, int flags, |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 515 | CPUBreakpoint **breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 516 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 517 | #if defined(TARGET_HAS_ICE) |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 518 | CPUBreakpoint *bp; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 519 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 520 | bp = g_malloc(sizeof(*bp)); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 521 | |
| 522 | bp->pc = pc; |
| 523 | bp->flags = flags; |
| 524 | |
aliguori | 2dc9f41 | 2008-11-18 20:56:59 +0000 | [diff] [blame] | 525 | /* keep all GDB-injected breakpoints in front */ |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 526 | if (flags & BP_GDB) { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 527 | QTAILQ_INSERT_HEAD(&env->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 528 | } else { |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 529 | QTAILQ_INSERT_TAIL(&env->breakpoints, bp, entry); |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 530 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 531 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 532 | breakpoint_invalidate(ENV_GET_CPU(env), pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 533 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 534 | if (breakpoint) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 535 | *breakpoint = bp; |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 536 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 537 | return 0; |
| 538 | #else |
| 539 | return -ENOSYS; |
| 540 | #endif |
| 541 | } |
| 542 | |
| 543 | /* Remove a specific breakpoint. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 544 | int cpu_breakpoint_remove(CPUArchState *env, target_ulong pc, int flags) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 545 | { |
| 546 | #if defined(TARGET_HAS_ICE) |
| 547 | CPUBreakpoint *bp; |
| 548 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 549 | QTAILQ_FOREACH(bp, &env->breakpoints, entry) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 550 | if (bp->pc == pc && bp->flags == flags) { |
| 551 | cpu_breakpoint_remove_by_ref(env, bp); |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 552 | return 0; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 553 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 554 | } |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 555 | return -ENOENT; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 556 | #else |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 557 | return -ENOSYS; |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 558 | #endif |
| 559 | } |
| 560 | |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 561 | /* Remove a specific breakpoint by reference. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 562 | void cpu_breakpoint_remove_by_ref(CPUArchState *env, CPUBreakpoint *breakpoint) |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 563 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 564 | #if defined(TARGET_HAS_ICE) |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 565 | QTAILQ_REMOVE(&env->breakpoints, breakpoint, entry); |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 566 | |
Andreas Färber | 00b941e | 2013-06-29 18:55:54 +0200 | [diff] [blame] | 567 | breakpoint_invalidate(ENV_GET_CPU(env), breakpoint->pc); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 568 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 569 | g_free(breakpoint); |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 570 | #endif |
| 571 | } |
| 572 | |
| 573 | /* Remove all matching breakpoints. */ |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 574 | void cpu_breakpoint_remove_all(CPUArchState *env, int mask) |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 575 | { |
| 576 | #if defined(TARGET_HAS_ICE) |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 577 | CPUBreakpoint *bp, *next; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 578 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 579 | QTAILQ_FOREACH_SAFE(bp, &env->breakpoints, entry, next) { |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 580 | if (bp->flags & mask) |
| 581 | cpu_breakpoint_remove_by_ref(env, bp); |
aliguori | c0ce998 | 2008-11-25 22:13:57 +0000 | [diff] [blame] | 582 | } |
bellard | 4c3a88a | 2003-07-26 12:06:08 +0000 | [diff] [blame] | 583 | #endif |
| 584 | } |
| 585 | |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 586 | /* enable or disable single step mode. EXCP_DEBUG is returned by the |
| 587 | CPU loop after each instruction */ |
Andreas Färber | 3825b28 | 2013-06-24 18:41:06 +0200 | [diff] [blame] | 588 | void cpu_single_step(CPUState *cpu, int enabled) |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 589 | { |
bellard | 1fddef4 | 2005-04-17 19:16:13 +0000 | [diff] [blame] | 590 | #if defined(TARGET_HAS_ICE) |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 591 | if (cpu->singlestep_enabled != enabled) { |
| 592 | cpu->singlestep_enabled = enabled; |
| 593 | if (kvm_enabled()) { |
Stefan Weil | 38e478e | 2013-07-25 20:50:21 +0200 | [diff] [blame] | 594 | kvm_update_guest_debug(cpu, 0); |
Andreas Färber | ed2803d | 2013-06-21 20:20:45 +0200 | [diff] [blame] | 595 | } else { |
Stuart Brady | ccbb4d4 | 2009-05-03 12:15:06 +0100 | [diff] [blame] | 596 | /* must flush all the translated code to avoid inconsistencies */ |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 597 | /* XXX: only flush what is necessary */ |
Stefan Weil | 38e478e | 2013-07-25 20:50:21 +0200 | [diff] [blame] | 598 | CPUArchState *env = cpu->env_ptr; |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 599 | tb_flush(env); |
| 600 | } |
bellard | c33a346 | 2003-07-29 20:50:33 +0000 | [diff] [blame] | 601 | } |
| 602 | #endif |
| 603 | } |
| 604 | |
Andreas Färber | 9349b4f | 2012-03-14 01:38:32 +0100 | [diff] [blame] | 605 | void cpu_abort(CPUArchState *env, const char *fmt, ...) |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 606 | { |
Andreas Färber | 878096e | 2013-05-27 01:33:50 +0200 | [diff] [blame] | 607 | CPUState *cpu = ENV_GET_CPU(env); |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 608 | va_list ap; |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 609 | va_list ap2; |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 610 | |
| 611 | va_start(ap, fmt); |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 612 | va_copy(ap2, ap); |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 613 | fprintf(stderr, "qemu: fatal: "); |
| 614 | vfprintf(stderr, fmt, ap); |
| 615 | fprintf(stderr, "\n"); |
Andreas Färber | 878096e | 2013-05-27 01:33:50 +0200 | [diff] [blame] | 616 | cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 617 | if (qemu_log_enabled()) { |
| 618 | qemu_log("qemu: fatal: "); |
| 619 | qemu_log_vprintf(fmt, ap2); |
| 620 | qemu_log("\n"); |
Andreas Färber | a076285 | 2013-06-16 07:28:50 +0200 | [diff] [blame] | 621 | log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP); |
aliguori | 31b1a7b | 2009-01-15 22:35:09 +0000 | [diff] [blame] | 622 | qemu_log_flush(); |
aliguori | 93fcfe3 | 2009-01-15 22:34:14 +0000 | [diff] [blame] | 623 | qemu_log_close(); |
balrog | 924edca | 2007-06-10 14:07:13 +0000 | [diff] [blame] | 624 | } |
pbrook | 493ae1f | 2007-11-23 16:53:59 +0000 | [diff] [blame] | 625 | va_end(ap2); |
j_mayer | f937329 | 2007-09-29 12:18:20 +0000 | [diff] [blame] | 626 | va_end(ap); |
Riku Voipio | fd052bf | 2010-01-25 14:30:49 +0200 | [diff] [blame] | 627 | #if defined(CONFIG_USER_ONLY) |
| 628 | { |
| 629 | struct sigaction act; |
| 630 | sigfillset(&act.sa_mask); |
| 631 | act.sa_handler = SIG_DFL; |
| 632 | sigaction(SIGABRT, &act, NULL); |
| 633 | } |
| 634 | #endif |
bellard | 7501267 | 2003-06-21 13:11:07 +0000 | [diff] [blame] | 635 | abort(); |
| 636 | } |
| 637 | |
bellard | 0124311 | 2004-01-04 15:48:17 +0000 | [diff] [blame] | 638 | #if !defined(CONFIG_USER_ONLY) |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 639 | static RAMBlock *qemu_get_ram_block(ram_addr_t addr) |
| 640 | { |
| 641 | RAMBlock *block; |
| 642 | |
| 643 | /* The list is protected by the iothread lock here. */ |
| 644 | block = ram_list.mru_block; |
| 645 | if (block && addr - block->offset < block->length) { |
| 646 | goto found; |
| 647 | } |
| 648 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
| 649 | if (addr - block->offset < block->length) { |
| 650 | goto found; |
| 651 | } |
| 652 | } |
| 653 | |
| 654 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 655 | abort(); |
| 656 | |
| 657 | found: |
| 658 | ram_list.mru_block = block; |
| 659 | return block; |
| 660 | } |
| 661 | |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 662 | static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t end, |
| 663 | uintptr_t length) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 664 | { |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 665 | RAMBlock *block; |
| 666 | ram_addr_t start1; |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 667 | |
Paolo Bonzini | 041603f | 2013-09-09 17:49:45 +0200 | [diff] [blame] | 668 | block = qemu_get_ram_block(start); |
| 669 | assert(block == qemu_get_ram_block(end - 1)); |
| 670 | start1 = (uintptr_t)block->host + (start - block->offset); |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 671 | cpu_tlb_reset_dirty_all(start1, length); |
Juan Quintela | d24981d | 2012-05-22 00:42:40 +0200 | [diff] [blame] | 672 | } |
| 673 | |
| 674 | /* Note: start and end must be within the same ram block. */ |
| 675 | void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end, |
| 676 | int dirty_flags) |
| 677 | { |
| 678 | uintptr_t length; |
| 679 | |
| 680 | start &= TARGET_PAGE_MASK; |
| 681 | end = TARGET_PAGE_ALIGN(end); |
| 682 | |
| 683 | length = end - start; |
| 684 | if (length == 0) |
| 685 | return; |
| 686 | cpu_physical_memory_mask_dirty_range(start, length, dirty_flags); |
| 687 | |
| 688 | if (tcg_enabled()) { |
| 689 | tlb_reset_dirty_range_all(start, end, length); |
| 690 | } |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 691 | } |
| 692 | |
Blue Swirl | 8b9c99d | 2012-10-28 11:04:51 +0000 | [diff] [blame] | 693 | static int cpu_physical_memory_set_dirty_tracking(int enable) |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 694 | { |
Michael S. Tsirkin | f6f3fbc | 2010-01-27 22:06:57 +0200 | [diff] [blame] | 695 | int ret = 0; |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 696 | in_migration = enable; |
Michael S. Tsirkin | f6f3fbc | 2010-01-27 22:06:57 +0200 | [diff] [blame] | 697 | return ret; |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 698 | } |
| 699 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 700 | hwaddr memory_region_section_get_iotlb(CPUArchState *env, |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 701 | MemoryRegionSection *section, |
| 702 | target_ulong vaddr, |
| 703 | hwaddr paddr, hwaddr xlat, |
| 704 | int prot, |
| 705 | target_ulong *address) |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 706 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 707 | hwaddr iotlb; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 708 | CPUWatchpoint *wp; |
| 709 | |
Blue Swirl | cc5bea6 | 2012-04-14 14:56:48 +0000 | [diff] [blame] | 710 | if (memory_region_is_ram(section->mr)) { |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 711 | /* Normal RAM. */ |
| 712 | iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 713 | + xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 714 | if (!section->readonly) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 715 | iotlb |= PHYS_SECTION_NOTDIRTY; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 716 | } else { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 717 | iotlb |= PHYS_SECTION_ROM; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 718 | } |
| 719 | } else { |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 720 | iotlb = section - address_space_memory.dispatch->sections; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 721 | iotlb += xlat; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 722 | } |
| 723 | |
| 724 | /* Make accesses to pages with watchpoints go via the |
| 725 | watchpoint trap routines. */ |
| 726 | QTAILQ_FOREACH(wp, &env->watchpoints, entry) { |
| 727 | if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) { |
| 728 | /* Avoid trapping reads of pages with a write breakpoint. */ |
| 729 | if ((prot & PAGE_WRITE) || (wp->flags & BP_MEM_READ)) { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 730 | iotlb = PHYS_SECTION_WATCH + paddr; |
Blue Swirl | e554861 | 2012-04-21 13:08:33 +0000 | [diff] [blame] | 731 | *address |= TLB_MMIO; |
| 732 | break; |
| 733 | } |
| 734 | } |
| 735 | } |
| 736 | |
| 737 | return iotlb; |
| 738 | } |
bellard | 9fa3e85 | 2004-01-04 18:06:42 +0000 | [diff] [blame] | 739 | #endif /* defined(CONFIG_USER_ONLY) */ |
| 740 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 741 | #if !defined(CONFIG_USER_ONLY) |
pbrook | 8da3ff1 | 2008-12-01 18:59:50 +0000 | [diff] [blame] | 742 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 743 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 744 | uint16_t section); |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 745 | static subpage_t *subpage_init(AddressSpace *as, hwaddr base); |
Avi Kivity | 54688b1 | 2012-02-09 17:34:32 +0200 | [diff] [blame] | 746 | |
Stefan Weil | 575ddeb | 2013-09-29 20:56:45 +0200 | [diff] [blame] | 747 | static void *(*phys_mem_alloc)(size_t size) = qemu_anon_ram_alloc; |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 748 | |
| 749 | /* |
| 750 | * Set a custom physical guest memory alloator. |
| 751 | * Accelerators with unusual needs may need this. Hopefully, we can |
| 752 | * get rid of it eventually. |
| 753 | */ |
Stefan Weil | 575ddeb | 2013-09-29 20:56:45 +0200 | [diff] [blame] | 754 | void phys_mem_set_alloc(void *(*alloc)(size_t)) |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 755 | { |
| 756 | phys_mem_alloc = alloc; |
| 757 | } |
| 758 | |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 759 | static uint16_t phys_section_add(MemoryRegionSection *section) |
| 760 | { |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 761 | /* The physical section number is ORed with a page-aligned |
| 762 | * pointer to produce the iotlb entries. Thus it should |
| 763 | * never overflow into the page-aligned value. |
| 764 | */ |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 765 | assert(next_map.sections_nb < TARGET_PAGE_SIZE); |
Paolo Bonzini | 68f3f65 | 2013-05-07 11:30:23 +0200 | [diff] [blame] | 766 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 767 | if (next_map.sections_nb == next_map.sections_nb_alloc) { |
| 768 | next_map.sections_nb_alloc = MAX(next_map.sections_nb_alloc * 2, |
| 769 | 16); |
| 770 | next_map.sections = g_renew(MemoryRegionSection, next_map.sections, |
| 771 | next_map.sections_nb_alloc); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 772 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 773 | next_map.sections[next_map.sections_nb] = *section; |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 774 | memory_region_ref(section->mr); |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 775 | return next_map.sections_nb++; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 776 | } |
| 777 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 778 | static void phys_section_destroy(MemoryRegion *mr) |
| 779 | { |
Paolo Bonzini | dfde4e6 | 2013-05-06 10:46:11 +0200 | [diff] [blame] | 780 | memory_region_unref(mr); |
| 781 | |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 782 | if (mr->subpage) { |
| 783 | subpage_t *subpage = container_of(mr, subpage_t, iomem); |
| 784 | memory_region_destroy(&subpage->iomem); |
| 785 | g_free(subpage); |
| 786 | } |
| 787 | } |
| 788 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 789 | static void phys_sections_free(PhysPageMap *map) |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 790 | { |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 791 | while (map->sections_nb > 0) { |
| 792 | MemoryRegionSection *section = &map->sections[--map->sections_nb]; |
Paolo Bonzini | 058bc4b | 2013-06-25 09:30:48 +0200 | [diff] [blame] | 793 | phys_section_destroy(section->mr); |
| 794 | } |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 795 | g_free(map->sections); |
| 796 | g_free(map->nodes); |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 797 | g_free(map); |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 798 | } |
| 799 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 800 | static void register_subpage(AddressSpaceDispatch *d, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 801 | { |
| 802 | subpage_t *subpage; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 803 | hwaddr base = section->offset_within_address_space |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 804 | & TARGET_PAGE_MASK; |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 805 | MemoryRegionSection *existing = phys_page_find(d->phys_map, base >> TARGET_PAGE_BITS, |
| 806 | next_map.nodes, next_map.sections); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 807 | MemoryRegionSection subsection = { |
| 808 | .offset_within_address_space = base, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 809 | .size = int128_make64(TARGET_PAGE_SIZE), |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 810 | }; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 811 | hwaddr start, end; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 812 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 813 | assert(existing->mr->subpage || existing->mr == &io_mem_unassigned); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 814 | |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 815 | if (!(existing->mr->subpage)) { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 816 | subpage = subpage_init(d->as, base); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 817 | subsection.mr = &subpage->iomem; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 818 | phys_page_set(d, base >> TARGET_PAGE_BITS, 1, |
Avi Kivity | 2999097 | 2012-02-13 20:21:20 +0200 | [diff] [blame] | 819 | phys_section_add(&subsection)); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 820 | } else { |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 821 | subpage = container_of(existing->mr, subpage_t, iomem); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 822 | } |
| 823 | start = section->offset_within_address_space & ~TARGET_PAGE_MASK; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 824 | end = start + int128_get64(section->size) - 1; |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 825 | subpage_register(subpage, start, end, phys_section_add(section)); |
| 826 | } |
| 827 | |
| 828 | |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 829 | static void register_multipage(AddressSpaceDispatch *d, |
| 830 | MemoryRegionSection *section) |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 831 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 832 | hwaddr start_addr = section->offset_within_address_space; |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 833 | uint16_t section_index = phys_section_add(section); |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 834 | uint64_t num_pages = int128_get64(int128_rshift(section->size, |
| 835 | TARGET_PAGE_BITS)); |
Avi Kivity | dd81124 | 2012-01-02 12:17:03 +0200 | [diff] [blame] | 836 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 837 | assert(num_pages); |
| 838 | phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index); |
bellard | 33417e7 | 2003-08-10 21:47:01 +0000 | [diff] [blame] | 839 | } |
| 840 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 841 | static void mem_add(MemoryListener *listener, MemoryRegionSection *section) |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 842 | { |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 843 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 844 | AddressSpaceDispatch *d = as->next_dispatch; |
Paolo Bonzini | 99b9cc0 | 2013-05-27 13:18:01 +0200 | [diff] [blame] | 845 | MemoryRegionSection now = *section, remain = *section; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 846 | Int128 page_size = int128_make64(TARGET_PAGE_SIZE); |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 847 | |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 848 | if (now.offset_within_address_space & ~TARGET_PAGE_MASK) { |
| 849 | uint64_t left = TARGET_PAGE_ALIGN(now.offset_within_address_space) |
| 850 | - now.offset_within_address_space; |
| 851 | |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 852 | now.size = int128_min(int128_make64(left), now.size); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 853 | register_subpage(d, &now); |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 854 | } else { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 855 | now.size = int128_zero(); |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 856 | } |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 857 | while (int128_ne(remain.size, now.size)) { |
| 858 | remain.size = int128_sub(remain.size, now.size); |
| 859 | remain.offset_within_address_space += int128_get64(now.size); |
| 860 | remain.offset_within_region += int128_get64(now.size); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 861 | now = remain; |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 862 | if (int128_lt(remain.size, page_size)) { |
Paolo Bonzini | 733d5ef | 2013-05-27 10:47:10 +0200 | [diff] [blame] | 863 | register_subpage(d, &now); |
Hu Tao | 8826624 | 2013-08-29 18:21:16 +0800 | [diff] [blame] | 864 | } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 865 | now.size = page_size; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 866 | register_subpage(d, &now); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 867 | } else { |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 868 | now.size = int128_and(now.size, int128_neg(page_size)); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 869 | register_multipage(d, &now); |
Tyler Hall | 69b6764 | 2012-07-25 18:45:04 -0400 | [diff] [blame] | 870 | } |
Avi Kivity | 0f0cb16 | 2012-02-13 17:14:32 +0200 | [diff] [blame] | 871 | } |
| 872 | } |
| 873 | |
Sheng Yang | 62a2744 | 2010-01-26 19:21:16 +0800 | [diff] [blame] | 874 | void qemu_flush_coalesced_mmio_buffer(void) |
| 875 | { |
| 876 | if (kvm_enabled()) |
| 877 | kvm_flush_coalesced_mmio_buffer(); |
| 878 | } |
| 879 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 880 | void qemu_mutex_lock_ramlist(void) |
| 881 | { |
| 882 | qemu_mutex_lock(&ram_list.mutex); |
| 883 | } |
| 884 | |
| 885 | void qemu_mutex_unlock_ramlist(void) |
| 886 | { |
| 887 | qemu_mutex_unlock(&ram_list.mutex); |
| 888 | } |
| 889 | |
Markus Armbruster | e1e84ba | 2013-07-31 15:11:10 +0200 | [diff] [blame] | 890 | #ifdef __linux__ |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 891 | |
| 892 | #include <sys/vfs.h> |
| 893 | |
| 894 | #define HUGETLBFS_MAGIC 0x958458f6 |
| 895 | |
| 896 | static long gethugepagesize(const char *path) |
| 897 | { |
| 898 | struct statfs fs; |
| 899 | int ret; |
| 900 | |
| 901 | do { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 902 | ret = statfs(path, &fs); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 903 | } while (ret != 0 && errno == EINTR); |
| 904 | |
| 905 | if (ret != 0) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 906 | perror(path); |
| 907 | return 0; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 908 | } |
| 909 | |
| 910 | if (fs.f_type != HUGETLBFS_MAGIC) |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 911 | fprintf(stderr, "Warning: path not on HugeTLBFS: %s\n", path); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 912 | |
| 913 | return fs.f_bsize; |
| 914 | } |
| 915 | |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 916 | static sigjmp_buf sigjump; |
| 917 | |
| 918 | static void sigbus_handler(int signal) |
| 919 | { |
| 920 | siglongjmp(sigjump, 1); |
| 921 | } |
| 922 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 923 | static void *file_ram_alloc(RAMBlock *block, |
| 924 | ram_addr_t memory, |
| 925 | const char *path) |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 926 | { |
| 927 | char *filename; |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 928 | char *sanitized_name; |
| 929 | char *c; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 930 | void *area; |
| 931 | int fd; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 932 | unsigned long hpagesize; |
| 933 | |
| 934 | hpagesize = gethugepagesize(path); |
| 935 | if (!hpagesize) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 936 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 937 | } |
| 938 | |
| 939 | if (memory < hpagesize) { |
| 940 | return NULL; |
| 941 | } |
| 942 | |
| 943 | if (kvm_enabled() && !kvm_has_sync_mmu()) { |
| 944 | fprintf(stderr, "host lacks kvm mmu notifiers, -mem-path unsupported\n"); |
| 945 | return NULL; |
| 946 | } |
| 947 | |
Peter Feiner | 8ca761f | 2013-03-04 13:54:25 -0500 | [diff] [blame] | 948 | /* Make name safe to use with mkstemp by replacing '/' with '_'. */ |
| 949 | sanitized_name = g_strdup(block->mr->name); |
| 950 | for (c = sanitized_name; *c != '\0'; c++) { |
| 951 | if (*c == '/') |
| 952 | *c = '_'; |
| 953 | } |
| 954 | |
| 955 | filename = g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path, |
| 956 | sanitized_name); |
| 957 | g_free(sanitized_name); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 958 | |
| 959 | fd = mkstemp(filename); |
| 960 | if (fd < 0) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 961 | perror("unable to create backing store for hugepages"); |
Stefan Weil | e4ada48 | 2013-01-16 18:37:23 +0100 | [diff] [blame] | 962 | g_free(filename); |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 963 | return NULL; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 964 | } |
| 965 | unlink(filename); |
Stefan Weil | e4ada48 | 2013-01-16 18:37:23 +0100 | [diff] [blame] | 966 | g_free(filename); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 967 | |
| 968 | memory = (memory+hpagesize-1) & ~(hpagesize-1); |
| 969 | |
| 970 | /* |
| 971 | * ftruncate is not supported by hugetlbfs in older |
| 972 | * hosts, so don't bother bailing out on errors. |
| 973 | * If anything goes wrong with it under other filesystems, |
| 974 | * mmap will fail. |
| 975 | */ |
| 976 | if (ftruncate(fd, memory)) |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 977 | perror("ftruncate"); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 978 | |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 979 | area = mmap(0, memory, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, 0); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 980 | if (area == MAP_FAILED) { |
Yoshiaki Tamura | 9742bf2 | 2010-08-18 13:30:13 +0900 | [diff] [blame] | 981 | perror("file_ram_alloc: can't mmap RAM pages"); |
| 982 | close(fd); |
| 983 | return (NULL); |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 984 | } |
Marcelo Tosatti | ef36fa1 | 2013-10-28 18:51:46 -0200 | [diff] [blame] | 985 | |
| 986 | if (mem_prealloc) { |
| 987 | int ret, i; |
| 988 | struct sigaction act, oldact; |
| 989 | sigset_t set, oldset; |
| 990 | |
| 991 | memset(&act, 0, sizeof(act)); |
| 992 | act.sa_handler = &sigbus_handler; |
| 993 | act.sa_flags = 0; |
| 994 | |
| 995 | ret = sigaction(SIGBUS, &act, &oldact); |
| 996 | if (ret) { |
| 997 | perror("file_ram_alloc: failed to install signal handler"); |
| 998 | exit(1); |
| 999 | } |
| 1000 | |
| 1001 | /* unblock SIGBUS */ |
| 1002 | sigemptyset(&set); |
| 1003 | sigaddset(&set, SIGBUS); |
| 1004 | pthread_sigmask(SIG_UNBLOCK, &set, &oldset); |
| 1005 | |
| 1006 | if (sigsetjmp(sigjump, 1)) { |
| 1007 | fprintf(stderr, "file_ram_alloc: failed to preallocate pages\n"); |
| 1008 | exit(1); |
| 1009 | } |
| 1010 | |
| 1011 | /* MAP_POPULATE silently ignores failures */ |
| 1012 | for (i = 0; i < (memory/hpagesize)-1; i++) { |
| 1013 | memset(area + (hpagesize*i), 0, 1); |
| 1014 | } |
| 1015 | |
| 1016 | ret = sigaction(SIGBUS, &oldact, NULL); |
| 1017 | if (ret) { |
| 1018 | perror("file_ram_alloc: failed to reinstall signal handler"); |
| 1019 | exit(1); |
| 1020 | } |
| 1021 | |
| 1022 | pthread_sigmask(SIG_SETMASK, &oldset, NULL); |
| 1023 | } |
| 1024 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1025 | block->fd = fd; |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1026 | return area; |
| 1027 | } |
Markus Armbruster | e1e84ba | 2013-07-31 15:11:10 +0200 | [diff] [blame] | 1028 | #else |
| 1029 | static void *file_ram_alloc(RAMBlock *block, |
| 1030 | ram_addr_t memory, |
| 1031 | const char *path) |
| 1032 | { |
| 1033 | fprintf(stderr, "-mem-path not supported on this host\n"); |
| 1034 | exit(1); |
| 1035 | } |
Marcelo Tosatti | c902760 | 2010-03-01 20:25:08 -0300 | [diff] [blame] | 1036 | #endif |
| 1037 | |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1038 | static ram_addr_t find_ram_offset(ram_addr_t size) |
| 1039 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1040 | RAMBlock *block, *next_block; |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1041 | ram_addr_t offset = RAM_ADDR_MAX, mingap = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1042 | |
Stefan Hajnoczi | 49cd9ac | 2013-03-11 10:20:21 +0100 | [diff] [blame] | 1043 | assert(size != 0); /* it would hand out same offset multiple times */ |
| 1044 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1045 | if (QTAILQ_EMPTY(&ram_list.blocks)) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1046 | return 0; |
| 1047 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1048 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 1049 | ram_addr_t end, next = RAM_ADDR_MAX; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1050 | |
| 1051 | end = block->offset + block->length; |
| 1052 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1053 | QTAILQ_FOREACH(next_block, &ram_list.blocks, next) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1054 | if (next_block->offset >= end) { |
| 1055 | next = MIN(next, next_block->offset); |
| 1056 | } |
| 1057 | } |
| 1058 | if (next - end >= size && next - end < mingap) { |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1059 | offset = end; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1060 | mingap = next - end; |
| 1061 | } |
| 1062 | } |
Alex Williamson | 3e837b2 | 2011-10-31 08:54:09 -0600 | [diff] [blame] | 1063 | |
| 1064 | if (offset == RAM_ADDR_MAX) { |
| 1065 | fprintf(stderr, "Failed to find gap of requested size: %" PRIu64 "\n", |
| 1066 | (uint64_t)size); |
| 1067 | abort(); |
| 1068 | } |
| 1069 | |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1070 | return offset; |
| 1071 | } |
| 1072 | |
Juan Quintela | 652d7ec | 2012-07-20 10:37:54 +0200 | [diff] [blame] | 1073 | ram_addr_t last_ram_offset(void) |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1074 | { |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1075 | RAMBlock *block; |
| 1076 | ram_addr_t last = 0; |
| 1077 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1078 | QTAILQ_FOREACH(block, &ram_list.blocks, next) |
Alex Williamson | d17b528 | 2010-06-25 11:08:38 -0600 | [diff] [blame] | 1079 | last = MAX(last, block->offset + block->length); |
| 1080 | |
| 1081 | return last; |
| 1082 | } |
| 1083 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1084 | static void qemu_ram_setup_dump(void *addr, ram_addr_t size) |
| 1085 | { |
| 1086 | int ret; |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1087 | |
| 1088 | /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */ |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 1089 | if (!qemu_opt_get_bool(qemu_get_machine_opts(), |
| 1090 | "dump-guest-core", true)) { |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1091 | ret = qemu_madvise(addr, size, QEMU_MADV_DONTDUMP); |
| 1092 | if (ret) { |
| 1093 | perror("qemu_madvise"); |
| 1094 | fprintf(stderr, "madvise doesn't support MADV_DONTDUMP, " |
| 1095 | "but dump_guest_core=off specified\n"); |
| 1096 | } |
| 1097 | } |
| 1098 | } |
| 1099 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1100 | void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev) |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1101 | { |
| 1102 | RAMBlock *new_block, *block; |
| 1103 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1104 | new_block = NULL; |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1105 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1106 | if (block->offset == addr) { |
| 1107 | new_block = block; |
| 1108 | break; |
| 1109 | } |
| 1110 | } |
| 1111 | assert(new_block); |
| 1112 | assert(!new_block->idstr[0]); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1113 | |
Anthony Liguori | 09e5ab6 | 2012-02-03 12:28:43 -0600 | [diff] [blame] | 1114 | if (dev) { |
| 1115 | char *id = qdev_get_dev_path(dev); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1116 | if (id) { |
| 1117 | snprintf(new_block->idstr, sizeof(new_block->idstr), "%s/", id); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1118 | g_free(id); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1119 | } |
| 1120 | } |
| 1121 | pstrcat(new_block->idstr, sizeof(new_block->idstr), name); |
| 1122 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1123 | /* This assumes the iothread lock is taken here too. */ |
| 1124 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1125 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1126 | if (block != new_block && !strcmp(block->idstr, new_block->idstr)) { |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1127 | fprintf(stderr, "RAMBlock \"%s\" already registered, abort!\n", |
| 1128 | new_block->idstr); |
| 1129 | abort(); |
| 1130 | } |
| 1131 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1132 | qemu_mutex_unlock_ramlist(); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1133 | } |
| 1134 | |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1135 | static int memory_try_enable_merging(void *addr, size_t len) |
| 1136 | { |
Markus Armbruster | 2ff3de6 | 2013-07-04 15:09:22 +0200 | [diff] [blame] | 1137 | if (!qemu_opt_get_bool(qemu_get_machine_opts(), "mem-merge", true)) { |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1138 | /* disabled by the user */ |
| 1139 | return 0; |
| 1140 | } |
| 1141 | |
| 1142 | return qemu_madvise(addr, len, QEMU_MADV_MERGEABLE); |
| 1143 | } |
| 1144 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1145 | ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host, |
| 1146 | MemoryRegion *mr) |
| 1147 | { |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1148 | RAMBlock *block, *new_block; |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1149 | |
| 1150 | size = TARGET_PAGE_ALIGN(size); |
| 1151 | new_block = g_malloc0(sizeof(*new_block)); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1152 | new_block->fd = -1; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1153 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1154 | /* This assumes the iothread lock is taken here too. */ |
| 1155 | qemu_mutex_lock_ramlist(); |
Avi Kivity | 7c63736 | 2011-12-21 13:09:49 +0200 | [diff] [blame] | 1156 | new_block->mr = mr; |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1157 | new_block->offset = find_ram_offset(size); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1158 | if (host) { |
| 1159 | new_block->host = host; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1160 | new_block->flags |= RAM_PREALLOC_MASK; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1161 | } else if (xen_enabled()) { |
| 1162 | if (mem_path) { |
| 1163 | fprintf(stderr, "-mem-path not supported with Xen\n"); |
| 1164 | exit(1); |
| 1165 | } |
| 1166 | xen_ram_alloc(new_block->offset, size, mr); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1167 | } else { |
| 1168 | if (mem_path) { |
Markus Armbruster | e1e84ba | 2013-07-31 15:11:10 +0200 | [diff] [blame] | 1169 | if (phys_mem_alloc != qemu_anon_ram_alloc) { |
| 1170 | /* |
| 1171 | * file_ram_alloc() needs to allocate just like |
| 1172 | * phys_mem_alloc, but we haven't bothered to provide |
| 1173 | * a hook there. |
| 1174 | */ |
| 1175 | fprintf(stderr, |
| 1176 | "-mem-path not supported with this accelerator\n"); |
| 1177 | exit(1); |
| 1178 | } |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1179 | new_block->host = file_ram_alloc(new_block, size, mem_path); |
Markus Armbruster | 0628c18 | 2013-07-31 15:11:06 +0200 | [diff] [blame] | 1180 | } |
| 1181 | if (!new_block->host) { |
Markus Armbruster | 9113803 | 2013-07-31 15:11:08 +0200 | [diff] [blame] | 1182 | new_block->host = phys_mem_alloc(size); |
Markus Armbruster | 3922825 | 2013-07-31 15:11:11 +0200 | [diff] [blame] | 1183 | if (!new_block->host) { |
| 1184 | fprintf(stderr, "Cannot set up guest memory '%s': %s\n", |
| 1185 | new_block->mr->name, strerror(errno)); |
| 1186 | exit(1); |
| 1187 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1188 | memory_try_enable_merging(new_block->host, size); |
Yoshiaki Tamura | 6977dfe | 2010-08-18 15:41:49 +0900 | [diff] [blame] | 1189 | } |
| 1190 | } |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1191 | new_block->length = size; |
| 1192 | |
Paolo Bonzini | abb26d6 | 2012-11-14 16:00:51 +0100 | [diff] [blame] | 1193 | /* Keep the list sorted from biggest to smallest block. */ |
| 1194 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
| 1195 | if (block->length < new_block->length) { |
| 1196 | break; |
| 1197 | } |
| 1198 | } |
| 1199 | if (block) { |
| 1200 | QTAILQ_INSERT_BEFORE(block, new_block, next); |
| 1201 | } else { |
| 1202 | QTAILQ_INSERT_TAIL(&ram_list.blocks, new_block, next); |
| 1203 | } |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1204 | ram_list.mru_block = NULL; |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1205 | |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1206 | ram_list.version++; |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1207 | qemu_mutex_unlock_ramlist(); |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1208 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1209 | ram_list.phys_dirty = g_realloc(ram_list.phys_dirty, |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1210 | last_ram_offset() >> TARGET_PAGE_BITS); |
Igor Mitsyanko | 5fda043 | 2012-08-10 18:45:11 +0400 | [diff] [blame] | 1211 | memset(ram_list.phys_dirty + (new_block->offset >> TARGET_PAGE_BITS), |
| 1212 | 0, size >> TARGET_PAGE_BITS); |
Juan Quintela | 1720aee | 2012-06-22 13:14:17 +0200 | [diff] [blame] | 1213 | cpu_physical_memory_set_dirty_range(new_block->offset, size, 0xff); |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1214 | |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1215 | qemu_ram_setup_dump(new_block->host, size); |
Luiz Capitulino | ad0b532 | 2012-10-05 16:47:57 -0300 | [diff] [blame] | 1216 | qemu_madvise(new_block->host, size, QEMU_MADV_HUGEPAGE); |
Andrea Arcangeli | 3e469db | 2013-07-25 12:11:15 +0200 | [diff] [blame] | 1217 | qemu_madvise(new_block->host, size, QEMU_MADV_DONTFORK); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1218 | |
Cam Macdonell | 84b89d7 | 2010-07-26 18:10:57 -0600 | [diff] [blame] | 1219 | if (kvm_enabled()) |
| 1220 | kvm_setup_guest_memory(new_block->host, size); |
| 1221 | |
| 1222 | return new_block->offset; |
| 1223 | } |
| 1224 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1225 | ram_addr_t qemu_ram_alloc(ram_addr_t size, MemoryRegion *mr) |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1226 | { |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 1227 | return qemu_ram_alloc_from_ptr(size, NULL, mr); |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1228 | } |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1229 | |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1230 | void qemu_ram_free_from_ptr(ram_addr_t addr) |
| 1231 | { |
| 1232 | RAMBlock *block; |
| 1233 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1234 | /* This assumes the iothread lock is taken here too. */ |
| 1235 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1236 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1237 | if (addr == block->offset) { |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1238 | QTAILQ_REMOVE(&ram_list.blocks, block, next); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1239 | ram_list.mru_block = NULL; |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1240 | ram_list.version++; |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1241 | g_free(block); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1242 | break; |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1243 | } |
| 1244 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1245 | qemu_mutex_unlock_ramlist(); |
Alex Williamson | 1f2e98b | 2011-05-03 12:48:09 -0600 | [diff] [blame] | 1246 | } |
| 1247 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1248 | void qemu_ram_free(ram_addr_t addr) |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1249 | { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1250 | RAMBlock *block; |
| 1251 | |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1252 | /* This assumes the iothread lock is taken here too. */ |
| 1253 | qemu_mutex_lock_ramlist(); |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1254 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1255 | if (addr == block->offset) { |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1256 | QTAILQ_REMOVE(&ram_list.blocks, block, next); |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1257 | ram_list.mru_block = NULL; |
Umesh Deshpande | f798b07 | 2011-08-18 11:41:17 -0700 | [diff] [blame] | 1258 | ram_list.version++; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1259 | if (block->flags & RAM_PREALLOC_MASK) { |
| 1260 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1261 | } else if (xen_enabled()) { |
| 1262 | xen_invalidate_map_cache_entry(block->host); |
Stefan Weil | 089f3f7 | 2013-09-18 07:48:15 +0200 | [diff] [blame] | 1263 | #ifndef _WIN32 |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1264 | } else if (block->fd >= 0) { |
| 1265 | munmap(block->host, block->length); |
| 1266 | close(block->fd); |
Stefan Weil | 089f3f7 | 2013-09-18 07:48:15 +0200 | [diff] [blame] | 1267 | #endif |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1268 | } else { |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1269 | qemu_anon_ram_free(block->host, block->length); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1270 | } |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1271 | g_free(block); |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1272 | break; |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1273 | } |
| 1274 | } |
Umesh Deshpande | b2a8658 | 2011-08-17 00:01:33 -0700 | [diff] [blame] | 1275 | qemu_mutex_unlock_ramlist(); |
Alex Williamson | 04b1665 | 2010-07-02 11:13:17 -0600 | [diff] [blame] | 1276 | |
bellard | e9a1ab1 | 2007-02-08 23:08:38 +0000 | [diff] [blame] | 1277 | } |
| 1278 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1279 | #ifndef _WIN32 |
| 1280 | void qemu_ram_remap(ram_addr_t addr, ram_addr_t length) |
| 1281 | { |
| 1282 | RAMBlock *block; |
| 1283 | ram_addr_t offset; |
| 1284 | int flags; |
| 1285 | void *area, *vaddr; |
| 1286 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1287 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1288 | offset = addr - block->offset; |
| 1289 | if (offset < block->length) { |
| 1290 | vaddr = block->host + offset; |
| 1291 | if (block->flags & RAM_PREALLOC_MASK) { |
| 1292 | ; |
Markus Armbruster | dfeaf2a | 2013-07-31 15:11:05 +0200 | [diff] [blame] | 1293 | } else if (xen_enabled()) { |
| 1294 | abort(); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1295 | } else { |
| 1296 | flags = MAP_FIXED; |
| 1297 | munmap(vaddr, length); |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1298 | if (block->fd >= 0) { |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1299 | #ifdef MAP_POPULATE |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1300 | flags |= mem_prealloc ? MAP_POPULATE | MAP_SHARED : |
| 1301 | MAP_PRIVATE; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1302 | #else |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1303 | flags |= MAP_PRIVATE; |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1304 | #endif |
Markus Armbruster | 3435f39 | 2013-07-31 15:11:07 +0200 | [diff] [blame] | 1305 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 1306 | flags, block->fd, offset); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1307 | } else { |
Markus Armbruster | 2eb9fba | 2013-07-31 15:11:09 +0200 | [diff] [blame] | 1308 | /* |
| 1309 | * Remap needs to match alloc. Accelerators that |
| 1310 | * set phys_mem_alloc never remap. If they did, |
| 1311 | * we'd need a remap hook here. |
| 1312 | */ |
| 1313 | assert(phys_mem_alloc == qemu_anon_ram_alloc); |
| 1314 | |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1315 | flags |= MAP_PRIVATE | MAP_ANONYMOUS; |
| 1316 | area = mmap(vaddr, length, PROT_READ | PROT_WRITE, |
| 1317 | flags, -1, 0); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1318 | } |
| 1319 | if (area != vaddr) { |
Anthony PERARD | f15fbc4 | 2011-07-20 08:17:42 +0000 | [diff] [blame] | 1320 | fprintf(stderr, "Could not remap addr: " |
| 1321 | RAM_ADDR_FMT "@" RAM_ADDR_FMT "\n", |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1322 | length, addr); |
| 1323 | exit(1); |
| 1324 | } |
Luiz Capitulino | 8490fc7 | 2012-09-05 16:50:16 -0300 | [diff] [blame] | 1325 | memory_try_enable_merging(vaddr, length); |
Jason Baron | ddb97f1 | 2012-08-02 15:44:16 -0400 | [diff] [blame] | 1326 | qemu_ram_setup_dump(vaddr, length); |
Huang Ying | cd19cfa | 2011-03-02 08:56:19 +0100 | [diff] [blame] | 1327 | } |
| 1328 | return; |
| 1329 | } |
| 1330 | } |
| 1331 | } |
| 1332 | #endif /* !_WIN32 */ |
| 1333 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1334 | /* Return a host pointer to ram allocated with qemu_ram_alloc. |
| 1335 | With the exception of the softmmu code in this file, this should |
| 1336 | only be used for local memory (e.g. video ram) that the device owns, |
| 1337 | and knows it isn't going to access beyond the end of the block. |
| 1338 | |
| 1339 | It should not be used for general purpose DMA. |
| 1340 | Use cpu_physical_memory_map/cpu_physical_memory_rw instead. |
| 1341 | */ |
| 1342 | void *qemu_get_ram_ptr(ram_addr_t addr) |
| 1343 | { |
| 1344 | RAMBlock *block = qemu_get_ram_block(addr); |
| 1345 | |
Paolo Bonzini | 0d6d3c8 | 2012-11-14 15:45:02 +0100 | [diff] [blame] | 1346 | if (xen_enabled()) { |
| 1347 | /* We need to check if the requested address is in the RAM |
| 1348 | * because we don't want to map the entire memory in QEMU. |
| 1349 | * In that case just map until the end of the page. |
| 1350 | */ |
| 1351 | if (block->offset == 0) { |
| 1352 | return xen_map_cache(addr, 0, 0); |
| 1353 | } else if (block->host == NULL) { |
| 1354 | block->host = |
| 1355 | xen_map_cache(block->offset, block->length, 1); |
| 1356 | } |
| 1357 | } |
| 1358 | return block->host + (addr - block->offset); |
pbrook | dc828ca | 2009-04-09 22:21:07 +0000 | [diff] [blame] | 1359 | } |
| 1360 | |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1361 | /* Return a host pointer to guest's ram. Similar to qemu_get_ram_ptr |
| 1362 | * but takes a size argument */ |
Peter Maydell | cb85f7a | 2013-07-08 09:44:04 +0100 | [diff] [blame] | 1363 | static void *qemu_ram_ptr_length(ram_addr_t addr, hwaddr *size) |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1364 | { |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 1365 | if (*size == 0) { |
| 1366 | return NULL; |
| 1367 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1368 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 1369 | return xen_map_cache(addr, *size, 1); |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1370 | } else { |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1371 | RAMBlock *block; |
| 1372 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1373 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1374 | if (addr - block->offset < block->length) { |
| 1375 | if (addr - block->offset + *size > block->length) |
| 1376 | *size = block->length - addr + block->offset; |
| 1377 | return block->host + (addr - block->offset); |
| 1378 | } |
| 1379 | } |
| 1380 | |
| 1381 | fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr); |
| 1382 | abort(); |
Stefano Stabellini | 38bee5d | 2011-05-19 18:35:45 +0100 | [diff] [blame] | 1383 | } |
| 1384 | } |
| 1385 | |
Paolo Bonzini | 7443b43 | 2013-06-03 12:44:02 +0200 | [diff] [blame] | 1386 | /* Some of the softmmu routines need to translate from a host pointer |
| 1387 | (typically a TLB entry) back to a ram offset. */ |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1388 | MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr) |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 1389 | { |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1390 | RAMBlock *block; |
| 1391 | uint8_t *host = ptr; |
| 1392 | |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 1393 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 1394 | *ram_addr = xen_ram_addr_from_mapcache(ptr); |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1395 | return qemu_get_ram_block(*ram_addr)->mr; |
Stefano Stabellini | 712c2b4 | 2011-05-19 18:35:46 +0100 | [diff] [blame] | 1396 | } |
| 1397 | |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1398 | block = ram_list.mru_block; |
| 1399 | if (block && block->host && host - block->host < block->length) { |
| 1400 | goto found; |
| 1401 | } |
| 1402 | |
Paolo Bonzini | a316103 | 2012-11-14 15:54:48 +0100 | [diff] [blame] | 1403 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1404 | /* This case append when the block is not mapped. */ |
| 1405 | if (block->host == NULL) { |
| 1406 | continue; |
| 1407 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1408 | if (host - block->host < block->length) { |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1409 | goto found; |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1410 | } |
pbrook | 94a6b54 | 2009-04-11 17:15:54 +0000 | [diff] [blame] | 1411 | } |
Jun Nakajima | 432d268 | 2010-08-31 16:41:25 +0100 | [diff] [blame] | 1412 | |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1413 | return NULL; |
Paolo Bonzini | 23887b7 | 2013-05-06 14:28:39 +0200 | [diff] [blame] | 1414 | |
| 1415 | found: |
| 1416 | *ram_addr = block->offset + (host - block->host); |
Paolo Bonzini | 1b5ec23 | 2013-05-06 14:36:15 +0200 | [diff] [blame] | 1417 | return block->mr; |
Marcelo Tosatti | e890261 | 2010-10-11 15:31:19 -0300 | [diff] [blame] | 1418 | } |
Alex Williamson | f471a17 | 2010-06-11 11:11:42 -0600 | [diff] [blame] | 1419 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1420 | static void notdirty_mem_write(void *opaque, hwaddr ram_addr, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1421 | uint64_t val, unsigned size) |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1422 | { |
bellard | 3a7d929 | 2005-08-21 09:26:42 +0000 | [diff] [blame] | 1423 | int dirty_flags; |
Yoshiaki Tamura | f7c11b5 | 2010-03-23 16:39:53 +0900 | [diff] [blame] | 1424 | dirty_flags = cpu_physical_memory_get_dirty_flags(ram_addr); |
bellard | 3a7d929 | 2005-08-21 09:26:42 +0000 | [diff] [blame] | 1425 | if (!(dirty_flags & CODE_DIRTY_FLAG)) { |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1426 | tb_invalidate_phys_page_fast(ram_addr, size); |
Yoshiaki Tamura | f7c11b5 | 2010-03-23 16:39:53 +0900 | [diff] [blame] | 1427 | dirty_flags = cpu_physical_memory_get_dirty_flags(ram_addr); |
bellard | 3a7d929 | 2005-08-21 09:26:42 +0000 | [diff] [blame] | 1428 | } |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1429 | switch (size) { |
| 1430 | case 1: |
| 1431 | stb_p(qemu_get_ram_ptr(ram_addr), val); |
| 1432 | break; |
| 1433 | case 2: |
| 1434 | stw_p(qemu_get_ram_ptr(ram_addr), val); |
| 1435 | break; |
| 1436 | case 4: |
| 1437 | stl_p(qemu_get_ram_ptr(ram_addr), val); |
| 1438 | break; |
| 1439 | default: |
| 1440 | abort(); |
| 1441 | } |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 1442 | dirty_flags |= (0xff & ~CODE_DIRTY_FLAG); |
Yoshiaki Tamura | f7c11b5 | 2010-03-23 16:39:53 +0900 | [diff] [blame] | 1443 | cpu_physical_memory_set_dirty_flags(ram_addr, dirty_flags); |
bellard | f23db16 | 2005-08-21 19:12:28 +0000 | [diff] [blame] | 1444 | /* we remove the notdirty callback only if the code has been |
| 1445 | flushed */ |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 1446 | if (dirty_flags == 0xff) { |
| 1447 | CPUArchState *env = current_cpu->env_ptr; |
| 1448 | tlb_set_dirty(env, env->mem_io_vaddr); |
| 1449 | } |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1450 | } |
| 1451 | |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 1452 | static bool notdirty_mem_accepts(void *opaque, hwaddr addr, |
| 1453 | unsigned size, bool is_write) |
| 1454 | { |
| 1455 | return is_write; |
| 1456 | } |
| 1457 | |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1458 | static const MemoryRegionOps notdirty_mem_ops = { |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1459 | .write = notdirty_mem_write, |
Paolo Bonzini | b018ddf | 2013-05-24 14:48:38 +0200 | [diff] [blame] | 1460 | .valid.accepts = notdirty_mem_accepts, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1461 | .endianness = DEVICE_NATIVE_ENDIAN, |
bellard | 1ccde1c | 2004-02-06 19:46:14 +0000 | [diff] [blame] | 1462 | }; |
| 1463 | |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1464 | /* Generate a debug exception if a watchpoint has been hit. */ |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 1465 | static void check_watchpoint(int offset, int len_mask, int flags) |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1466 | { |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 1467 | CPUArchState *env = current_cpu->env_ptr; |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1468 | target_ulong pc, cs_base; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1469 | target_ulong vaddr; |
aliguori | a1d1bb3 | 2008-11-18 20:07:32 +0000 | [diff] [blame] | 1470 | CPUWatchpoint *wp; |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1471 | int cpu_flags; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1472 | |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1473 | if (env->watchpoint_hit) { |
| 1474 | /* We re-entered the check after replacing the TB. Now raise |
| 1475 | * the debug interrupt so that is will trigger after the |
| 1476 | * current instruction. */ |
Andreas Färber | c3affe5 | 2013-01-18 15:03:43 +0100 | [diff] [blame] | 1477 | cpu_interrupt(ENV_GET_CPU(env), CPU_INTERRUPT_DEBUG); |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1478 | return; |
| 1479 | } |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 1480 | vaddr = (env->mem_io_vaddr & TARGET_PAGE_MASK) + offset; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 1481 | QTAILQ_FOREACH(wp, &env->watchpoints, entry) { |
aliguori | b405133 | 2008-11-18 20:14:20 +0000 | [diff] [blame] | 1482 | if ((vaddr == (wp->vaddr & len_mask) || |
| 1483 | (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) { |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1484 | wp->flags |= BP_WATCHPOINT_HIT; |
| 1485 | if (!env->watchpoint_hit) { |
| 1486 | env->watchpoint_hit = wp; |
Blue Swirl | 5a31652 | 2012-12-02 21:28:09 +0000 | [diff] [blame] | 1487 | tb_check_watchpoint(env); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1488 | if (wp->flags & BP_STOP_BEFORE_ACCESS) { |
| 1489 | env->exception_index = EXCP_DEBUG; |
Max Filippov | 488d657 | 2012-01-29 02:24:39 +0400 | [diff] [blame] | 1490 | cpu_loop_exit(env); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1491 | } else { |
| 1492 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags); |
| 1493 | tb_gen_code(env, pc, cs_base, cpu_flags, 1); |
Max Filippov | 488d657 | 2012-01-29 02:24:39 +0400 | [diff] [blame] | 1494 | cpu_resume_from_signal(env, NULL); |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1495 | } |
aliguori | 06d55cc | 2008-11-18 20:24:06 +0000 | [diff] [blame] | 1496 | } |
aliguori | 6e140f2 | 2008-11-18 20:37:55 +0000 | [diff] [blame] | 1497 | } else { |
| 1498 | wp->flags &= ~BP_WATCHPOINT_HIT; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 1499 | } |
| 1500 | } |
| 1501 | } |
| 1502 | |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1503 | /* Watchpoint access routines. Watchpoints are inserted using TLB tricks, |
| 1504 | so these check for a hit then pass through to the normal out-of-line |
| 1505 | phys routines. */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1506 | static uint64_t watch_mem_read(void *opaque, hwaddr addr, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1507 | unsigned size) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1508 | { |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1509 | check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_READ); |
| 1510 | switch (size) { |
| 1511 | case 1: return ldub_phys(addr); |
| 1512 | case 2: return lduw_phys(addr); |
| 1513 | case 4: return ldl_phys(addr); |
| 1514 | default: abort(); |
| 1515 | } |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1516 | } |
| 1517 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1518 | static void watch_mem_write(void *opaque, hwaddr addr, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1519 | uint64_t val, unsigned size) |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1520 | { |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1521 | check_watchpoint(addr & ~TARGET_PAGE_MASK, ~(size - 1), BP_MEM_WRITE); |
| 1522 | switch (size) { |
Max Filippov | 6736415 | 2012-01-29 00:01:40 +0400 | [diff] [blame] | 1523 | case 1: |
| 1524 | stb_phys(addr, val); |
| 1525 | break; |
| 1526 | case 2: |
| 1527 | stw_phys(addr, val); |
| 1528 | break; |
| 1529 | case 4: |
| 1530 | stl_phys(addr, val); |
| 1531 | break; |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1532 | default: abort(); |
| 1533 | } |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1534 | } |
| 1535 | |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1536 | static const MemoryRegionOps watch_mem_ops = { |
| 1537 | .read = watch_mem_read, |
| 1538 | .write = watch_mem_write, |
| 1539 | .endianness = DEVICE_NATIVE_ENDIAN, |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1540 | }; |
pbrook | 6658ffb | 2007-03-16 23:58:11 +0000 | [diff] [blame] | 1541 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1542 | static uint64_t subpage_read(void *opaque, hwaddr addr, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1543 | unsigned len) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1544 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1545 | subpage_t *subpage = opaque; |
| 1546 | uint8_t buf[4]; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 1547 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1548 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1549 | printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__, |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1550 | subpage, len, addr); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1551 | #endif |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1552 | address_space_read(subpage->as, addr + subpage->base, buf, len); |
| 1553 | switch (len) { |
| 1554 | case 1: |
| 1555 | return ldub_p(buf); |
| 1556 | case 2: |
| 1557 | return lduw_p(buf); |
| 1558 | case 4: |
| 1559 | return ldl_p(buf); |
| 1560 | default: |
| 1561 | abort(); |
| 1562 | } |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1563 | } |
| 1564 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1565 | static void subpage_write(void *opaque, hwaddr addr, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1566 | uint64_t value, unsigned len) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1567 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1568 | subpage_t *subpage = opaque; |
| 1569 | uint8_t buf[4]; |
| 1570 | |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1571 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1572 | printf("%s: subpage %p len %u addr " TARGET_FMT_plx |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1573 | " value %"PRIx64"\n", |
| 1574 | __func__, subpage, len, addr, value); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1575 | #endif |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1576 | switch (len) { |
| 1577 | case 1: |
| 1578 | stb_p(buf, value); |
| 1579 | break; |
| 1580 | case 2: |
| 1581 | stw_p(buf, value); |
| 1582 | break; |
| 1583 | case 4: |
| 1584 | stl_p(buf, value); |
| 1585 | break; |
| 1586 | default: |
| 1587 | abort(); |
| 1588 | } |
| 1589 | address_space_write(subpage->as, addr + subpage->base, buf, len); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1590 | } |
| 1591 | |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1592 | static bool subpage_accepts(void *opaque, hwaddr addr, |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1593 | unsigned len, bool is_write) |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1594 | { |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1595 | subpage_t *subpage = opaque; |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1596 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1597 | printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx "\n", |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1598 | __func__, subpage, is_write ? 'w' : 'r', len, addr); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1599 | #endif |
| 1600 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1601 | return address_space_access_valid(subpage->as, addr + subpage->base, |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1602 | len, is_write); |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1603 | } |
| 1604 | |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1605 | static const MemoryRegionOps subpage_ops = { |
| 1606 | .read = subpage_read, |
| 1607 | .write = subpage_write, |
Paolo Bonzini | c353e4c | 2013-05-24 14:02:39 +0200 | [diff] [blame] | 1608 | .valid.accepts = subpage_accepts, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1609 | .endianness = DEVICE_NATIVE_ENDIAN, |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1610 | }; |
| 1611 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1612 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1613 | uint16_t section) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1614 | { |
| 1615 | int idx, eidx; |
| 1616 | |
| 1617 | if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE) |
| 1618 | return -1; |
| 1619 | idx = SUBPAGE_IDX(start); |
| 1620 | eidx = SUBPAGE_IDX(end); |
| 1621 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1622 | printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n", |
| 1623 | __func__, mmio, start, end, idx, eidx, section); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1624 | #endif |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1625 | for (; idx <= eidx; idx++) { |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1626 | mmio->sub_section[idx] = section; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1627 | } |
| 1628 | |
| 1629 | return 0; |
| 1630 | } |
| 1631 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1632 | static subpage_t *subpage_init(AddressSpace *as, hwaddr base) |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1633 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 1634 | subpage_t *mmio; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1635 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1636 | mmio = g_malloc0(sizeof(subpage_t)); |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 1637 | |
Jan Kiszka | acc9d80 | 2013-05-26 21:55:37 +0200 | [diff] [blame] | 1638 | mmio->as = as; |
aliguori | 1eec614 | 2009-02-05 22:06:18 +0000 | [diff] [blame] | 1639 | mmio->base = base; |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1640 | memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, |
Avi Kivity | 70c68e4 | 2012-01-02 12:32:48 +0200 | [diff] [blame] | 1641 | "subpage", TARGET_PAGE_SIZE); |
Avi Kivity | b3b00c7 | 2012-01-02 13:20:11 +0200 | [diff] [blame] | 1642 | mmio->iomem.subpage = true; |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1643 | #if defined(DEBUG_SUBPAGE) |
Amos Kong | 016e9d6 | 2013-09-27 09:25:38 +0800 | [diff] [blame] | 1644 | printf("%s: %p base " TARGET_FMT_plx " len %08x\n", __func__, |
| 1645 | mmio, base, TARGET_PAGE_SIZE); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1646 | #endif |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1647 | subpage_register(mmio, 0, TARGET_PAGE_SIZE-1, PHYS_SECTION_UNASSIGNED); |
blueswir1 | db7b542 | 2007-05-26 17:36:03 +0000 | [diff] [blame] | 1648 | |
| 1649 | return mmio; |
| 1650 | } |
| 1651 | |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1652 | static uint16_t dummy_section(MemoryRegion *mr) |
| 1653 | { |
| 1654 | MemoryRegionSection section = { |
| 1655 | .mr = mr, |
| 1656 | .offset_within_address_space = 0, |
| 1657 | .offset_within_region = 0, |
Paolo Bonzini | 052e87b | 2013-05-27 10:08:27 +0200 | [diff] [blame] | 1658 | .size = int128_2_64(), |
Avi Kivity | 5312bd8 | 2012-02-12 18:32:55 +0200 | [diff] [blame] | 1659 | }; |
| 1660 | |
| 1661 | return phys_section_add(§ion); |
| 1662 | } |
| 1663 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1664 | MemoryRegion *iotlb_to_region(hwaddr index) |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 1665 | { |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 1666 | return address_space_memory.dispatch->sections[index & ~TARGET_PAGE_MASK].mr; |
Avi Kivity | aa10223 | 2012-03-08 17:06:55 +0200 | [diff] [blame] | 1667 | } |
| 1668 | |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 1669 | static void io_mem_init(void) |
| 1670 | { |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1671 | memory_region_init_io(&io_mem_rom, NULL, &unassigned_mem_ops, NULL, "rom", UINT64_MAX); |
| 1672 | memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1673 | "unassigned", UINT64_MAX); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1674 | memory_region_init_io(&io_mem_notdirty, NULL, ¬dirty_mem_ops, NULL, |
Avi Kivity | 0e0df1e | 2012-01-02 00:32:15 +0200 | [diff] [blame] | 1675 | "notdirty", UINT64_MAX); |
Paolo Bonzini | 2c9b15c | 2013-06-06 05:41:28 -0400 | [diff] [blame] | 1676 | memory_region_init_io(&io_mem_watch, NULL, &watch_mem_ops, NULL, |
Avi Kivity | 1ec9b90 | 2012-01-02 12:47:48 +0200 | [diff] [blame] | 1677 | "watch", UINT64_MAX); |
Avi Kivity | e9179ce | 2009-06-14 11:38:52 +0300 | [diff] [blame] | 1678 | } |
| 1679 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1680 | static void mem_begin(MemoryListener *listener) |
| 1681 | { |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1682 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1683 | AddressSpaceDispatch *d = g_new(AddressSpaceDispatch, 1); |
| 1684 | |
Michael S. Tsirkin | 9736e55 | 2013-11-11 14:42:43 +0200 | [diff] [blame] | 1685 | d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 }; |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1686 | d->as = as; |
| 1687 | as->next_dispatch = d; |
| 1688 | } |
| 1689 | |
| 1690 | static void mem_commit(MemoryListener *listener) |
| 1691 | { |
| 1692 | AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener); |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 1693 | AddressSpaceDispatch *cur = as->dispatch; |
| 1694 | AddressSpaceDispatch *next = as->next_dispatch; |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1695 | |
Paolo Bonzini | 0475d94 | 2013-05-29 12:28:21 +0200 | [diff] [blame] | 1696 | next->nodes = next_map.nodes; |
| 1697 | next->sections = next_map.sections; |
| 1698 | |
| 1699 | as->dispatch = next; |
| 1700 | g_free(cur); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1701 | } |
| 1702 | |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1703 | static void core_begin(MemoryListener *listener) |
| 1704 | { |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1705 | uint16_t n; |
| 1706 | |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 1707 | prev_map = g_new(PhysPageMap, 1); |
| 1708 | *prev_map = next_map; |
| 1709 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1710 | memset(&next_map, 0, sizeof(next_map)); |
Liu Ping Fan | b41aac4 | 2013-05-29 11:09:17 +0200 | [diff] [blame] | 1711 | n = dummy_section(&io_mem_unassigned); |
| 1712 | assert(n == PHYS_SECTION_UNASSIGNED); |
| 1713 | n = dummy_section(&io_mem_notdirty); |
| 1714 | assert(n == PHYS_SECTION_NOTDIRTY); |
| 1715 | n = dummy_section(&io_mem_rom); |
| 1716 | assert(n == PHYS_SECTION_ROM); |
| 1717 | n = dummy_section(&io_mem_watch); |
| 1718 | assert(n == PHYS_SECTION_WATCH); |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1719 | } |
| 1720 | |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1721 | /* This listener's commit run after the other AddressSpaceDispatch listeners'. |
| 1722 | * All AddressSpaceDispatch instances have switched to the next map. |
| 1723 | */ |
| 1724 | static void core_commit(MemoryListener *listener) |
| 1725 | { |
Paolo Bonzini | 6092666 | 2013-05-29 12:30:26 +0200 | [diff] [blame] | 1726 | phys_sections_free(prev_map); |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1727 | } |
| 1728 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 1729 | static void tcg_commit(MemoryListener *listener) |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1730 | { |
Andreas Färber | 182735e | 2013-05-29 22:29:20 +0200 | [diff] [blame] | 1731 | CPUState *cpu; |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 1732 | |
| 1733 | /* since each CPU stores ram addresses in its TLB cache, we must |
| 1734 | reset the modified entries */ |
| 1735 | /* XXX: slow ! */ |
Andreas Färber | bdc4464 | 2013-06-24 23:50:24 +0200 | [diff] [blame] | 1736 | CPU_FOREACH(cpu) { |
Andreas Färber | 182735e | 2013-05-29 22:29:20 +0200 | [diff] [blame] | 1737 | CPUArchState *env = cpu->env_ptr; |
| 1738 | |
Avi Kivity | 117712c | 2012-02-12 21:23:17 +0200 | [diff] [blame] | 1739 | tlb_flush(env, 1); |
| 1740 | } |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1741 | } |
| 1742 | |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1743 | static void core_log_global_start(MemoryListener *listener) |
| 1744 | { |
| 1745 | cpu_physical_memory_set_dirty_tracking(1); |
| 1746 | } |
| 1747 | |
| 1748 | static void core_log_global_stop(MemoryListener *listener) |
| 1749 | { |
| 1750 | cpu_physical_memory_set_dirty_tracking(0); |
| 1751 | } |
| 1752 | |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1753 | static MemoryListener core_memory_listener = { |
Avi Kivity | 50c1e14 | 2012-02-08 21:36:02 +0200 | [diff] [blame] | 1754 | .begin = core_begin, |
Paolo Bonzini | 9affd6f | 2013-05-29 12:09:47 +0200 | [diff] [blame] | 1755 | .commit = core_commit, |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1756 | .log_global_start = core_log_global_start, |
| 1757 | .log_global_stop = core_log_global_stop, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1758 | .priority = 1, |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1759 | }; |
| 1760 | |
Avi Kivity | 1d71148 | 2012-10-02 18:54:45 +0200 | [diff] [blame] | 1761 | static MemoryListener tcg_memory_listener = { |
| 1762 | .commit = tcg_commit, |
| 1763 | }; |
| 1764 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1765 | void address_space_init_dispatch(AddressSpace *as) |
| 1766 | { |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1767 | as->dispatch = NULL; |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1768 | as->dispatch_listener = (MemoryListener) { |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1769 | .begin = mem_begin, |
Paolo Bonzini | 0075270 | 2013-05-29 12:13:54 +0200 | [diff] [blame] | 1770 | .commit = mem_commit, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1771 | .region_add = mem_add, |
| 1772 | .region_nop = mem_add, |
| 1773 | .priority = 0, |
| 1774 | }; |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1775 | memory_listener_register(&as->dispatch_listener, as); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1776 | } |
| 1777 | |
Avi Kivity | 83f3c25 | 2012-10-07 12:59:55 +0200 | [diff] [blame] | 1778 | void address_space_destroy_dispatch(AddressSpace *as) |
| 1779 | { |
| 1780 | AddressSpaceDispatch *d = as->dispatch; |
| 1781 | |
Paolo Bonzini | 89ae337 | 2013-06-02 10:39:07 +0200 | [diff] [blame] | 1782 | memory_listener_unregister(&as->dispatch_listener); |
Avi Kivity | 83f3c25 | 2012-10-07 12:59:55 +0200 | [diff] [blame] | 1783 | g_free(d); |
| 1784 | as->dispatch = NULL; |
| 1785 | } |
| 1786 | |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 1787 | static void memory_map_init(void) |
| 1788 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1789 | system_memory = g_malloc(sizeof(*system_memory)); |
Paolo Bonzini | 03f4995 | 2013-11-07 17:14:36 +0100 | [diff] [blame] | 1790 | |
| 1791 | assert(ADDR_SPACE_BITS <= 64); |
| 1792 | |
| 1793 | memory_region_init(system_memory, NULL, "system", |
| 1794 | ADDR_SPACE_BITS == 64 ? |
| 1795 | UINT64_MAX : (0x1ULL << ADDR_SPACE_BITS)); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 1796 | address_space_init(&address_space_memory, system_memory, "memory"); |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 1797 | |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 1798 | system_io = g_malloc(sizeof(*system_io)); |
Jan Kiszka | 3bb28b7 | 2013-09-02 18:43:30 +0200 | [diff] [blame] | 1799 | memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io", |
| 1800 | 65536); |
Alexey Kardashevskiy | 7dca804 | 2013-04-29 16:25:51 +0000 | [diff] [blame] | 1801 | address_space_init(&address_space_io, system_io, "I/O"); |
Avi Kivity | 9363274 | 2012-02-08 16:54:16 +0200 | [diff] [blame] | 1802 | |
Avi Kivity | f6790af | 2012-10-02 20:13:51 +0200 | [diff] [blame] | 1803 | memory_listener_register(&core_memory_listener, &address_space_memory); |
liguang | 2641689 | 2013-09-04 14:37:33 +0800 | [diff] [blame] | 1804 | if (tcg_enabled()) { |
| 1805 | memory_listener_register(&tcg_memory_listener, &address_space_memory); |
| 1806 | } |
Avi Kivity | 62152b8 | 2011-07-26 14:26:14 +0300 | [diff] [blame] | 1807 | } |
| 1808 | |
| 1809 | MemoryRegion *get_system_memory(void) |
| 1810 | { |
| 1811 | return system_memory; |
| 1812 | } |
| 1813 | |
Avi Kivity | 309cb47 | 2011-08-08 16:09:03 +0300 | [diff] [blame] | 1814 | MemoryRegion *get_system_io(void) |
| 1815 | { |
| 1816 | return system_io; |
| 1817 | } |
| 1818 | |
pbrook | e2eef17 | 2008-06-08 01:09:01 +0000 | [diff] [blame] | 1819 | #endif /* !defined(CONFIG_USER_ONLY) */ |
| 1820 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1821 | /* physical memory access (slow version, mainly for debug) */ |
| 1822 | #if defined(CONFIG_USER_ONLY) |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 1823 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1824 | uint8_t *buf, int len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1825 | { |
| 1826 | int l, flags; |
| 1827 | target_ulong page; |
pbrook | 53a5960 | 2006-03-25 19:31:22 +0000 | [diff] [blame] | 1828 | void * p; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1829 | |
| 1830 | while (len > 0) { |
| 1831 | page = addr & TARGET_PAGE_MASK; |
| 1832 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 1833 | if (l > len) |
| 1834 | l = len; |
| 1835 | flags = page_get_flags(page); |
| 1836 | if (!(flags & PAGE_VALID)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1837 | return -1; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1838 | if (is_write) { |
| 1839 | if (!(flags & PAGE_WRITE)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1840 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 1841 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1842 | if (!(p = lock_user(VERIFY_WRITE, addr, l, 0))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1843 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1844 | memcpy(p, buf, l); |
| 1845 | unlock_user(p, addr, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1846 | } else { |
| 1847 | if (!(flags & PAGE_READ)) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1848 | return -1; |
bellard | 579a97f | 2007-11-11 14:26:47 +0000 | [diff] [blame] | 1849 | /* XXX: this code should not depend on lock_user */ |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1850 | if (!(p = lock_user(VERIFY_READ, addr, l, 1))) |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1851 | return -1; |
aurel32 | 72fb7da | 2008-04-27 23:53:45 +0000 | [diff] [blame] | 1852 | memcpy(buf, p, l); |
aurel32 | 5b25757 | 2008-04-28 08:54:59 +0000 | [diff] [blame] | 1853 | unlock_user(p, addr, 0); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1854 | } |
| 1855 | len -= l; |
| 1856 | buf += l; |
| 1857 | addr += l; |
| 1858 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 1859 | return 0; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1860 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 1861 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1862 | #else |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1863 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 1864 | static void invalidate_and_set_dirty(hwaddr addr, |
| 1865 | hwaddr length) |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1866 | { |
| 1867 | if (!cpu_physical_memory_is_dirty(addr)) { |
| 1868 | /* invalidate code */ |
| 1869 | tb_invalidate_phys_page_range(addr, addr + length, 0); |
| 1870 | /* set dirty bit */ |
| 1871 | cpu_physical_memory_set_dirty_flags(addr, (0xff & ~CODE_DIRTY_FLAG)); |
| 1872 | } |
Anthony PERARD | e226939 | 2012-10-03 13:49:22 +0000 | [diff] [blame] | 1873 | xen_modified_memory(addr, length); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1874 | } |
| 1875 | |
Paolo Bonzini | 2bbfa05 | 2013-05-24 12:29:54 +0200 | [diff] [blame] | 1876 | static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) |
| 1877 | { |
| 1878 | if (memory_region_is_ram(mr)) { |
| 1879 | return !(is_write && mr->readonly); |
| 1880 | } |
| 1881 | if (memory_region_is_romd(mr)) { |
| 1882 | return !is_write; |
| 1883 | } |
| 1884 | |
| 1885 | return false; |
| 1886 | } |
| 1887 | |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1888 | static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1889 | { |
Paolo Bonzini | e1622f4 | 2013-07-17 13:17:41 +0200 | [diff] [blame] | 1890 | unsigned access_size_max = mr->ops->valid.max_access_size; |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1891 | |
| 1892 | /* Regions are assumed to support 1-4 byte accesses unless |
| 1893 | otherwise specified. */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1894 | if (access_size_max == 0) { |
| 1895 | access_size_max = 4; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1896 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1897 | |
| 1898 | /* Bound the maximum access by the alignment of the address. */ |
| 1899 | if (!mr->ops->impl.unaligned) { |
| 1900 | unsigned align_size_max = addr & -addr; |
| 1901 | if (align_size_max != 0 && align_size_max < access_size_max) { |
| 1902 | access_size_max = align_size_max; |
| 1903 | } |
| 1904 | } |
| 1905 | |
| 1906 | /* Don't attempt accesses larger than the maximum. */ |
| 1907 | if (l > access_size_max) { |
| 1908 | l = access_size_max; |
| 1909 | } |
Paolo Bonzini | 098178f | 2013-07-29 14:27:39 +0200 | [diff] [blame] | 1910 | if (l & (l - 1)) { |
| 1911 | l = 1 << (qemu_fls(l) - 1); |
| 1912 | } |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1913 | |
| 1914 | return l; |
Paolo Bonzini | 82f2563 | 2013-05-24 11:59:43 +0200 | [diff] [blame] | 1915 | } |
| 1916 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 1917 | bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 1918 | int len, bool is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1919 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1920 | hwaddr l; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1921 | uint8_t *ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 1922 | uint64_t val; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1923 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1924 | MemoryRegion *mr; |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 1925 | bool error = false; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 1926 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1927 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 1928 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1929 | mr = address_space_translate(as, addr, &addr1, &l, is_write); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 1930 | |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1931 | if (is_write) { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1932 | if (!memory_access_is_direct(mr, is_write)) { |
| 1933 | l = memory_access_size(mr, l, addr1); |
Andreas Färber | 4917cf4 | 2013-05-27 05:17:50 +0200 | [diff] [blame] | 1934 | /* XXX: could force current_cpu to NULL to avoid |
bellard | 6a00d60 | 2005-11-21 23:25:50 +0000 | [diff] [blame] | 1935 | potential bugs */ |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1936 | switch (l) { |
| 1937 | case 8: |
| 1938 | /* 64 bit write access */ |
| 1939 | val = ldq_p(buf); |
| 1940 | error |= io_mem_write(mr, addr1, val, 8); |
| 1941 | break; |
| 1942 | case 4: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 1943 | /* 32 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1944 | val = ldl_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1945 | error |= io_mem_write(mr, addr1, val, 4); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1946 | break; |
| 1947 | case 2: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 1948 | /* 16 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1949 | val = lduw_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1950 | error |= io_mem_write(mr, addr1, val, 2); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1951 | break; |
| 1952 | case 1: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 1953 | /* 8 bit write access */ |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1954 | val = ldub_p(buf); |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1955 | error |= io_mem_write(mr, addr1, val, 1); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1956 | break; |
| 1957 | default: |
| 1958 | abort(); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1959 | } |
Paolo Bonzini | 2bbfa05 | 2013-05-24 12:29:54 +0200 | [diff] [blame] | 1960 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1961 | addr1 += memory_region_get_ram_addr(mr); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1962 | /* RAM case */ |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 1963 | ptr = qemu_get_ram_ptr(addr1); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1964 | memcpy(ptr, buf, l); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 1965 | invalidate_and_set_dirty(addr1, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1966 | } |
| 1967 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1968 | if (!memory_access_is_direct(mr, is_write)) { |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1969 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1970 | l = memory_access_size(mr, l, addr1); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1971 | switch (l) { |
| 1972 | case 8: |
| 1973 | /* 64 bit read access */ |
| 1974 | error |= io_mem_read(mr, addr1, &val, 8); |
| 1975 | stq_p(buf, val); |
| 1976 | break; |
| 1977 | case 4: |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1978 | /* 32 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1979 | error |= io_mem_read(mr, addr1, &val, 4); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1980 | stl_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1981 | break; |
| 1982 | case 2: |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1983 | /* 16 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1984 | error |= io_mem_read(mr, addr1, &val, 2); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1985 | stw_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1986 | break; |
| 1987 | case 1: |
bellard | 1c213d1 | 2005-09-03 10:49:04 +0000 | [diff] [blame] | 1988 | /* 8 bit read access */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1989 | error |= io_mem_read(mr, addr1, &val, 1); |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 1990 | stb_p(buf, val); |
Richard Henderson | 2332616 | 2013-07-08 14:55:59 -0700 | [diff] [blame] | 1991 | break; |
| 1992 | default: |
| 1993 | abort(); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1994 | } |
| 1995 | } else { |
| 1996 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 1997 | ptr = qemu_get_ram_ptr(mr->ram_addr + addr1); |
Avi Kivity | f3705d5 | 2012-03-08 16:16:34 +0200 | [diff] [blame] | 1998 | memcpy(buf, ptr, l); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 1999 | } |
| 2000 | } |
| 2001 | len -= l; |
| 2002 | buf += l; |
| 2003 | addr += l; |
| 2004 | } |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2005 | |
| 2006 | return error; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2007 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2008 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2009 | bool address_space_write(AddressSpace *as, hwaddr addr, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2010 | const uint8_t *buf, int len) |
| 2011 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2012 | return address_space_rw(as, addr, (uint8_t *)buf, len, true); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2013 | } |
| 2014 | |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2015 | bool address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2016 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2017 | return address_space_rw(as, addr, buf, len, false); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2018 | } |
| 2019 | |
| 2020 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2021 | void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2022 | int len, int is_write) |
| 2023 | { |
Paolo Bonzini | fd8aaa7 | 2013-05-21 09:56:55 +0200 | [diff] [blame] | 2024 | address_space_rw(&address_space_memory, addr, buf, len, is_write); |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2025 | } |
| 2026 | |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2027 | /* used for ROM loading : can write in RAM and ROM */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2028 | void cpu_physical_memory_write_rom(hwaddr addr, |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2029 | const uint8_t *buf, int len) |
| 2030 | { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2031 | hwaddr l; |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2032 | uint8_t *ptr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2033 | hwaddr addr1; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2034 | MemoryRegion *mr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2035 | |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2036 | while (len > 0) { |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2037 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2038 | mr = address_space_translate(&address_space_memory, |
| 2039 | addr, &addr1, &l, true); |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 2040 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2041 | if (!(memory_region_is_ram(mr) || |
| 2042 | memory_region_is_romd(mr))) { |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2043 | /* do nothing */ |
| 2044 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2045 | addr1 += memory_region_get_ram_addr(mr); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2046 | /* ROM/RAM case */ |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2047 | ptr = qemu_get_ram_ptr(addr1); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2048 | memcpy(ptr, buf, l); |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2049 | invalidate_and_set_dirty(addr1, l); |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2050 | } |
| 2051 | len -= l; |
| 2052 | buf += l; |
| 2053 | addr += l; |
| 2054 | } |
| 2055 | } |
| 2056 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2057 | typedef struct { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2058 | MemoryRegion *mr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2059 | void *buffer; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2060 | hwaddr addr; |
| 2061 | hwaddr len; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2062 | } BounceBuffer; |
| 2063 | |
| 2064 | static BounceBuffer bounce; |
| 2065 | |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2066 | typedef struct MapClient { |
| 2067 | void *opaque; |
| 2068 | void (*callback)(void *opaque); |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2069 | QLIST_ENTRY(MapClient) link; |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2070 | } MapClient; |
| 2071 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2072 | static QLIST_HEAD(map_client_list, MapClient) map_client_list |
| 2073 | = QLIST_HEAD_INITIALIZER(map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2074 | |
| 2075 | void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)) |
| 2076 | { |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2077 | MapClient *client = g_malloc(sizeof(*client)); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2078 | |
| 2079 | client->opaque = opaque; |
| 2080 | client->callback = callback; |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2081 | QLIST_INSERT_HEAD(&map_client_list, client, link); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2082 | return client; |
| 2083 | } |
| 2084 | |
Blue Swirl | 8b9c99d | 2012-10-28 11:04:51 +0000 | [diff] [blame] | 2085 | static void cpu_unregister_map_client(void *_client) |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2086 | { |
| 2087 | MapClient *client = (MapClient *)_client; |
| 2088 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2089 | QLIST_REMOVE(client, link); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 2090 | g_free(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2091 | } |
| 2092 | |
| 2093 | static void cpu_notify_map_clients(void) |
| 2094 | { |
| 2095 | MapClient *client; |
| 2096 | |
Blue Swirl | 72cf2d4 | 2009-09-12 07:36:22 +0000 | [diff] [blame] | 2097 | while (!QLIST_EMPTY(&map_client_list)) { |
| 2098 | client = QLIST_FIRST(&map_client_list); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2099 | client->callback(client->opaque); |
Isaku Yamahata | 34d5e94 | 2009-06-26 18:57:18 +0900 | [diff] [blame] | 2100 | cpu_unregister_map_client(client); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2101 | } |
| 2102 | } |
| 2103 | |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2104 | bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write) |
| 2105 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2106 | MemoryRegion *mr; |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2107 | hwaddr l, xlat; |
| 2108 | |
| 2109 | while (len > 0) { |
| 2110 | l = len; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2111 | mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2112 | if (!memory_access_is_direct(mr, is_write)) { |
| 2113 | l = memory_access_size(mr, l, addr); |
| 2114 | if (!memory_region_access_valid(mr, xlat, l, is_write)) { |
Paolo Bonzini | 51644ab | 2013-04-11 15:40:59 +0200 | [diff] [blame] | 2115 | return false; |
| 2116 | } |
| 2117 | } |
| 2118 | |
| 2119 | len -= l; |
| 2120 | addr += l; |
| 2121 | } |
| 2122 | return true; |
| 2123 | } |
| 2124 | |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2125 | /* Map a physical memory region into a host virtual address. |
| 2126 | * May map a subset of the requested range, given by and returned in *plen. |
| 2127 | * May return NULL if resources needed to perform the mapping are exhausted. |
| 2128 | * Use only for reads OR writes - not for read-modify-write operations. |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2129 | * Use cpu_register_map_client() to know when retrying the map operation is |
| 2130 | * likely to succeed. |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2131 | */ |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2132 | void *address_space_map(AddressSpace *as, |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2133 | hwaddr addr, |
| 2134 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2135 | bool is_write) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2136 | { |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2137 | hwaddr len = *plen; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2138 | hwaddr done = 0; |
| 2139 | hwaddr l, xlat, base; |
| 2140 | MemoryRegion *mr, *this_mr; |
| 2141 | ram_addr_t raddr; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2142 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2143 | if (len == 0) { |
| 2144 | return NULL; |
| 2145 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2146 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2147 | l = len; |
| 2148 | mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2149 | if (!memory_access_is_direct(mr, is_write)) { |
| 2150 | if (bounce.buffer) { |
| 2151 | return NULL; |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2152 | } |
Kevin Wolf | e85d9db | 2013-07-22 14:30:23 +0200 | [diff] [blame] | 2153 | /* Avoid unbounded allocations */ |
| 2154 | l = MIN(l, TARGET_PAGE_SIZE); |
| 2155 | bounce.buffer = qemu_memalign(TARGET_PAGE_SIZE, l); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2156 | bounce.addr = addr; |
| 2157 | bounce.len = l; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2158 | |
| 2159 | memory_region_ref(mr); |
| 2160 | bounce.mr = mr; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2161 | if (!is_write) { |
| 2162 | address_space_read(as, addr, bounce.buffer, l); |
Stefano Stabellini | 8ab934f | 2011-06-27 18:26:06 +0100 | [diff] [blame] | 2163 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2164 | |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2165 | *plen = l; |
| 2166 | return bounce.buffer; |
| 2167 | } |
| 2168 | |
| 2169 | base = xlat; |
| 2170 | raddr = memory_region_get_ram_addr(mr); |
| 2171 | |
| 2172 | for (;;) { |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2173 | len -= l; |
| 2174 | addr += l; |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2175 | done += l; |
| 2176 | if (len == 0) { |
| 2177 | break; |
| 2178 | } |
| 2179 | |
| 2180 | l = len; |
| 2181 | this_mr = address_space_translate(as, addr, &xlat, &l, is_write); |
| 2182 | if (this_mr != mr || xlat != base + done) { |
| 2183 | break; |
| 2184 | } |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2185 | } |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2186 | |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2187 | memory_region_ref(mr); |
Paolo Bonzini | e3127ae | 2013-06-28 17:29:27 +0200 | [diff] [blame] | 2188 | *plen = done; |
| 2189 | return qemu_ram_ptr_length(raddr + base, plen); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2190 | } |
| 2191 | |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2192 | /* Unmaps a memory region previously mapped by address_space_map(). |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2193 | * Will also mark the memory as dirty if is_write == 1. access_len gives |
| 2194 | * the amount of memory that was actually read or written by the caller. |
| 2195 | */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2196 | void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len, |
| 2197 | int is_write, hwaddr access_len) |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2198 | { |
| 2199 | if (buffer != bounce.buffer) { |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2200 | MemoryRegion *mr; |
| 2201 | ram_addr_t addr1; |
| 2202 | |
| 2203 | mr = qemu_ram_addr_from_host(buffer, &addr1); |
| 2204 | assert(mr != NULL); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2205 | if (is_write) { |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2206 | while (access_len) { |
| 2207 | unsigned l; |
| 2208 | l = TARGET_PAGE_SIZE; |
| 2209 | if (l > access_len) |
| 2210 | l = access_len; |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2211 | invalidate_and_set_dirty(addr1, l); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2212 | addr1 += l; |
| 2213 | access_len -= l; |
| 2214 | } |
| 2215 | } |
Jan Kiszka | 868bb33 | 2011-06-21 22:59:09 +0200 | [diff] [blame] | 2216 | if (xen_enabled()) { |
Jan Kiszka | e41d7c6 | 2011-06-21 22:59:08 +0200 | [diff] [blame] | 2217 | xen_invalidate_map_cache_entry(buffer); |
Anthony PERARD | 050a0dd | 2010-09-16 13:57:49 +0100 | [diff] [blame] | 2218 | } |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2219 | memory_region_unref(mr); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2220 | return; |
| 2221 | } |
| 2222 | if (is_write) { |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2223 | address_space_write(as, bounce.addr, bounce.buffer, access_len); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2224 | } |
Herve Poussineau | f8a8324 | 2010-01-24 21:23:56 +0000 | [diff] [blame] | 2225 | qemu_vfree(bounce.buffer); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2226 | bounce.buffer = NULL; |
Paolo Bonzini | d3e7155 | 2013-06-28 17:33:29 +0200 | [diff] [blame] | 2227 | memory_region_unref(bounce.mr); |
aliguori | ba223c2 | 2009-01-22 16:59:16 +0000 | [diff] [blame] | 2228 | cpu_notify_map_clients(); |
aliguori | 6d16c2f | 2009-01-22 16:59:11 +0000 | [diff] [blame] | 2229 | } |
bellard | d0ecd2a | 2006-04-23 17:14:48 +0000 | [diff] [blame] | 2230 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2231 | void *cpu_physical_memory_map(hwaddr addr, |
| 2232 | hwaddr *plen, |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2233 | int is_write) |
| 2234 | { |
| 2235 | return address_space_map(&address_space_memory, addr, plen, is_write); |
| 2236 | } |
| 2237 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2238 | void cpu_physical_memory_unmap(void *buffer, hwaddr len, |
| 2239 | int is_write, hwaddr access_len) |
Avi Kivity | ac1970f | 2012-10-03 16:22:53 +0200 | [diff] [blame] | 2240 | { |
| 2241 | return address_space_unmap(&address_space_memory, buffer, len, is_write, access_len); |
| 2242 | } |
| 2243 | |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2244 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2245 | static inline uint32_t ldl_phys_internal(hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2246 | enum device_endian endian) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2247 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2248 | uint8_t *ptr; |
Paolo Bonzini | 791af8c | 2013-05-24 16:10:39 +0200 | [diff] [blame] | 2249 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2250 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2251 | hwaddr l = 4; |
| 2252 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2253 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2254 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2255 | false); |
| 2256 | if (l < 4 || !memory_access_is_direct(mr, false)) { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2257 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2258 | io_mem_read(mr, addr1, &val, 4); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2259 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2260 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2261 | val = bswap32(val); |
| 2262 | } |
| 2263 | #else |
| 2264 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2265 | val = bswap32(val); |
| 2266 | } |
| 2267 | #endif |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2268 | } else { |
| 2269 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2270 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2271 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2272 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2273 | switch (endian) { |
| 2274 | case DEVICE_LITTLE_ENDIAN: |
| 2275 | val = ldl_le_p(ptr); |
| 2276 | break; |
| 2277 | case DEVICE_BIG_ENDIAN: |
| 2278 | val = ldl_be_p(ptr); |
| 2279 | break; |
| 2280 | default: |
| 2281 | val = ldl_p(ptr); |
| 2282 | break; |
| 2283 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2284 | } |
| 2285 | return val; |
| 2286 | } |
| 2287 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2288 | uint32_t ldl_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2289 | { |
| 2290 | return ldl_phys_internal(addr, DEVICE_NATIVE_ENDIAN); |
| 2291 | } |
| 2292 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2293 | uint32_t ldl_le_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2294 | { |
| 2295 | return ldl_phys_internal(addr, DEVICE_LITTLE_ENDIAN); |
| 2296 | } |
| 2297 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2298 | uint32_t ldl_be_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2299 | { |
| 2300 | return ldl_phys_internal(addr, DEVICE_BIG_ENDIAN); |
| 2301 | } |
| 2302 | |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2303 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2304 | static inline uint64_t ldq_phys_internal(hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2305 | enum device_endian endian) |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2306 | { |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2307 | uint8_t *ptr; |
| 2308 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2309 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2310 | hwaddr l = 8; |
| 2311 | hwaddr addr1; |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2312 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2313 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2314 | false); |
| 2315 | if (l < 8 || !memory_access_is_direct(mr, false)) { |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2316 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2317 | io_mem_read(mr, addr1, &val, 8); |
Paolo Bonzini | 968a562 | 2013-05-24 17:58:37 +0200 | [diff] [blame] | 2318 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2319 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2320 | val = bswap64(val); |
| 2321 | } |
| 2322 | #else |
| 2323 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2324 | val = bswap64(val); |
| 2325 | } |
| 2326 | #endif |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2327 | } else { |
| 2328 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2329 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2330 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2331 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2332 | switch (endian) { |
| 2333 | case DEVICE_LITTLE_ENDIAN: |
| 2334 | val = ldq_le_p(ptr); |
| 2335 | break; |
| 2336 | case DEVICE_BIG_ENDIAN: |
| 2337 | val = ldq_be_p(ptr); |
| 2338 | break; |
| 2339 | default: |
| 2340 | val = ldq_p(ptr); |
| 2341 | break; |
| 2342 | } |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 2343 | } |
| 2344 | return val; |
| 2345 | } |
| 2346 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2347 | uint64_t ldq_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2348 | { |
| 2349 | return ldq_phys_internal(addr, DEVICE_NATIVE_ENDIAN); |
| 2350 | } |
| 2351 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2352 | uint64_t ldq_le_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2353 | { |
| 2354 | return ldq_phys_internal(addr, DEVICE_LITTLE_ENDIAN); |
| 2355 | } |
| 2356 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2357 | uint64_t ldq_be_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2358 | { |
| 2359 | return ldq_phys_internal(addr, DEVICE_BIG_ENDIAN); |
| 2360 | } |
| 2361 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2362 | /* XXX: optimize */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2363 | uint32_t ldub_phys(hwaddr addr) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2364 | { |
| 2365 | uint8_t val; |
| 2366 | cpu_physical_memory_read(addr, &val, 1); |
| 2367 | return val; |
| 2368 | } |
| 2369 | |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2370 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2371 | static inline uint32_t lduw_phys_internal(hwaddr addr, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2372 | enum device_endian endian) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2373 | { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2374 | uint8_t *ptr; |
| 2375 | uint64_t val; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2376 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2377 | hwaddr l = 2; |
| 2378 | hwaddr addr1; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2379 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2380 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2381 | false); |
| 2382 | if (l < 2 || !memory_access_is_direct(mr, false)) { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2383 | /* I/O case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2384 | io_mem_read(mr, addr1, &val, 2); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2385 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2386 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2387 | val = bswap16(val); |
| 2388 | } |
| 2389 | #else |
| 2390 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2391 | val = bswap16(val); |
| 2392 | } |
| 2393 | #endif |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2394 | } else { |
| 2395 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2396 | ptr = qemu_get_ram_ptr((memory_region_get_ram_addr(mr) |
Avi Kivity | 06ef352 | 2012-02-13 16:11:22 +0200 | [diff] [blame] | 2397 | & TARGET_PAGE_MASK) |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2398 | + addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2399 | switch (endian) { |
| 2400 | case DEVICE_LITTLE_ENDIAN: |
| 2401 | val = lduw_le_p(ptr); |
| 2402 | break; |
| 2403 | case DEVICE_BIG_ENDIAN: |
| 2404 | val = lduw_be_p(ptr); |
| 2405 | break; |
| 2406 | default: |
| 2407 | val = lduw_p(ptr); |
| 2408 | break; |
| 2409 | } |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2410 | } |
| 2411 | return val; |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2412 | } |
| 2413 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2414 | uint32_t lduw_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2415 | { |
| 2416 | return lduw_phys_internal(addr, DEVICE_NATIVE_ENDIAN); |
| 2417 | } |
| 2418 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2419 | uint32_t lduw_le_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2420 | { |
| 2421 | return lduw_phys_internal(addr, DEVICE_LITTLE_ENDIAN); |
| 2422 | } |
| 2423 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2424 | uint32_t lduw_be_phys(hwaddr addr) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2425 | { |
| 2426 | return lduw_phys_internal(addr, DEVICE_BIG_ENDIAN); |
| 2427 | } |
| 2428 | |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2429 | /* warning: addr must be aligned. The ram page is not masked as dirty |
| 2430 | and the code inside is not invalidated. It is useful if the dirty |
| 2431 | bits are used to track modified PTEs */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2432 | void stl_phys_notdirty(hwaddr addr, uint32_t val) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2433 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2434 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2435 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2436 | hwaddr l = 4; |
| 2437 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2438 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2439 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2440 | true); |
| 2441 | if (l < 4 || !memory_access_is_direct(mr, true)) { |
| 2442 | io_mem_write(mr, addr1, val, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2443 | } else { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2444 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2445 | ptr = qemu_get_ram_ptr(addr1); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2446 | stl_p(ptr, val); |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 2447 | |
| 2448 | if (unlikely(in_migration)) { |
| 2449 | if (!cpu_physical_memory_is_dirty(addr1)) { |
| 2450 | /* invalidate code */ |
| 2451 | tb_invalidate_phys_page_range(addr1, addr1 + 4, 0); |
| 2452 | /* set dirty bit */ |
Yoshiaki Tamura | f7c11b5 | 2010-03-23 16:39:53 +0900 | [diff] [blame] | 2453 | cpu_physical_memory_set_dirty_flags( |
| 2454 | addr1, (0xff & ~CODE_DIRTY_FLAG)); |
aliguori | 7457619 | 2008-10-06 14:02:03 +0000 | [diff] [blame] | 2455 | } |
| 2456 | } |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2457 | } |
| 2458 | } |
| 2459 | |
| 2460 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2461 | static inline void stl_phys_internal(hwaddr addr, uint32_t val, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2462 | enum device_endian endian) |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2463 | { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2464 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2465 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2466 | hwaddr l = 4; |
| 2467 | hwaddr addr1; |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2468 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2469 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2470 | true); |
| 2471 | if (l < 4 || !memory_access_is_direct(mr, true)) { |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2472 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2473 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2474 | val = bswap32(val); |
| 2475 | } |
| 2476 | #else |
| 2477 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2478 | val = bswap32(val); |
| 2479 | } |
| 2480 | #endif |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2481 | io_mem_write(mr, addr1, val, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2482 | } else { |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2483 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2484 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
pbrook | 5579c7f | 2009-04-11 14:47:08 +0000 | [diff] [blame] | 2485 | ptr = qemu_get_ram_ptr(addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2486 | switch (endian) { |
| 2487 | case DEVICE_LITTLE_ENDIAN: |
| 2488 | stl_le_p(ptr, val); |
| 2489 | break; |
| 2490 | case DEVICE_BIG_ENDIAN: |
| 2491 | stl_be_p(ptr, val); |
| 2492 | break; |
| 2493 | default: |
| 2494 | stl_p(ptr, val); |
| 2495 | break; |
| 2496 | } |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2497 | invalidate_and_set_dirty(addr1, 4); |
bellard | 8df1cd0 | 2005-01-28 22:37:22 +0000 | [diff] [blame] | 2498 | } |
| 2499 | } |
| 2500 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2501 | void stl_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2502 | { |
| 2503 | stl_phys_internal(addr, val, DEVICE_NATIVE_ENDIAN); |
| 2504 | } |
| 2505 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2506 | void stl_le_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2507 | { |
| 2508 | stl_phys_internal(addr, val, DEVICE_LITTLE_ENDIAN); |
| 2509 | } |
| 2510 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2511 | void stl_be_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2512 | { |
| 2513 | stl_phys_internal(addr, val, DEVICE_BIG_ENDIAN); |
| 2514 | } |
| 2515 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2516 | /* XXX: optimize */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2517 | void stb_phys(hwaddr addr, uint32_t val) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2518 | { |
| 2519 | uint8_t v = val; |
| 2520 | cpu_physical_memory_write(addr, &v, 1); |
| 2521 | } |
| 2522 | |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2523 | /* warning: addr must be aligned */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2524 | static inline void stw_phys_internal(hwaddr addr, uint32_t val, |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2525 | enum device_endian endian) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2526 | { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2527 | uint8_t *ptr; |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2528 | MemoryRegion *mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2529 | hwaddr l = 2; |
| 2530 | hwaddr addr1; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2531 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2532 | mr = address_space_translate(&address_space_memory, addr, &addr1, &l, |
| 2533 | true); |
| 2534 | if (l < 2 || !memory_access_is_direct(mr, true)) { |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2535 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2536 | if (endian == DEVICE_LITTLE_ENDIAN) { |
| 2537 | val = bswap16(val); |
| 2538 | } |
| 2539 | #else |
| 2540 | if (endian == DEVICE_BIG_ENDIAN) { |
| 2541 | val = bswap16(val); |
| 2542 | } |
| 2543 | #endif |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2544 | io_mem_write(mr, addr1, val, 2); |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2545 | } else { |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2546 | /* RAM case */ |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2547 | addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK; |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2548 | ptr = qemu_get_ram_ptr(addr1); |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2549 | switch (endian) { |
| 2550 | case DEVICE_LITTLE_ENDIAN: |
| 2551 | stw_le_p(ptr, val); |
| 2552 | break; |
| 2553 | case DEVICE_BIG_ENDIAN: |
| 2554 | stw_be_p(ptr, val); |
| 2555 | break; |
| 2556 | default: |
| 2557 | stw_p(ptr, val); |
| 2558 | break; |
| 2559 | } |
Anthony PERARD | 51d7a9e | 2012-10-03 13:49:05 +0000 | [diff] [blame] | 2560 | invalidate_and_set_dirty(addr1, 2); |
Michael S. Tsirkin | 733f0b0 | 2010-04-06 14:18:19 +0300 | [diff] [blame] | 2561 | } |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2562 | } |
| 2563 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2564 | void stw_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2565 | { |
| 2566 | stw_phys_internal(addr, val, DEVICE_NATIVE_ENDIAN); |
| 2567 | } |
| 2568 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2569 | void stw_le_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2570 | { |
| 2571 | stw_phys_internal(addr, val, DEVICE_LITTLE_ENDIAN); |
| 2572 | } |
| 2573 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2574 | void stw_be_phys(hwaddr addr, uint32_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2575 | { |
| 2576 | stw_phys_internal(addr, val, DEVICE_BIG_ENDIAN); |
| 2577 | } |
| 2578 | |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2579 | /* XXX: optimize */ |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2580 | void stq_phys(hwaddr addr, uint64_t val) |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2581 | { |
| 2582 | val = tswap64(val); |
Stefan Weil | 71d2b72 | 2011-03-26 21:06:56 +0100 | [diff] [blame] | 2583 | cpu_physical_memory_write(addr, &val, 8); |
bellard | aab3309 | 2005-10-30 20:48:42 +0000 | [diff] [blame] | 2584 | } |
| 2585 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2586 | void stq_le_phys(hwaddr addr, uint64_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2587 | { |
| 2588 | val = cpu_to_le64(val); |
| 2589 | cpu_physical_memory_write(addr, &val, 8); |
| 2590 | } |
| 2591 | |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2592 | void stq_be_phys(hwaddr addr, uint64_t val) |
Alexander Graf | 1e78bcc | 2011-07-06 09:09:23 +0200 | [diff] [blame] | 2593 | { |
| 2594 | val = cpu_to_be64(val); |
| 2595 | cpu_physical_memory_write(addr, &val, 8); |
| 2596 | } |
| 2597 | |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2598 | /* virtual memory access for debug (includes writing to ROM) */ |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 2599 | int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, |
bellard | b448f2f | 2004-02-25 23:24:04 +0000 | [diff] [blame] | 2600 | uint8_t *buf, int len, int is_write) |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2601 | { |
| 2602 | int l; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2603 | hwaddr phys_addr; |
j_mayer | 9b3c35e | 2007-04-07 11:21:28 +0000 | [diff] [blame] | 2604 | target_ulong page; |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2605 | |
| 2606 | while (len > 0) { |
| 2607 | page = addr & TARGET_PAGE_MASK; |
Andreas Färber | f17ec44 | 2013-06-29 19:40:58 +0200 | [diff] [blame] | 2608 | phys_addr = cpu_get_phys_page_debug(cpu, page); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2609 | /* if no physical page mapped, return an error */ |
| 2610 | if (phys_addr == -1) |
| 2611 | return -1; |
| 2612 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 2613 | if (l > len) |
| 2614 | l = len; |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2615 | phys_addr += (addr & ~TARGET_PAGE_MASK); |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2616 | if (is_write) |
| 2617 | cpu_physical_memory_write_rom(phys_addr, buf, l); |
| 2618 | else |
aliguori | 5e2972f | 2009-03-28 17:51:36 +0000 | [diff] [blame] | 2619 | cpu_physical_memory_rw(phys_addr, buf, l, is_write); |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2620 | len -= l; |
| 2621 | buf += l; |
| 2622 | addr += l; |
| 2623 | } |
| 2624 | return 0; |
| 2625 | } |
Paul Brook | a68fe89 | 2010-03-01 00:08:59 +0000 | [diff] [blame] | 2626 | #endif |
bellard | 13eb76e | 2004-01-24 15:23:36 +0000 | [diff] [blame] | 2627 | |
Blue Swirl | 8e4a424 | 2013-01-06 18:30:17 +0000 | [diff] [blame] | 2628 | #if !defined(CONFIG_USER_ONLY) |
| 2629 | |
| 2630 | /* |
| 2631 | * A helper function for the _utterly broken_ virtio device model to find out if |
| 2632 | * it's running on a big endian machine. Don't do this at home kids! |
| 2633 | */ |
| 2634 | bool virtio_is_big_endian(void); |
| 2635 | bool virtio_is_big_endian(void) |
| 2636 | { |
| 2637 | #if defined(TARGET_WORDS_BIGENDIAN) |
| 2638 | return true; |
| 2639 | #else |
| 2640 | return false; |
| 2641 | #endif |
| 2642 | } |
| 2643 | |
| 2644 | #endif |
| 2645 | |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2646 | #ifndef CONFIG_USER_ONLY |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 2647 | bool cpu_physical_memory_is_io(hwaddr phys_addr) |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2648 | { |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2649 | MemoryRegion*mr; |
Paolo Bonzini | 149f54b | 2013-05-24 12:59:37 +0200 | [diff] [blame] | 2650 | hwaddr l = 1; |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2651 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2652 | mr = address_space_translate(&address_space_memory, |
| 2653 | phys_addr, &phys_addr, &l, false); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2654 | |
Paolo Bonzini | 5c8a00c | 2013-05-29 12:42:00 +0200 | [diff] [blame] | 2655 | return !(memory_region_is_ram(mr) || |
| 2656 | memory_region_is_romd(mr)); |
Wen Congyang | 76f3553 | 2012-05-07 12:04:18 +0800 | [diff] [blame] | 2657 | } |
Michael R. Hines | bd2fa51 | 2013-06-25 21:35:34 -0400 | [diff] [blame] | 2658 | |
| 2659 | void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque) |
| 2660 | { |
| 2661 | RAMBlock *block; |
| 2662 | |
| 2663 | QTAILQ_FOREACH(block, &ram_list.blocks, next) { |
| 2664 | func(block->host, block->offset, block->length, opaque); |
| 2665 | } |
| 2666 | } |
Peter Maydell | ec3f8c9 | 2013-06-27 20:53:38 +0100 | [diff] [blame] | 2667 | #endif |