stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 1 | /* |
uwe | b25f1ea | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 3 | * |
uwe | 555dd97 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
| 5 | * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com> |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 6 | * Copyright (C) 2005-2009 coresystems GmbH |
hailfinger | 77c5d93 | 2009-06-15 12:10:57 +0000 | [diff] [blame] | 7 | * Copyright (C) 2006-2009 Carl-Daniel Hailfinger |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 8 | * |
uwe | b25f1ea | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 13 | * |
uwe | b25f1ea | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 18 | * |
| 19 | */ |
| 20 | |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 21 | #ifndef __FLASH_H__ |
| 22 | #define __FLASH_H__ 1 |
| 23 | |
ollie | 6a60099 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 24 | #include <stdint.h> |
hailfinger | d43a4e3 | 2010-06-03 00:49:50 +0000 | [diff] [blame] | 25 | #include <stddef.h> |
hailfinger | 088dc81 | 2009-12-14 03:32:24 +0000 | [diff] [blame] | 26 | #include "hwaccess.h" |
oxygene | 3ad3b33 | 2010-01-06 22:14:39 +0000 | [diff] [blame] | 27 | #ifdef _WIN32 |
| 28 | #include <windows.h> |
| 29 | #undef min |
| 30 | #undef max |
| 31 | #endif |
hailfinger | e1f062f | 2008-05-22 13:22:45 +0000 | [diff] [blame] | 32 | |
Stefan Reinauer | e64faaf | 2011-05-03 18:03:25 -0700 | [diff] [blame] | 33 | /* Are timers broken? */ |
| 34 | extern int broken_timer; |
| 35 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 36 | struct flashctx; /* forward declare */ |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 37 | #define ERROR_PTR ((void*)-1) |
| 38 | |
hailfinger | ee9ee13 | 2010-10-08 00:37:55 +0000 | [diff] [blame] | 39 | /* Error codes */ |
| 40 | #define TIMEOUT_ERROR -101 |
| 41 | |
Louis Yung-Chieh Lo | 5d95f04 | 2011-09-01 17:33:06 +0800 | [diff] [blame] | 42 | /* for verify_it variable in flashrom.c and cli_mfg.c */ |
| 43 | enum { |
| 44 | VERIFY_OFF = 0, |
| 45 | VERIFY_FULL, |
| 46 | VERIFY_PARTIAL, |
| 47 | }; |
| 48 | |
hailfinger | 8271963 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 49 | typedef unsigned long chipaddr; |
| 50 | |
David Hendricks | 93784b4 | 2016-08-09 17:00:38 -0700 | [diff] [blame] | 51 | int register_shutdown(int (*function) (void *data), void *data); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 52 | #define CHIP_RESTORE_CALLBACK int (*func) (struct flashctx *flash, uint8_t status) |
David Hendricks | bf36f09 | 2010-11-02 23:39:29 -0700 | [diff] [blame] | 53 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 54 | int register_chip_restore(CHIP_RESTORE_CALLBACK, struct flashctx *flash, uint8_t status); |
uwe | abe92a5 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 55 | void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, |
| 56 | size_t len); |
| 57 | void programmer_unmap_flash_region(void *virt_addr, size_t len); |
hailfinger | e5829f6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 58 | void programmer_delay(int usecs); |
hailfinger | ba3761a | 2009-03-05 19:24:22 +0000 | [diff] [blame] | 59 | |
uwe | 16f9909 | 2008-03-12 11:54:51 +0000 | [diff] [blame] | 60 | #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) |
| 61 | |
hailfinger | 4016746 | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 62 | enum chipbustype { |
hailfinger | e1e41ea | 2011-07-27 07:13:06 +0000 | [diff] [blame] | 63 | BUS_NONE = 0, |
| 64 | BUS_PARALLEL = 1 << 0, |
| 65 | BUS_LPC = 1 << 1, |
| 66 | BUS_FWH = 1 << 2, |
| 67 | BUS_SPI = 1 << 3, |
hailfinger | fe7cd9e | 2011-11-04 21:35:26 +0000 | [diff] [blame] | 68 | BUS_PROG = 1 << 4, |
hailfinger | e1e41ea | 2011-07-27 07:13:06 +0000 | [diff] [blame] | 69 | BUS_NONSPI = BUS_PARALLEL | BUS_LPC | BUS_FWH, |
hailfinger | 4016746 | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 70 | }; |
| 71 | |
David Hendricks | 80f62d2 | 2010-10-08 11:09:35 -0700 | [diff] [blame] | 72 | /* used to select bus which target chip resides */ |
| 73 | extern enum chipbustype target_bus; |
| 74 | |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 75 | /* |
| 76 | * How many different contiguous runs of erase blocks with one size each do |
| 77 | * we have for a given erase function? |
| 78 | */ |
| 79 | #define NUM_ERASEREGIONS 5 |
| 80 | |
| 81 | /* |
| 82 | * How many different erase functions do we have per chip? |
hailfinger | c33d473 | 2010-07-29 13:09:18 +0000 | [diff] [blame] | 83 | * Atmel AT25FS010 has 6 different functions. |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 84 | */ |
hailfinger | c33d473 | 2010-07-29 13:09:18 +0000 | [diff] [blame] | 85 | #define NUM_ERASEFUNCTIONS 6 |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 86 | |
hailfinger | 80dea31 | 2010-01-09 03:15:50 +0000 | [diff] [blame] | 87 | #define FEATURE_REGISTERMAP (1 << 0) |
| 88 | #define FEATURE_BYTEWRITES (1 << 1) |
snelson | c685534 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 89 | #define FEATURE_LONG_RESET (0 << 4) |
| 90 | #define FEATURE_SHORT_RESET (1 << 4) |
| 91 | #define FEATURE_EITHER_RESET FEATURE_LONG_RESET |
hailfinger | b07dc97 | 2010-10-20 21:13:19 +0000 | [diff] [blame] | 92 | #define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET) |
hailfinger | 80dea31 | 2010-01-09 03:15:50 +0000 | [diff] [blame] | 93 | #define FEATURE_ADDR_FULL (0 << 2) |
| 94 | #define FEATURE_ADDR_MASK (3 << 2) |
snelson | c685534 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 95 | #define FEATURE_ADDR_2AA (1 << 2) |
| 96 | #define FEATURE_ADDR_AAA (2 << 2) |
mkarcher | 9ded5fe | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 97 | #define FEATURE_ADDR_SHIFTED (1 << 5) |
hailfinger | c33d473 | 2010-07-29 13:09:18 +0000 | [diff] [blame] | 98 | #define FEATURE_WRSR_EWSR (1 << 6) |
| 99 | #define FEATURE_WRSR_WREN (1 << 7) |
| 100 | #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) |
David Hendricks | ff55cf6 | 2016-08-30 11:22:31 -0700 | [diff] [blame] | 101 | #define FEATURE_OTP (1 << 8) |
| 102 | #define FEATURE_ERASE_TO_ZERO (1 << 9) |
Duncan Laurie | 06ffd52 | 2015-10-26 12:56:08 -0700 | [diff] [blame] | 103 | #define FEATURE_UNBOUND_READ (1 << 10) |
William A. Kennington III | f15c2fa | 2017-04-07 17:38:42 -0700 | [diff] [blame] | 104 | #define FEATURE_NO_ERASE (1 << 11) |
Boris Baykov | 64d00c7 | 2016-06-11 18:28:59 +0200 | [diff] [blame] | 105 | #define FEATURE_4BA_SUPPORT (1 << 12) |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 106 | |
David Hendricks | 8c08421 | 2015-11-17 22:29:36 -0800 | [diff] [blame] | 107 | struct voltage_range { |
| 108 | uint16_t min, max; |
| 109 | }; |
| 110 | |
Patrick Georgi | ac3423f | 2017-02-03 20:58:06 +0100 | [diff] [blame] | 111 | enum test_state { |
| 112 | OK = 0, |
| 113 | NT = 1, /* Not tested */ |
| 114 | BAD, /* Known to not work */ |
| 115 | DEP, /* Support depends on configuration (e.g. Intel flash descriptor) */ |
| 116 | NA, /* Not applicable (e.g. write support on ROM chips) */ |
| 117 | }; |
| 118 | |
| 119 | #define TEST_UNTESTED (struct tested){ .probe = NT, .read = NT, .erase = NT, .write = NT, .uread = NT } |
| 120 | |
| 121 | #define TEST_OK_PROBE (struct tested){ .probe = OK, .read = NT, .erase = NT, .write = NT, .uread = NT } |
| 122 | #define TEST_OK_PR (struct tested){ .probe = OK, .read = OK, .erase = NT, .write = NT, .uread = NT } |
| 123 | #define TEST_OK_PRE (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = NT, .uread = NT } |
| 124 | #define TEST_OK_PRU (struct tested){ .probe = OK, .read = OK, .erase = NT, .write = NT, .uread = OK } |
| 125 | #define TEST_OK_PREU (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = NT, .uread = OK } |
| 126 | #define TEST_OK_PREW (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = OK, .uread = NT } |
| 127 | #define TEST_OK_PREWU (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = OK, .uread = OK } |
| 128 | |
| 129 | #define TEST_BAD_PROBE (struct tested){ .probe = BAD, .read = NT, .erase = NT, .write = NT, .uread = NT } |
| 130 | #define TEST_BAD_PR (struct tested){ .probe = BAD, .read = BAD, .erase = NT, .write = NT, .uread = NT } |
| 131 | #define TEST_BAD_PRE (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = NT, .uread = NT } |
| 132 | #define TEST_BAD_PREW (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = BAD, .uread = NT } |
| 133 | #define TEST_BAD_PREWU (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = BAD, .uread = BAD } |
| 134 | |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 135 | struct flashchip { |
uwe | dfcd15f | 2008-03-14 23:55:58 +0000 | [diff] [blame] | 136 | const char *vendor; |
uwe | 6ed6d95 | 2007-12-04 21:49:06 +0000 | [diff] [blame] | 137 | const char *name; |
hailfinger | 4016746 | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 138 | |
| 139 | enum chipbustype bustype; |
| 140 | |
uwe | fa98ca1 | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 141 | /* |
| 142 | * With 32bit manufacture_id and model_id we can cover IDs up to |
hailfinger | 428f201 | 2007-12-31 01:49:00 +0000 | [diff] [blame] | 143 | * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's |
| 144 | * Identification code. |
| 145 | */ |
| 146 | uint32_t manufacture_id; |
| 147 | uint32_t model_id; |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 148 | |
stefanct | 707f13b | 2011-05-19 02:58:17 +0000 | [diff] [blame] | 149 | /* Total chip size in kilobytes */ |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 150 | unsigned int total_size; |
stefanct | 707f13b | 2011-05-19 02:58:17 +0000 | [diff] [blame] | 151 | /* Chip page size in bytes */ |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 152 | unsigned int page_size; |
snelson | 63133f9 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 153 | int feature_bits; |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 154 | |
Boris Baykov | 1a2f532 | 2016-06-11 18:29:00 +0200 | [diff] [blame] | 155 | /* set of function pointers to use in 4-bytes addressing mode */ |
| 156 | struct four_bytes_addr_funcs_set { |
Ed Swierk | 28cf799 | 2017-07-03 13:17:18 -0700 | [diff] [blame] | 157 | int (*set_4ba) (struct flashctx *flash); |
Boris Baykov | 1a2f532 | 2016-06-11 18:29:00 +0200 | [diff] [blame] | 158 | int (*read_nbyte) (struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); |
| 159 | int (*program_byte) (struct flashctx *flash, unsigned int addr, const uint8_t databyte); |
| 160 | int (*program_nbyte) (struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); |
| 161 | } four_bytes_addr_funcs; |
| 162 | |
Patrick Georgi | ac3423f | 2017-02-03 20:58:06 +0100 | [diff] [blame] | 163 | /* Indicate how well flashrom supports different operations of this flash chip. */ |
| 164 | struct tested { |
| 165 | enum test_state probe; |
| 166 | enum test_state read; |
| 167 | enum test_state erase; |
| 168 | enum test_state write; |
| 169 | enum test_state uread; |
| 170 | } tested; |
stuge | 9cd64bd | 2008-05-03 04:34:37 +0000 | [diff] [blame] | 171 | |
Edward O'Callaghan | cc1d0c9 | 2019-02-24 15:35:07 +1100 | [diff] [blame] | 172 | /* |
| 173 | * Group chips that have common command sets. This should ensure that |
| 174 | * no chip gets confused by a probing command for a very different class |
| 175 | * of chips. |
| 176 | */ |
| 177 | enum { |
| 178 | /* SPI25 is very common. Keep it at zero so we don't have |
| 179 | to specify it for each and every chip in the database.*/ |
| 180 | SPI25 = 0, |
| 181 | } spi_cmd_set; |
| 182 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 183 | int (*probe) (struct flashctx *flash); |
hailfinger | d5b3592 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 184 | |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 185 | /* Delay after "enter/exit ID mode" commands in microseconds. |
| 186 | * NB: negative values have special meanings, see TIMING_* below. |
| 187 | */ |
| 188 | signed int probe_timing; |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 189 | |
| 190 | /* |
hailfinger | c4fac58 | 2009-12-22 13:04:53 +0000 | [diff] [blame] | 191 | * Erase blocks and associated erase function. Any chip erase function |
| 192 | * is stored as chip-sized virtual block together with said function. |
stefanct | 707f13b | 2011-05-19 02:58:17 +0000 | [diff] [blame] | 193 | * The first one that fits will be chosen. There is currently no way to |
| 194 | * influence that behaviour. For testing just comment out the other |
| 195 | * elements or set the function pointer to NULL. |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 196 | */ |
| 197 | struct block_eraser { |
Patrick Georgi | ac3423f | 2017-02-03 20:58:06 +0100 | [diff] [blame] | 198 | struct eraseblock { |
stefanct | 312d9ff | 2011-06-12 19:47:55 +0000 | [diff] [blame] | 199 | unsigned int size; /* Eraseblock size in bytes */ |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 200 | unsigned int count; /* Number of contiguous blocks with that size */ |
| 201 | } eraseblocks[NUM_ERASEREGIONS]; |
stefanct | 9e6b98a | 2011-05-28 02:37:14 +0000 | [diff] [blame] | 202 | /* a block_erase function should try to erase one block of size |
| 203 | * 'blocklen' at address 'blockaddr' and return 0 on success. */ |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 204 | int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 205 | } block_erasers[NUM_ERASEFUNCTIONS]; |
| 206 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 207 | int (*printlock) (struct flashctx *flash); |
| 208 | int (*unlock) (struct flashctx *flash); |
Patrick Georgi | ab8353e | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 209 | int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 210 | int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); |
| 211 | uint8_t (*read_status) (const struct flashctx *flash); |
| 212 | int (*write_status) (const struct flashctx *flash, int status); |
David Hendricks | 8c08421 | 2015-11-17 22:29:36 -0800 | [diff] [blame] | 213 | struct voltage_range voltage; |
David Hendricks | f7924d1 | 2010-06-10 21:26:44 -0700 | [diff] [blame] | 214 | struct wp *wp; |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 215 | }; |
| 216 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 217 | /* struct flashctx must always contain struct flashchip at the beginning. */ |
| 218 | struct flashctx { |
Patrick Georgi | f3fa299 | 2017-02-02 16:24:44 +0100 | [diff] [blame] | 219 | struct flashchip *chip; |
| 220 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 221 | chipaddr virtual_memory; |
| 222 | /* Some flash devices have an additional register space. */ |
| 223 | chipaddr virtual_registers; |
| 224 | }; |
| 225 | |
| 226 | |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 227 | /* This is the byte value we expect to see in erased regions of the flash */ |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 228 | int flash_erase_value(struct flashctx *flash); |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 229 | |
| 230 | /* This is a byte value that indicates that the region is not erased */ |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 231 | int flash_unerased_value(struct flashctx *flash); |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 232 | |
David Hendricks | 40df5b5 | 2016-12-22 15:36:28 -0800 | [diff] [blame] | 233 | /* Given RDID info, return pointer to entry in flashchips[] */ |
| 234 | const struct flashchip *flash_id_to_entry(uint32_t mfg_id, uint32_t model_id); |
| 235 | |
hailfinger | d5b3592 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 236 | /* Timing used in probe routines. ZERO is -2 to differentiate between an unset |
| 237 | * field and zero delay. |
Simon Glass | 8dc8273 | 2013-07-16 10:13:51 -0600 | [diff] [blame] | 238 | * |
hailfinger | d5b3592 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 239 | * SPI devices will always have zero delay and ignore this field. |
| 240 | */ |
| 241 | #define TIMING_FIXME -1 |
| 242 | /* this is intentionally same value as fixme */ |
| 243 | #define TIMING_IGNORED -1 |
| 244 | #define TIMING_ZERO -2 |
| 245 | |
hailfinger | 48ed3e2 | 2011-05-04 00:39:50 +0000 | [diff] [blame] | 246 | extern const struct flashchip flashchips[]; |
Ramya Vijaykumar | e6a7ca8 | 2015-05-12 14:27:29 +0530 | [diff] [blame] | 247 | extern const struct flashchip flashchips_hwseq[]; |
ollie | 6a60099 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 248 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 249 | void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); |
| 250 | void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); |
| 251 | void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); |
| 252 | void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len); |
| 253 | uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr); |
| 254 | uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr); |
| 255 | uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr); |
| 256 | void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); |
| 257 | |
uwe | 884cc8b | 2009-06-17 12:07:12 +0000 | [diff] [blame] | 258 | /* print.c */ |
| 259 | char *flashbuses_to_text(enum chipbustype bustype); |
hailfinger | a50d60e | 2009-11-17 09:57:34 +0000 | [diff] [blame] | 260 | void print_supported(void); |
hailfinger | a50d60e | 2009-11-17 09:57:34 +0000 | [diff] [blame] | 261 | void print_supported_wiki(void); |
uwe | a3a82c9 | 2009-05-15 17:02:34 +0000 | [diff] [blame] | 262 | |
Edward O'Callaghan | 8dd5792 | 2019-03-15 16:21:34 +1100 | [diff] [blame] | 263 | /* helpers.c */ |
| 264 | uint32_t address_to_bits(uint32_t addr); |
| 265 | int bitcount(unsigned long a); |
| 266 | int min(int a, int b); |
| 267 | int max(int a, int b); |
| 268 | char *strcat_realloc(char *dest, const char *src); |
| 269 | void tolower_string(char *str); |
| 270 | |
uwe | 4529d20 | 2007-08-23 13:34:59 +0000 | [diff] [blame] | 271 | /* flashrom.c */ |
Edward O'Callaghan | d8eca56 | 2019-02-24 21:10:33 +1100 | [diff] [blame^] | 272 | /* |
| 273 | * The following enum defines possible write granularities of flash chips. These tend to reflect the properties |
| 274 | * of the actual hardware not necesserily the write function(s) defined by the respective struct flashchip. |
| 275 | * The latter might (and should) be more precisely specified, e.g. they might bail out early if their execution |
| 276 | * would result in undefined chip contents. |
| 277 | */ |
hailfinger | b247c7a | 2010-03-08 00:42:32 +0000 | [diff] [blame] | 278 | enum write_granularity { |
Edward O'Callaghan | d8eca56 | 2019-02-24 21:10:33 +1100 | [diff] [blame^] | 279 | /* We assume 256 byte granularity by default. */ |
| 280 | write_gran_256bytes = 0,/* If less than 256 bytes are written, the unwritten bytes are undefined. */ |
| 281 | write_gran_1bit, /* Each bit can be cleared individually. */ |
| 282 | write_gran_1byte, /* A byte can be written once. Further writes to an already written byte cause |
| 283 | * its contents to be either undefined or to stay unchanged. */ |
| 284 | write_gran_128bytes, /* If less than 128 bytes are written, the unwritten bytes are undefined. */ |
| 285 | write_gran_264bytes, /* If less than 264 bytes are written, the unwritten bytes are undefined. */ |
| 286 | write_gran_512bytes, /* If less than 512 bytes are written, the unwritten bytes are undefined. */ |
| 287 | write_gran_528bytes, /* If less than 528 bytes are written, the unwritten bytes are undefined. */ |
| 288 | write_gran_1024bytes, /* If less than 1024 bytes are written, the unwritten bytes are undefined. */ |
| 289 | write_gran_1056bytes, /* If less than 1056 bytes are written, the unwritten bytes are undefined. */ |
| 290 | write_gran_1byte_implicit_erase, /* EEPROMs and other chips with implicit erase and 1-byte writes. */ |
hailfinger | b247c7a | 2010-03-08 00:42:32 +0000 | [diff] [blame] | 291 | }; |
Edward O'Callaghan | d8eca56 | 2019-02-24 21:10:33 +1100 | [diff] [blame^] | 292 | |
hailfinger | 80422e2 | 2009-12-13 22:28:00 +0000 | [diff] [blame] | 293 | extern enum chipbustype buses_supported; |
Edward O'Callaghan | 8d8d397 | 2019-02-24 20:40:10 +1100 | [diff] [blame] | 294 | extern enum flashrom_log_level verbose_screen; |
| 295 | extern enum flashrom_log_level verbose_logfile; |
krause | 2eb7621 | 2011-01-17 07:50:42 +0000 | [diff] [blame] | 296 | extern const char flashrom_version[]; |
hailfinger | 92cd8e3 | 2010-01-07 03:24:05 +0000 | [diff] [blame] | 297 | extern char *chip_to_probe; |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 298 | void map_flash_registers(struct flashctx *flash); |
| 299 | int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); |
| 300 | int erase_flash(struct flashctx *flash); |
David Hendricks | ac1d25c | 2016-08-09 17:00:58 -0700 | [diff] [blame] | 301 | int probe_flash(int startchip, struct flashctx *fill_flash, int force); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 302 | int read_flash(struct flashctx *flash, uint8_t *buf, |
David Hendricks | e345194 | 2013-03-21 17:23:29 -0700 | [diff] [blame] | 303 | unsigned int start, unsigned int len); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 304 | int read_flash_to_file(struct flashctx *flash, const char *filename); |
stefanct | 5270028 | 2011-06-26 17:38:17 +0000 | [diff] [blame] | 305 | char *extract_param(char **haystack, const char *needle, const char *delim); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 306 | int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message); |
hailfinger | 92cd8e3 | 2010-01-07 03:24:05 +0000 | [diff] [blame] | 307 | void print_version(void); |
Souvik Ghosh | 3c963a4 | 2016-07-19 18:48:15 -0700 | [diff] [blame] | 308 | void print_buildinfo(void); |
hailfinger | 74819ad | 2010-05-15 15:04:37 +0000 | [diff] [blame] | 309 | void print_banner(void); |
hailfinger | f79d171 | 2010-10-06 23:48:34 +0000 | [diff] [blame] | 310 | void list_programmers_linebreak(int startcol, int cols, int paren); |
hailfinger | 92cd8e3 | 2010-01-07 03:24:05 +0000 | [diff] [blame] | 311 | int selfcheck(void); |
Vadim Bendebury | 2f346a3 | 2018-05-21 10:24:18 -0700 | [diff] [blame] | 312 | |
| 313 | /* |
| 314 | * |
| 315 | * The main processing function of flashrom utility; it is invoked once |
| 316 | * command line parameters are processed and verified, and the type of the |
| 317 | * flash chip the programmer operates on has been determined. |
| 318 | * |
| 319 | * @flash pointer to the flash context matching the chip detected |
| 320 | * during initialization. |
| 321 | * @force when set proceed even if the chip is not known to work |
| 322 | * @filename pointer to the name of the file to read from or write to |
| 323 | * @read_it when true, flash contents are read into 'filename' |
| 324 | * @write_it when true, flash is programmed with 'filename' contents |
| 325 | * @erase_it when true, flash chip is erased |
| 326 | * @verify_it depending on the value verify the full chip, only changed |
| 327 | * areas, or none |
| 328 | * @extract_it extract all known flash chip regions into separate files |
| 329 | * @diff_file when deciding what areas to program, use this file's |
| 330 | * contents instead of reading the current chip contents |
| 331 | * @do_diff when true - compare result of the operation with either the |
| 332 | * original chip contents for 'diff_file' contents, is present. |
| 333 | * When false - do not diff, consider the chip erased before |
| 334 | * operation starts. |
| 335 | * |
| 336 | * Only one of 'read_it', 'write_it', and 'erase_it' is expected to be set, |
| 337 | * but this is not enforced. |
| 338 | * |
| 339 | * 'do_diff' must be set if 'diff_file' is set. If 'do_diff' is set, but |
| 340 | * 'diff_file' is not - comparison is done against the pre-operation chip |
| 341 | * contents. |
| 342 | */ |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 343 | int doit(struct flashctx *flash, int force, const char *filename, int read_it, |
Simon Glass | 9ad06c1 | 2013-07-03 22:08:17 +0900 | [diff] [blame] | 344 | int write_it, int erase_it, int verify_it, int extract_it, |
Vadim Bendebury | 2f346a3 | 2018-05-21 10:24:18 -0700 | [diff] [blame] | 345 | const char *diff_file, int do_diff); |
stefanct | 5270028 | 2011-06-26 17:38:17 +0000 | [diff] [blame] | 346 | int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename); |
| 347 | int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename); |
uwe | 884cc8b | 2009-06-17 12:07:12 +0000 | [diff] [blame] | 348 | |
| 349 | #define OK 0 |
| 350 | #define NT 1 /* Not tested */ |
uwe | 4529d20 | 2007-08-23 13:34:59 +0000 | [diff] [blame] | 351 | |
David Hendricks | 1ed1d35 | 2011-11-23 17:54:37 -0800 | [diff] [blame] | 352 | /* what to do in case of an error */ |
| 353 | enum error_action { |
| 354 | error_fail, /* fail immediately */ |
| 355 | error_ignore, /* non-fatal error; continue */ |
| 356 | }; |
| 357 | |
uwe | 97e8e27 | 2011-09-03 17:15:00 +0000 | [diff] [blame] | 358 | /* Something happened that shouldn't happen, but we can go on. */ |
mkarcher | 74d3013 | 2010-07-22 18:04:15 +0000 | [diff] [blame] | 359 | #define ERROR_NONFATAL 0x100 |
| 360 | |
uwe | 97e8e27 | 2011-09-03 17:15:00 +0000 | [diff] [blame] | 361 | /* Something happened that shouldn't happen, we'll abort. */ |
| 362 | #define ERROR_FATAL -0xee |
| 363 | |
David Hendricks | 1ed1d35 | 2011-11-23 17:54:37 -0800 | [diff] [blame] | 364 | /* Operation failed due to access restriction set in programmer or flash chip */ |
| 365 | #define ACCESS_DENIED -7 |
| 366 | extern enum error_action access_denied_action; |
| 367 | |
| 368 | /* convenience function for checking return codes */ |
| 369 | extern int ignore_error(int x); |
| 370 | |
snelson | 9cba3c6 | 2010-01-07 20:09:33 +0000 | [diff] [blame] | 371 | /* cli_output.c */ |
Souvik Ghosh | 3c963a4 | 2016-07-19 18:48:15 -0700 | [diff] [blame] | 372 | #ifndef STANDALONE |
| 373 | int open_logfile(const char * const filename); |
| 374 | int close_logfile(void); |
| 375 | void start_logging(void); |
| 376 | #endif |
Edward O'Callaghan | 8d8d397 | 2019-02-24 20:40:10 +1100 | [diff] [blame] | 377 | enum flashrom_log_level { |
| 378 | FLASHROM_MSG_ERROR = 0, |
| 379 | FLASHROM_MSG_WARN = 1, |
| 380 | FLASHROM_MSG_INFO = 2, |
| 381 | FLASHROM_MSG_DEBUG = 3, |
| 382 | FLASHROM_MSG_DEBUG2 = 4, |
| 383 | FLASHROM_MSG_SPEW = 5, |
Patrick Georgi | dbde2f1 | 2017-02-03 18:07:45 +0100 | [diff] [blame] | 384 | }; |
hailfinger | 63932d4 | 2010-06-04 23:20:21 +0000 | [diff] [blame] | 385 | /* Let gcc and clang check for correct printf-style format strings. */ |
Edward O'Callaghan | 8d8d397 | 2019-02-24 20:40:10 +1100 | [diff] [blame] | 386 | int print(enum flashrom_log_level level, const char *fmt, ...) |
Patrick Georgi | dbde2f1 | 2017-02-03 18:07:45 +0100 | [diff] [blame] | 387 | #ifdef __MINGW32__ |
| 388 | __attribute__((format(gnu_printf, 2, 3))); |
| 389 | #else |
| 390 | __attribute__((format(printf, 2, 3))); |
| 391 | #endif |
Edward O'Callaghan | 8d8d397 | 2019-02-24 20:40:10 +1100 | [diff] [blame] | 392 | #define msg_gerr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* general errors */ |
| 393 | #define msg_perr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* programmer errors */ |
| 394 | #define msg_cerr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* chip errors */ |
| 395 | #define msg_gwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* general warnings */ |
| 396 | #define msg_pwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* programmer warnings */ |
| 397 | #define msg_cwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* chip warnings */ |
| 398 | #define msg_ginfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* general info */ |
| 399 | #define msg_pinfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* programmer info */ |
| 400 | #define msg_cinfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* chip info */ |
| 401 | #define msg_gdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* general debug */ |
| 402 | #define msg_pdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* programmer debug */ |
| 403 | #define msg_cdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* chip debug */ |
| 404 | #define msg_gdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* general debug2 */ |
| 405 | #define msg_pdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* programmer debug2 */ |
| 406 | #define msg_cdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* chip debug2 */ |
| 407 | #define msg_gspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* general debug spew */ |
| 408 | #define msg_pspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* programmer debug spew */ |
| 409 | #define msg_cspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* chip debug spew */ |
snelson | 9cba3c6 | 2010-01-07 20:09:33 +0000 | [diff] [blame] | 410 | |
stepan | 745615e | 2007-10-15 21:44:47 +0000 | [diff] [blame] | 411 | /* spi.c */ |
hailfinger | 68002c2 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 412 | struct spi_command { |
| 413 | unsigned int writecnt; |
| 414 | unsigned int readcnt; |
| 415 | const unsigned char *writearr; |
| 416 | unsigned char *readarr; |
| 417 | }; |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 418 | int spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, |
uwe | fa98ca1 | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 419 | const unsigned char *writearr, unsigned char *readarr); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 420 | int spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds); |
| 421 | uint32_t spi_get_valid_read_addr(struct flashctx *flash); |
uwe | af9b4df | 2008-09-26 13:19:02 +0000 | [diff] [blame] | 422 | |
David Hendricks | 8c08421 | 2015-11-17 22:29:36 -0800 | [diff] [blame] | 423 | #define NUM_VOLTAGE_RANGES 16 |
| 424 | extern struct voltage_range voltage_ranges[]; |
| 425 | /* returns number of unique voltage ranges, or <0 to indicate failure */ |
| 426 | extern int flash_supported_voltage_ranges(enum chipbustype bus); |
| 427 | |
ollie | 5b62157 | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 428 | #endif /* !__FLASH_H__ */ |