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stepan5c3f1382007-02-06 19:47:50 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
stepan5c3f1382007-02-06 19:47:50 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
stepan5c3f1382007-02-06 19:47:50 +00007 *
uweb25f1ea2007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
stepan5c3f1382007-02-06 19:47:50 +000012 *
uweb25f1ea2007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
stepan5c3f1382007-02-06 19:47:50 +000017 *
uweb25f1ea2007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
stepan5c3f1382007-02-06 19:47:50 +000021 */
22
rminnich8d3ff912003-10-25 17:01:29 +000023#ifndef __FLASH_H__
24#define __FLASH_H__ 1
25
stepan5c3f1382007-02-06 19:47:50 +000026#if defined(__GLIBC__)
rminnich8d3ff912003-10-25 17:01:29 +000027#include <sys/io.h>
stepan5c3f1382007-02-06 19:47:50 +000028#endif
rminnich8d3ff912003-10-25 17:01:29 +000029#include <unistd.h>
ollie6a600992005-11-26 21:55:36 +000030#include <stdint.h>
uwe4529d202007-08-23 13:34:59 +000031#include <stdio.h>
rminnich8d3ff912003-10-25 17:01:29 +000032
33struct flashchip {
uwe6ed6d952007-12-04 21:49:06 +000034 const char *name;
rminnich8d3ff912003-10-25 17:01:29 +000035 int manufacture_id;
36 int model_id;
37
rminnich8d3ff912003-10-25 17:01:29 +000038 int total_size;
39 int page_size;
40
uwe8e1a2ba2007-04-01 19:44:21 +000041 int (*probe) (struct flashchip *flash);
42 int (*erase) (struct flashchip *flash);
43 int (*write) (struct flashchip *flash, uint8_t *buf);
44 int (*read) (struct flashchip *flash, uint8_t *buf);
rminnich8d3ff912003-10-25 17:01:29 +000045
uwe6ed6d952007-12-04 21:49:06 +000046 /* Some flash devices have an additional register space. */
stepan7cd945e2007-05-23 17:20:56 +000047 volatile uint8_t *virtual_memory;
48 volatile uint8_t *virtual_registers;
rminnich8d3ff912003-10-25 17:01:29 +000049};
50
ollie6a600992005-11-26 21:55:36 +000051extern struct flashchip flashchips[];
52
uwe6ed6d952007-12-04 21:49:06 +000053/*
54 * Please keep this list sorted alphabetically by manufacturer. The first
uwee2308702007-04-01 20:00:32 +000055 * entry of each section should be the manufacturer ID, followed by the
56 * list of devices from that manufacturer (sorted by device IDs).
uwe6ed6d952007-12-04 21:49:06 +000057 *
ward11844452007-10-02 15:49:25 +000058 * All LPC/FWH parts (parallel flash) have 8-bit device IDs.
59 * All SPI parts have 16-bit device IDs.
uwee2308702007-04-01 20:00:32 +000060 */
61
hailfinger1d1810d2007-10-22 20:36:16 +000062#define ALLIANCE_ID 0x52 /* Alliance */
63
uwee2308702007-04-01 20:00:32 +000064#define AMD_ID 0x01 /* AMD */
uwe8e1a2ba2007-04-01 19:44:21 +000065#define AM_29F040B 0xA4
stuge590c73f2007-10-25 04:11:11 +000066#define AM_29LV040B 0x4F
uwe8e1a2ba2007-04-01 19:44:21 +000067#define AM_29F016D 0xAD
rminnich8d3ff912003-10-25 17:01:29 +000068
hailfinger1d1810d2007-10-22 20:36:16 +000069#define AMIC_ID 0x37 /* AMIC */
70
uwee2308702007-04-01 20:00:32 +000071#define ASD_ID 0x25 /* ASD */
uwe8e1a2ba2007-04-01 19:44:21 +000072#define ASD_AE49F2008 0x52
stepan8fdc8122006-11-21 23:51:08 +000073
uwee2308702007-04-01 20:00:32 +000074#define ATMEL_ID 0x1F /* Atmel */
75#define AT_29C040A 0xA4
stugeb7fda652007-04-28 02:22:59 +000076#define AT_29C020 0xDA
rminnich8d3ff912003-10-25 17:01:29 +000077
hailfinger1d1810d2007-10-22 20:36:16 +000078#define CATALYST_ID 0x31 /* Catalyst */
79
80#define EMST_ID 0x8C /* EMST / EFST */
81#define EMST_F49B002UA 0x00
82
uwe6ed6d952007-12-04 21:49:06 +000083/*
84 * EN25 chips are SPI, first byte of device ID is memory type,
85 * second byte of device ID is log(bitsize)-9.
86 */
hailfinger1d1810d2007-10-22 20:36:16 +000087#define EON_ID 0x1C /* EON */
ward11844452007-10-02 15:49:25 +000088#define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */
89#define EN_25B10 0x2011
90#define EN_25B20 0x2012
91#define EN_25B40 0x2013
92#define EN_25B80 0x2014
93#define EN_25B16 0x2015
94#define EN_25B32 0x2016
95
hailfinger1d1810d2007-10-22 20:36:16 +000096#define FUJITSU_ID 0x04 /* Fujitsu */
uwe5a53c682007-10-30 00:56:50 +000097#define MBM29F400TC 0x23
hailfinger1d1810d2007-10-22 20:36:16 +000098
99#define HYUNDAI_ID 0xAD /* Hyundai */
100
101#define IMT_ID 0x7F /* IMT */
102
103#define INTEL_ID 0x89 /* Intel */
104
105#define ISSI_ID 0xD5 /* ISSI */
106
107#define MSYSTEMS_ID 0x156F /* M-Systems */
uwe6ed6d952007-12-04 21:49:06 +0000108#define MSYSTEMS_MD2200 0xDB
hailfinger1d1810d2007-10-22 20:36:16 +0000109#define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */
110#define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */
111
uwe6ed6d952007-12-04 21:49:06 +0000112/*
113 * MX25 chips are SPI, first byte of device ID is memory type,
114 * second byte of device ID is log(bitsize)-9.
115 */
uwee2308702007-04-01 20:00:32 +0000116#define MX_ID 0xC2 /* Macronix (MX) */
ward11844452007-10-02 15:49:25 +0000117#define MX_25L512 0x2010 /* 2^19 kbit or 2^16 kByte */
118#define MX_25L1005 0x2011
119#define MX_25L2005 0x2012
120#define MX_25L4005 0x2013 /* MX25L4005{,A} */
121#define MX_25L8005 0x2014
122#define MX_25L1605 0x2015 /* MX25L1605{,A,D} */
123#define MX_25L3205 0x2016 /* MX25L3205{,A} */
124#define MX_25L6405 0x2017 /* MX25L3205{,D} */
125#define MX_25L1635D 0x2415
126#define MX_25L3235D 0x2416
hailfinger1b24dbb2007-10-22 16:15:28 +0000127#define MX_29F002 0xB0
rminnich8d3ff912003-10-25 17:01:29 +0000128
hailfinger1d1810d2007-10-22 20:36:16 +0000129#define PMC_ID 0x9D /* PMC */
130#define PMC_49FL002 0x6D
131#define PMC_49FL004 0x6E
132
uwee2308702007-04-01 20:00:32 +0000133#define SHARP_ID 0xB0 /* Sharp */
uwe8e1a2ba2007-04-01 19:44:21 +0000134#define SHARP_LHF00L04 0xCF
rminnich5f8fd452006-02-23 17:16:44 +0000135
uwe6ed6d952007-12-04 21:49:06 +0000136/*
137 * SST25 chips are SPI, first byte of device ID is memory type, second
138 * byte of device ID is related to log(bitsize) at least for some chips.
139 */
uwee2308702007-04-01 20:00:32 +0000140#define SST_ID 0xBF /* SST */
hailfinger1b24dbb2007-10-22 16:15:28 +0000141#define SST_25WF512 0x2501
142#define SST_25WF010 0x2502
143#define SST_25WF020 0x2503
144#define SST_25WF040 0x2504
145#define SST_25VF016B 0x2541
146#define SST_25VF032B 0x254A
147#define SST_25VF040B 0x258D
148#define SST_25VF080B 0x258E
uwee2308702007-04-01 20:00:32 +0000149#define SST_29EE020A 0x10
150#define SST_28SF040 0x04
151#define SST_39SF010 0xB5
152#define SST_39SF020 0xB6
153#define SST_39SF040 0xB7
154#define SST_39VF020 0xD6
155#define SST_49LF040B 0x50
156#define SST_49LF040 0x51
157#define SST_49LF020A 0x52
158#define SST_49LF080A 0x5B
159#define SST_49LF002A 0x57
160#define SST_49LF003A 0x1B
161#define SST_49LF004A 0x60
162#define SST_49LF008A 0x5A
163#define SST_49LF004C 0x54
164#define SST_49LF008C 0x59
165#define SST_49LF016C 0x5C
166#define SST_49LF160C 0x4C
rminnich8d3ff912003-10-25 17:01:29 +0000167
uwee2308702007-04-01 20:00:32 +0000168#define ST_ID 0x20 /* ST */
uwe7657c702007-07-25 17:55:45 +0000169#define ST_M50FLW040A 0x08
170#define ST_M50FLW040B 0x28
171#define ST_M50FLW080A 0x80
172#define ST_M50FLW080B 0x81
uwe497bbe12007-07-24 18:18:05 +0000173#define ST_M50FW040 0x2C
uwe7657c702007-07-25 17:55:45 +0000174#define ST_M50FW080 0x2D
175#define ST_M50FW016 0x2E
176#define ST_M50LPW116 0x30
stugeb7fda652007-04-28 02:22:59 +0000177#define ST_M29F002B 0x34
178#define ST_M29F002T 0xB0 /* M29F002T / M29F002NT */
uwe8e1a2ba2007-04-01 19:44:21 +0000179#define ST_M29F400BT 0xD5
stugeb7fda652007-04-28 02:22:59 +0000180#define ST_M29F040B 0xE2
uwe7657c702007-07-25 17:55:45 +0000181#define ST_M29W010B 0x23
uwe497bbe12007-07-24 18:18:05 +0000182#define ST_M29W040B 0xE3
rminnich8d3ff912003-10-25 17:01:29 +0000183
hailfinger1d1810d2007-10-22 20:36:16 +0000184#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */
uwee2308702007-04-01 20:00:32 +0000185#define S29C51001T 0x01
186#define S29C51002T 0x02
187#define S29C51004T 0x03
188#define S29C31004T 0x63
uwebad17702006-11-20 20:03:07 +0000189
hailfinger1d1810d2007-10-22 20:36:16 +0000190#define TI_ID 0x97 /* Texas Instruments */
191
192#define WINBOND_ID 0xDA /* Winbond */
193#define W_29C011 0xC1
194#define W_29C020C 0x45
195#define W_29C040P 0x46
196#define W_29EE011 0xC1
197#define W_39V040FA 0x34
198#define W_39V040A 0x3D
199#define W_39V040B 0x54
200#define W_39V080A 0xD0
201#define W_49F002U 0x0B
202#define W_49V002A 0xB0
203#define W_49V002FA 0x32
204
uwe6ed6d952007-12-04 21:49:06 +0000205/* udelay.c */
stepan782fb172007-04-06 11:58:03 +0000206void myusec_delay(int time);
207void myusec_calibrate_delay();
stepan927d4e22007-04-04 22:45:58 +0000208
uwe6ed6d952007-12-04 21:49:06 +0000209/* PCI handling for board/chipset_enable */
210struct pci_access *pacc;
stepan782fb172007-04-06 11:58:03 +0000211struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
uwef6641642007-05-09 10:17:44 +0000212struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
213 uint16_t card_vendor, uint16_t card_device);
stepan927d4e22007-04-04 22:45:58 +0000214
uwe6ed6d952007-12-04 21:49:06 +0000215/* board_enable.c */
216int board_flash_enable(const char *vendor, const char *part);
stepan5c3f1382007-02-06 19:47:50 +0000217
uwe6ed6d952007-12-04 21:49:06 +0000218/* chipset_enable.c */
219int chipset_flash_enable(void);
stepan5c3f1382007-02-06 19:47:50 +0000220
uwe6ed6d952007-12-04 21:49:06 +0000221/* Physical memory mapping device */
stepan5c3f1382007-02-06 19:47:50 +0000222#if defined (__sun) && (defined(__i386) || defined(__amd64))
223# define MEM_DEV "/dev/xsvc"
224#else
225# define MEM_DEV "/dev/mem"
226#endif
227
stepan782fb172007-04-06 11:58:03 +0000228extern int fd_mem;
229
uwe4529d202007-08-23 13:34:59 +0000230/* debug.c */
231extern int verbose;
232#define printf_debug(x...) { if (verbose) printf(x); }
233
234/* flashrom.c */
235int map_flash_registers(struct flashchip *flash);
236
237/* layout.c */
238int show_id(uint8_t *bios, int size);
239int read_romlayout(char *name);
240int find_romentry(char *name);
241int handle_romentries(uint8_t *buffer, uint8_t *content);
242
243/* lbtable.c */
244int linuxbios_init(void);
245extern char *lb_part, *lb_vendor;
246
stepan745615e2007-10-15 21:44:47 +0000247/* spi.c */
ward11844452007-10-02 15:49:25 +0000248int probe_spi(struct flashchip *flash);
hailfinger35cc8162007-10-16 21:09:06 +0000249int it87xx_probe_spi_flash(const char *name);
hailfinger1b24dbb2007-10-22 16:15:28 +0000250int generic_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
hailfingerf71c0ac2007-10-18 00:24:07 +0000251void generic_spi_write_enable();
252void generic_spi_write_disable();
253int generic_spi_chip_erase(struct flashchip *flash);
254int generic_spi_chip_write(struct flashchip *flash, uint8_t *buf);
ward11844452007-10-02 15:49:25 +0000255
uwe4529d202007-08-23 13:34:59 +0000256/* 82802ab.c */
uwe719e3ca2007-09-09 20:24:29 +0000257int probe_82802ab(struct flashchip *flash);
258int erase_82802ab(struct flashchip *flash);
259int write_82802ab(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000260
261/* am29f040b.c */
uwe719e3ca2007-09-09 20:24:29 +0000262int probe_29f040b(struct flashchip *flash);
263int erase_29f040b(struct flashchip *flash);
264int write_29f040b(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000265
266/* jedec.c */
uwe719e3ca2007-09-09 20:24:29 +0000267void toggle_ready_jedec(volatile uint8_t *dst);
268void data_polling_jedec(volatile uint8_t *dst, uint8_t data);
269void unprotect_jedec(volatile uint8_t *bios);
270void protect_jedec(volatile uint8_t *bios);
uwe4529d202007-08-23 13:34:59 +0000271int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
272 volatile uint8_t *dst);
uwe719e3ca2007-09-09 20:24:29 +0000273int probe_jedec(struct flashchip *flash);
274int erase_chip_jedec(struct flashchip *flash);
275int write_jedec(struct flashchip *flash, uint8_t *buf);
276int erase_sector_jedec(volatile uint8_t *bios, unsigned int page);
277int erase_block_jedec(volatile uint8_t *bios, unsigned int page);
278int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
279 volatile uint8_t *dst, unsigned int page_size);
uwe4529d202007-08-23 13:34:59 +0000280
281/* m29f400bt.c */
uwe719e3ca2007-09-09 20:24:29 +0000282int probe_m29f400bt(struct flashchip *flash);
283int erase_m29f400bt(struct flashchip *flash);
284int block_erase_m29f400bt(volatile uint8_t *bios,
uwe4529d202007-08-23 13:34:59 +0000285 volatile uint8_t *dst);
uwe719e3ca2007-09-09 20:24:29 +0000286int write_m29f400bt(struct flashchip *flash, uint8_t *buf);
287int write_linuxbios_m29f400bt(struct flashchip *flash, uint8_t *buf);
288void toggle_ready_m29f400bt(volatile uint8_t *dst);
289void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data);
290void protect_m29f400bt(volatile uint8_t *bios);
291void write_page_m29f400bt(volatile uint8_t *bios, uint8_t *src,
292 volatile uint8_t *dst, int page_size);
uwe4529d202007-08-23 13:34:59 +0000293
294/* mx29f002.c */
uwe719e3ca2007-09-09 20:24:29 +0000295int probe_29f002(struct flashchip *flash);
296int erase_29f002(struct flashchip *flash);
297int write_29f002(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000298
299/* pm49fl004.c */
uwe719e3ca2007-09-09 20:24:29 +0000300int probe_49fl004(struct flashchip *flash);
301int erase_49fl004(struct flashchip *flash);
302int write_49fl004(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000303
304/* sharplhf00l04.c */
uwe719e3ca2007-09-09 20:24:29 +0000305int probe_lhf00l04(struct flashchip *flash);
306int erase_lhf00l04(struct flashchip *flash);
307int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
308void toggle_ready_lhf00l04(volatile uint8_t *dst);
309void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data);
310void protect_lhf00l04(volatile uint8_t *bios);
uwe4529d202007-08-23 13:34:59 +0000311
312/* sst28sf040.c */
uwe719e3ca2007-09-09 20:24:29 +0000313int probe_28sf040(struct flashchip *flash);
314int erase_28sf040(struct flashchip *flash);
315int write_28sf040(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000316
317/* sst39sf020.c */
uwe719e3ca2007-09-09 20:24:29 +0000318int probe_39sf020(struct flashchip *flash);
319int write_39sf020(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000320
321/* sst49lf040.c */
uwe719e3ca2007-09-09 20:24:29 +0000322int erase_49lf040(struct flashchip *flash);
323int write_49lf040(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000324
325/* sst49lfxxxc.c */
uwe719e3ca2007-09-09 20:24:29 +0000326int probe_49lfxxxc(struct flashchip *flash);
327int erase_49lfxxxc(struct flashchip *flash);
328int write_49lfxxxc(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000329
330/* sst_fwhub.c */
uwe719e3ca2007-09-09 20:24:29 +0000331int probe_sst_fwhub(struct flashchip *flash);
332int erase_sst_fwhub(struct flashchip *flash);
333int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
uwe4529d202007-08-23 13:34:59 +0000334
uwe2d828942007-08-30 10:17:50 +0000335/* w29ee011.c */
uwe719e3ca2007-09-09 20:24:29 +0000336int probe_w29ee011(struct flashchip *flash);
uwe2d828942007-08-30 10:17:50 +0000337
uwe4529d202007-08-23 13:34:59 +0000338/* w49f002u.c */
uwe719e3ca2007-09-09 20:24:29 +0000339int write_49f002(struct flashchip *flash, uint8_t *buf);
stepan15e64bc2007-05-24 08:48:10 +0000340
ollie5b621572004-03-20 16:46:10 +0000341#endif /* !__FLASH_H__ */