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stepan5c3f1382007-02-06 19:47:50 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
stepan5c3f1382007-02-06 19:47:50 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
stepan6d42c0f2009-08-12 09:27:45 +00006 * Copyright (C) 2005-2009 coresystems GmbH
hailfinger77c5d932009-06-15 12:10:57 +00007 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
stepan5c3f1382007-02-06 19:47:50 +00008 *
uweb25f1ea2007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
stepan5c3f1382007-02-06 19:47:50 +000013 *
uweb25f1ea2007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
stepan5c3f1382007-02-06 19:47:50 +000018 *
uweb25f1ea2007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
stepan5c3f1382007-02-06 19:47:50 +000022 */
23
rminnich8d3ff912003-10-25 17:01:29 +000024#ifndef __FLASH_H__
25#define __FLASH_H__ 1
26
ollie6a600992005-11-26 21:55:36 +000027#include <stdint.h>
hailfingerd43a4e32010-06-03 00:49:50 +000028#include <stddef.h>
hailfinger088dc812009-12-14 03:32:24 +000029#include "hwaccess.h"
oxygene3ad3b332010-01-06 22:14:39 +000030#ifdef _WIN32
31#include <windows.h>
32#undef min
33#undef max
34#endif
hailfingere1f062f2008-05-22 13:22:45 +000035
hailfingerf294fa22010-09-25 22:53:44 +000036#define ERROR_PTR ((void*)-1)
37
hailfinger82719632009-05-16 21:22:56 +000038typedef unsigned long chipaddr;
39
hailfingerdc6f7972010-02-14 01:20:28 +000040int register_shutdown(void (*function) (void *data), void *data);
uweabe92a52009-05-16 22:36:00 +000041void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
42 size_t len);
43void programmer_unmap_flash_region(void *virt_addr, size_t len);
44void chip_writeb(uint8_t val, chipaddr addr);
45void chip_writew(uint16_t val, chipaddr addr);
46void chip_writel(uint32_t val, chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +000047void chip_writen(uint8_t *buf, chipaddr addr, size_t len);
uweabe92a52009-05-16 22:36:00 +000048uint8_t chip_readb(const chipaddr addr);
49uint16_t chip_readw(const chipaddr addr);
50uint32_t chip_readl(const chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +000051void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
hailfingere5829f62009-06-05 17:48:08 +000052void programmer_delay(int usecs);
hailfingerba3761a2009-03-05 19:24:22 +000053
uwe16f99092008-03-12 11:54:51 +000054#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
55
hailfinger40167462009-05-31 17:57:34 +000056enum chipbustype {
hailfinger668f3502009-06-01 00:02:11 +000057 CHIP_BUSTYPE_NONE = 0,
hailfinger40167462009-05-31 17:57:34 +000058 CHIP_BUSTYPE_PARALLEL = 1 << 0,
59 CHIP_BUSTYPE_LPC = 1 << 1,
60 CHIP_BUSTYPE_FWH = 1 << 2,
61 CHIP_BUSTYPE_SPI = 1 << 3,
62 CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH,
63 CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI,
64};
65
hailfinger7df21362009-09-05 02:30:58 +000066/*
67 * How many different contiguous runs of erase blocks with one size each do
68 * we have for a given erase function?
69 */
70#define NUM_ERASEREGIONS 5
71
72/*
73 * How many different erase functions do we have per chip?
hailfingerc33d4732010-07-29 13:09:18 +000074 * Atmel AT25FS010 has 6 different functions.
hailfinger7df21362009-09-05 02:30:58 +000075 */
hailfingerc33d4732010-07-29 13:09:18 +000076#define NUM_ERASEFUNCTIONS 6
hailfinger7df21362009-09-05 02:30:58 +000077
hailfinger80dea312010-01-09 03:15:50 +000078#define FEATURE_REGISTERMAP (1 << 0)
79#define FEATURE_BYTEWRITES (1 << 1)
snelsonc6855342010-01-28 23:55:12 +000080#define FEATURE_LONG_RESET (0 << 4)
81#define FEATURE_SHORT_RESET (1 << 4)
82#define FEATURE_EITHER_RESET FEATURE_LONG_RESET
hailfinger80dea312010-01-09 03:15:50 +000083#define FEATURE_ADDR_FULL (0 << 2)
84#define FEATURE_ADDR_MASK (3 << 2)
snelsonc6855342010-01-28 23:55:12 +000085#define FEATURE_ADDR_2AA (1 << 2)
86#define FEATURE_ADDR_AAA (2 << 2)
mkarcher9ded5fe2010-04-03 10:27:08 +000087#define FEATURE_ADDR_SHIFTED (1 << 5)
hailfingerc33d4732010-07-29 13:09:18 +000088#define FEATURE_WRSR_EWSR (1 << 6)
89#define FEATURE_WRSR_WREN (1 << 7)
90#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
snelson63133f92010-01-04 17:15:23 +000091
rminnich8d3ff912003-10-25 17:01:29 +000092struct flashchip {
uwedfcd15f2008-03-14 23:55:58 +000093 const char *vendor;
uwe6ed6d952007-12-04 21:49:06 +000094 const char *name;
hailfinger40167462009-05-31 17:57:34 +000095
96 enum chipbustype bustype;
97
uwefa98ca12008-10-18 21:14:13 +000098 /*
99 * With 32bit manufacture_id and model_id we can cover IDs up to
hailfinger428f2012007-12-31 01:49:00 +0000100 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
101 * Identification code.
102 */
103 uint32_t manufacture_id;
104 uint32_t model_id;
rminnich8d3ff912003-10-25 17:01:29 +0000105
rminnich8d3ff912003-10-25 17:01:29 +0000106 int total_size;
107 int page_size;
snelson63133f92010-01-04 17:15:23 +0000108 int feature_bits;
rminnich8d3ff912003-10-25 17:01:29 +0000109
uwefa98ca12008-10-18 21:14:13 +0000110 /*
111 * Indicate if flashrom has been tested with this flash chip and if
stuge9cd64bd2008-05-03 04:34:37 +0000112 * everything worked correctly.
113 */
114 uint32_t tested;
115
uwe8e1a2ba2007-04-01 19:44:21 +0000116 int (*probe) (struct flashchip *flash);
hailfingerd5b35922009-06-03 14:46:22 +0000117
118 /* Delay after "enter/exit ID mode" commands in microseconds. */
119 int probe_timing;
hailfinger7df21362009-09-05 02:30:58 +0000120
121 /*
hailfingerc4fac582009-12-22 13:04:53 +0000122 * Erase blocks and associated erase function. Any chip erase function
123 * is stored as chip-sized virtual block together with said function.
hailfinger7df21362009-09-05 02:30:58 +0000124 */
125 struct block_eraser {
126 struct eraseblock{
127 unsigned int size; /* Eraseblock size */
128 unsigned int count; /* Number of contiguous blocks with that size */
129 } eraseblocks[NUM_ERASEREGIONS];
130 int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
131 } block_erasers[NUM_ERASEFUNCTIONS];
132
snelson1ee293c2010-02-19 00:52:10 +0000133 int (*printlock) (struct flashchip *flash);
134 int (*unlock) (struct flashchip *flash);
uwe8e1a2ba2007-04-01 19:44:21 +0000135 int (*write) (struct flashchip *flash, uint8_t *buf);
hailfinger0f08b7a2009-06-16 08:55:44 +0000136 int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len);
rminnich8d3ff912003-10-25 17:01:29 +0000137
uwe6ed6d952007-12-04 21:49:06 +0000138 /* Some flash devices have an additional register space. */
hailfinger82719632009-05-16 21:22:56 +0000139 chipaddr virtual_memory;
140 chipaddr virtual_registers;
rminnich8d3ff912003-10-25 17:01:29 +0000141};
142
stuge9cd64bd2008-05-03 04:34:37 +0000143#define TEST_UNTESTED 0
144
uwe4e204a22009-05-28 15:07:42 +0000145#define TEST_OK_PROBE (1 << 0)
146#define TEST_OK_READ (1 << 1)
147#define TEST_OK_ERASE (1 << 2)
148#define TEST_OK_WRITE (1 << 3)
149#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ)
150#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
hailfinger80f48682009-09-23 22:01:33 +0000151#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE)
uwe4e204a22009-05-28 15:07:42 +0000152#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
stuge9cd64bd2008-05-03 04:34:37 +0000153#define TEST_OK_MASK 0x0f
154
uwe4e204a22009-05-28 15:07:42 +0000155#define TEST_BAD_PROBE (1 << 4)
156#define TEST_BAD_READ (1 << 5)
157#define TEST_BAD_ERASE (1 << 6)
158#define TEST_BAD_WRITE (1 << 7)
159#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
stuge9cd64bd2008-05-03 04:34:37 +0000160#define TEST_BAD_MASK 0xf0
161
hailfingerd5b35922009-06-03 14:46:22 +0000162/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
163 * field and zero delay.
164 *
165 * SPI devices will always have zero delay and ignore this field.
166 */
167#define TIMING_FIXME -1
168/* this is intentionally same value as fixme */
169#define TIMING_IGNORED -1
170#define TIMING_ZERO -2
171
ollie6a600992005-11-26 21:55:36 +0000172extern struct flashchip flashchips[];
173
uwe884cc8b2009-06-17 12:07:12 +0000174/* print.c */
175char *flashbuses_to_text(enum chipbustype bustype);
hailfingera50d60e2009-11-17 09:57:34 +0000176void print_supported(void);
hailfingera50d60e2009-11-17 09:57:34 +0000177void print_supported_wiki(void);
uwea3a82c92009-05-15 17:02:34 +0000178
uwe4529d202007-08-23 13:34:59 +0000179/* flashrom.c */
hailfingerb247c7a2010-03-08 00:42:32 +0000180enum write_granularity {
181 write_gran_1bit,
182 write_gran_1byte,
183 write_gran_256bytes,
184};
hailfinger80422e22009-12-13 22:28:00 +0000185extern enum chipbustype buses_supported;
uwee06bcf82009-04-24 16:17:41 +0000186extern int verbose;
hailfinger1ff33dc2010-07-03 11:02:10 +0000187extern const char * const flashrom_version;
hailfinger92cd8e32010-01-07 03:24:05 +0000188extern char *chip_to_probe;
stuge5ff0e6c2009-01-26 00:39:57 +0000189void map_flash_registers(struct flashchip *flash);
hailfinger0f08b7a2009-06-16 08:55:44 +0000190int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len);
hailfinger7df21362009-09-05 02:30:58 +0000191int erase_flash(struct flashchip *flash);
hailfinger92cd8e32010-01-07 03:24:05 +0000192struct flashchip *probe_flash(struct flashchip *first_flash, int force);
hailfinger42a850a2010-07-13 23:56:13 +0000193int read_flash_to_file(struct flashchip *flash, char *filename);
hailfinger7b414742009-06-13 12:04:03 +0000194int min(int a, int b);
hailfinger7af83692009-06-15 17:23:36 +0000195int max(int a, int b);
hailfinger6e5a52a2009-11-24 18:27:10 +0000196char *extract_param(char **haystack, char *needle, char *delim);
hailfinger7af83692009-06-15 17:23:36 +0000197int check_erased_range(struct flashchip *flash, int start, int len);
198int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message);
hailfingerb247c7a2010-03-08 00:42:32 +0000199int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran);
uwe884cc8b2009-06-17 12:07:12 +0000200char *strcat_realloc(char *dest, const char *src);
hailfinger92cd8e32010-01-07 03:24:05 +0000201void print_version(void);
hailfinger74819ad2010-05-15 15:04:37 +0000202void print_banner(void);
hailfinger92cd8e32010-01-07 03:24:05 +0000203int selfcheck(void);
hailfingerc77acb52009-12-24 02:15:55 +0000204int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it);
uwe884cc8b2009-06-17 12:07:12 +0000205
206#define OK 0
207#define NT 1 /* Not tested */
uwe4529d202007-08-23 13:34:59 +0000208
mkarcher74d30132010-07-22 18:04:15 +0000209/* Something happened that shouldn't happen, but we can go on */
210#define ERROR_NONFATAL 0x100
211
snelson9cba3c62010-01-07 20:09:33 +0000212/* cli_output.c */
hailfinger63932d42010-06-04 23:20:21 +0000213/* Let gcc and clang check for correct printf-style format strings. */
214int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
hailfingere7326b22010-01-09 03:22:31 +0000215#define MSG_ERROR 0
216#define MSG_INFO 1
217#define MSG_DEBUG 2
218#define MSG_BARF 3
219#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */
220#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */
221#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */
222#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */
223#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */
224#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */
225#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */
226#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */
227#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */
228#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */
229#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */
230#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */
snelson9cba3c62010-01-07 20:09:33 +0000231
hailfinger92cd8e32010-01-07 03:24:05 +0000232/* cli_classic.c */
233int cli_classic(int argc, char *argv[]);
234
uwe4529d202007-08-23 13:34:59 +0000235/* layout.c */
uwe4529d202007-08-23 13:34:59 +0000236int read_romlayout(char *name);
237int find_romentry(char *name);
hailfinger051b3442009-08-19 15:19:18 +0000238int handle_romentries(uint8_t *buffer, struct flashchip *flash);
uwe4529d202007-08-23 13:34:59 +0000239
stepan745615e2007-10-15 21:44:47 +0000240/* spi.c */
hailfinger68002c22009-07-10 21:08:55 +0000241struct spi_command {
242 unsigned int writecnt;
243 unsigned int readcnt;
244 const unsigned char *writearr;
245 unsigned char *readarr;
246};
hailfinger68002c22009-07-10 21:08:55 +0000247int spi_send_command(unsigned int writecnt, unsigned int readcnt,
uwefa98ca12008-10-18 21:14:13 +0000248 const unsigned char *writearr, unsigned char *readarr);
hailfingerbb092112009-09-18 15:50:56 +0000249int spi_send_multicommand(struct spi_command *cmds);
hailfinger088dc812009-12-14 03:32:24 +0000250uint32_t spi_get_valid_read_addr(void);
uweaf9b4df2008-09-26 13:19:02 +0000251
ollie5b621572004-03-20 16:46:10 +0000252#endif /* !__FLASH_H__ */