blob: 21100a4c2819c66346a3f3521616c8857df9e8bb [file] [log] [blame]
stepan5c3f1382007-02-06 19:47:50 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
stepan5c3f1382007-02-06 19:47:50 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
stepan6d42c0f2009-08-12 09:27:45 +00006 * Copyright (C) 2005-2009 coresystems GmbH
hailfinger77c5d932009-06-15 12:10:57 +00007 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
stepan5c3f1382007-02-06 19:47:50 +00008 *
uweb25f1ea2007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
stepan5c3f1382007-02-06 19:47:50 +000013 *
uweb25f1ea2007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
stepan5c3f1382007-02-06 19:47:50 +000018 *
uweb25f1ea2007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
stepan5c3f1382007-02-06 19:47:50 +000022 */
23
rminnich8d3ff912003-10-25 17:01:29 +000024#ifndef __FLASH_H__
25#define __FLASH_H__ 1
26
ollie6a600992005-11-26 21:55:36 +000027#include <stdint.h>
hailfingerd43a4e32010-06-03 00:49:50 +000028#include <stddef.h>
hailfinger088dc812009-12-14 03:32:24 +000029#include "hwaccess.h"
oxygene3ad3b332010-01-06 22:14:39 +000030#ifdef _WIN32
31#include <windows.h>
32#undef min
33#undef max
34#endif
hailfingere1f062f2008-05-22 13:22:45 +000035
Stefan Reinauere64faaf2011-05-03 18:03:25 -070036/* Are timers broken? */
37extern int broken_timer;
38
Souvik Ghoshd75cd672016-06-17 14:21:39 -070039struct flashctx; /* forward declare */
hailfingerf294fa22010-09-25 22:53:44 +000040#define ERROR_PTR ((void*)-1)
41
hailfingeree9ee132010-10-08 00:37:55 +000042/* Error codes */
43#define TIMEOUT_ERROR -101
44
Louis Yung-Chieh Lo5d95f042011-09-01 17:33:06 +080045/* for verify_it variable in flashrom.c and cli_mfg.c */
46enum {
47 VERIFY_OFF = 0,
48 VERIFY_FULL,
49 VERIFY_PARTIAL,
50};
51
David Hendricks54777392015-01-11 18:55:14 -080052/*
53 * This is shared between handle_partial_read() and erase_and_write_flash().
54 * If a partial write is to be performed, the read function needs to guess what
55 * the eraseable block size is in case the region specified is not aligned. Then
56 * it can ensure any data within the same block but outside the specified region
57 * is read and later restored. The erase/write function will need to find a
58 * usable erase function with the same size.
59 *
60 * Some chips support multiple opcodes to erase a particular block size, so
61 * we'll leave that guesswork to erase_and_write_flash(). Any opcode is allowed
62 * so long as the alignment used during partial read and erase are the same.
63 */
64extern unsigned int required_erase_size;
65
hailfinger82719632009-05-16 21:22:56 +000066typedef unsigned long chipaddr;
67
David Hendricks93784b42016-08-09 17:00:38 -070068int register_shutdown(int (*function) (void *data), void *data);
Souvik Ghoshd75cd672016-06-17 14:21:39 -070069#define CHIP_RESTORE_CALLBACK int (*func) (struct flashctx *flash, uint8_t status)
David Hendricksbf36f092010-11-02 23:39:29 -070070
Souvik Ghoshd75cd672016-06-17 14:21:39 -070071int register_chip_restore(CHIP_RESTORE_CALLBACK, struct flashctx *flash, uint8_t status);
uweabe92a52009-05-16 22:36:00 +000072void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
73 size_t len);
74void programmer_unmap_flash_region(void *virt_addr, size_t len);
hailfingere5829f62009-06-05 17:48:08 +000075void programmer_delay(int usecs);
hailfingerba3761a2009-03-05 19:24:22 +000076
uwe16f99092008-03-12 11:54:51 +000077#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
78
hailfinger40167462009-05-31 17:57:34 +000079enum chipbustype {
hailfingere1e41ea2011-07-27 07:13:06 +000080 BUS_NONE = 0,
81 BUS_PARALLEL = 1 << 0,
82 BUS_LPC = 1 << 1,
83 BUS_FWH = 1 << 2,
84 BUS_SPI = 1 << 3,
hailfingerfe7cd9e2011-11-04 21:35:26 +000085 BUS_PROG = 1 << 4,
hailfingere1e41ea2011-07-27 07:13:06 +000086 BUS_NONSPI = BUS_PARALLEL | BUS_LPC | BUS_FWH,
hailfinger40167462009-05-31 17:57:34 +000087};
88
David Hendricks80f62d22010-10-08 11:09:35 -070089/* used to select bus which target chip resides */
90extern enum chipbustype target_bus;
91
hailfinger7df21362009-09-05 02:30:58 +000092/*
93 * How many different contiguous runs of erase blocks with one size each do
94 * we have for a given erase function?
95 */
96#define NUM_ERASEREGIONS 5
97
98/*
99 * How many different erase functions do we have per chip?
hailfingerc33d4732010-07-29 13:09:18 +0000100 * Atmel AT25FS010 has 6 different functions.
hailfinger7df21362009-09-05 02:30:58 +0000101 */
hailfingerc33d4732010-07-29 13:09:18 +0000102#define NUM_ERASEFUNCTIONS 6
hailfinger7df21362009-09-05 02:30:58 +0000103
hailfinger80dea312010-01-09 03:15:50 +0000104#define FEATURE_REGISTERMAP (1 << 0)
105#define FEATURE_BYTEWRITES (1 << 1)
snelsonc6855342010-01-28 23:55:12 +0000106#define FEATURE_LONG_RESET (0 << 4)
107#define FEATURE_SHORT_RESET (1 << 4)
108#define FEATURE_EITHER_RESET FEATURE_LONG_RESET
hailfingerb07dc972010-10-20 21:13:19 +0000109#define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET)
hailfinger80dea312010-01-09 03:15:50 +0000110#define FEATURE_ADDR_FULL (0 << 2)
111#define FEATURE_ADDR_MASK (3 << 2)
snelsonc6855342010-01-28 23:55:12 +0000112#define FEATURE_ADDR_2AA (1 << 2)
113#define FEATURE_ADDR_AAA (2 << 2)
mkarcher9ded5fe2010-04-03 10:27:08 +0000114#define FEATURE_ADDR_SHIFTED (1 << 5)
hailfingerc33d4732010-07-29 13:09:18 +0000115#define FEATURE_WRSR_EWSR (1 << 6)
116#define FEATURE_WRSR_WREN (1 << 7)
117#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
snelson63133f92010-01-04 17:15:23 +0000118
Simon Glass4c214132013-07-16 10:09:28 -0600119/* Erasing flash produces zeroes rather than ones */
120#define FEATURE_ERASE_TO_ZERO (1 << 8)
Duncan Laurie06ffd522015-10-26 12:56:08 -0700121#define FEATURE_UNBOUND_READ (1 << 10)
Simon Glass4c214132013-07-16 10:09:28 -0600122
David Hendricks8c084212015-11-17 22:29:36 -0800123struct voltage_range {
124 uint16_t min, max;
125};
126
rminnich8d3ff912003-10-25 17:01:29 +0000127struct flashchip {
uwedfcd15f2008-03-14 23:55:58 +0000128 const char *vendor;
uwe6ed6d952007-12-04 21:49:06 +0000129 const char *name;
hailfinger40167462009-05-31 17:57:34 +0000130
131 enum chipbustype bustype;
132
uwefa98ca12008-10-18 21:14:13 +0000133 /*
134 * With 32bit manufacture_id and model_id we can cover IDs up to
hailfinger428f2012007-12-31 01:49:00 +0000135 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
136 * Identification code.
137 */
138 uint32_t manufacture_id;
139 uint32_t model_id;
rminnich8d3ff912003-10-25 17:01:29 +0000140
stefanct707f13b2011-05-19 02:58:17 +0000141 /* Total chip size in kilobytes */
stefanctc5eb8a92011-11-23 09:13:48 +0000142 unsigned int total_size;
stefanct707f13b2011-05-19 02:58:17 +0000143 /* Chip page size in bytes */
stefanctc5eb8a92011-11-23 09:13:48 +0000144 unsigned int page_size;
snelson63133f92010-01-04 17:15:23 +0000145 int feature_bits;
rminnich8d3ff912003-10-25 17:01:29 +0000146
uwefa98ca12008-10-18 21:14:13 +0000147 /*
148 * Indicate if flashrom has been tested with this flash chip and if
stuge9cd64bd2008-05-03 04:34:37 +0000149 * everything worked correctly.
150 */
151 uint32_t tested;
152
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700153 int (*probe) (struct flashctx *flash);
hailfingerd5b35922009-06-03 14:46:22 +0000154
stefanctc5eb8a92011-11-23 09:13:48 +0000155 /* Delay after "enter/exit ID mode" commands in microseconds.
156 * NB: negative values have special meanings, see TIMING_* below.
157 */
158 signed int probe_timing;
hailfinger7df21362009-09-05 02:30:58 +0000159
160 /*
hailfingerc4fac582009-12-22 13:04:53 +0000161 * Erase blocks and associated erase function. Any chip erase function
162 * is stored as chip-sized virtual block together with said function.
stefanct707f13b2011-05-19 02:58:17 +0000163 * The first one that fits will be chosen. There is currently no way to
164 * influence that behaviour. For testing just comment out the other
165 * elements or set the function pointer to NULL.
hailfinger7df21362009-09-05 02:30:58 +0000166 */
167 struct block_eraser {
168 struct eraseblock{
stefanct312d9ff2011-06-12 19:47:55 +0000169 unsigned int size; /* Eraseblock size in bytes */
hailfinger7df21362009-09-05 02:30:58 +0000170 unsigned int count; /* Number of contiguous blocks with that size */
171 } eraseblocks[NUM_ERASEREGIONS];
stefanct9e6b98a2011-05-28 02:37:14 +0000172 /* a block_erase function should try to erase one block of size
173 * 'blocklen' at address 'blockaddr' and return 0 on success. */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700174 int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
hailfinger7df21362009-09-05 02:30:58 +0000175 } block_erasers[NUM_ERASEFUNCTIONS];
176
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700177 int (*printlock) (struct flashctx *flash);
178 int (*unlock) (struct flashctx *flash);
179 int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
180 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
181 uint8_t (*read_status) (const struct flashctx *flash);
182 int (*write_status) (const struct flashctx *flash, int status);
David Hendricks8c084212015-11-17 22:29:36 -0800183 struct voltage_range voltage;
David Hendricksf7924d12010-06-10 21:26:44 -0700184 struct wp *wp;
rminnich8d3ff912003-10-25 17:01:29 +0000185};
186
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700187/* struct flashctx must always contain struct flashchip at the beginning. */
188struct flashctx {
189 const char *vendor;
190 const char *name;
191 enum chipbustype bustype;
192 uint32_t manufacture_id;
193 uint32_t model_id;
194 int total_size;
195 int page_size;
196 int feature_bits;
197 uint32_t tested;
198 int (*probe) (struct flashctx *flash);
199 int probe_timing;
200 struct block_eraser block_erasers[NUM_ERASEFUNCTIONS];
201 int (*printlock) (struct flashctx *flash);
202 int (*unlock) (struct flashctx *flash);
203 int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
204 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
205 uint8_t (*read_status) (const struct flashctx *flash);
206 int (*write_status) (const struct flashctx *flash, int status);
207 struct voltage_range voltage;
208 struct wp *wp;
209 /* struct flashchip ends here. */
210 chipaddr virtual_memory;
211 /* Some flash devices have an additional register space. */
212 chipaddr virtual_registers;
213};
214
215
Simon Glass4c214132013-07-16 10:09:28 -0600216/* This is the byte value we expect to see in erased regions of the flash */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700217int flash_erase_value(struct flashctx *flash);
Simon Glass4c214132013-07-16 10:09:28 -0600218
219/* This is a byte value that indicates that the region is not erased */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700220int flash_unerased_value(struct flashctx *flash);
Simon Glass4c214132013-07-16 10:09:28 -0600221
stuge9cd64bd2008-05-03 04:34:37 +0000222#define TEST_UNTESTED 0
223
uwe4e204a22009-05-28 15:07:42 +0000224#define TEST_OK_PROBE (1 << 0)
225#define TEST_OK_READ (1 << 1)
226#define TEST_OK_ERASE (1 << 2)
227#define TEST_OK_WRITE (1 << 3)
Duncan Laurie06ffd522015-10-26 12:56:08 -0700228#define TEST_OK_UREAD (1 << 4)
uwe4e204a22009-05-28 15:07:42 +0000229#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ)
230#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
David Hendricks26746032015-11-23 19:58:22 -0800231#define TEST_OK_PREU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_UREAD)
232#define TEST_OK_PRU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_UREAD)
hailfinger80f48682009-09-23 22:01:33 +0000233#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE)
uwe4e204a22009-05-28 15:07:42 +0000234#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
Duncan Laurie06ffd522015-10-26 12:56:08 -0700235#define TEST_OK_PREWU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE | TEST_OK_UREAD)
236#define TEST_OK_MASK 0x1f
stuge9cd64bd2008-05-03 04:34:37 +0000237
Duncan Laurie06ffd522015-10-26 12:56:08 -0700238#define TEST_BAD_PROBE (1 << 5)
239#define TEST_BAD_READ (1 << 6)
240#define TEST_BAD_ERASE (1 << 7)
241#define TEST_BAD_WRITE (1 << 8)
242#define TEST_BAD_UREAD (1 << 9)
uwe4e204a22009-05-28 15:07:42 +0000243#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
Duncan Laurie06ffd522015-10-26 12:56:08 -0700244#define TEST_BAD_PREWU (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE | TEST_BAD_UREAD)
245#define TEST_BAD_MASK 0x3e0
stuge9cd64bd2008-05-03 04:34:37 +0000246
hailfingerd5b35922009-06-03 14:46:22 +0000247/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
248 * field and zero delay.
Simon Glass8dc82732013-07-16 10:13:51 -0600249 *
hailfingerd5b35922009-06-03 14:46:22 +0000250 * SPI devices will always have zero delay and ignore this field.
251 */
252#define TIMING_FIXME -1
253/* this is intentionally same value as fixme */
254#define TIMING_IGNORED -1
255#define TIMING_ZERO -2
256
hailfinger48ed3e22011-05-04 00:39:50 +0000257extern const struct flashchip flashchips[];
Ramya Vijaykumare6a7ca82015-05-12 14:27:29 +0530258extern const struct flashchip flashchips_hwseq[];
ollie6a600992005-11-26 21:55:36 +0000259
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700260void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
261void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
262void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
263void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
264uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr);
265uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr);
266uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr);
267void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
268
uwe884cc8b2009-06-17 12:07:12 +0000269/* print.c */
270char *flashbuses_to_text(enum chipbustype bustype);
hailfingera50d60e2009-11-17 09:57:34 +0000271void print_supported(void);
hailfingera50d60e2009-11-17 09:57:34 +0000272void print_supported_wiki(void);
uwea3a82c92009-05-15 17:02:34 +0000273
uwe4529d202007-08-23 13:34:59 +0000274/* flashrom.c */
hailfingerb247c7a2010-03-08 00:42:32 +0000275enum write_granularity {
276 write_gran_1bit,
277 write_gran_1byte,
278 write_gran_256bytes,
279};
hailfinger80422e22009-12-13 22:28:00 +0000280extern enum chipbustype buses_supported;
Souvik Ghosh3c963a42016-07-19 18:48:15 -0700281extern int verbose_screen;
282extern int verbose_logfile;
krause2eb76212011-01-17 07:50:42 +0000283extern const char flashrom_version[];
hailfinger92cd8e32010-01-07 03:24:05 +0000284extern char *chip_to_probe;
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700285void map_flash_registers(struct flashctx *flash);
286int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
287int erase_flash(struct flashctx *flash);
David Hendricksac1d25c2016-08-09 17:00:58 -0700288int probe_flash(int startchip, struct flashctx *fill_flash, int force);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700289int read_flash(struct flashctx *flash, uint8_t *buf,
David Hendrickse3451942013-03-21 17:23:29 -0700290 unsigned int start, unsigned int len);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700291int read_flash_to_file(struct flashctx *flash, const char *filename);
hailfinger7b414742009-06-13 12:04:03 +0000292int min(int a, int b);
hailfinger7af83692009-06-15 17:23:36 +0000293int max(int a, int b);
hailfingerf76cc322010-11-09 22:00:31 +0000294void tolower_string(char *str);
stefanct52700282011-06-26 17:38:17 +0000295char *extract_param(char **haystack, const char *needle, const char *delim);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700296int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message);
uwe884cc8b2009-06-17 12:07:12 +0000297char *strcat_realloc(char *dest, const char *src);
hailfinger92cd8e32010-01-07 03:24:05 +0000298void print_version(void);
Souvik Ghosh3c963a42016-07-19 18:48:15 -0700299void print_buildinfo(void);
hailfinger74819ad2010-05-15 15:04:37 +0000300void print_banner(void);
hailfingerf79d1712010-10-06 23:48:34 +0000301void list_programmers_linebreak(int startcol, int cols, int paren);
hailfinger92cd8e32010-01-07 03:24:05 +0000302int selfcheck(void);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700303int doit(struct flashctx *flash, int force, const char *filename, int read_it,
Simon Glass9ad06c12013-07-03 22:08:17 +0900304 int write_it, int erase_it, int verify_it, int extract_it,
305 const char *diff_file);
stefanct52700282011-06-26 17:38:17 +0000306int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
307int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename);
uwe884cc8b2009-06-17 12:07:12 +0000308
309#define OK 0
310#define NT 1 /* Not tested */
uwe4529d202007-08-23 13:34:59 +0000311
David Hendricks1ed1d352011-11-23 17:54:37 -0800312/* what to do in case of an error */
313enum error_action {
314 error_fail, /* fail immediately */
315 error_ignore, /* non-fatal error; continue */
316};
317
uwe97e8e272011-09-03 17:15:00 +0000318/* Something happened that shouldn't happen, but we can go on. */
mkarcher74d30132010-07-22 18:04:15 +0000319#define ERROR_NONFATAL 0x100
320
uwe97e8e272011-09-03 17:15:00 +0000321/* Something happened that shouldn't happen, we'll abort. */
322#define ERROR_FATAL -0xee
323
David Hendricks1ed1d352011-11-23 17:54:37 -0800324/* Operation failed due to access restriction set in programmer or flash chip */
325#define ACCESS_DENIED -7
326extern enum error_action access_denied_action;
327
328/* convenience function for checking return codes */
329extern int ignore_error(int x);
330
snelson9cba3c62010-01-07 20:09:33 +0000331/* cli_output.c */
Souvik Ghosh3c963a42016-07-19 18:48:15 -0700332#ifndef STANDALONE
333int open_logfile(const char * const filename);
334int close_logfile(void);
335void start_logging(void);
336#endif
hailfinger63932d42010-06-04 23:20:21 +0000337/* Let gcc and clang check for correct printf-style format strings. */
338int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
hailfingere7326b22010-01-09 03:22:31 +0000339#define MSG_ERROR 0
340#define MSG_INFO 1
341#define MSG_DEBUG 2
stefanctee850532011-08-04 17:40:25 +0000342#define MSG_DEBUG2 3
343#define MSG_BARF 4
hailfingere7326b22010-01-09 03:22:31 +0000344#define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */
345#define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */
346#define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */
347#define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */
348#define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */
349#define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */
350#define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */
351#define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */
352#define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */
stefanctee850532011-08-04 17:40:25 +0000353#define msg_gdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* general debug2 */
354#define msg_pdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* programmer debug2 */
355#define msg_cdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* chip debug2 */
hailfingere7326b22010-01-09 03:22:31 +0000356#define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */
357#define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */
358#define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */
snelson9cba3c62010-01-07 20:09:33 +0000359
Louis Yung-Chieh Lo1f6bbf52011-04-06 10:24:38 +0800360/* cli_mfg.c */
361extern int set_ignore_fmap;
hailfinger92cd8e32010-01-07 03:24:05 +0000362
uwe4529d202007-08-23 13:34:59 +0000363/* layout.c */
Louis Yung-Chieh Lo5d95f042011-09-01 17:33:06 +0800364int specified_partition();
uwe4529d202007-08-23 13:34:59 +0000365int read_romlayout(char *name);
366int find_romentry(char *name);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700367int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
368int add_fmap_entries(struct flashctx *flash);
Louis Yung-Chieh Lobb9049c2011-05-10 16:06:28 +0800369int get_num_include_args(void);
David Hendricksd0ea9ed2011-03-04 17:31:57 -0800370int register_include_arg(char *name);
371int process_include_args(void);
David Hendricksdf29a832013-06-28 14:33:51 -0700372int num_include_files(void);
373int included_regions_overlap(void);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700374int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
Louis Yung-Chieh Lo9c7525f2011-03-04 12:32:02 +0800375int handle_partial_read(
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700376 struct flashctx *flash,
Louis Yung-Chieh Lo9c7525f2011-03-04 12:32:02 +0800377 uint8_t *buf,
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700378 int (*read) (struct flashctx *flash, uint8_t *buf,
David Hendricksbec6e0c2011-11-23 16:40:04 -0800379 unsigned int start, unsigned int len),
380 int write_to_file);
Louis Yung-Chieh Lo9c7525f2011-03-04 12:32:02 +0800381 /* RETURN: the number of partitions that have beenpartial read.
382 * ==0 means no partition is specified.
383 * < 0 means writing file error. */
Louis Yung-Chieh Lo5d95f042011-09-01 17:33:06 +0800384int handle_partial_verify(
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700385 struct flashctx *flash,
Louis Yung-Chieh Lo5d95f042011-09-01 17:33:06 +0800386 uint8_t *buf,
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700387 int (*verify) (struct flashctx *flash, uint8_t *buf, unsigned int start,
David Hendricksbec6e0c2011-11-23 16:40:04 -0800388 unsigned int len, const char* message));
Louis Yung-Chieh Lo5d95f042011-09-01 17:33:06 +0800389 /* RETURN: ==0 means all identical.
390 !=0 means buf and flash are different. */
uwe4529d202007-08-23 13:34:59 +0000391
stepan745615e2007-10-15 21:44:47 +0000392/* spi.c */
hailfinger68002c22009-07-10 21:08:55 +0000393struct spi_command {
394 unsigned int writecnt;
395 unsigned int readcnt;
396 const unsigned char *writearr;
397 unsigned char *readarr;
398};
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700399int spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
uwefa98ca12008-10-18 21:14:13 +0000400 const unsigned char *writearr, unsigned char *readarr);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700401int spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds);
402uint32_t spi_get_valid_read_addr(struct flashctx *flash);
uweaf9b4df2008-09-26 13:19:02 +0000403
David Hendricks8c084212015-11-17 22:29:36 -0800404#define NUM_VOLTAGE_RANGES 16
405extern struct voltage_range voltage_ranges[];
406/* returns number of unique voltage ranges, or <0 to indicate failure */
407extern int flash_supported_voltage_ranges(enum chipbustype bus);
408
ollie5b621572004-03-20 16:46:10 +0000409#endif /* !__FLASH_H__ */