blob: 203e391a8f28b220bc978d07539be9e4e4a37abb [file] [log] [blame]
stepan5c3f1382007-02-06 19:47:50 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
stepan5c3f1382007-02-06 19:47:50 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
stepan6d42c0f2009-08-12 09:27:45 +00006 * Copyright (C) 2005-2009 coresystems GmbH
hailfinger77c5d932009-06-15 12:10:57 +00007 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
stepan5c3f1382007-02-06 19:47:50 +00008 *
uweb25f1ea2007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
stepan5c3f1382007-02-06 19:47:50 +000013 *
uweb25f1ea2007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
stepan5c3f1382007-02-06 19:47:50 +000018 *
19 */
20
rminnich8d3ff912003-10-25 17:01:29 +000021#ifndef __FLASH_H__
22#define __FLASH_H__ 1
23
ollie6a600992005-11-26 21:55:36 +000024#include <stdint.h>
hailfingerd43a4e32010-06-03 00:49:50 +000025#include <stddef.h>
hailfinger088dc812009-12-14 03:32:24 +000026#include "hwaccess.h"
oxygene3ad3b332010-01-06 22:14:39 +000027#ifdef _WIN32
28#include <windows.h>
29#undef min
30#undef max
31#endif
hailfingere1f062f2008-05-22 13:22:45 +000032
Stefan Reinauere64faaf2011-05-03 18:03:25 -070033/* Are timers broken? */
34extern int broken_timer;
35
Souvik Ghoshd75cd672016-06-17 14:21:39 -070036struct flashctx; /* forward declare */
hailfingerf294fa22010-09-25 22:53:44 +000037#define ERROR_PTR ((void*)-1)
38
hailfingeree9ee132010-10-08 00:37:55 +000039/* Error codes */
40#define TIMEOUT_ERROR -101
41
Edward O'Callaghan9b520dd2019-05-01 21:47:21 -040042#define PRIxPTR_WIDTH ((int)(sizeof(uintptr_t)*2))
43
Edward O'Callaghan1a3fd132019-06-04 14:18:55 +100044/* for verify_it variable in flashrom.c and cli_classic.c */
Louis Yung-Chieh Lo5d95f042011-09-01 17:33:06 +080045enum {
46 VERIFY_OFF = 0,
47 VERIFY_FULL,
48 VERIFY_PARTIAL,
49};
50
hailfinger82719632009-05-16 21:22:56 +000051typedef unsigned long chipaddr;
52
David Hendricks93784b42016-08-09 17:00:38 -070053int register_shutdown(int (*function) (void *data), void *data);
Souvik Ghoshd75cd672016-06-17 14:21:39 -070054#define CHIP_RESTORE_CALLBACK int (*func) (struct flashctx *flash, uint8_t status)
David Hendricksbf36f092010-11-02 23:39:29 -070055
Souvik Ghoshd75cd672016-06-17 14:21:39 -070056int register_chip_restore(CHIP_RESTORE_CALLBACK, struct flashctx *flash, uint8_t status);
uweabe92a52009-05-16 22:36:00 +000057void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
58 size_t len);
59void programmer_unmap_flash_region(void *virt_addr, size_t len);
hailfingere5829f62009-06-05 17:48:08 +000060void programmer_delay(int usecs);
hailfingerba3761a2009-03-05 19:24:22 +000061
uwe16f99092008-03-12 11:54:51 +000062#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
63
hailfinger40167462009-05-31 17:57:34 +000064enum chipbustype {
hailfingere1e41ea2011-07-27 07:13:06 +000065 BUS_NONE = 0,
66 BUS_PARALLEL = 1 << 0,
67 BUS_LPC = 1 << 1,
68 BUS_FWH = 1 << 2,
69 BUS_SPI = 1 << 3,
hailfingerfe7cd9e2011-11-04 21:35:26 +000070 BUS_PROG = 1 << 4,
hailfingere1e41ea2011-07-27 07:13:06 +000071 BUS_NONSPI = BUS_PARALLEL | BUS_LPC | BUS_FWH,
hailfinger40167462009-05-31 17:57:34 +000072};
73
David Hendricks80f62d22010-10-08 11:09:35 -070074/* used to select bus which target chip resides */
75extern enum chipbustype target_bus;
76
hailfinger7df21362009-09-05 02:30:58 +000077/*
78 * How many different contiguous runs of erase blocks with one size each do
79 * we have for a given erase function?
80 */
81#define NUM_ERASEREGIONS 5
82
83/*
84 * How many different erase functions do we have per chip?
hailfingerc33d4732010-07-29 13:09:18 +000085 * Atmel AT25FS010 has 6 different functions.
hailfinger7df21362009-09-05 02:30:58 +000086 */
hailfingerc33d4732010-07-29 13:09:18 +000087#define NUM_ERASEFUNCTIONS 6
hailfinger7df21362009-09-05 02:30:58 +000088
hailfinger80dea312010-01-09 03:15:50 +000089#define FEATURE_REGISTERMAP (1 << 0)
90#define FEATURE_BYTEWRITES (1 << 1)
snelsonc6855342010-01-28 23:55:12 +000091#define FEATURE_LONG_RESET (0 << 4)
92#define FEATURE_SHORT_RESET (1 << 4)
93#define FEATURE_EITHER_RESET FEATURE_LONG_RESET
hailfingerb07dc972010-10-20 21:13:19 +000094#define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET)
hailfinger80dea312010-01-09 03:15:50 +000095#define FEATURE_ADDR_FULL (0 << 2)
96#define FEATURE_ADDR_MASK (3 << 2)
snelsonc6855342010-01-28 23:55:12 +000097#define FEATURE_ADDR_2AA (1 << 2)
98#define FEATURE_ADDR_AAA (2 << 2)
mkarcher9ded5fe2010-04-03 10:27:08 +000099#define FEATURE_ADDR_SHIFTED (1 << 5)
hailfingerc33d4732010-07-29 13:09:18 +0000100#define FEATURE_WRSR_EWSR (1 << 6)
101#define FEATURE_WRSR_WREN (1 << 7)
102#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
David Hendricksff55cf62016-08-30 11:22:31 -0700103#define FEATURE_OTP (1 << 8)
104#define FEATURE_ERASE_TO_ZERO (1 << 9)
Duncan Laurie06ffd522015-10-26 12:56:08 -0700105#define FEATURE_UNBOUND_READ (1 << 10)
William A. Kennington IIIf15c2fa2017-04-07 17:38:42 -0700106#define FEATURE_NO_ERASE (1 << 11)
Boris Baykov64d00c72016-06-11 18:28:59 +0200107#define FEATURE_4BA_SUPPORT (1 << 12)
Simon Glass4c214132013-07-16 10:09:28 -0600108
David Hendricks8c084212015-11-17 22:29:36 -0800109struct voltage_range {
110 uint16_t min, max;
111};
112
Patrick Georgiac3423f2017-02-03 20:58:06 +0100113enum test_state {
114 OK = 0,
115 NT = 1, /* Not tested */
116 BAD, /* Known to not work */
117 DEP, /* Support depends on configuration (e.g. Intel flash descriptor) */
118 NA, /* Not applicable (e.g. write support on ROM chips) */
119};
120
121#define TEST_UNTESTED (struct tested){ .probe = NT, .read = NT, .erase = NT, .write = NT, .uread = NT }
122
123#define TEST_OK_PROBE (struct tested){ .probe = OK, .read = NT, .erase = NT, .write = NT, .uread = NT }
124#define TEST_OK_PR (struct tested){ .probe = OK, .read = OK, .erase = NT, .write = NT, .uread = NT }
125#define TEST_OK_PRE (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = NT, .uread = NT }
126#define TEST_OK_PRU (struct tested){ .probe = OK, .read = OK, .erase = NT, .write = NT, .uread = OK }
127#define TEST_OK_PREU (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = NT, .uread = OK }
128#define TEST_OK_PREW (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = OK, .uread = NT }
129#define TEST_OK_PREWU (struct tested){ .probe = OK, .read = OK, .erase = OK, .write = OK, .uread = OK }
130
131#define TEST_BAD_PROBE (struct tested){ .probe = BAD, .read = NT, .erase = NT, .write = NT, .uread = NT }
132#define TEST_BAD_PR (struct tested){ .probe = BAD, .read = BAD, .erase = NT, .write = NT, .uread = NT }
133#define TEST_BAD_PRE (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = NT, .uread = NT }
134#define TEST_BAD_PREW (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = BAD, .uread = NT }
135#define TEST_BAD_PREWU (struct tested){ .probe = BAD, .read = BAD, .erase = BAD, .write = BAD, .uread = BAD }
136
rminnich8d3ff912003-10-25 17:01:29 +0000137struct flashchip {
uwedfcd15f2008-03-14 23:55:58 +0000138 const char *vendor;
uwe6ed6d952007-12-04 21:49:06 +0000139 const char *name;
hailfinger40167462009-05-31 17:57:34 +0000140
141 enum chipbustype bustype;
142
uwefa98ca12008-10-18 21:14:13 +0000143 /*
144 * With 32bit manufacture_id and model_id we can cover IDs up to
hailfinger428f2012007-12-31 01:49:00 +0000145 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
146 * Identification code.
147 */
148 uint32_t manufacture_id;
149 uint32_t model_id;
rminnich8d3ff912003-10-25 17:01:29 +0000150
stefanct707f13b2011-05-19 02:58:17 +0000151 /* Total chip size in kilobytes */
stefanctc5eb8a92011-11-23 09:13:48 +0000152 unsigned int total_size;
stefanct707f13b2011-05-19 02:58:17 +0000153 /* Chip page size in bytes */
stefanctc5eb8a92011-11-23 09:13:48 +0000154 unsigned int page_size;
snelson63133f92010-01-04 17:15:23 +0000155 int feature_bits;
rminnich8d3ff912003-10-25 17:01:29 +0000156
Boris Baykov1a2f5322016-06-11 18:29:00 +0200157 /* set of function pointers to use in 4-bytes addressing mode */
158 struct four_bytes_addr_funcs_set {
Ed Swierk28cf7992017-07-03 13:17:18 -0700159 int (*set_4ba) (struct flashctx *flash);
Boris Baykov1a2f5322016-06-11 18:29:00 +0200160 int (*read_nbyte) (struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
161 int (*program_byte) (struct flashctx *flash, unsigned int addr, const uint8_t databyte);
162 int (*program_nbyte) (struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len);
163 } four_bytes_addr_funcs;
164
Patrick Georgiac3423f2017-02-03 20:58:06 +0100165 /* Indicate how well flashrom supports different operations of this flash chip. */
166 struct tested {
167 enum test_state probe;
168 enum test_state read;
169 enum test_state erase;
170 enum test_state write;
171 enum test_state uread;
172 } tested;
stuge9cd64bd2008-05-03 04:34:37 +0000173
Edward O'Callaghancc1d0c92019-02-24 15:35:07 +1100174 /*
175 * Group chips that have common command sets. This should ensure that
176 * no chip gets confused by a probing command for a very different class
177 * of chips.
178 */
179 enum {
180 /* SPI25 is very common. Keep it at zero so we don't have
181 to specify it for each and every chip in the database.*/
182 SPI25 = 0,
183 } spi_cmd_set;
184
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700185 int (*probe) (struct flashctx *flash);
hailfingerd5b35922009-06-03 14:46:22 +0000186
stefanctc5eb8a92011-11-23 09:13:48 +0000187 /* Delay after "enter/exit ID mode" commands in microseconds.
188 * NB: negative values have special meanings, see TIMING_* below.
189 */
190 signed int probe_timing;
hailfinger7df21362009-09-05 02:30:58 +0000191
192 /*
hailfingerc4fac582009-12-22 13:04:53 +0000193 * Erase blocks and associated erase function. Any chip erase function
194 * is stored as chip-sized virtual block together with said function.
stefanct707f13b2011-05-19 02:58:17 +0000195 * The first one that fits will be chosen. There is currently no way to
196 * influence that behaviour. For testing just comment out the other
197 * elements or set the function pointer to NULL.
hailfinger7df21362009-09-05 02:30:58 +0000198 */
199 struct block_eraser {
Patrick Georgiac3423f2017-02-03 20:58:06 +0100200 struct eraseblock {
stefanct312d9ff2011-06-12 19:47:55 +0000201 unsigned int size; /* Eraseblock size in bytes */
hailfinger7df21362009-09-05 02:30:58 +0000202 unsigned int count; /* Number of contiguous blocks with that size */
203 } eraseblocks[NUM_ERASEREGIONS];
stefanct9e6b98a2011-05-28 02:37:14 +0000204 /* a block_erase function should try to erase one block of size
205 * 'blocklen' at address 'blockaddr' and return 0 on success. */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700206 int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
hailfinger7df21362009-09-05 02:30:58 +0000207 } block_erasers[NUM_ERASEFUNCTIONS];
208
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700209 int (*printlock) (struct flashctx *flash);
210 int (*unlock) (struct flashctx *flash);
Patrick Georgiab8353e2017-02-03 18:32:01 +0100211 int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700212 int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
213 uint8_t (*read_status) (const struct flashctx *flash);
214 int (*write_status) (const struct flashctx *flash, int status);
Duncan Laurie25a4ca22019-04-25 12:08:52 -0700215 int (*check_access) (const struct flashctx *flash, unsigned int start, unsigned int len, int read);
David Hendricks8c084212015-11-17 22:29:36 -0800216 struct voltage_range voltage;
David Hendricksf7924d12010-06-10 21:26:44 -0700217 struct wp *wp;
rminnich8d3ff912003-10-25 17:01:29 +0000218};
219
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700220/* struct flashctx must always contain struct flashchip at the beginning. */
221struct flashctx {
Patrick Georgif3fa2992017-02-02 16:24:44 +0100222 struct flashchip *chip;
223
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700224 chipaddr virtual_memory;
225 /* Some flash devices have an additional register space. */
226 chipaddr virtual_registers;
227};
228
229
Simon Glass4c214132013-07-16 10:09:28 -0600230/* This is the byte value we expect to see in erased regions of the flash */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700231int flash_erase_value(struct flashctx *flash);
Simon Glass4c214132013-07-16 10:09:28 -0600232
233/* This is a byte value that indicates that the region is not erased */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700234int flash_unerased_value(struct flashctx *flash);
Simon Glass4c214132013-07-16 10:09:28 -0600235
David Hendricks40df5b52016-12-22 15:36:28 -0800236/* Given RDID info, return pointer to entry in flashchips[] */
237const struct flashchip *flash_id_to_entry(uint32_t mfg_id, uint32_t model_id);
238
hailfingerd5b35922009-06-03 14:46:22 +0000239/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
240 * field and zero delay.
Simon Glass8dc82732013-07-16 10:13:51 -0600241 *
hailfingerd5b35922009-06-03 14:46:22 +0000242 * SPI devices will always have zero delay and ignore this field.
243 */
244#define TIMING_FIXME -1
245/* this is intentionally same value as fixme */
246#define TIMING_IGNORED -1
247#define TIMING_ZERO -2
248
hailfinger48ed3e22011-05-04 00:39:50 +0000249extern const struct flashchip flashchips[];
Ramya Vijaykumare6a7ca82015-05-12 14:27:29 +0530250extern const struct flashchip flashchips_hwseq[];
ollie6a600992005-11-26 21:55:36 +0000251
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700252void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
253void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
254void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
255void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
256uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr);
257uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr);
258uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr);
259void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
260
uwe884cc8b2009-06-17 12:07:12 +0000261/* print.c */
hailfingera50d60e2009-11-17 09:57:34 +0000262void print_supported(void);
hailfingera50d60e2009-11-17 09:57:34 +0000263void print_supported_wiki(void);
uwea3a82c92009-05-15 17:02:34 +0000264
Edward O'Callaghan8dd57922019-03-15 16:21:34 +1100265/* helpers.c */
266uint32_t address_to_bits(uint32_t addr);
267int bitcount(unsigned long a);
268int min(int a, int b);
269int max(int a, int b);
270char *strcat_realloc(char *dest, const char *src);
271void tolower_string(char *str);
272
uwe4529d202007-08-23 13:34:59 +0000273/* flashrom.c */
Edward O'Callaghand8eca562019-02-24 21:10:33 +1100274/*
275 * The following enum defines possible write granularities of flash chips. These tend to reflect the properties
276 * of the actual hardware not necesserily the write function(s) defined by the respective struct flashchip.
277 * The latter might (and should) be more precisely specified, e.g. they might bail out early if their execution
278 * would result in undefined chip contents.
279 */
hailfingerb247c7a2010-03-08 00:42:32 +0000280enum write_granularity {
Edward O'Callaghand8eca562019-02-24 21:10:33 +1100281 /* We assume 256 byte granularity by default. */
282 write_gran_256bytes = 0,/* If less than 256 bytes are written, the unwritten bytes are undefined. */
283 write_gran_1bit, /* Each bit can be cleared individually. */
284 write_gran_1byte, /* A byte can be written once. Further writes to an already written byte cause
285 * its contents to be either undefined or to stay unchanged. */
286 write_gran_128bytes, /* If less than 128 bytes are written, the unwritten bytes are undefined. */
287 write_gran_264bytes, /* If less than 264 bytes are written, the unwritten bytes are undefined. */
288 write_gran_512bytes, /* If less than 512 bytes are written, the unwritten bytes are undefined. */
289 write_gran_528bytes, /* If less than 528 bytes are written, the unwritten bytes are undefined. */
290 write_gran_1024bytes, /* If less than 1024 bytes are written, the unwritten bytes are undefined. */
291 write_gran_1056bytes, /* If less than 1056 bytes are written, the unwritten bytes are undefined. */
292 write_gran_1byte_implicit_erase, /* EEPROMs and other chips with implicit erase and 1-byte writes. */
hailfingerb247c7a2010-03-08 00:42:32 +0000293};
Edward O'Callaghand8eca562019-02-24 21:10:33 +1100294
hailfinger80422e22009-12-13 22:28:00 +0000295extern enum chipbustype buses_supported;
krause2eb76212011-01-17 07:50:42 +0000296extern const char flashrom_version[];
hailfinger92cd8e32010-01-07 03:24:05 +0000297extern char *chip_to_probe;
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700298void map_flash_registers(struct flashctx *flash);
299int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
300int erase_flash(struct flashctx *flash);
David Hendricksac1d25c2016-08-09 17:00:58 -0700301int probe_flash(int startchip, struct flashctx *fill_flash, int force);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700302int read_flash(struct flashctx *flash, uint8_t *buf,
David Hendrickse3451942013-03-21 17:23:29 -0700303 unsigned int start, unsigned int len);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700304int read_flash_to_file(struct flashctx *flash, const char *filename);
stefanct52700282011-06-26 17:38:17 +0000305char *extract_param(char **haystack, const char *needle, const char *delim);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700306int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message);
hailfinger92cd8e32010-01-07 03:24:05 +0000307void print_version(void);
Souvik Ghosh3c963a42016-07-19 18:48:15 -0700308void print_buildinfo(void);
hailfinger74819ad2010-05-15 15:04:37 +0000309void print_banner(void);
hailfingerf79d1712010-10-06 23:48:34 +0000310void list_programmers_linebreak(int startcol, int cols, int paren);
hailfinger92cd8e32010-01-07 03:24:05 +0000311int selfcheck(void);
Vadim Bendebury2f346a32018-05-21 10:24:18 -0700312
313/*
314 *
315 * The main processing function of flashrom utility; it is invoked once
316 * command line parameters are processed and verified, and the type of the
317 * flash chip the programmer operates on has been determined.
318 *
319 * @flash pointer to the flash context matching the chip detected
320 * during initialization.
321 * @force when set proceed even if the chip is not known to work
322 * @filename pointer to the name of the file to read from or write to
323 * @read_it when true, flash contents are read into 'filename'
324 * @write_it when true, flash is programmed with 'filename' contents
325 * @erase_it when true, flash chip is erased
326 * @verify_it depending on the value verify the full chip, only changed
327 * areas, or none
328 * @extract_it extract all known flash chip regions into separate files
329 * @diff_file when deciding what areas to program, use this file's
330 * contents instead of reading the current chip contents
331 * @do_diff when true - compare result of the operation with either the
332 * original chip contents for 'diff_file' contents, is present.
333 * When false - do not diff, consider the chip erased before
334 * operation starts.
335 *
336 * Only one of 'read_it', 'write_it', and 'erase_it' is expected to be set,
337 * but this is not enforced.
338 *
339 * 'do_diff' must be set if 'diff_file' is set. If 'do_diff' is set, but
340 * 'diff_file' is not - comparison is done against the pre-operation chip
341 * contents.
342 */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700343int doit(struct flashctx *flash, int force, const char *filename, int read_it,
Simon Glass9ad06c12013-07-03 22:08:17 +0900344 int write_it, int erase_it, int verify_it, int extract_it,
Vadim Bendebury2f346a32018-05-21 10:24:18 -0700345 const char *diff_file, int do_diff);
stefanct52700282011-06-26 17:38:17 +0000346int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
347int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename);
uwe884cc8b2009-06-17 12:07:12 +0000348
349#define OK 0
350#define NT 1 /* Not tested */
uwe4529d202007-08-23 13:34:59 +0000351
David Hendricks1ed1d352011-11-23 17:54:37 -0800352/* what to do in case of an error */
353enum error_action {
354 error_fail, /* fail immediately */
355 error_ignore, /* non-fatal error; continue */
356};
357
uwe97e8e272011-09-03 17:15:00 +0000358/* Something happened that shouldn't happen, but we can go on. */
mkarcher74d30132010-07-22 18:04:15 +0000359#define ERROR_NONFATAL 0x100
360
uwe97e8e272011-09-03 17:15:00 +0000361/* Something happened that shouldn't happen, we'll abort. */
362#define ERROR_FATAL -0xee
363
David Hendricks1ed1d352011-11-23 17:54:37 -0800364/* Operation failed due to access restriction set in programmer or flash chip */
365#define ACCESS_DENIED -7
366extern enum error_action access_denied_action;
367
368/* convenience function for checking return codes */
369extern int ignore_error(int x);
370
Edward O'Callaghan83c77002019-06-04 15:56:19 +1000371/* cli_common.c */
372char *flashbuses_to_text(enum chipbustype bustype);
373void print_chip_support_status(const struct flashctx *flash);
374
snelson9cba3c62010-01-07 20:09:33 +0000375/* cli_output.c */
Edward O'Callaghan83c77002019-06-04 15:56:19 +1000376extern enum flashrom_log_level verbose_screen;
377extern enum flashrom_log_level verbose_logfile;
Souvik Ghosh3c963a42016-07-19 18:48:15 -0700378#ifndef STANDALONE
379int open_logfile(const char * const filename);
380int close_logfile(void);
381void start_logging(void);
382#endif
Edward O'Callaghan8d8d3972019-02-24 20:40:10 +1100383enum flashrom_log_level {
384 FLASHROM_MSG_ERROR = 0,
385 FLASHROM_MSG_WARN = 1,
386 FLASHROM_MSG_INFO = 2,
387 FLASHROM_MSG_DEBUG = 3,
388 FLASHROM_MSG_DEBUG2 = 4,
389 FLASHROM_MSG_SPEW = 5,
Patrick Georgidbde2f12017-02-03 18:07:45 +0100390};
hailfinger63932d42010-06-04 23:20:21 +0000391/* Let gcc and clang check for correct printf-style format strings. */
Edward O'Callaghan8d8d3972019-02-24 20:40:10 +1100392int print(enum flashrom_log_level level, const char *fmt, ...)
Patrick Georgidbde2f12017-02-03 18:07:45 +0100393#ifdef __MINGW32__
394__attribute__((format(gnu_printf, 2, 3)));
395#else
396__attribute__((format(printf, 2, 3)));
397#endif
Edward O'Callaghan8d8d3972019-02-24 20:40:10 +1100398#define msg_gerr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* general errors */
399#define msg_perr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* programmer errors */
400#define msg_cerr(...) print(FLASHROM_MSG_ERROR, __VA_ARGS__) /* chip errors */
401#define msg_gwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* general warnings */
402#define msg_pwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* programmer warnings */
403#define msg_cwarn(...) print(FLASHROM_MSG_WARN, __VA_ARGS__) /* chip warnings */
404#define msg_ginfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* general info */
405#define msg_pinfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* programmer info */
406#define msg_cinfo(...) print(FLASHROM_MSG_INFO, __VA_ARGS__) /* chip info */
407#define msg_gdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* general debug */
408#define msg_pdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* programmer debug */
409#define msg_cdbg(...) print(FLASHROM_MSG_DEBUG, __VA_ARGS__) /* chip debug */
410#define msg_gdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* general debug2 */
411#define msg_pdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* programmer debug2 */
412#define msg_cdbg2(...) print(FLASHROM_MSG_DEBUG2, __VA_ARGS__) /* chip debug2 */
413#define msg_gspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* general debug spew */
414#define msg_pspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* programmer debug spew */
415#define msg_cspew(...) print(FLASHROM_MSG_SPEW, __VA_ARGS__) /* chip debug spew */
snelson9cba3c62010-01-07 20:09:33 +0000416
stepan745615e2007-10-15 21:44:47 +0000417/* spi.c */
hailfinger68002c22009-07-10 21:08:55 +0000418struct spi_command {
419 unsigned int writecnt;
420 unsigned int readcnt;
421 const unsigned char *writearr;
422 unsigned char *readarr;
423};
Nico Huber4c8a9562017-10-15 11:20:58 +0200424#define NULL_SPI_CMD { 0, 0, NULL, NULL, }
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700425int spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
uwefa98ca12008-10-18 21:14:13 +0000426 const unsigned char *writearr, unsigned char *readarr);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700427int spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds);
428uint32_t spi_get_valid_read_addr(struct flashctx *flash);
uweaf9b4df2008-09-26 13:19:02 +0000429
David Hendricks8c084212015-11-17 22:29:36 -0800430#define NUM_VOLTAGE_RANGES 16
431extern struct voltage_range voltage_ranges[];
432/* returns number of unique voltage ranges, or <0 to indicate failure */
433extern int flash_supported_voltage_ranges(enum chipbustype bus);
434
ollie5b621572004-03-20 16:46:10 +0000435#endif /* !__FLASH_H__ */