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stepan5c3f1382007-02-06 19:47:50 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
stepan5c3f1382007-02-06 19:47:50 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
stepan6d42c0f2009-08-12 09:27:45 +00006 * Copyright (C) 2005-2009 coresystems GmbH
hailfinger77c5d932009-06-15 12:10:57 +00007 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
stepan5c3f1382007-02-06 19:47:50 +00008 *
uweb25f1ea2007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
stepan5c3f1382007-02-06 19:47:50 +000013 *
uweb25f1ea2007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
stepan5c3f1382007-02-06 19:47:50 +000018 *
uweb25f1ea2007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
stepan5c3f1382007-02-06 19:47:50 +000022 */
23
rminnich8d3ff912003-10-25 17:01:29 +000024#ifndef __FLASH_H__
25#define __FLASH_H__ 1
26
rminnich8d3ff912003-10-25 17:01:29 +000027#include <unistd.h>
ollie6a600992005-11-26 21:55:36 +000028#include <stdint.h>
uwe4529d202007-08-23 13:34:59 +000029#include <stdio.h>
hailfinger088dc812009-12-14 03:32:24 +000030#include "hwaccess.h"
hailfingere1f062f2008-05-22 13:22:45 +000031
hailfinger82719632009-05-16 21:22:56 +000032typedef unsigned long chipaddr;
33
hailfinger6fe23d62009-08-12 11:39:29 +000034enum programmer {
hailfinger80422e22009-12-13 22:28:00 +000035#if INTERNAL_SUPPORT == 1
hailfinger6fe23d62009-08-12 11:39:29 +000036 PROGRAMMER_INTERNAL,
hailfinger80422e22009-12-13 22:28:00 +000037#endif
hailfinger571a6b32009-09-16 10:09:21 +000038#if DUMMY_SUPPORT == 1
hailfinger6fe23d62009-08-12 11:39:29 +000039 PROGRAMMER_DUMMY,
hailfinger571a6b32009-09-16 10:09:21 +000040#endif
41#if NIC3COM_SUPPORT == 1
hailfinger6fe23d62009-08-12 11:39:29 +000042 PROGRAMMER_NIC3COM,
hailfinger571a6b32009-09-16 10:09:21 +000043#endif
uweff4576d2009-09-30 18:29:55 +000044#if GFXNVIDIA_SUPPORT == 1
45 PROGRAMMER_GFXNVIDIA,
46#endif
hailfinger571a6b32009-09-16 10:09:21 +000047#if DRKAISER_SUPPORT == 1
uwee2f95ef2009-09-02 23:00:46 +000048 PROGRAMMER_DRKAISER,
hailfinger571a6b32009-09-16 10:09:21 +000049#endif
50#if SATASII_SUPPORT == 1
hailfinger6fe23d62009-08-12 11:39:29 +000051 PROGRAMMER_SATASII,
hailfinger571a6b32009-09-16 10:09:21 +000052#endif
hailfinger80422e22009-12-13 22:28:00 +000053#if INTERNAL_SUPPORT == 1
hailfinger6fe23d62009-08-12 11:39:29 +000054 PROGRAMMER_IT87SPI,
hailfinger80422e22009-12-13 22:28:00 +000055#endif
hailfingerd9dcfbd2009-08-19 13:27:58 +000056#if FT2232_SPI_SUPPORT == 1
hailfinger6fe23d62009-08-12 11:39:29 +000057 PROGRAMMER_FT2232SPI,
hailfingerd9dcfbd2009-08-19 13:27:58 +000058#endif
hailfinger74d88a72009-08-12 16:17:41 +000059#if SERPROG_SUPPORT == 1
hailfinger6fe23d62009-08-12 11:39:29 +000060 PROGRAMMER_SERPROG,
hailfinger74d88a72009-08-12 16:17:41 +000061#endif
hailfinger9c5add72009-11-24 00:20:03 +000062#if BUSPIRATE_SPI_SUPPORT == 1
63 PROGRAMMER_BUSPIRATESPI,
64#endif
hailfinger3548a9a2009-08-12 14:34:35 +000065 PROGRAMMER_INVALID /* This must always be the last entry. */
hailfinger6fe23d62009-08-12 11:39:29 +000066};
67
68extern enum programmer programmer;
hailfingerabe249e2009-05-08 17:43:22 +000069
70struct programmer_entry {
71 const char *vendor;
72 const char *name;
73
74 int (*init) (void);
75 int (*shutdown) (void);
76
uwe4e204a22009-05-28 15:07:42 +000077 void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
78 size_t len);
hailfinger11ae3c42009-05-11 14:13:25 +000079 void (*unmap_flash_region) (void *virt_addr, size_t len);
80
hailfinger82719632009-05-16 21:22:56 +000081 void (*chip_writeb) (uint8_t val, chipaddr addr);
82 void (*chip_writew) (uint16_t val, chipaddr addr);
83 void (*chip_writel) (uint32_t val, chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +000084 void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
hailfinger82719632009-05-16 21:22:56 +000085 uint8_t (*chip_readb) (const chipaddr addr);
86 uint16_t (*chip_readw) (const chipaddr addr);
87 uint32_t (*chip_readl) (const chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +000088 void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
hailfingere5829f62009-06-05 17:48:08 +000089 void (*delay) (int usecs);
hailfingerabe249e2009-05-08 17:43:22 +000090};
91
92extern const struct programmer_entry programmer_table[];
93
uweabe92a52009-05-16 22:36:00 +000094int programmer_init(void);
95int programmer_shutdown(void);
96void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
97 size_t len);
98void programmer_unmap_flash_region(void *virt_addr, size_t len);
99void chip_writeb(uint8_t val, chipaddr addr);
100void chip_writew(uint16_t val, chipaddr addr);
101void chip_writel(uint32_t val, chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +0000102void chip_writen(uint8_t *buf, chipaddr addr, size_t len);
uweabe92a52009-05-16 22:36:00 +0000103uint8_t chip_readb(const chipaddr addr);
104uint16_t chip_readw(const chipaddr addr);
105uint32_t chip_readl(const chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +0000106void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
hailfingere5829f62009-06-05 17:48:08 +0000107void programmer_delay(int usecs);
hailfingerba3761a2009-03-05 19:24:22 +0000108
hailfinger8e278892009-10-01 14:51:25 +0000109enum bitbang_spi_master {
110 BITBANG_SPI_INVALID /* This must always be the last entry. */
hailfingeracce2df2009-09-28 13:15:16 +0000111};
112
hailfinger8e278892009-10-01 14:51:25 +0000113extern const int bitbang_spi_master_count;
hailfingeracce2df2009-09-28 13:15:16 +0000114
hailfinger8e278892009-10-01 14:51:25 +0000115extern enum bitbang_spi_master bitbang_spi_master;
hailfingeracce2df2009-09-28 13:15:16 +0000116
hailfinger8e278892009-10-01 14:51:25 +0000117struct bitbang_spi_master_entry {
hailfingeracce2df2009-09-28 13:15:16 +0000118 void (*set_cs) (int val);
119 void (*set_sck) (int val);
120 void (*set_mosi) (int val);
121 int (*get_miso) (void);
122};
123
uwe16f99092008-03-12 11:54:51 +0000124#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
125
hailfinger40167462009-05-31 17:57:34 +0000126enum chipbustype {
hailfinger668f3502009-06-01 00:02:11 +0000127 CHIP_BUSTYPE_NONE = 0,
hailfinger40167462009-05-31 17:57:34 +0000128 CHIP_BUSTYPE_PARALLEL = 1 << 0,
129 CHIP_BUSTYPE_LPC = 1 << 1,
130 CHIP_BUSTYPE_FWH = 1 << 2,
131 CHIP_BUSTYPE_SPI = 1 << 3,
132 CHIP_BUSTYPE_NONSPI = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH,
133 CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI,
134};
135
hailfinger7df21362009-09-05 02:30:58 +0000136/*
137 * How many different contiguous runs of erase blocks with one size each do
138 * we have for a given erase function?
139 */
140#define NUM_ERASEREGIONS 5
141
142/*
143 * How many different erase functions do we have per chip?
144 */
145#define NUM_ERASEFUNCTIONS 5
146
snelson63133f92010-01-04 17:15:23 +0000147#define FEATURE_REGISTERMAP (1 << 0)
148#define FEATURE_BYTEWRITES (1 << 1)
149
rminnich8d3ff912003-10-25 17:01:29 +0000150struct flashchip {
uwedfcd15f2008-03-14 23:55:58 +0000151 const char *vendor;
uwe6ed6d952007-12-04 21:49:06 +0000152 const char *name;
hailfinger40167462009-05-31 17:57:34 +0000153
154 enum chipbustype bustype;
155
uwefa98ca12008-10-18 21:14:13 +0000156 /*
157 * With 32bit manufacture_id and model_id we can cover IDs up to
hailfinger428f2012007-12-31 01:49:00 +0000158 * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
159 * Identification code.
160 */
161 uint32_t manufacture_id;
162 uint32_t model_id;
rminnich8d3ff912003-10-25 17:01:29 +0000163
rminnich8d3ff912003-10-25 17:01:29 +0000164 int total_size;
165 int page_size;
snelson63133f92010-01-04 17:15:23 +0000166 int feature_bits;
rminnich8d3ff912003-10-25 17:01:29 +0000167
uwefa98ca12008-10-18 21:14:13 +0000168 /*
169 * Indicate if flashrom has been tested with this flash chip and if
stuge9cd64bd2008-05-03 04:34:37 +0000170 * everything worked correctly.
171 */
172 uint32_t tested;
173
uwe8e1a2ba2007-04-01 19:44:21 +0000174 int (*probe) (struct flashchip *flash);
hailfingerd5b35922009-06-03 14:46:22 +0000175
176 /* Delay after "enter/exit ID mode" commands in microseconds. */
177 int probe_timing;
uwe8e1a2ba2007-04-01 19:44:21 +0000178 int (*erase) (struct flashchip *flash);
hailfinger7df21362009-09-05 02:30:58 +0000179
180 /*
hailfingerc4fac582009-12-22 13:04:53 +0000181 * Erase blocks and associated erase function. Any chip erase function
182 * is stored as chip-sized virtual block together with said function.
hailfinger7df21362009-09-05 02:30:58 +0000183 */
184 struct block_eraser {
185 struct eraseblock{
186 unsigned int size; /* Eraseblock size */
187 unsigned int count; /* Number of contiguous blocks with that size */
188 } eraseblocks[NUM_ERASEREGIONS];
189 int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
190 } block_erasers[NUM_ERASEFUNCTIONS];
191
uwe8e1a2ba2007-04-01 19:44:21 +0000192 int (*write) (struct flashchip *flash, uint8_t *buf);
hailfinger0f08b7a2009-06-16 08:55:44 +0000193 int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len);
rminnich8d3ff912003-10-25 17:01:29 +0000194
uwe6ed6d952007-12-04 21:49:06 +0000195 /* Some flash devices have an additional register space. */
hailfinger82719632009-05-16 21:22:56 +0000196 chipaddr virtual_memory;
197 chipaddr virtual_registers;
rminnich8d3ff912003-10-25 17:01:29 +0000198};
199
stuge9cd64bd2008-05-03 04:34:37 +0000200#define TEST_UNTESTED 0
201
uwe4e204a22009-05-28 15:07:42 +0000202#define TEST_OK_PROBE (1 << 0)
203#define TEST_OK_READ (1 << 1)
204#define TEST_OK_ERASE (1 << 2)
205#define TEST_OK_WRITE (1 << 3)
206#define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ)
207#define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
hailfinger80f48682009-09-23 22:01:33 +0000208#define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE)
uwe4e204a22009-05-28 15:07:42 +0000209#define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
stuge9cd64bd2008-05-03 04:34:37 +0000210#define TEST_OK_MASK 0x0f
211
uwe4e204a22009-05-28 15:07:42 +0000212#define TEST_BAD_PROBE (1 << 4)
213#define TEST_BAD_READ (1 << 5)
214#define TEST_BAD_ERASE (1 << 6)
215#define TEST_BAD_WRITE (1 << 7)
216#define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
stuge9cd64bd2008-05-03 04:34:37 +0000217#define TEST_BAD_MASK 0xf0
218
hailfingerd5b35922009-06-03 14:46:22 +0000219/* Timing used in probe routines. ZERO is -2 to differentiate between an unset
220 * field and zero delay.
221 *
222 * SPI devices will always have zero delay and ignore this field.
223 */
224#define TIMING_FIXME -1
225/* this is intentionally same value as fixme */
226#define TIMING_IGNORED -1
227#define TIMING_ZERO -2
228
ollie6a600992005-11-26 21:55:36 +0000229extern struct flashchip flashchips[];
230
hailfinger80422e22009-12-13 22:28:00 +0000231#if INTERNAL_SUPPORT == 1
uwe5f612c82009-05-16 23:42:17 +0000232struct penable {
233 uint16_t vendor_id;
234 uint16_t device_id;
235 int status;
236 const char *vendor_name;
237 const char *device_name;
238 int (*doit) (struct pci_dev *dev, const char *name);
239};
240
241extern const struct penable chipset_enables[];
242
243struct board_pciid_enable {
244 /* Any device, but make it sensible, like the ISA bridge. */
245 uint16_t first_vendor;
246 uint16_t first_device;
247 uint16_t first_card_vendor;
248 uint16_t first_card_device;
249
250 /* Any device, but make it sensible, like
251 * the host bridge. May be NULL.
252 */
253 uint16_t second_vendor;
254 uint16_t second_device;
255 uint16_t second_card_vendor;
256 uint16_t second_card_device;
257
258 /* The vendor / part name from the coreboot table. */
259 const char *lb_vendor;
260 const char *lb_part;
261
262 const char *vendor_name;
263 const char *board_name;
264
265 int (*enable) (const char *name);
266};
267
268extern struct board_pciid_enable board_pciid_enables[];
269
270struct board_info {
271 const char *vendor;
272 const char *name;
273};
274
275extern const struct board_info boards_ok[];
276extern const struct board_info boards_bad[];
uwefef723f2009-06-18 14:04:44 +0000277extern const struct board_info laptops_ok[];
278extern const struct board_info laptops_bad[];
hailfinger80422e22009-12-13 22:28:00 +0000279#endif
uwe5f612c82009-05-16 23:42:17 +0000280
uwe6ed6d952007-12-04 21:49:06 +0000281/* udelay.c */
hailfingere5829f62009-06-05 17:48:08 +0000282void myusec_delay(int usecs);
hailfinger3d77bc12009-05-01 12:22:17 +0000283void myusec_calibrate_delay(void);
hailfinger8f496f32009-12-24 03:11:55 +0000284void internal_delay(int usecs);
stepan927d4e22007-04-04 22:45:58 +0000285
hailfinger80422e22009-12-13 22:28:00 +0000286#if NEED_PCI == 1
uwea3a82c92009-05-15 17:02:34 +0000287/* pcidev.c */
288#define PCI_OK 0
289#define PCI_NT 1 /* Not tested */
ruikda922a12009-05-17 19:39:27 +0000290
uwea3a82c92009-05-15 17:02:34 +0000291extern uint32_t io_base_addr;
292extern struct pci_access *pacc;
293extern struct pci_filter filter;
uweb3a82ef2009-05-16 21:39:19 +0000294extern struct pci_dev *pcidev_dev;
uwea3a82c92009-05-15 17:02:34 +0000295struct pcidev_status {
296 uint16_t vendor_id;
297 uint16_t device_id;
298 int status;
299 const char *vendor_name;
300 const char *device_name;
301};
uwee2f95ef2009-09-02 23:00:46 +0000302uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs);
303uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf);
hailfinger80422e22009-12-13 22:28:00 +0000304#endif
uwe884cc8b2009-06-17 12:07:12 +0000305
306/* print.c */
307char *flashbuses_to_text(enum chipbustype bustype);
hailfingera50d60e2009-11-17 09:57:34 +0000308void print_supported(void);
hailfinger80422e22009-12-13 22:28:00 +0000309#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1)
uwea3a82c92009-05-15 17:02:34 +0000310void print_supported_pcidevs(struct pcidev_status *devs);
hailfinger80422e22009-12-13 22:28:00 +0000311#endif
hailfingera50d60e2009-11-17 09:57:34 +0000312void print_supported_wiki(void);
uwea3a82c92009-05-15 17:02:34 +0000313
uwe6ed6d952007-12-04 21:49:06 +0000314/* board_enable.c */
stugeaa35d392009-01-26 02:34:51 +0000315void w836xx_ext_enter(uint16_t port);
316void w836xx_ext_leave(uint16_t port);
hailfinger7bac0e52009-05-25 23:26:50 +0000317uint8_t sio_read(uint16_t port, uint8_t reg);
318void sio_write(uint16_t port, uint8_t reg, uint8_t data);
319void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
uwe6ed6d952007-12-04 21:49:06 +0000320int board_flash_enable(const char *vendor, const char *part);
stepan5c3f1382007-02-06 19:47:50 +0000321
uwe6ed6d952007-12-04 21:49:06 +0000322/* chipset_enable.c */
323int chipset_flash_enable(void);
stuge12ac08f2008-12-03 21:24:40 +0000324
stuge7c943ee2009-01-26 01:10:48 +0000325/* physmap.c */
326void *physmap(const char *descr, unsigned long phys_addr, size_t len);
327void physunmap(void *virt_addr, size_t len);
stepan6d42c0f2009-08-12 09:27:45 +0000328int setup_cpu_msr(int cpu);
329void cleanup_cpu_msr(void);
hailfinger088dc812009-12-14 03:32:24 +0000330
331/* cbtable.c */
332void lb_vendor_dev_from_string(char *boardstring);
333int coreboot_init(void);
334extern char *lb_part, *lb_vendor;
335extern int partvendor_from_cbtable;
stuge7c943ee2009-01-26 01:10:48 +0000336
hailfingerabe249e2009-05-08 17:43:22 +0000337/* internal.c */
hailfinger80422e22009-12-13 22:28:00 +0000338#if NEED_PCI == 1
hailfingerc236f9e2009-12-22 23:42:04 +0000339struct superio {
340 uint16_t vendor;
341 uint16_t port;
342 uint16_t model;
343};
344extern struct superio superio;
345#define SUPERIO_VENDOR_NONE 0x0
346#define SUPERIO_VENDOR_ITE 0x1
uwe57195ba2009-05-16 22:05:42 +0000347struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
hailfinger07e3ce02009-11-15 17:13:29 +0000348struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class);
uwe57195ba2009-05-16 22:05:42 +0000349struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
350struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
351 uint16_t card_vendor, uint16_t card_device);
hailfinger80422e22009-12-13 22:28:00 +0000352#endif
hailfinger0668eba2009-05-14 21:41:10 +0000353void get_io_perms(void);
hailfinger7828d092009-08-09 21:50:24 +0000354void release_io_perms(void);
hailfinger80422e22009-12-13 22:28:00 +0000355#if INTERNAL_SUPPORT == 1
hailfingerc236f9e2009-12-22 23:42:04 +0000356void probe_superio(void);
hailfingerabe249e2009-05-08 17:43:22 +0000357int internal_init(void);
358int internal_shutdown(void);
hailfinger82719632009-05-16 21:22:56 +0000359void internal_chip_writeb(uint8_t val, chipaddr addr);
360void internal_chip_writew(uint16_t val, chipaddr addr);
361void internal_chip_writel(uint32_t val, chipaddr addr);
362uint8_t internal_chip_readb(const chipaddr addr);
363uint16_t internal_chip_readw(const chipaddr addr);
364uint32_t internal_chip_readl(const chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +0000365void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
hailfinger80422e22009-12-13 22:28:00 +0000366#endif
hailfinger38da6812009-05-17 15:49:24 +0000367void mmio_writeb(uint8_t val, void *addr);
368void mmio_writew(uint16_t val, void *addr);
369void mmio_writel(uint32_t val, void *addr);
370uint8_t mmio_readb(void *addr);
371uint16_t mmio_readw(void *addr);
372uint32_t mmio_readl(void *addr);
hailfingerec022272010-01-06 10:21:00 +0000373
374/* programmer.c */
hailfinger571a6b32009-09-16 10:09:21 +0000375int noop_shutdown(void);
uwe3e656bd2009-05-17 23:12:17 +0000376void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
377void fallback_unmap(void *virt_addr, size_t len);
hailfinger571a6b32009-09-16 10:09:21 +0000378uint8_t noop_chip_readb(const chipaddr addr);
379void noop_chip_writeb(uint8_t val, chipaddr addr);
hailfinger82719632009-05-16 21:22:56 +0000380void fallback_chip_writew(uint16_t val, chipaddr addr);
381void fallback_chip_writel(uint32_t val, chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +0000382void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
hailfinger82719632009-05-16 21:22:56 +0000383uint16_t fallback_chip_readw(const chipaddr addr);
384uint32_t fallback_chip_readl(const chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +0000385void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
hailfingerabe249e2009-05-08 17:43:22 +0000386
hailfingera9df33c2009-05-09 00:54:55 +0000387/* dummyflasher.c */
hailfinger80422e22009-12-13 22:28:00 +0000388#if DUMMY_SUPPORT == 1
hailfingera9df33c2009-05-09 00:54:55 +0000389int dummy_init(void);
390int dummy_shutdown(void);
hailfinger11ae3c42009-05-11 14:13:25 +0000391void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
392void dummy_unmap(void *virt_addr, size_t len);
hailfinger82719632009-05-16 21:22:56 +0000393void dummy_chip_writeb(uint8_t val, chipaddr addr);
394void dummy_chip_writew(uint16_t val, chipaddr addr);
395void dummy_chip_writel(uint32_t val, chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +0000396void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
hailfinger82719632009-05-16 21:22:56 +0000397uint8_t dummy_chip_readb(const chipaddr addr);
398uint16_t dummy_chip_readw(const chipaddr addr);
399uint32_t dummy_chip_readl(const chipaddr addr);
hailfinger9d987ef2009-06-05 18:32:07 +0000400void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
hailfinger68002c22009-07-10 21:08:55 +0000401int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
hailfingerf91e3b52009-05-14 12:59:36 +0000402 const unsigned char *writearr, unsigned char *readarr);
hailfinger80422e22009-12-13 22:28:00 +0000403#endif
hailfingera9df33c2009-05-09 00:54:55 +0000404
uwe0f5a3a22009-05-13 11:36:06 +0000405/* nic3com.c */
hailfinger80422e22009-12-13 22:28:00 +0000406#if NIC3COM_SUPPORT == 1
uwe0f5a3a22009-05-13 11:36:06 +0000407int nic3com_init(void);
408int nic3com_shutdown(void);
hailfinger82719632009-05-16 21:22:56 +0000409void nic3com_chip_writeb(uint8_t val, chipaddr addr);
410uint8_t nic3com_chip_readb(const chipaddr addr);
uwea3a82c92009-05-15 17:02:34 +0000411extern struct pcidev_status nics_3com[];
hailfinger80422e22009-12-13 22:28:00 +0000412#endif
uwe0f5a3a22009-05-13 11:36:06 +0000413
uweff4576d2009-09-30 18:29:55 +0000414/* gfxnvidia.c */
hailfinger80422e22009-12-13 22:28:00 +0000415#if GFXNVIDIA_SUPPORT == 1
uweff4576d2009-09-30 18:29:55 +0000416int gfxnvidia_init(void);
417int gfxnvidia_shutdown(void);
418void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
419uint8_t gfxnvidia_chip_readb(const chipaddr addr);
420extern struct pcidev_status gfx_nvidia[];
hailfinger80422e22009-12-13 22:28:00 +0000421#endif
uweff4576d2009-09-30 18:29:55 +0000422
uwee2f95ef2009-09-02 23:00:46 +0000423/* drkaiser.c */
hailfinger80422e22009-12-13 22:28:00 +0000424#if DRKAISER_SUPPORT == 1
uwee2f95ef2009-09-02 23:00:46 +0000425int drkaiser_init(void);
426int drkaiser_shutdown(void);
427void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
428uint8_t drkaiser_chip_readb(const chipaddr addr);
429extern struct pcidev_status drkaiser_pcidev[];
hailfinger80422e22009-12-13 22:28:00 +0000430#endif
uwee2f95ef2009-09-02 23:00:46 +0000431
ruikda922a12009-05-17 19:39:27 +0000432/* satasii.c */
hailfinger80422e22009-12-13 22:28:00 +0000433#if SATASII_SUPPORT == 1
ruikda922a12009-05-17 19:39:27 +0000434int satasii_init(void);
435int satasii_shutdown(void);
ruikda922a12009-05-17 19:39:27 +0000436void satasii_chip_writeb(uint8_t val, chipaddr addr);
437uint8_t satasii_chip_readb(const chipaddr addr);
438extern struct pcidev_status satas_sii[];
hailfinger80422e22009-12-13 22:28:00 +0000439#endif
ruikda922a12009-05-17 19:39:27 +0000440
hailfingerf31da3d2009-06-16 21:08:06 +0000441/* ft2232_spi.c */
hailfingere98628b2009-07-01 00:02:23 +0000442#define FTDI_FT2232H 0x6010
443#define FTDI_FT4232H 0x6011
hailfingerf31da3d2009-06-16 21:08:06 +0000444int ft2232_spi_init(void);
hailfinger68002c22009-07-10 21:08:55 +0000445int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
hailfingerf31da3d2009-06-16 21:08:06 +0000446int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
hailfingerf31da3d2009-06-16 21:08:06 +0000447int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
448
hailfingeracce2df2009-09-28 13:15:16 +0000449/* bitbang_spi.c */
hailfinger8e278892009-10-01 14:51:25 +0000450extern int bitbang_spi_half_period;
451extern const struct bitbang_spi_master_entry bitbang_spi_master_table[];
hailfingeracce2df2009-09-28 13:15:16 +0000452int bitbang_spi_init(void);
453int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
454int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
455int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf);
456
hailfinger9c5add72009-11-24 00:20:03 +0000457/* buspirate_spi.c */
hailfinger6e5a52a2009-11-24 18:27:10 +0000458struct buspirate_spispeeds {
459 const char *name;
460 const int speed;
461};
hailfinger9c5add72009-11-24 00:20:03 +0000462int buspirate_spi_init(void);
463int buspirate_spi_shutdown(void);
464int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
465int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
466
uwe4529d202007-08-23 13:34:59 +0000467/* flashrom.c */
hailfinger80422e22009-12-13 22:28:00 +0000468extern enum chipbustype buses_supported;
469struct decode_sizes {
470 uint32_t parallel;
471 uint32_t lpc;
472 uint32_t fwh;
473 uint32_t spi;
474};
475extern struct decode_sizes max_rom_decode;
hailfinger4f45a4f2009-08-12 13:32:56 +0000476extern char *programmer_param;
hailfinger80422e22009-12-13 22:28:00 +0000477extern unsigned long flashbase;
uwee06bcf82009-04-24 16:17:41 +0000478extern int verbose;
hailfinger2d83b5b2009-07-22 20:13:00 +0000479extern const char *flashrom_version;
uwee06bcf82009-04-24 16:17:41 +0000480#define printf_debug(x...) { if (verbose) printf(x); }
stuge5ff0e6c2009-01-26 00:39:57 +0000481void map_flash_registers(struct flashchip *flash);
hailfinger0f08b7a2009-06-16 08:55:44 +0000482int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len);
hailfinger7df21362009-09-05 02:30:58 +0000483int erase_flash(struct flashchip *flash);
hailfinger7b414742009-06-13 12:04:03 +0000484int min(int a, int b);
hailfinger7af83692009-06-15 17:23:36 +0000485int max(int a, int b);
hailfinger6e5a52a2009-11-24 18:27:10 +0000486char *extract_param(char **haystack, char *needle, char *delim);
hailfinger7af83692009-06-15 17:23:36 +0000487int check_erased_range(struct flashchip *flash, int start, int len);
488int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message);
uwe884cc8b2009-06-17 12:07:12 +0000489char *strcat_realloc(char *dest, const char *src);
hailfingerc77acb52009-12-24 02:15:55 +0000490int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it);
uwe884cc8b2009-06-17 12:07:12 +0000491
492#define OK 0
493#define NT 1 /* Not tested */
uwe4529d202007-08-23 13:34:59 +0000494
495/* layout.c */
stuge98c09aa2008-06-18 02:08:40 +0000496int show_id(uint8_t *bios, int size, int force);
uwe4529d202007-08-23 13:34:59 +0000497int read_romlayout(char *name);
498int find_romentry(char *name);
hailfinger051b3442009-08-19 15:19:18 +0000499int handle_romentries(uint8_t *buffer, struct flashchip *flash);
uwe4529d202007-08-23 13:34:59 +0000500
stepan745615e2007-10-15 21:44:47 +0000501/* spi.c */
hailfinger40167462009-05-31 17:57:34 +0000502enum spi_controller {
503 SPI_CONTROLLER_NONE,
hailfinger80422e22009-12-13 22:28:00 +0000504#if INTERNAL_SUPPORT == 1
hailfinger40167462009-05-31 17:57:34 +0000505 SPI_CONTROLLER_ICH7,
506 SPI_CONTROLLER_ICH9,
507 SPI_CONTROLLER_IT87XX,
508 SPI_CONTROLLER_SB600,
509 SPI_CONTROLLER_VIA,
510 SPI_CONTROLLER_WBSIO,
hailfinger80422e22009-12-13 22:28:00 +0000511#endif
hailfingerd9dcfbd2009-08-19 13:27:58 +0000512#if FT2232_SPI_SUPPORT == 1
hailfingerf31da3d2009-06-16 21:08:06 +0000513 SPI_CONTROLLER_FT2232,
hailfingerd9dcfbd2009-08-19 13:27:58 +0000514#endif
hailfinger571a6b32009-09-16 10:09:21 +0000515#if DUMMY_SUPPORT == 1
hailfinger40167462009-05-31 17:57:34 +0000516 SPI_CONTROLLER_DUMMY,
hailfinger571a6b32009-09-16 10:09:21 +0000517#endif
hailfinger9c5add72009-11-24 00:20:03 +0000518#if BUSPIRATE_SPI_SUPPORT == 1
519 SPI_CONTROLLER_BUSPIRATE,
520#endif
hailfingerd9dcfbd2009-08-19 13:27:58 +0000521 SPI_CONTROLLER_INVALID /* This must always be the last entry. */
hailfinger40167462009-05-31 17:57:34 +0000522};
hailfingerd9dcfbd2009-08-19 13:27:58 +0000523extern const int spi_programmer_count;
hailfinger68002c22009-07-10 21:08:55 +0000524struct spi_command {
525 unsigned int writecnt;
526 unsigned int readcnt;
527 const unsigned char *writearr;
528 unsigned char *readarr;
529};
hailfinger948b81f2009-07-22 15:36:50 +0000530struct spi_programmer {
531 int (*command)(unsigned int writecnt, unsigned int readcnt,
532 const unsigned char *writearr, unsigned char *readarr);
hailfingerbb092112009-09-18 15:50:56 +0000533 int (*multicommand)(struct spi_command *cmds);
hailfinger948b81f2009-07-22 15:36:50 +0000534
535 /* Optimized functions for this programmer */
536 int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len);
537 int (*write_256)(struct flashchip *flash, uint8_t *buf);
538};
hailfinger68002c22009-07-10 21:08:55 +0000539
hailfinger40167462009-05-31 17:57:34 +0000540extern enum spi_controller spi_controller;
hailfinger948b81f2009-07-22 15:36:50 +0000541extern const struct spi_programmer spi_programmer[];
hailfinger40167462009-05-31 17:57:34 +0000542extern void *spibar;
hailfinger68002c22009-07-10 21:08:55 +0000543int spi_send_command(unsigned int writecnt, unsigned int readcnt,
uwefa98ca12008-10-18 21:14:13 +0000544 const unsigned char *writearr, unsigned char *readarr);
hailfingerbb092112009-09-18 15:50:56 +0000545int spi_send_multicommand(struct spi_command *cmds);
hailfinger948b81f2009-07-22 15:36:50 +0000546int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
547 const unsigned char *writearr, unsigned char *readarr);
hailfingerbb092112009-09-18 15:50:56 +0000548int default_spi_send_multicommand(struct spi_command *cmds);
hailfinger088dc812009-12-14 03:32:24 +0000549uint32_t spi_get_valid_read_addr(void);
uweaf9b4df2008-09-26 13:19:02 +0000550
hailfinger82e7ddb2008-05-16 12:55:55 +0000551/* ichspi.c */
hailfinger3d77bc12009-05-01 12:22:17 +0000552int ich_init_opcodes(void);
hailfinger68002c22009-07-10 21:08:55 +0000553int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
uwefa98ca12008-10-18 21:14:13 +0000554 const unsigned char *writearr, unsigned char *readarr);
hailfinger0f08b7a2009-06-16 08:55:44 +0000555int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
hailfingered063f52009-05-09 02:30:21 +0000556int ich_spi_write_256(struct flashchip *flash, uint8_t * buf);
hailfingerbb092112009-09-18 15:50:56 +0000557int ich_spi_send_multicommand(struct spi_command *cmds);
hailfinger82e7ddb2008-05-16 12:55:55 +0000558
hailfinger2c361e42008-05-13 23:03:12 +0000559/* it87spi.c */
560extern uint16_t it8716f_flashport;
hailfinger7bac0e52009-05-25 23:26:50 +0000561void enter_conf_mode_ite(uint16_t port);
562void exit_conf_mode_ite(uint16_t port);
hailfingerc236f9e2009-12-22 23:42:04 +0000563struct superio probe_superio_ite(void);
hailfinger26e212b2009-05-31 18:00:57 +0000564int it87spi_init(void);
hailfinger82e7ddb2008-05-16 12:55:55 +0000565int it87xx_probe_spi_flash(const char *name);
hailfinger68002c22009-07-10 21:08:55 +0000566int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
uwefa98ca12008-10-18 21:14:13 +0000567 const unsigned char *writearr, unsigned char *readarr);
hailfinger0f08b7a2009-06-16 08:55:44 +0000568int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
hailfingered063f52009-05-09 02:30:21 +0000569int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);
hailfinger2c361e42008-05-13 23:03:12 +0000570
uwe17efbed2008-11-28 21:36:51 +0000571/* sb600spi.c */
hailfinger68002c22009-07-10 21:08:55 +0000572int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
uwe17efbed2008-11-28 21:36:51 +0000573 const unsigned char *writearr, unsigned char *readarr);
hailfinger0f08b7a2009-06-16 08:55:44 +0000574int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
hailfingered063f52009-05-09 02:30:21 +0000575int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf);
hailfinger38da6812009-05-17 15:49:24 +0000576extern uint8_t *sb600_spibar;
uwe17efbed2008-11-28 21:36:51 +0000577
stugea564bcf2009-01-26 03:08:45 +0000578/* wbsio_spi.c */
579int wbsio_check_for_spi(const char *name);
hailfinger68002c22009-07-10 21:08:55 +0000580int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
uwe4e204a22009-05-28 15:07:42 +0000581 const unsigned char *writearr, unsigned char *readarr);
hailfinger0f08b7a2009-06-16 08:55:44 +0000582int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
hailfingered063f52009-05-09 02:30:21 +0000583int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);
stugea564bcf2009-01-26 03:08:45 +0000584
hailfinger37b4fbf2009-06-23 11:33:43 +0000585/* serprog.c */
hailfinger37b4fbf2009-06-23 11:33:43 +0000586int serprog_init(void);
587int serprog_shutdown(void);
588void serprog_chip_writeb(uint8_t val, chipaddr addr);
589uint8_t serprog_chip_readb(const chipaddr addr);
590void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
591void serprog_delay(int delay);
hailfinger4979b042009-11-23 19:20:11 +0000592
593/* serial.c */
hailfingerb88282e2009-11-21 11:02:48 +0000594void sp_flush_incoming(void);
595int sp_openserport(char *dev, unsigned int baud);
hailfinger4979b042009-11-23 19:20:11 +0000596void __attribute__((noreturn)) sp_die(char *msg);
hailfingerb88282e2009-11-21 11:02:48 +0000597extern int sp_fd;
uwe619a15a2009-06-28 23:26:37 +0000598
hailfinger088dc812009-12-14 03:32:24 +0000599#include "chipdrivers.h"
600
ollie5b621572004-03-20 16:46:10 +0000601#endif /* !__FLASH_H__ */