Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 1 | /* |
| 2 | * Optimizations for Tiny Code Generator for QEMU |
| 3 | * |
| 4 | * Copyright (c) 2010 Samsung Electronics. |
| 5 | * Contributed by Kirill Batuzov <batuzovk@ispras.ru> |
| 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 8 | * of this software and associated documentation files (the "Software"), to deal |
| 9 | * in the Software without restriction, including without limitation the rights |
| 10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 11 | * copies of the Software, and to permit persons to whom the Software is |
| 12 | * furnished to do so, subject to the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice shall be included in |
| 15 | * all copies or substantial portions of the Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | * THE SOFTWARE. |
| 24 | */ |
| 25 | |
Peter Maydell | 757e725 | 2016-01-26 18:17:08 +0000 | [diff] [blame] | 26 | #include "qemu/osdep.h" |
Philippe Mathieu-Daudé | dcb32f1 | 2020-01-01 12:23:00 +0100 | [diff] [blame^] | 27 | #include "tcg/tcg-op.h" |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 28 | |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 29 | #define CASE_OP_32_64(x) \ |
| 30 | glue(glue(case INDEX_op_, x), _i32): \ |
| 31 | glue(glue(case INDEX_op_, x), _i64) |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 32 | |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 33 | #define CASE_OP_32_64_VEC(x) \ |
| 34 | glue(glue(case INDEX_op_, x), _i32): \ |
| 35 | glue(glue(case INDEX_op_, x), _i64): \ |
| 36 | glue(glue(case INDEX_op_, x), _vec) |
| 37 | |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 38 | struct tcg_temp_info { |
Aurelien Jarno | b41059d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 39 | bool is_const; |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 40 | TCGTemp *prev_copy; |
| 41 | TCGTemp *next_copy; |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 42 | tcg_target_ulong val; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 43 | tcg_target_ulong mask; |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 44 | }; |
| 45 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 46 | static inline struct tcg_temp_info *ts_info(TCGTemp *ts) |
Aurelien Jarno | d9c769c | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 47 | { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 48 | return ts->state_ptr; |
Aurelien Jarno | d9c769c | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 49 | } |
| 50 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 51 | static inline struct tcg_temp_info *arg_info(TCGArg arg) |
Aurelien Jarno | d9c769c | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 52 | { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 53 | return ts_info(arg_temp(arg)); |
| 54 | } |
| 55 | |
| 56 | static inline bool ts_is_const(TCGTemp *ts) |
| 57 | { |
| 58 | return ts_info(ts)->is_const; |
| 59 | } |
| 60 | |
| 61 | static inline bool arg_is_const(TCGArg arg) |
| 62 | { |
| 63 | return ts_is_const(arg_temp(arg)); |
| 64 | } |
| 65 | |
| 66 | static inline bool ts_is_copy(TCGTemp *ts) |
| 67 | { |
| 68 | return ts_info(ts)->next_copy != ts; |
Aurelien Jarno | d9c769c | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 69 | } |
| 70 | |
Aurelien Jarno | b41059d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 71 | /* Reset TEMP's state, possibly removing the temp for the list of copies. */ |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 72 | static void reset_ts(TCGTemp *ts) |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 73 | { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 74 | struct tcg_temp_info *ti = ts_info(ts); |
| 75 | struct tcg_temp_info *pi = ts_info(ti->prev_copy); |
| 76 | struct tcg_temp_info *ni = ts_info(ti->next_copy); |
| 77 | |
| 78 | ni->prev_copy = ti->prev_copy; |
| 79 | pi->next_copy = ti->next_copy; |
| 80 | ti->next_copy = ts; |
| 81 | ti->prev_copy = ts; |
| 82 | ti->is_const = false; |
| 83 | ti->mask = -1; |
| 84 | } |
| 85 | |
| 86 | static void reset_temp(TCGArg arg) |
| 87 | { |
| 88 | reset_ts(arg_temp(arg)); |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 89 | } |
| 90 | |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 91 | /* Initialize and activate a temporary. */ |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 92 | static void init_ts_info(struct tcg_temp_info *infos, |
| 93 | TCGTempSet *temps_used, TCGTemp *ts) |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 94 | { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 95 | size_t idx = temp_idx(ts); |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 96 | if (!test_bit(idx, temps_used->l)) { |
| 97 | struct tcg_temp_info *ti = &infos[idx]; |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 98 | |
| 99 | ts->state_ptr = ti; |
| 100 | ti->next_copy = ts; |
| 101 | ti->prev_copy = ts; |
| 102 | ti->is_const = false; |
| 103 | ti->mask = -1; |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 104 | set_bit(idx, temps_used->l); |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 105 | } |
| 106 | } |
| 107 | |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 108 | static void init_arg_info(struct tcg_temp_info *infos, |
| 109 | TCGTempSet *temps_used, TCGArg arg) |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 110 | { |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 111 | init_ts_info(infos, temps_used, arg_temp(arg)); |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 112 | } |
| 113 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 114 | static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts) |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 115 | { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 116 | TCGTemp *i; |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 117 | |
| 118 | /* If this is already a global, we can't do better. */ |
Richard Henderson | fa477d2 | 2016-11-02 11:20:15 -0600 | [diff] [blame] | 119 | if (ts->temp_global) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 120 | return ts; |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 121 | } |
| 122 | |
| 123 | /* Search for a global first. */ |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 124 | for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) { |
| 125 | if (i->temp_global) { |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 126 | return i; |
| 127 | } |
| 128 | } |
| 129 | |
| 130 | /* If it is a temp, search for a temp local. */ |
Richard Henderson | fa477d2 | 2016-11-02 11:20:15 -0600 | [diff] [blame] | 131 | if (!ts->temp_local) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 132 | for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) { |
| 133 | if (ts->temp_local) { |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 134 | return i; |
| 135 | } |
| 136 | } |
| 137 | } |
| 138 | |
| 139 | /* Failure to find a better representation, return the same temp. */ |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 140 | return ts; |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 141 | } |
| 142 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 143 | static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2) |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 144 | { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 145 | TCGTemp *i; |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 146 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 147 | if (ts1 == ts2) { |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 148 | return true; |
| 149 | } |
| 150 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 151 | if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) { |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 152 | return false; |
| 153 | } |
| 154 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 155 | for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) { |
| 156 | if (i == ts2) { |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 157 | return true; |
| 158 | } |
| 159 | } |
| 160 | |
| 161 | return false; |
| 162 | } |
| 163 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 164 | static bool args_are_copies(TCGArg arg1, TCGArg arg2) |
| 165 | { |
| 166 | return ts_are_copies(arg_temp(arg1), arg_temp(arg2)); |
| 167 | } |
| 168 | |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 169 | static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val) |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 170 | { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 171 | const TCGOpDef *def; |
| 172 | TCGOpcode new_op; |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 173 | tcg_target_ulong mask; |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 174 | struct tcg_temp_info *di = arg_info(dst); |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 175 | |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 176 | def = &tcg_op_defs[op->opc]; |
| 177 | if (def->flags & TCG_OPF_VECTOR) { |
| 178 | new_op = INDEX_op_dupi_vec; |
| 179 | } else if (def->flags & TCG_OPF_64BIT) { |
| 180 | new_op = INDEX_op_movi_i64; |
| 181 | } else { |
| 182 | new_op = INDEX_op_movi_i32; |
| 183 | } |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 184 | op->opc = new_op; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 185 | /* TCGOP_VECL and TCGOP_VECE remain unchanged. */ |
| 186 | op->args[0] = dst; |
| 187 | op->args[1] = val; |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 188 | |
| 189 | reset_temp(dst); |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 190 | di->is_const = true; |
| 191 | di->val = val; |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 192 | mask = val; |
Aurelien Jarno | 9615212 | 2015-07-10 18:03:30 +0200 | [diff] [blame] | 193 | if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) { |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 194 | /* High bits of the destination are now garbage. */ |
| 195 | mask |= ~0xffffffffull; |
| 196 | } |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 197 | di->mask = mask; |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 198 | } |
| 199 | |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 200 | static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src) |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 201 | { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 202 | TCGTemp *dst_ts = arg_temp(dst); |
| 203 | TCGTemp *src_ts = arg_temp(src); |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 204 | const TCGOpDef *def; |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 205 | struct tcg_temp_info *di; |
| 206 | struct tcg_temp_info *si; |
| 207 | tcg_target_ulong mask; |
| 208 | TCGOpcode new_op; |
| 209 | |
| 210 | if (ts_are_copies(dst_ts, src_ts)) { |
Aurelien Jarno | 5365718 | 2015-06-04 21:53:25 +0200 | [diff] [blame] | 211 | tcg_op_remove(s, op); |
| 212 | return; |
| 213 | } |
| 214 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 215 | reset_ts(dst_ts); |
| 216 | di = ts_info(dst_ts); |
| 217 | si = ts_info(src_ts); |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 218 | def = &tcg_op_defs[op->opc]; |
| 219 | if (def->flags & TCG_OPF_VECTOR) { |
| 220 | new_op = INDEX_op_mov_vec; |
| 221 | } else if (def->flags & TCG_OPF_64BIT) { |
| 222 | new_op = INDEX_op_mov_i64; |
| 223 | } else { |
| 224 | new_op = INDEX_op_mov_i32; |
| 225 | } |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 226 | op->opc = new_op; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 227 | /* TCGOP_VECL and TCGOP_VECE remain unchanged. */ |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 228 | op->args[0] = dst; |
| 229 | op->args[1] = src; |
Richard Henderson | a62f6f5 | 2014-05-22 10:59:12 -0700 | [diff] [blame] | 230 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 231 | mask = si->mask; |
Richard Henderson | 24666ba | 2014-05-22 11:14:10 -0700 | [diff] [blame] | 232 | if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) { |
| 233 | /* High bits of the destination are now garbage. */ |
| 234 | mask |= ~0xffffffffull; |
| 235 | } |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 236 | di->mask = mask; |
Richard Henderson | 24666ba | 2014-05-22 11:14:10 -0700 | [diff] [blame] | 237 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 238 | if (src_ts->type == dst_ts->type) { |
| 239 | struct tcg_temp_info *ni = ts_info(si->next_copy); |
| 240 | |
| 241 | di->next_copy = si->next_copy; |
| 242 | di->prev_copy = src_ts; |
| 243 | ni->prev_copy = dst_ts; |
| 244 | si->next_copy = dst_ts; |
| 245 | di->is_const = si->is_const; |
| 246 | di->val = si->val; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 247 | } |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 248 | } |
| 249 | |
Blue Swirl | fe0de7a | 2011-07-30 19:18:32 +0000 | [diff] [blame] | 250 | static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 251 | { |
Richard Henderson | 0327152 | 2013-08-14 14:35:56 -0700 | [diff] [blame] | 252 | uint64_t l64, h64; |
| 253 | |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 254 | switch (op) { |
| 255 | CASE_OP_32_64(add): |
| 256 | return x + y; |
| 257 | |
| 258 | CASE_OP_32_64(sub): |
| 259 | return x - y; |
| 260 | |
| 261 | CASE_OP_32_64(mul): |
| 262 | return x * y; |
| 263 | |
Kirill Batuzov | 9a81090 | 2011-07-07 16:37:15 +0400 | [diff] [blame] | 264 | CASE_OP_32_64(and): |
| 265 | return x & y; |
| 266 | |
| 267 | CASE_OP_32_64(or): |
| 268 | return x | y; |
| 269 | |
| 270 | CASE_OP_32_64(xor): |
| 271 | return x ^ y; |
| 272 | |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 273 | case INDEX_op_shl_i32: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 274 | return (uint32_t)x << (y & 31); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 275 | |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 276 | case INDEX_op_shl_i64: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 277 | return (uint64_t)x << (y & 63); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 278 | |
| 279 | case INDEX_op_shr_i32: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 280 | return (uint32_t)x >> (y & 31); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 281 | |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 282 | case INDEX_op_shr_i64: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 283 | return (uint64_t)x >> (y & 63); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 284 | |
| 285 | case INDEX_op_sar_i32: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 286 | return (int32_t)x >> (y & 31); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 287 | |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 288 | case INDEX_op_sar_i64: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 289 | return (int64_t)x >> (y & 63); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 290 | |
| 291 | case INDEX_op_rotr_i32: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 292 | return ror32(x, y & 31); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 293 | |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 294 | case INDEX_op_rotr_i64: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 295 | return ror64(x, y & 63); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 296 | |
| 297 | case INDEX_op_rotl_i32: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 298 | return rol32(x, y & 31); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 299 | |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 300 | case INDEX_op_rotl_i64: |
Richard Henderson | 50c5c4d | 2014-03-18 07:45:39 -0700 | [diff] [blame] | 301 | return rol64(x, y & 63); |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 302 | |
Richard Henderson | 25c4d9c | 2011-08-17 14:11:46 -0700 | [diff] [blame] | 303 | CASE_OP_32_64(not): |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 304 | return ~x; |
| 305 | |
Richard Henderson | cb25c80 | 2011-08-17 14:11:47 -0700 | [diff] [blame] | 306 | CASE_OP_32_64(neg): |
| 307 | return -x; |
| 308 | |
| 309 | CASE_OP_32_64(andc): |
| 310 | return x & ~y; |
| 311 | |
| 312 | CASE_OP_32_64(orc): |
| 313 | return x | ~y; |
| 314 | |
| 315 | CASE_OP_32_64(eqv): |
| 316 | return ~(x ^ y); |
| 317 | |
| 318 | CASE_OP_32_64(nand): |
| 319 | return ~(x & y); |
| 320 | |
| 321 | CASE_OP_32_64(nor): |
| 322 | return ~(x | y); |
| 323 | |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 324 | case INDEX_op_clz_i32: |
| 325 | return (uint32_t)x ? clz32(x) : y; |
| 326 | |
| 327 | case INDEX_op_clz_i64: |
| 328 | return x ? clz64(x) : y; |
| 329 | |
| 330 | case INDEX_op_ctz_i32: |
| 331 | return (uint32_t)x ? ctz32(x) : y; |
| 332 | |
| 333 | case INDEX_op_ctz_i64: |
| 334 | return x ? ctz64(x) : y; |
| 335 | |
Richard Henderson | a768e4e | 2016-11-21 11:13:39 +0100 | [diff] [blame] | 336 | case INDEX_op_ctpop_i32: |
| 337 | return ctpop32(x); |
| 338 | |
| 339 | case INDEX_op_ctpop_i64: |
| 340 | return ctpop64(x); |
| 341 | |
Richard Henderson | 25c4d9c | 2011-08-17 14:11:46 -0700 | [diff] [blame] | 342 | CASE_OP_32_64(ext8s): |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 343 | return (int8_t)x; |
| 344 | |
Richard Henderson | 25c4d9c | 2011-08-17 14:11:46 -0700 | [diff] [blame] | 345 | CASE_OP_32_64(ext16s): |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 346 | return (int16_t)x; |
| 347 | |
Richard Henderson | 25c4d9c | 2011-08-17 14:11:46 -0700 | [diff] [blame] | 348 | CASE_OP_32_64(ext8u): |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 349 | return (uint8_t)x; |
| 350 | |
Richard Henderson | 25c4d9c | 2011-08-17 14:11:46 -0700 | [diff] [blame] | 351 | CASE_OP_32_64(ext16u): |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 352 | return (uint16_t)x; |
| 353 | |
Richard Henderson | 6498594 | 2018-11-20 08:53:34 +0100 | [diff] [blame] | 354 | CASE_OP_32_64(bswap16): |
| 355 | return bswap16(x); |
| 356 | |
| 357 | CASE_OP_32_64(bswap32): |
| 358 | return bswap32(x); |
| 359 | |
| 360 | case INDEX_op_bswap64_i64: |
| 361 | return bswap64(x); |
| 362 | |
Aurelien Jarno | 8bcb5c8 | 2015-07-27 12:41:45 +0200 | [diff] [blame] | 363 | case INDEX_op_ext_i32_i64: |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 364 | case INDEX_op_ext32s_i64: |
| 365 | return (int32_t)x; |
| 366 | |
Aurelien Jarno | 8bcb5c8 | 2015-07-27 12:41:45 +0200 | [diff] [blame] | 367 | case INDEX_op_extu_i32_i64: |
Richard Henderson | 609ad70 | 2015-07-24 07:16:00 -0700 | [diff] [blame] | 368 | case INDEX_op_extrl_i64_i32: |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 369 | case INDEX_op_ext32u_i64: |
| 370 | return (uint32_t)x; |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 371 | |
Richard Henderson | 609ad70 | 2015-07-24 07:16:00 -0700 | [diff] [blame] | 372 | case INDEX_op_extrh_i64_i32: |
| 373 | return (uint64_t)x >> 32; |
| 374 | |
Richard Henderson | 0327152 | 2013-08-14 14:35:56 -0700 | [diff] [blame] | 375 | case INDEX_op_muluh_i32: |
| 376 | return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32; |
| 377 | case INDEX_op_mulsh_i32: |
| 378 | return ((int64_t)(int32_t)x * (int32_t)y) >> 32; |
| 379 | |
| 380 | case INDEX_op_muluh_i64: |
| 381 | mulu64(&l64, &h64, x, y); |
| 382 | return h64; |
| 383 | case INDEX_op_mulsh_i64: |
| 384 | muls64(&l64, &h64, x, y); |
| 385 | return h64; |
| 386 | |
Richard Henderson | 01547f7 | 2013-08-14 15:22:46 -0700 | [diff] [blame] | 387 | case INDEX_op_div_i32: |
| 388 | /* Avoid crashing on divide by zero, otherwise undefined. */ |
| 389 | return (int32_t)x / ((int32_t)y ? : 1); |
| 390 | case INDEX_op_divu_i32: |
| 391 | return (uint32_t)x / ((uint32_t)y ? : 1); |
| 392 | case INDEX_op_div_i64: |
| 393 | return (int64_t)x / ((int64_t)y ? : 1); |
| 394 | case INDEX_op_divu_i64: |
| 395 | return (uint64_t)x / ((uint64_t)y ? : 1); |
| 396 | |
| 397 | case INDEX_op_rem_i32: |
| 398 | return (int32_t)x % ((int32_t)y ? : 1); |
| 399 | case INDEX_op_remu_i32: |
| 400 | return (uint32_t)x % ((uint32_t)y ? : 1); |
| 401 | case INDEX_op_rem_i64: |
| 402 | return (int64_t)x % ((int64_t)y ? : 1); |
| 403 | case INDEX_op_remu_i64: |
| 404 | return (uint64_t)x % ((uint64_t)y ? : 1); |
| 405 | |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 406 | default: |
| 407 | fprintf(stderr, |
| 408 | "Unrecognized operation %d in do_constant_folding.\n", op); |
| 409 | tcg_abort(); |
| 410 | } |
| 411 | } |
| 412 | |
Blue Swirl | fe0de7a | 2011-07-30 19:18:32 +0000 | [diff] [blame] | 413 | static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y) |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 414 | { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 415 | const TCGOpDef *def = &tcg_op_defs[op]; |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 416 | TCGArg res = do_constant_folding_2(op, x, y); |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 417 | if (!(def->flags & TCG_OPF_64BIT)) { |
Aurelien Jarno | 29f3ff8 | 2015-07-10 18:03:31 +0200 | [diff] [blame] | 418 | res = (int32_t)res; |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 419 | } |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 420 | return res; |
| 421 | } |
| 422 | |
Richard Henderson | 9519da7 | 2012-10-02 11:32:26 -0700 | [diff] [blame] | 423 | static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c) |
| 424 | { |
| 425 | switch (c) { |
| 426 | case TCG_COND_EQ: |
| 427 | return x == y; |
| 428 | case TCG_COND_NE: |
| 429 | return x != y; |
| 430 | case TCG_COND_LT: |
| 431 | return (int32_t)x < (int32_t)y; |
| 432 | case TCG_COND_GE: |
| 433 | return (int32_t)x >= (int32_t)y; |
| 434 | case TCG_COND_LE: |
| 435 | return (int32_t)x <= (int32_t)y; |
| 436 | case TCG_COND_GT: |
| 437 | return (int32_t)x > (int32_t)y; |
| 438 | case TCG_COND_LTU: |
| 439 | return x < y; |
| 440 | case TCG_COND_GEU: |
| 441 | return x >= y; |
| 442 | case TCG_COND_LEU: |
| 443 | return x <= y; |
| 444 | case TCG_COND_GTU: |
| 445 | return x > y; |
| 446 | default: |
| 447 | tcg_abort(); |
| 448 | } |
| 449 | } |
| 450 | |
| 451 | static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c) |
| 452 | { |
| 453 | switch (c) { |
| 454 | case TCG_COND_EQ: |
| 455 | return x == y; |
| 456 | case TCG_COND_NE: |
| 457 | return x != y; |
| 458 | case TCG_COND_LT: |
| 459 | return (int64_t)x < (int64_t)y; |
| 460 | case TCG_COND_GE: |
| 461 | return (int64_t)x >= (int64_t)y; |
| 462 | case TCG_COND_LE: |
| 463 | return (int64_t)x <= (int64_t)y; |
| 464 | case TCG_COND_GT: |
| 465 | return (int64_t)x > (int64_t)y; |
| 466 | case TCG_COND_LTU: |
| 467 | return x < y; |
| 468 | case TCG_COND_GEU: |
| 469 | return x >= y; |
| 470 | case TCG_COND_LEU: |
| 471 | return x <= y; |
| 472 | case TCG_COND_GTU: |
| 473 | return x > y; |
| 474 | default: |
| 475 | tcg_abort(); |
| 476 | } |
| 477 | } |
| 478 | |
| 479 | static bool do_constant_folding_cond_eq(TCGCond c) |
| 480 | { |
| 481 | switch (c) { |
| 482 | case TCG_COND_GT: |
| 483 | case TCG_COND_LTU: |
| 484 | case TCG_COND_LT: |
| 485 | case TCG_COND_GTU: |
| 486 | case TCG_COND_NE: |
| 487 | return 0; |
| 488 | case TCG_COND_GE: |
| 489 | case TCG_COND_GEU: |
| 490 | case TCG_COND_LE: |
| 491 | case TCG_COND_LEU: |
| 492 | case TCG_COND_EQ: |
| 493 | return 1; |
| 494 | default: |
| 495 | tcg_abort(); |
| 496 | } |
| 497 | } |
| 498 | |
Aurelien Jarno | b336ceb | 2012-09-18 19:37:00 +0200 | [diff] [blame] | 499 | /* Return 2 if the condition can't be simplified, and the result |
| 500 | of the condition (0 or 1) if it can */ |
Aurelien Jarno | f8dd19e | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 501 | static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x, |
| 502 | TCGArg y, TCGCond c) |
| 503 | { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 504 | tcg_target_ulong xv = arg_info(x)->val; |
| 505 | tcg_target_ulong yv = arg_info(y)->val; |
| 506 | if (arg_is_const(x) && arg_is_const(y)) { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 507 | const TCGOpDef *def = &tcg_op_defs[op]; |
| 508 | tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR)); |
| 509 | if (def->flags & TCG_OPF_64BIT) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 510 | return do_constant_folding_cond_64(xv, yv, c); |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 511 | } else { |
| 512 | return do_constant_folding_cond_32(xv, yv, c); |
Aurelien Jarno | f8dd19e | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 513 | } |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 514 | } else if (args_are_copies(x, y)) { |
Richard Henderson | 9519da7 | 2012-10-02 11:32:26 -0700 | [diff] [blame] | 515 | return do_constant_folding_cond_eq(c); |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 516 | } else if (arg_is_const(y) && yv == 0) { |
Aurelien Jarno | b336ceb | 2012-09-18 19:37:00 +0200 | [diff] [blame] | 517 | switch (c) { |
| 518 | case TCG_COND_LTU: |
| 519 | return 0; |
| 520 | case TCG_COND_GEU: |
| 521 | return 1; |
| 522 | default: |
| 523 | return 2; |
| 524 | } |
Aurelien Jarno | f8dd19e | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 525 | } |
Alex Bennée | 550276a | 2016-09-30 22:30:55 +0100 | [diff] [blame] | 526 | return 2; |
Aurelien Jarno | f8dd19e | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 527 | } |
| 528 | |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 529 | /* Return 2 if the condition can't be simplified, and the result |
| 530 | of the condition (0 or 1) if it can */ |
| 531 | static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c) |
| 532 | { |
| 533 | TCGArg al = p1[0], ah = p1[1]; |
| 534 | TCGArg bl = p2[0], bh = p2[1]; |
| 535 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 536 | if (arg_is_const(bl) && arg_is_const(bh)) { |
| 537 | tcg_target_ulong blv = arg_info(bl)->val; |
| 538 | tcg_target_ulong bhv = arg_info(bh)->val; |
| 539 | uint64_t b = deposit64(blv, 32, 32, bhv); |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 540 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 541 | if (arg_is_const(al) && arg_is_const(ah)) { |
| 542 | tcg_target_ulong alv = arg_info(al)->val; |
| 543 | tcg_target_ulong ahv = arg_info(ah)->val; |
| 544 | uint64_t a = deposit64(alv, 32, 32, ahv); |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 545 | return do_constant_folding_cond_64(a, b, c); |
| 546 | } |
| 547 | if (b == 0) { |
| 548 | switch (c) { |
| 549 | case TCG_COND_LTU: |
| 550 | return 0; |
| 551 | case TCG_COND_GEU: |
| 552 | return 1; |
| 553 | default: |
| 554 | break; |
| 555 | } |
| 556 | } |
| 557 | } |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 558 | if (args_are_copies(al, bl) && args_are_copies(ah, bh)) { |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 559 | return do_constant_folding_cond_eq(c); |
| 560 | } |
| 561 | return 2; |
| 562 | } |
| 563 | |
Richard Henderson | 24c9ae4 | 2012-10-02 11:32:21 -0700 | [diff] [blame] | 564 | static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2) |
| 565 | { |
| 566 | TCGArg a1 = *p1, a2 = *p2; |
| 567 | int sum = 0; |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 568 | sum += arg_is_const(a1); |
| 569 | sum -= arg_is_const(a2); |
Richard Henderson | 24c9ae4 | 2012-10-02 11:32:21 -0700 | [diff] [blame] | 570 | |
| 571 | /* Prefer the constant in second argument, and then the form |
| 572 | op a, a, b, which is better handled on non-RISC hosts. */ |
| 573 | if (sum > 0 || (sum == 0 && dest == a2)) { |
| 574 | *p1 = a2; |
| 575 | *p2 = a1; |
| 576 | return true; |
| 577 | } |
| 578 | return false; |
| 579 | } |
| 580 | |
Richard Henderson | 0bfcb86 | 2012-10-02 11:32:23 -0700 | [diff] [blame] | 581 | static bool swap_commutative2(TCGArg *p1, TCGArg *p2) |
| 582 | { |
| 583 | int sum = 0; |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 584 | sum += arg_is_const(p1[0]); |
| 585 | sum += arg_is_const(p1[1]); |
| 586 | sum -= arg_is_const(p2[0]); |
| 587 | sum -= arg_is_const(p2[1]); |
Richard Henderson | 0bfcb86 | 2012-10-02 11:32:23 -0700 | [diff] [blame] | 588 | if (sum > 0) { |
| 589 | TCGArg t; |
| 590 | t = p1[0], p1[0] = p2[0], p2[0] = t; |
| 591 | t = p1[1], p1[1] = p2[1], p2[1] = t; |
| 592 | return true; |
| 593 | } |
| 594 | return false; |
| 595 | } |
| 596 | |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 597 | /* Propagate constants and copies, fold constant expressions. */ |
Aurelien Jarno | 36e60ef | 2015-06-04 21:53:27 +0200 | [diff] [blame] | 598 | void tcg_optimize(TCGContext *s) |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 599 | { |
Richard Henderson | 15fa08f | 2017-11-02 15:19:14 +0100 | [diff] [blame] | 600 | int nb_temps, nb_globals; |
| 601 | TCGOp *op, *op_next, *prev_mb = NULL; |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 602 | struct tcg_temp_info *infos; |
| 603 | TCGTempSet temps_used; |
Richard Henderson | 5d8f536 | 2012-09-21 10:13:38 -0700 | [diff] [blame] | 604 | |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 605 | /* Array VALS has an element for each temp. |
| 606 | If this temp holds a constant then its value is kept in VALS' element. |
Aurelien Jarno | e590d4e | 2012-09-11 12:31:21 +0200 | [diff] [blame] | 607 | If this temp is a copy of other ones then the other copies are |
| 608 | available through the doubly linked circular list. */ |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 609 | |
| 610 | nb_temps = s->nb_temps; |
| 611 | nb_globals = s->nb_globals; |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 612 | bitmap_zero(temps_used.l, nb_temps); |
| 613 | infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps); |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 614 | |
Richard Henderson | 15fa08f | 2017-11-02 15:19:14 +0100 | [diff] [blame] | 615 | QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) { |
Richard Henderson | 24666ba | 2014-05-22 11:14:10 -0700 | [diff] [blame] | 616 | tcg_target_ulong mask, partmask, affected; |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 617 | int nb_oargs, nb_iargs, i; |
Richard Henderson | cf06667 | 2014-03-22 20:06:52 -0700 | [diff] [blame] | 618 | TCGArg tmp; |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 619 | TCGOpcode opc = op->opc; |
| 620 | const TCGOpDef *def = &tcg_op_defs[opc]; |
| 621 | |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 622 | /* Count the arguments, and initialize the temps that are |
| 623 | going to be used */ |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 624 | if (opc == INDEX_op_call) { |
Richard Henderson | cd9090a | 2017-11-14 13:02:51 +0100 | [diff] [blame] | 625 | nb_oargs = TCGOP_CALLO(op); |
| 626 | nb_iargs = TCGOP_CALLI(op); |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 627 | for (i = 0; i < nb_oargs + nb_iargs; i++) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 628 | TCGTemp *ts = arg_temp(op->args[i]); |
| 629 | if (ts) { |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 630 | init_ts_info(infos, &temps_used, ts); |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 631 | } |
| 632 | } |
Aurelien Jarno | 1ff8c54 | 2012-09-11 16:18:49 +0200 | [diff] [blame] | 633 | } else { |
Richard Henderson | cf06667 | 2014-03-22 20:06:52 -0700 | [diff] [blame] | 634 | nb_oargs = def->nb_oargs; |
| 635 | nb_iargs = def->nb_iargs; |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 636 | for (i = 0; i < nb_oargs + nb_iargs; i++) { |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 637 | init_arg_info(infos, &temps_used, op->args[i]); |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 638 | } |
Richard Henderson | cf06667 | 2014-03-22 20:06:52 -0700 | [diff] [blame] | 639 | } |
| 640 | |
| 641 | /* Do copy propagation */ |
| 642 | for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 643 | TCGTemp *ts = arg_temp(op->args[i]); |
| 644 | if (ts && ts_is_copy(ts)) { |
| 645 | op->args[i] = temp_arg(find_better_copy(s, ts)); |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 646 | } |
| 647 | } |
| 648 | |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 649 | /* For commutative operations make constant second argument */ |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 650 | switch (opc) { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 651 | CASE_OP_32_64_VEC(add): |
| 652 | CASE_OP_32_64_VEC(mul): |
| 653 | CASE_OP_32_64_VEC(and): |
| 654 | CASE_OP_32_64_VEC(or): |
| 655 | CASE_OP_32_64_VEC(xor): |
Richard Henderson | cb25c80 | 2011-08-17 14:11:47 -0700 | [diff] [blame] | 656 | CASE_OP_32_64(eqv): |
| 657 | CASE_OP_32_64(nand): |
| 658 | CASE_OP_32_64(nor): |
Richard Henderson | 0327152 | 2013-08-14 14:35:56 -0700 | [diff] [blame] | 659 | CASE_OP_32_64(muluh): |
| 660 | CASE_OP_32_64(mulsh): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 661 | swap_commutative(op->args[0], &op->args[1], &op->args[2]); |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 662 | break; |
Aurelien Jarno | 65a7cce | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 663 | CASE_OP_32_64(brcond): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 664 | if (swap_commutative(-1, &op->args[0], &op->args[1])) { |
| 665 | op->args[2] = tcg_swap_cond(op->args[2]); |
Aurelien Jarno | 65a7cce | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 666 | } |
| 667 | break; |
| 668 | CASE_OP_32_64(setcond): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 669 | if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) { |
| 670 | op->args[3] = tcg_swap_cond(op->args[3]); |
Aurelien Jarno | 65a7cce | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 671 | } |
| 672 | break; |
Richard Henderson | fa01a20 | 2012-09-21 10:13:37 -0700 | [diff] [blame] | 673 | CASE_OP_32_64(movcond): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 674 | if (swap_commutative(-1, &op->args[1], &op->args[2])) { |
| 675 | op->args[5] = tcg_swap_cond(op->args[5]); |
Richard Henderson | fa01a20 | 2012-09-21 10:13:37 -0700 | [diff] [blame] | 676 | } |
Richard Henderson | 5d8f536 | 2012-09-21 10:13:38 -0700 | [diff] [blame] | 677 | /* For movcond, we canonicalize the "false" input reg to match |
| 678 | the destination reg so that the tcg backend can implement |
| 679 | a "move if true" operation. */ |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 680 | if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) { |
| 681 | op->args[5] = tcg_invert_cond(op->args[5]); |
Richard Henderson | 5d8f536 | 2012-09-21 10:13:38 -0700 | [diff] [blame] | 682 | } |
Richard Henderson | 1e484e6 | 2012-10-02 11:32:22 -0700 | [diff] [blame] | 683 | break; |
Richard Henderson | d7156f7 | 2013-02-19 23:51:52 -0800 | [diff] [blame] | 684 | CASE_OP_32_64(add2): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 685 | swap_commutative(op->args[0], &op->args[2], &op->args[4]); |
| 686 | swap_commutative(op->args[1], &op->args[3], &op->args[5]); |
Richard Henderson | 1e484e6 | 2012-10-02 11:32:22 -0700 | [diff] [blame] | 687 | break; |
Richard Henderson | d7156f7 | 2013-02-19 23:51:52 -0800 | [diff] [blame] | 688 | CASE_OP_32_64(mulu2): |
Richard Henderson | 4d3203f | 2013-02-19 23:51:53 -0800 | [diff] [blame] | 689 | CASE_OP_32_64(muls2): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 690 | swap_commutative(op->args[0], &op->args[2], &op->args[3]); |
Richard Henderson | 1414968 | 2012-10-02 11:32:30 -0700 | [diff] [blame] | 691 | break; |
Richard Henderson | 0bfcb86 | 2012-10-02 11:32:23 -0700 | [diff] [blame] | 692 | case INDEX_op_brcond2_i32: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 693 | if (swap_commutative2(&op->args[0], &op->args[2])) { |
| 694 | op->args[4] = tcg_swap_cond(op->args[4]); |
Richard Henderson | 0bfcb86 | 2012-10-02 11:32:23 -0700 | [diff] [blame] | 695 | } |
| 696 | break; |
| 697 | case INDEX_op_setcond2_i32: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 698 | if (swap_commutative2(&op->args[1], &op->args[3])) { |
| 699 | op->args[5] = tcg_swap_cond(op->args[5]); |
Richard Henderson | 0bfcb86 | 2012-10-02 11:32:23 -0700 | [diff] [blame] | 700 | } |
| 701 | break; |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 702 | default: |
| 703 | break; |
| 704 | } |
| 705 | |
Richard Henderson | 2d49754 | 2013-03-21 09:13:33 -0700 | [diff] [blame] | 706 | /* Simplify expressions for "shift/rot r, 0, a => movi r, 0", |
| 707 | and "sub r, 0, a => neg r, a" case. */ |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 708 | switch (opc) { |
Aurelien Jarno | 01ee528 | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 709 | CASE_OP_32_64(shl): |
| 710 | CASE_OP_32_64(shr): |
| 711 | CASE_OP_32_64(sar): |
| 712 | CASE_OP_32_64(rotl): |
| 713 | CASE_OP_32_64(rotr): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 714 | if (arg_is_const(op->args[1]) |
| 715 | && arg_info(op->args[1])->val == 0) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 716 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
Aurelien Jarno | 01ee528 | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 717 | continue; |
| 718 | } |
| 719 | break; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 720 | CASE_OP_32_64_VEC(sub): |
Richard Henderson | 2d49754 | 2013-03-21 09:13:33 -0700 | [diff] [blame] | 721 | { |
| 722 | TCGOpcode neg_op; |
| 723 | bool have_neg; |
| 724 | |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 725 | if (arg_is_const(op->args[2])) { |
Richard Henderson | 2d49754 | 2013-03-21 09:13:33 -0700 | [diff] [blame] | 726 | /* Proceed with possible constant folding. */ |
| 727 | break; |
| 728 | } |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 729 | if (opc == INDEX_op_sub_i32) { |
Richard Henderson | 2d49754 | 2013-03-21 09:13:33 -0700 | [diff] [blame] | 730 | neg_op = INDEX_op_neg_i32; |
| 731 | have_neg = TCG_TARGET_HAS_neg_i32; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 732 | } else if (opc == INDEX_op_sub_i64) { |
Richard Henderson | 2d49754 | 2013-03-21 09:13:33 -0700 | [diff] [blame] | 733 | neg_op = INDEX_op_neg_i64; |
| 734 | have_neg = TCG_TARGET_HAS_neg_i64; |
Richard Henderson | ac383dd | 2019-04-20 00:27:24 +0000 | [diff] [blame] | 735 | } else if (TCG_TARGET_HAS_neg_vec) { |
| 736 | TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64; |
| 737 | unsigned vece = TCGOP_VECE(op); |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 738 | neg_op = INDEX_op_neg_vec; |
Richard Henderson | ac383dd | 2019-04-20 00:27:24 +0000 | [diff] [blame] | 739 | have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0; |
| 740 | } else { |
| 741 | break; |
Richard Henderson | 2d49754 | 2013-03-21 09:13:33 -0700 | [diff] [blame] | 742 | } |
| 743 | if (!have_neg) { |
| 744 | break; |
| 745 | } |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 746 | if (arg_is_const(op->args[1]) |
| 747 | && arg_info(op->args[1])->val == 0) { |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 748 | op->opc = neg_op; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 749 | reset_temp(op->args[0]); |
| 750 | op->args[1] = op->args[2]; |
Richard Henderson | 2d49754 | 2013-03-21 09:13:33 -0700 | [diff] [blame] | 751 | continue; |
| 752 | } |
| 753 | } |
| 754 | break; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 755 | CASE_OP_32_64_VEC(xor): |
Richard Henderson | e201b56 | 2014-01-28 13:15:38 -0800 | [diff] [blame] | 756 | CASE_OP_32_64(nand): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 757 | if (!arg_is_const(op->args[1]) |
| 758 | && arg_is_const(op->args[2]) |
| 759 | && arg_info(op->args[2])->val == -1) { |
Richard Henderson | e201b56 | 2014-01-28 13:15:38 -0800 | [diff] [blame] | 760 | i = 1; |
| 761 | goto try_not; |
| 762 | } |
| 763 | break; |
| 764 | CASE_OP_32_64(nor): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 765 | if (!arg_is_const(op->args[1]) |
| 766 | && arg_is_const(op->args[2]) |
| 767 | && arg_info(op->args[2])->val == 0) { |
Richard Henderson | e201b56 | 2014-01-28 13:15:38 -0800 | [diff] [blame] | 768 | i = 1; |
| 769 | goto try_not; |
| 770 | } |
| 771 | break; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 772 | CASE_OP_32_64_VEC(andc): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 773 | if (!arg_is_const(op->args[2]) |
| 774 | && arg_is_const(op->args[1]) |
| 775 | && arg_info(op->args[1])->val == -1) { |
Richard Henderson | e201b56 | 2014-01-28 13:15:38 -0800 | [diff] [blame] | 776 | i = 2; |
| 777 | goto try_not; |
| 778 | } |
| 779 | break; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 780 | CASE_OP_32_64_VEC(orc): |
Richard Henderson | e201b56 | 2014-01-28 13:15:38 -0800 | [diff] [blame] | 781 | CASE_OP_32_64(eqv): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 782 | if (!arg_is_const(op->args[2]) |
| 783 | && arg_is_const(op->args[1]) |
| 784 | && arg_info(op->args[1])->val == 0) { |
Richard Henderson | e201b56 | 2014-01-28 13:15:38 -0800 | [diff] [blame] | 785 | i = 2; |
| 786 | goto try_not; |
| 787 | } |
| 788 | break; |
| 789 | try_not: |
| 790 | { |
| 791 | TCGOpcode not_op; |
| 792 | bool have_not; |
| 793 | |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 794 | if (def->flags & TCG_OPF_VECTOR) { |
| 795 | not_op = INDEX_op_not_vec; |
| 796 | have_not = TCG_TARGET_HAS_not_vec; |
| 797 | } else if (def->flags & TCG_OPF_64BIT) { |
Richard Henderson | e201b56 | 2014-01-28 13:15:38 -0800 | [diff] [blame] | 798 | not_op = INDEX_op_not_i64; |
| 799 | have_not = TCG_TARGET_HAS_not_i64; |
| 800 | } else { |
| 801 | not_op = INDEX_op_not_i32; |
| 802 | have_not = TCG_TARGET_HAS_not_i32; |
| 803 | } |
| 804 | if (!have_not) { |
| 805 | break; |
| 806 | } |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 807 | op->opc = not_op; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 808 | reset_temp(op->args[0]); |
| 809 | op->args[1] = op->args[i]; |
Richard Henderson | e201b56 | 2014-01-28 13:15:38 -0800 | [diff] [blame] | 810 | continue; |
| 811 | } |
Aurelien Jarno | 01ee528 | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 812 | default: |
| 813 | break; |
| 814 | } |
| 815 | |
Richard Henderson | 464a144 | 2014-01-31 07:42:11 -0600 | [diff] [blame] | 816 | /* Simplify expression for "op r, a, const => mov r, a" cases */ |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 817 | switch (opc) { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 818 | CASE_OP_32_64_VEC(add): |
| 819 | CASE_OP_32_64_VEC(sub): |
| 820 | CASE_OP_32_64_VEC(or): |
| 821 | CASE_OP_32_64_VEC(xor): |
| 822 | CASE_OP_32_64_VEC(andc): |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 823 | CASE_OP_32_64(shl): |
| 824 | CASE_OP_32_64(shr): |
| 825 | CASE_OP_32_64(sar): |
Richard Henderson | 25c4d9c | 2011-08-17 14:11:46 -0700 | [diff] [blame] | 826 | CASE_OP_32_64(rotl): |
| 827 | CASE_OP_32_64(rotr): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 828 | if (!arg_is_const(op->args[1]) |
| 829 | && arg_is_const(op->args[2]) |
| 830 | && arg_info(op->args[2])->val == 0) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 831 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 832 | continue; |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 833 | } |
| 834 | break; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 835 | CASE_OP_32_64_VEC(and): |
| 836 | CASE_OP_32_64_VEC(orc): |
Richard Henderson | 464a144 | 2014-01-31 07:42:11 -0600 | [diff] [blame] | 837 | CASE_OP_32_64(eqv): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 838 | if (!arg_is_const(op->args[1]) |
| 839 | && arg_is_const(op->args[2]) |
| 840 | && arg_info(op->args[2])->val == -1) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 841 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 842 | continue; |
Richard Henderson | 464a144 | 2014-01-31 07:42:11 -0600 | [diff] [blame] | 843 | } |
| 844 | break; |
Aurelien Jarno | 56e4943 | 2012-09-06 16:47:13 +0200 | [diff] [blame] | 845 | default: |
| 846 | break; |
| 847 | } |
| 848 | |
Aurelien Jarno | 3031244 | 2013-09-03 08:27:38 +0200 | [diff] [blame] | 849 | /* Simplify using known-zero bits. Currently only ops with a single |
| 850 | output argument is supported. */ |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 851 | mask = -1; |
Paolo Bonzini | 633f650 | 2013-01-11 15:42:53 -0800 | [diff] [blame] | 852 | affected = -1; |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 853 | switch (opc) { |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 854 | CASE_OP_32_64(ext8s): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 855 | if ((arg_info(op->args[1])->mask & 0x80) != 0) { |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 856 | break; |
| 857 | } |
| 858 | CASE_OP_32_64(ext8u): |
| 859 | mask = 0xff; |
| 860 | goto and_const; |
| 861 | CASE_OP_32_64(ext16s): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 862 | if ((arg_info(op->args[1])->mask & 0x8000) != 0) { |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 863 | break; |
| 864 | } |
| 865 | CASE_OP_32_64(ext16u): |
| 866 | mask = 0xffff; |
| 867 | goto and_const; |
| 868 | case INDEX_op_ext32s_i64: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 869 | if ((arg_info(op->args[1])->mask & 0x80000000) != 0) { |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 870 | break; |
| 871 | } |
| 872 | case INDEX_op_ext32u_i64: |
| 873 | mask = 0xffffffffU; |
| 874 | goto and_const; |
| 875 | |
| 876 | CASE_OP_32_64(and): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 877 | mask = arg_info(op->args[2])->mask; |
| 878 | if (arg_is_const(op->args[2])) { |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 879 | and_const: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 880 | affected = arg_info(op->args[1])->mask & ~mask; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 881 | } |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 882 | mask = arg_info(op->args[1])->mask & mask; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 883 | break; |
| 884 | |
Aurelien Jarno | 8bcb5c8 | 2015-07-27 12:41:45 +0200 | [diff] [blame] | 885 | case INDEX_op_ext_i32_i64: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 886 | if ((arg_info(op->args[1])->mask & 0x80000000) != 0) { |
Aurelien Jarno | 8bcb5c8 | 2015-07-27 12:41:45 +0200 | [diff] [blame] | 887 | break; |
| 888 | } |
| 889 | case INDEX_op_extu_i32_i64: |
| 890 | /* We do not compute affected as it is a size changing op. */ |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 891 | mask = (uint32_t)arg_info(op->args[1])->mask; |
Aurelien Jarno | 8bcb5c8 | 2015-07-27 12:41:45 +0200 | [diff] [blame] | 892 | break; |
| 893 | |
Richard Henderson | 23ec69ed | 2014-01-28 12:03:24 -0800 | [diff] [blame] | 894 | CASE_OP_32_64(andc): |
| 895 | /* Known-zeros does not imply known-ones. Therefore unless |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 896 | op->args[2] is constant, we can't infer anything from it. */ |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 897 | if (arg_is_const(op->args[2])) { |
| 898 | mask = ~arg_info(op->args[2])->mask; |
Richard Henderson | 23ec69ed | 2014-01-28 12:03:24 -0800 | [diff] [blame] | 899 | goto and_const; |
| 900 | } |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 901 | /* But we certainly know nothing outside args[1] may be set. */ |
| 902 | mask = arg_info(op->args[1])->mask; |
Richard Henderson | 23ec69ed | 2014-01-28 12:03:24 -0800 | [diff] [blame] | 903 | break; |
| 904 | |
Aurelien Jarno | e46b225 | 2013-09-03 08:27:38 +0200 | [diff] [blame] | 905 | case INDEX_op_sar_i32: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 906 | if (arg_is_const(op->args[2])) { |
| 907 | tmp = arg_info(op->args[2])->val & 31; |
| 908 | mask = (int32_t)arg_info(op->args[1])->mask >> tmp; |
Aurelien Jarno | e46b225 | 2013-09-03 08:27:38 +0200 | [diff] [blame] | 909 | } |
| 910 | break; |
| 911 | case INDEX_op_sar_i64: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 912 | if (arg_is_const(op->args[2])) { |
| 913 | tmp = arg_info(op->args[2])->val & 63; |
| 914 | mask = (int64_t)arg_info(op->args[1])->mask >> tmp; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 915 | } |
| 916 | break; |
| 917 | |
Aurelien Jarno | e46b225 | 2013-09-03 08:27:38 +0200 | [diff] [blame] | 918 | case INDEX_op_shr_i32: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 919 | if (arg_is_const(op->args[2])) { |
| 920 | tmp = arg_info(op->args[2])->val & 31; |
| 921 | mask = (uint32_t)arg_info(op->args[1])->mask >> tmp; |
Aurelien Jarno | e46b225 | 2013-09-03 08:27:38 +0200 | [diff] [blame] | 922 | } |
| 923 | break; |
| 924 | case INDEX_op_shr_i64: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 925 | if (arg_is_const(op->args[2])) { |
| 926 | tmp = arg_info(op->args[2])->val & 63; |
| 927 | mask = (uint64_t)arg_info(op->args[1])->mask >> tmp; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 928 | } |
| 929 | break; |
| 930 | |
Richard Henderson | 609ad70 | 2015-07-24 07:16:00 -0700 | [diff] [blame] | 931 | case INDEX_op_extrl_i64_i32: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 932 | mask = (uint32_t)arg_info(op->args[1])->mask; |
Richard Henderson | 609ad70 | 2015-07-24 07:16:00 -0700 | [diff] [blame] | 933 | break; |
| 934 | case INDEX_op_extrh_i64_i32: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 935 | mask = (uint64_t)arg_info(op->args[1])->mask >> 32; |
Richard Henderson | 4bb7a41 | 2013-09-09 17:03:24 -0700 | [diff] [blame] | 936 | break; |
| 937 | |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 938 | CASE_OP_32_64(shl): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 939 | if (arg_is_const(op->args[2])) { |
| 940 | tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1); |
| 941 | mask = arg_info(op->args[1])->mask << tmp; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 942 | } |
| 943 | break; |
| 944 | |
| 945 | CASE_OP_32_64(neg): |
| 946 | /* Set to 1 all bits to the left of the rightmost. */ |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 947 | mask = -(arg_info(op->args[1])->mask |
| 948 | & -arg_info(op->args[1])->mask); |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 949 | break; |
| 950 | |
| 951 | CASE_OP_32_64(deposit): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 952 | mask = deposit64(arg_info(op->args[1])->mask, |
| 953 | op->args[3], op->args[4], |
| 954 | arg_info(op->args[2])->mask); |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 955 | break; |
| 956 | |
Richard Henderson | 7ec8bab | 2016-10-14 12:04:32 -0500 | [diff] [blame] | 957 | CASE_OP_32_64(extract): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 958 | mask = extract64(arg_info(op->args[1])->mask, |
| 959 | op->args[2], op->args[3]); |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 960 | if (op->args[2] == 0) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 961 | affected = arg_info(op->args[1])->mask & ~mask; |
Richard Henderson | 7ec8bab | 2016-10-14 12:04:32 -0500 | [diff] [blame] | 962 | } |
| 963 | break; |
| 964 | CASE_OP_32_64(sextract): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 965 | mask = sextract64(arg_info(op->args[1])->mask, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 966 | op->args[2], op->args[3]); |
| 967 | if (op->args[2] == 0 && (tcg_target_long)mask >= 0) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 968 | affected = arg_info(op->args[1])->mask & ~mask; |
Richard Henderson | 7ec8bab | 2016-10-14 12:04:32 -0500 | [diff] [blame] | 969 | } |
| 970 | break; |
| 971 | |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 972 | CASE_OP_32_64(or): |
| 973 | CASE_OP_32_64(xor): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 974 | mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 975 | break; |
| 976 | |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 977 | case INDEX_op_clz_i32: |
| 978 | case INDEX_op_ctz_i32: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 979 | mask = arg_info(op->args[2])->mask | 31; |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 980 | break; |
| 981 | |
| 982 | case INDEX_op_clz_i64: |
| 983 | case INDEX_op_ctz_i64: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 984 | mask = arg_info(op->args[2])->mask | 63; |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 985 | break; |
| 986 | |
Richard Henderson | a768e4e | 2016-11-21 11:13:39 +0100 | [diff] [blame] | 987 | case INDEX_op_ctpop_i32: |
| 988 | mask = 32 | 31; |
| 989 | break; |
| 990 | case INDEX_op_ctpop_i64: |
| 991 | mask = 64 | 63; |
| 992 | break; |
| 993 | |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 994 | CASE_OP_32_64(setcond): |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 995 | case INDEX_op_setcond2_i32: |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 996 | mask = 1; |
| 997 | break; |
| 998 | |
| 999 | CASE_OP_32_64(movcond): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1000 | mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask; |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 1001 | break; |
| 1002 | |
Aurelien Jarno | c8d7027 | 2013-09-03 08:27:39 +0200 | [diff] [blame] | 1003 | CASE_OP_32_64(ld8u): |
Aurelien Jarno | c8d7027 | 2013-09-03 08:27:39 +0200 | [diff] [blame] | 1004 | mask = 0xff; |
| 1005 | break; |
| 1006 | CASE_OP_32_64(ld16u): |
Aurelien Jarno | c8d7027 | 2013-09-03 08:27:39 +0200 | [diff] [blame] | 1007 | mask = 0xffff; |
| 1008 | break; |
| 1009 | case INDEX_op_ld32u_i64: |
Aurelien Jarno | c8d7027 | 2013-09-03 08:27:39 +0200 | [diff] [blame] | 1010 | mask = 0xffffffffu; |
| 1011 | break; |
| 1012 | |
| 1013 | CASE_OP_32_64(qemu_ld): |
| 1014 | { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1015 | TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs]; |
Tony Nguyen | 14776ab | 2019-08-24 04:10:58 +1000 | [diff] [blame] | 1016 | MemOp mop = get_memop(oi); |
Aurelien Jarno | c8d7027 | 2013-09-03 08:27:39 +0200 | [diff] [blame] | 1017 | if (!(mop & MO_SIGN)) { |
| 1018 | mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1; |
| 1019 | } |
| 1020 | } |
| 1021 | break; |
| 1022 | |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 1023 | default: |
| 1024 | break; |
| 1025 | } |
| 1026 | |
Richard Henderson | bc8d688 | 2014-06-08 18:24:14 -0700 | [diff] [blame] | 1027 | /* 32-bit ops generate 32-bit results. For the result is zero test |
| 1028 | below, we can ignore high bits, but for further optimizations we |
| 1029 | need to record that the high bits contain garbage. */ |
Richard Henderson | 24666ba | 2014-05-22 11:14:10 -0700 | [diff] [blame] | 1030 | partmask = mask; |
Richard Henderson | bc8d688 | 2014-06-08 18:24:14 -0700 | [diff] [blame] | 1031 | if (!(def->flags & TCG_OPF_64BIT)) { |
Richard Henderson | 24666ba | 2014-05-22 11:14:10 -0700 | [diff] [blame] | 1032 | mask |= ~(tcg_target_ulong)0xffffffffu; |
| 1033 | partmask &= 0xffffffffu; |
| 1034 | affected &= 0xffffffffu; |
Aurelien Jarno | f096dc9 | 2013-09-03 08:27:38 +0200 | [diff] [blame] | 1035 | } |
| 1036 | |
Richard Henderson | 24666ba | 2014-05-22 11:14:10 -0700 | [diff] [blame] | 1037 | if (partmask == 0) { |
Aurelien Jarno | eabb7b9 | 2016-04-21 10:48:49 +0200 | [diff] [blame] | 1038 | tcg_debug_assert(nb_oargs == 1); |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1039 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
Paolo Bonzini | 633f650 | 2013-01-11 15:42:53 -0800 | [diff] [blame] | 1040 | continue; |
| 1041 | } |
| 1042 | if (affected == 0) { |
Aurelien Jarno | eabb7b9 | 2016-04-21 10:48:49 +0200 | [diff] [blame] | 1043 | tcg_debug_assert(nb_oargs == 1); |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1044 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
Paolo Bonzini | 633f650 | 2013-01-11 15:42:53 -0800 | [diff] [blame] | 1045 | continue; |
| 1046 | } |
| 1047 | |
Aurelien Jarno | 56e4943 | 2012-09-06 16:47:13 +0200 | [diff] [blame] | 1048 | /* Simplify expression for "op r, a, 0 => movi r, 0" cases */ |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1049 | switch (opc) { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 1050 | CASE_OP_32_64_VEC(and): |
| 1051 | CASE_OP_32_64_VEC(mul): |
Richard Henderson | 0327152 | 2013-08-14 14:35:56 -0700 | [diff] [blame] | 1052 | CASE_OP_32_64(muluh): |
| 1053 | CASE_OP_32_64(mulsh): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1054 | if (arg_is_const(op->args[2]) |
| 1055 | && arg_info(op->args[2])->val == 0) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1056 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 1057 | continue; |
| 1058 | } |
| 1059 | break; |
Aurelien Jarno | 56e4943 | 2012-09-06 16:47:13 +0200 | [diff] [blame] | 1060 | default: |
| 1061 | break; |
| 1062 | } |
| 1063 | |
| 1064 | /* Simplify expression for "op r, a, a => mov r, a" cases */ |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1065 | switch (opc) { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 1066 | CASE_OP_32_64_VEC(or): |
| 1067 | CASE_OP_32_64_VEC(and): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1068 | if (args_are_copies(op->args[1], op->args[2])) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1069 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
Kirill Batuzov | 9a81090 | 2011-07-07 16:37:15 +0400 | [diff] [blame] | 1070 | continue; |
| 1071 | } |
| 1072 | break; |
Blue Swirl | fe0de7a | 2011-07-30 19:18:32 +0000 | [diff] [blame] | 1073 | default: |
| 1074 | break; |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 1075 | } |
| 1076 | |
Aurelien Jarno | 3c94193 | 2012-09-18 19:12:36 +0200 | [diff] [blame] | 1077 | /* Simplify expression for "op r, a, a => movi r, 0" cases */ |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1078 | switch (opc) { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 1079 | CASE_OP_32_64_VEC(andc): |
| 1080 | CASE_OP_32_64_VEC(sub): |
| 1081 | CASE_OP_32_64_VEC(xor): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1082 | if (args_are_copies(op->args[1], op->args[2])) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1083 | tcg_opt_gen_movi(s, op, op->args[0], 0); |
Aurelien Jarno | 3c94193 | 2012-09-18 19:12:36 +0200 | [diff] [blame] | 1084 | continue; |
| 1085 | } |
| 1086 | break; |
| 1087 | default: |
| 1088 | break; |
| 1089 | } |
| 1090 | |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 1091 | /* Propagate constants through copy operations and do constant |
| 1092 | folding. Constants will be substituted to arguments by register |
| 1093 | allocator where needed and possible. Also detect copies. */ |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1094 | switch (opc) { |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 1095 | CASE_OP_32_64_VEC(mov): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1096 | tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); |
Aurelien Jarno | 97a79eb | 2015-06-05 11:19:18 +0200 | [diff] [blame] | 1097 | break; |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 1098 | CASE_OP_32_64(movi): |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 1099 | case INDEX_op_dupi_vec: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1100 | tcg_opt_gen_movi(s, op, op->args[0], op->args[1]); |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 1101 | break; |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1102 | |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 1103 | case INDEX_op_dup_vec: |
| 1104 | if (arg_is_const(op->args[1])) { |
| 1105 | tmp = arg_info(op->args[1])->val; |
| 1106 | tmp = dup_const(TCGOP_VECE(op), tmp); |
| 1107 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
Richard Henderson | 1fb57da7 | 2018-08-05 16:32:58 -0700 | [diff] [blame] | 1108 | break; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 1109 | } |
Richard Henderson | 1fb57da7 | 2018-08-05 16:32:58 -0700 | [diff] [blame] | 1110 | goto do_default; |
Richard Henderson | 170ba88 | 2017-11-22 09:07:11 +0100 | [diff] [blame] | 1111 | |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 1112 | CASE_OP_32_64(not): |
Richard Henderson | cb25c80 | 2011-08-17 14:11:47 -0700 | [diff] [blame] | 1113 | CASE_OP_32_64(neg): |
Richard Henderson | 25c4d9c | 2011-08-17 14:11:46 -0700 | [diff] [blame] | 1114 | CASE_OP_32_64(ext8s): |
| 1115 | CASE_OP_32_64(ext8u): |
| 1116 | CASE_OP_32_64(ext16s): |
| 1117 | CASE_OP_32_64(ext16u): |
Richard Henderson | a768e4e | 2016-11-21 11:13:39 +0100 | [diff] [blame] | 1118 | CASE_OP_32_64(ctpop): |
Richard Henderson | 6498594 | 2018-11-20 08:53:34 +0100 | [diff] [blame] | 1119 | CASE_OP_32_64(bswap16): |
| 1120 | CASE_OP_32_64(bswap32): |
| 1121 | case INDEX_op_bswap64_i64: |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 1122 | case INDEX_op_ext32s_i64: |
| 1123 | case INDEX_op_ext32u_i64: |
Aurelien Jarno | 8bcb5c8 | 2015-07-27 12:41:45 +0200 | [diff] [blame] | 1124 | case INDEX_op_ext_i32_i64: |
| 1125 | case INDEX_op_extu_i32_i64: |
Richard Henderson | 609ad70 | 2015-07-24 07:16:00 -0700 | [diff] [blame] | 1126 | case INDEX_op_extrl_i64_i32: |
| 1127 | case INDEX_op_extrh_i64_i32: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1128 | if (arg_is_const(op->args[1])) { |
| 1129 | tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0); |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1130 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1131 | break; |
Kirill Batuzov | a640f03 | 2011-07-07 16:37:17 +0400 | [diff] [blame] | 1132 | } |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1133 | goto do_default; |
| 1134 | |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 1135 | CASE_OP_32_64(add): |
| 1136 | CASE_OP_32_64(sub): |
| 1137 | CASE_OP_32_64(mul): |
Kirill Batuzov | 9a81090 | 2011-07-07 16:37:15 +0400 | [diff] [blame] | 1138 | CASE_OP_32_64(or): |
| 1139 | CASE_OP_32_64(and): |
| 1140 | CASE_OP_32_64(xor): |
Kirill Batuzov | 55c0975 | 2011-07-07 16:37:16 +0400 | [diff] [blame] | 1141 | CASE_OP_32_64(shl): |
| 1142 | CASE_OP_32_64(shr): |
| 1143 | CASE_OP_32_64(sar): |
Richard Henderson | 25c4d9c | 2011-08-17 14:11:46 -0700 | [diff] [blame] | 1144 | CASE_OP_32_64(rotl): |
| 1145 | CASE_OP_32_64(rotr): |
Richard Henderson | cb25c80 | 2011-08-17 14:11:47 -0700 | [diff] [blame] | 1146 | CASE_OP_32_64(andc): |
| 1147 | CASE_OP_32_64(orc): |
| 1148 | CASE_OP_32_64(eqv): |
| 1149 | CASE_OP_32_64(nand): |
| 1150 | CASE_OP_32_64(nor): |
Richard Henderson | 0327152 | 2013-08-14 14:35:56 -0700 | [diff] [blame] | 1151 | CASE_OP_32_64(muluh): |
| 1152 | CASE_OP_32_64(mulsh): |
Richard Henderson | 01547f7 | 2013-08-14 15:22:46 -0700 | [diff] [blame] | 1153 | CASE_OP_32_64(div): |
| 1154 | CASE_OP_32_64(divu): |
| 1155 | CASE_OP_32_64(rem): |
| 1156 | CASE_OP_32_64(remu): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1157 | if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { |
| 1158 | tmp = do_constant_folding(opc, arg_info(op->args[1])->val, |
| 1159 | arg_info(op->args[2])->val); |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1160 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1161 | break; |
Kirill Batuzov | 53108fb | 2011-07-07 16:37:14 +0400 | [diff] [blame] | 1162 | } |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1163 | goto do_default; |
| 1164 | |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 1165 | CASE_OP_32_64(clz): |
| 1166 | CASE_OP_32_64(ctz): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1167 | if (arg_is_const(op->args[1])) { |
| 1168 | TCGArg v = arg_info(op->args[1])->val; |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 1169 | if (v != 0) { |
| 1170 | tmp = do_constant_folding(opc, v, 0); |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1171 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 1172 | } else { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1173 | tcg_opt_gen_mov(s, op, op->args[0], op->args[2]); |
Richard Henderson | 0e28d00 | 2016-11-16 09:23:28 +0100 | [diff] [blame] | 1174 | } |
| 1175 | break; |
| 1176 | } |
| 1177 | goto do_default; |
| 1178 | |
Aurelien Jarno | 7ef55fc | 2012-09-21 11:07:29 +0200 | [diff] [blame] | 1179 | CASE_OP_32_64(deposit): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1180 | if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { |
| 1181 | tmp = deposit64(arg_info(op->args[1])->val, |
| 1182 | op->args[3], op->args[4], |
| 1183 | arg_info(op->args[2])->val); |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1184 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1185 | break; |
Aurelien Jarno | 7ef55fc | 2012-09-21 11:07:29 +0200 | [diff] [blame] | 1186 | } |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1187 | goto do_default; |
| 1188 | |
Richard Henderson | 7ec8bab | 2016-10-14 12:04:32 -0500 | [diff] [blame] | 1189 | CASE_OP_32_64(extract): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1190 | if (arg_is_const(op->args[1])) { |
| 1191 | tmp = extract64(arg_info(op->args[1])->val, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1192 | op->args[2], op->args[3]); |
| 1193 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
Richard Henderson | 7ec8bab | 2016-10-14 12:04:32 -0500 | [diff] [blame] | 1194 | break; |
| 1195 | } |
| 1196 | goto do_default; |
| 1197 | |
| 1198 | CASE_OP_32_64(sextract): |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1199 | if (arg_is_const(op->args[1])) { |
| 1200 | tmp = sextract64(arg_info(op->args[1])->val, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1201 | op->args[2], op->args[3]); |
| 1202 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
Richard Henderson | 7ec8bab | 2016-10-14 12:04:32 -0500 | [diff] [blame] | 1203 | break; |
| 1204 | } |
| 1205 | goto do_default; |
| 1206 | |
Richard Henderson | fce1296 | 2019-02-25 10:29:25 -0800 | [diff] [blame] | 1207 | CASE_OP_32_64(extract2): |
| 1208 | if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { |
| 1209 | TCGArg v1 = arg_info(op->args[1])->val; |
| 1210 | TCGArg v2 = arg_info(op->args[2])->val; |
| 1211 | |
| 1212 | if (opc == INDEX_op_extract2_i64) { |
| 1213 | tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3])); |
| 1214 | } else { |
Richard Henderson | 80f4d7c | 2019-07-09 13:23:44 +0200 | [diff] [blame] | 1215 | tmp = (int32_t)(((uint32_t)v1 >> op->args[3]) | |
| 1216 | ((uint32_t)v2 << (32 - op->args[3]))); |
Richard Henderson | fce1296 | 2019-02-25 10:29:25 -0800 | [diff] [blame] | 1217 | } |
| 1218 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
| 1219 | break; |
| 1220 | } |
| 1221 | goto do_default; |
| 1222 | |
Aurelien Jarno | f8dd19e | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 1223 | CASE_OP_32_64(setcond): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1224 | tmp = do_constant_folding_cond(opc, op->args[1], |
| 1225 | op->args[2], op->args[3]); |
Aurelien Jarno | b336ceb | 2012-09-18 19:37:00 +0200 | [diff] [blame] | 1226 | if (tmp != 2) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1227 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1228 | break; |
Aurelien Jarno | f8dd19e | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 1229 | } |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1230 | goto do_default; |
| 1231 | |
Aurelien Jarno | fbeaa26 | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 1232 | CASE_OP_32_64(brcond): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1233 | tmp = do_constant_folding_cond(opc, op->args[0], |
| 1234 | op->args[1], op->args[2]); |
Aurelien Jarno | b336ceb | 2012-09-18 19:37:00 +0200 | [diff] [blame] | 1235 | if (tmp != 2) { |
| 1236 | if (tmp) { |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 1237 | bitmap_zero(temps_used.l, nb_temps); |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1238 | op->opc = INDEX_op_br; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1239 | op->args[0] = op->args[3]; |
Aurelien Jarno | fbeaa26 | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 1240 | } else { |
Richard Henderson | 0c627cd | 2014-03-30 16:51:54 -0700 | [diff] [blame] | 1241 | tcg_op_remove(s, op); |
Aurelien Jarno | fbeaa26 | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 1242 | } |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1243 | break; |
Aurelien Jarno | fbeaa26 | 2012-09-06 16:47:14 +0200 | [diff] [blame] | 1244 | } |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1245 | goto do_default; |
| 1246 | |
Richard Henderson | fa01a20 | 2012-09-21 10:13:37 -0700 | [diff] [blame] | 1247 | CASE_OP_32_64(movcond): |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1248 | tmp = do_constant_folding_cond(opc, op->args[1], |
| 1249 | op->args[2], op->args[5]); |
Aurelien Jarno | b336ceb | 2012-09-18 19:37:00 +0200 | [diff] [blame] | 1250 | if (tmp != 2) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1251 | tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]); |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1252 | break; |
Richard Henderson | fa01a20 | 2012-09-21 10:13:37 -0700 | [diff] [blame] | 1253 | } |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1254 | if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) { |
| 1255 | tcg_target_ulong tv = arg_info(op->args[3])->val; |
| 1256 | tcg_target_ulong fv = arg_info(op->args[4])->val; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1257 | TCGCond cond = op->args[5]; |
Richard Henderson | 333b21b | 2016-10-23 20:44:32 -0700 | [diff] [blame] | 1258 | if (fv == 1 && tv == 0) { |
| 1259 | cond = tcg_invert_cond(cond); |
| 1260 | } else if (!(tv == 1 && fv == 0)) { |
| 1261 | goto do_default; |
| 1262 | } |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1263 | op->args[3] = cond; |
Richard Henderson | 333b21b | 2016-10-23 20:44:32 -0700 | [diff] [blame] | 1264 | op->opc = opc = (opc == INDEX_op_movcond_i32 |
| 1265 | ? INDEX_op_setcond_i32 |
| 1266 | : INDEX_op_setcond_i64); |
| 1267 | nb_iargs = 2; |
| 1268 | } |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1269 | goto do_default; |
| 1270 | |
Richard Henderson | 212c328 | 2012-10-02 11:32:28 -0700 | [diff] [blame] | 1271 | case INDEX_op_add2_i32: |
| 1272 | case INDEX_op_sub2_i32: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1273 | if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) |
| 1274 | && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) { |
| 1275 | uint32_t al = arg_info(op->args[2])->val; |
| 1276 | uint32_t ah = arg_info(op->args[3])->val; |
| 1277 | uint32_t bl = arg_info(op->args[4])->val; |
| 1278 | uint32_t bh = arg_info(op->args[5])->val; |
Richard Henderson | 212c328 | 2012-10-02 11:32:28 -0700 | [diff] [blame] | 1279 | uint64_t a = ((uint64_t)ah << 32) | al; |
| 1280 | uint64_t b = ((uint64_t)bh << 32) | bl; |
| 1281 | TCGArg rl, rh; |
Emilio G. Cota | ac1043f | 2018-12-09 14:37:19 -0500 | [diff] [blame] | 1282 | TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32); |
Richard Henderson | 212c328 | 2012-10-02 11:32:28 -0700 | [diff] [blame] | 1283 | |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1284 | if (opc == INDEX_op_add2_i32) { |
Richard Henderson | 212c328 | 2012-10-02 11:32:28 -0700 | [diff] [blame] | 1285 | a += b; |
| 1286 | } else { |
| 1287 | a -= b; |
| 1288 | } |
| 1289 | |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1290 | rl = op->args[0]; |
| 1291 | rh = op->args[1]; |
| 1292 | tcg_opt_gen_movi(s, op, rl, (int32_t)a); |
| 1293 | tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32)); |
Richard Henderson | 212c328 | 2012-10-02 11:32:28 -0700 | [diff] [blame] | 1294 | break; |
| 1295 | } |
| 1296 | goto do_default; |
| 1297 | |
Richard Henderson | 1414968 | 2012-10-02 11:32:30 -0700 | [diff] [blame] | 1298 | case INDEX_op_mulu2_i32: |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1299 | if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) { |
| 1300 | uint32_t a = arg_info(op->args[2])->val; |
| 1301 | uint32_t b = arg_info(op->args[3])->val; |
Richard Henderson | 1414968 | 2012-10-02 11:32:30 -0700 | [diff] [blame] | 1302 | uint64_t r = (uint64_t)a * b; |
| 1303 | TCGArg rl, rh; |
Emilio G. Cota | ac1043f | 2018-12-09 14:37:19 -0500 | [diff] [blame] | 1304 | TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32); |
Richard Henderson | 1414968 | 2012-10-02 11:32:30 -0700 | [diff] [blame] | 1305 | |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1306 | rl = op->args[0]; |
| 1307 | rh = op->args[1]; |
| 1308 | tcg_opt_gen_movi(s, op, rl, (int32_t)r); |
| 1309 | tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32)); |
Richard Henderson | 1414968 | 2012-10-02 11:32:30 -0700 | [diff] [blame] | 1310 | break; |
| 1311 | } |
| 1312 | goto do_default; |
| 1313 | |
Richard Henderson | bc1473e | 2012-10-02 11:32:25 -0700 | [diff] [blame] | 1314 | case INDEX_op_brcond2_i32: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1315 | tmp = do_constant_folding_cond2(&op->args[0], &op->args[2], |
| 1316 | op->args[4]); |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1317 | if (tmp != 2) { |
| 1318 | if (tmp) { |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1319 | do_brcond_true: |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 1320 | bitmap_zero(temps_used.l, nb_temps); |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1321 | op->opc = INDEX_op_br; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1322 | op->args[0] = op->args[5]; |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1323 | } else { |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1324 | do_brcond_false: |
Richard Henderson | 0c627cd | 2014-03-30 16:51:54 -0700 | [diff] [blame] | 1325 | tcg_op_remove(s, op); |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1326 | } |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1327 | } else if ((op->args[4] == TCG_COND_LT |
| 1328 | || op->args[4] == TCG_COND_GE) |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1329 | && arg_is_const(op->args[2]) |
| 1330 | && arg_info(op->args[2])->val == 0 |
| 1331 | && arg_is_const(op->args[3]) |
| 1332 | && arg_info(op->args[3])->val == 0) { |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1333 | /* Simplify LT/GE comparisons vs zero to a single compare |
| 1334 | vs the high word of the input. */ |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1335 | do_brcond_high: |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 1336 | bitmap_zero(temps_used.l, nb_temps); |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1337 | op->opc = INDEX_op_brcond_i32; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1338 | op->args[0] = op->args[1]; |
| 1339 | op->args[1] = op->args[3]; |
| 1340 | op->args[2] = op->args[4]; |
| 1341 | op->args[3] = op->args[5]; |
| 1342 | } else if (op->args[4] == TCG_COND_EQ) { |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1343 | /* Simplify EQ comparisons where one of the pairs |
| 1344 | can be simplified. */ |
| 1345 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1346 | op->args[0], op->args[2], |
| 1347 | TCG_COND_EQ); |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1348 | if (tmp == 0) { |
| 1349 | goto do_brcond_false; |
| 1350 | } else if (tmp == 1) { |
| 1351 | goto do_brcond_high; |
| 1352 | } |
| 1353 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1354 | op->args[1], op->args[3], |
| 1355 | TCG_COND_EQ); |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1356 | if (tmp == 0) { |
| 1357 | goto do_brcond_false; |
| 1358 | } else if (tmp != 1) { |
| 1359 | goto do_default; |
| 1360 | } |
| 1361 | do_brcond_low: |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 1362 | bitmap_zero(temps_used.l, nb_temps); |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1363 | op->opc = INDEX_op_brcond_i32; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1364 | op->args[1] = op->args[2]; |
| 1365 | op->args[2] = op->args[4]; |
| 1366 | op->args[3] = op->args[5]; |
| 1367 | } else if (op->args[4] == TCG_COND_NE) { |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1368 | /* Simplify NE comparisons where one of the pairs |
| 1369 | can be simplified. */ |
| 1370 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1371 | op->args[0], op->args[2], |
| 1372 | TCG_COND_NE); |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1373 | if (tmp == 0) { |
| 1374 | goto do_brcond_high; |
| 1375 | } else if (tmp == 1) { |
| 1376 | goto do_brcond_true; |
| 1377 | } |
| 1378 | tmp = do_constant_folding_cond(INDEX_op_brcond_i32, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1379 | op->args[1], op->args[3], |
| 1380 | TCG_COND_NE); |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1381 | if (tmp == 0) { |
| 1382 | goto do_brcond_low; |
| 1383 | } else if (tmp == 1) { |
| 1384 | goto do_brcond_true; |
| 1385 | } |
| 1386 | goto do_default; |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1387 | } else { |
| 1388 | goto do_default; |
Richard Henderson | bc1473e | 2012-10-02 11:32:25 -0700 | [diff] [blame] | 1389 | } |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1390 | break; |
Richard Henderson | bc1473e | 2012-10-02 11:32:25 -0700 | [diff] [blame] | 1391 | |
| 1392 | case INDEX_op_setcond2_i32: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1393 | tmp = do_constant_folding_cond2(&op->args[1], &op->args[3], |
| 1394 | op->args[5]); |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1395 | if (tmp != 2) { |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1396 | do_setcond_const: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1397 | tcg_opt_gen_movi(s, op, op->args[0], tmp); |
| 1398 | } else if ((op->args[5] == TCG_COND_LT |
| 1399 | || op->args[5] == TCG_COND_GE) |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1400 | && arg_is_const(op->args[3]) |
| 1401 | && arg_info(op->args[3])->val == 0 |
| 1402 | && arg_is_const(op->args[4]) |
| 1403 | && arg_info(op->args[4])->val == 0) { |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1404 | /* Simplify LT/GE comparisons vs zero to a single compare |
| 1405 | vs the high word of the input. */ |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1406 | do_setcond_high: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1407 | reset_temp(op->args[0]); |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1408 | arg_info(op->args[0])->mask = 1; |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1409 | op->opc = INDEX_op_setcond_i32; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1410 | op->args[1] = op->args[2]; |
| 1411 | op->args[2] = op->args[4]; |
| 1412 | op->args[3] = op->args[5]; |
| 1413 | } else if (op->args[5] == TCG_COND_EQ) { |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1414 | /* Simplify EQ comparisons where one of the pairs |
| 1415 | can be simplified. */ |
| 1416 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1417 | op->args[1], op->args[3], |
| 1418 | TCG_COND_EQ); |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1419 | if (tmp == 0) { |
| 1420 | goto do_setcond_const; |
| 1421 | } else if (tmp == 1) { |
| 1422 | goto do_setcond_high; |
| 1423 | } |
| 1424 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1425 | op->args[2], op->args[4], |
| 1426 | TCG_COND_EQ); |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1427 | if (tmp == 0) { |
| 1428 | goto do_setcond_high; |
| 1429 | } else if (tmp != 1) { |
| 1430 | goto do_default; |
| 1431 | } |
| 1432 | do_setcond_low: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1433 | reset_temp(op->args[0]); |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1434 | arg_info(op->args[0])->mask = 1; |
Richard Henderson | c45cb8b | 2014-09-19 13:49:15 -0700 | [diff] [blame] | 1435 | op->opc = INDEX_op_setcond_i32; |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1436 | op->args[2] = op->args[3]; |
| 1437 | op->args[3] = op->args[5]; |
| 1438 | } else if (op->args[5] == TCG_COND_NE) { |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1439 | /* Simplify NE comparisons where one of the pairs |
| 1440 | can be simplified. */ |
| 1441 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1442 | op->args[1], op->args[3], |
| 1443 | TCG_COND_NE); |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1444 | if (tmp == 0) { |
| 1445 | goto do_setcond_high; |
| 1446 | } else if (tmp == 1) { |
| 1447 | goto do_setcond_const; |
| 1448 | } |
| 1449 | tmp = do_constant_folding_cond(INDEX_op_setcond_i32, |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1450 | op->args[2], op->args[4], |
| 1451 | TCG_COND_NE); |
Richard Henderson | a763551 | 2014-04-23 22:18:30 -0700 | [diff] [blame] | 1452 | if (tmp == 0) { |
| 1453 | goto do_setcond_low; |
| 1454 | } else if (tmp == 1) { |
| 1455 | goto do_setcond_const; |
| 1456 | } |
| 1457 | goto do_default; |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1458 | } else { |
| 1459 | goto do_default; |
Richard Henderson | bc1473e | 2012-10-02 11:32:25 -0700 | [diff] [blame] | 1460 | } |
Richard Henderson | 6c4382f | 2012-10-02 11:32:27 -0700 | [diff] [blame] | 1461 | break; |
Richard Henderson | bc1473e | 2012-10-02 11:32:25 -0700 | [diff] [blame] | 1462 | |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 1463 | case INDEX_op_call: |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1464 | if (!(op->args[nb_oargs + nb_iargs + 1] |
Richard Henderson | cf06667 | 2014-03-22 20:06:52 -0700 | [diff] [blame] | 1465 | & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) { |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 1466 | for (i = 0; i < nb_globals; i++) { |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 1467 | if (test_bit(i, temps_used.l)) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1468 | reset_ts(&s->temps[i]); |
Aurelien Jarno | 1208d7d | 2015-07-27 12:41:44 +0200 | [diff] [blame] | 1469 | } |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 1470 | } |
| 1471 | } |
Richard Henderson | cf06667 | 2014-03-22 20:06:52 -0700 | [diff] [blame] | 1472 | goto do_reset_output; |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1473 | |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 1474 | default: |
Richard Henderson | 6e14e91 | 2012-10-02 11:32:24 -0700 | [diff] [blame] | 1475 | do_default: |
| 1476 | /* Default case: we know nothing about operation (or were unable |
| 1477 | to compute the operation result) so no propagation is done. |
| 1478 | We trash everything if the operation is the end of a basic |
Paolo Bonzini | 3a9d8b1 | 2013-01-11 15:42:52 -0800 | [diff] [blame] | 1479 | block, otherwise we only trash the output args. "mask" is |
| 1480 | the non-zero bits mask for the first output arg. */ |
Aurelien Jarno | a255066 | 2012-09-19 21:40:30 +0200 | [diff] [blame] | 1481 | if (def->flags & TCG_OPF_BB_END) { |
Emilio G. Cota | 34184b0 | 2017-07-19 14:32:24 -0400 | [diff] [blame] | 1482 | bitmap_zero(temps_used.l, nb_temps); |
Aurelien Jarno | a255066 | 2012-09-19 21:40:30 +0200 | [diff] [blame] | 1483 | } else { |
Richard Henderson | cf06667 | 2014-03-22 20:06:52 -0700 | [diff] [blame] | 1484 | do_reset_output: |
| 1485 | for (i = 0; i < nb_oargs; i++) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1486 | reset_temp(op->args[i]); |
Aurelien Jarno | 3031244 | 2013-09-03 08:27:38 +0200 | [diff] [blame] | 1487 | /* Save the corresponding known-zero bits mask for the |
| 1488 | first output argument (only one supported so far). */ |
| 1489 | if (i == 0) { |
Richard Henderson | 6349039 | 2017-06-20 13:43:15 -0700 | [diff] [blame] | 1490 | arg_info(op->args[i])->mask = mask; |
Aurelien Jarno | 3031244 | 2013-09-03 08:27:38 +0200 | [diff] [blame] | 1491 | } |
Aurelien Jarno | a255066 | 2012-09-19 21:40:30 +0200 | [diff] [blame] | 1492 | } |
Kirill Batuzov | 22613af | 2011-07-07 16:37:13 +0400 | [diff] [blame] | 1493 | } |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 1494 | break; |
| 1495 | } |
Pranith Kumar | 34f9392 | 2016-08-23 09:48:25 -0400 | [diff] [blame] | 1496 | |
| 1497 | /* Eliminate duplicate and redundant fence instructions. */ |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1498 | if (prev_mb) { |
Pranith Kumar | 34f9392 | 2016-08-23 09:48:25 -0400 | [diff] [blame] | 1499 | switch (opc) { |
| 1500 | case INDEX_op_mb: |
| 1501 | /* Merge two barriers of the same type into one, |
| 1502 | * or a weaker barrier into a stronger one, |
| 1503 | * or two weaker barriers into a stronger one. |
| 1504 | * mb X; mb Y => mb X|Y |
| 1505 | * mb; strl => mb; st |
| 1506 | * ldaq; mb => ld; mb |
| 1507 | * ldaq; strl => ld; mb; st |
| 1508 | * Other combinations are also merged into a strong |
| 1509 | * barrier. This is stricter than specified but for |
| 1510 | * the purposes of TCG is better than not optimizing. |
| 1511 | */ |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1512 | prev_mb->args[0] |= op->args[0]; |
Pranith Kumar | 34f9392 | 2016-08-23 09:48:25 -0400 | [diff] [blame] | 1513 | tcg_op_remove(s, op); |
| 1514 | break; |
| 1515 | |
| 1516 | default: |
| 1517 | /* Opcodes that end the block stop the optimization. */ |
| 1518 | if ((def->flags & TCG_OPF_BB_END) == 0) { |
| 1519 | break; |
| 1520 | } |
| 1521 | /* fallthru */ |
| 1522 | case INDEX_op_qemu_ld_i32: |
| 1523 | case INDEX_op_qemu_ld_i64: |
| 1524 | case INDEX_op_qemu_st_i32: |
| 1525 | case INDEX_op_qemu_st_i64: |
| 1526 | case INDEX_op_call: |
| 1527 | /* Opcodes that touch guest memory stop the optimization. */ |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1528 | prev_mb = NULL; |
Pranith Kumar | 34f9392 | 2016-08-23 09:48:25 -0400 | [diff] [blame] | 1529 | break; |
| 1530 | } |
| 1531 | } else if (opc == INDEX_op_mb) { |
Richard Henderson | acd9370 | 2016-12-08 12:28:42 -0800 | [diff] [blame] | 1532 | prev_mb = op; |
Pranith Kumar | 34f9392 | 2016-08-23 09:48:25 -0400 | [diff] [blame] | 1533 | } |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 1534 | } |
Kirill Batuzov | 8f2e8c0 | 2011-07-07 16:37:12 +0400 | [diff] [blame] | 1535 | } |