blob: 2cbbeefd5302f5066fce41ad75820a001b166d7c [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040027#include "qemu-common.h"
Paolo Bonzini00f6da62016-03-15 13:16:36 +010028#include "exec/cpu-common.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029#include "tcg-op.h"
30
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040031#define CASE_OP_32_64(x) \
32 glue(glue(case INDEX_op_, x), _i32): \
33 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040034
Kirill Batuzov22613af2011-07-07 16:37:13 +040035struct tcg_temp_info {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020036 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070037 TCGTemp *prev_copy;
38 TCGTemp *next_copy;
Kirill Batuzov22613af2011-07-07 16:37:13 +040039 tcg_target_ulong val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080040 tcg_target_ulong mask;
Kirill Batuzov22613af2011-07-07 16:37:13 +040041};
42
Richard Henderson63490392017-06-20 13:43:15 -070043static inline struct tcg_temp_info *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020044{
Richard Henderson63490392017-06-20 13:43:15 -070045 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020046}
47
Richard Henderson63490392017-06-20 13:43:15 -070048static inline struct tcg_temp_info *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020049{
Richard Henderson63490392017-06-20 13:43:15 -070050 return ts_info(arg_temp(arg));
51}
52
53static inline bool ts_is_const(TCGTemp *ts)
54{
55 return ts_info(ts)->is_const;
56}
57
58static inline bool arg_is_const(TCGArg arg)
59{
60 return ts_is_const(arg_temp(arg));
61}
62
63static inline bool ts_is_copy(TCGTemp *ts)
64{
65 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020066}
67
Aurelien Jarnob41059d2015-07-27 12:41:44 +020068/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070069static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040070{
Richard Henderson63490392017-06-20 13:43:15 -070071 struct tcg_temp_info *ti = ts_info(ts);
72 struct tcg_temp_info *pi = ts_info(ti->prev_copy);
73 struct tcg_temp_info *ni = ts_info(ti->next_copy);
74
75 ni->prev_copy = ti->prev_copy;
76 pi->next_copy = ti->next_copy;
77 ti->next_copy = ts;
78 ti->prev_copy = ts;
79 ti->is_const = false;
80 ti->mask = -1;
81}
82
83static void reset_temp(TCGArg arg)
84{
85 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040086}
87
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020088/* Initialize and activate a temporary. */
Emilio G. Cota34184b02017-07-19 14:32:24 -040089static void init_ts_info(struct tcg_temp_info *infos,
90 TCGTempSet *temps_used, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020091{
Richard Henderson63490392017-06-20 13:43:15 -070092 size_t idx = temp_idx(ts);
Emilio G. Cota34184b02017-07-19 14:32:24 -040093 if (!test_bit(idx, temps_used->l)) {
94 struct tcg_temp_info *ti = &infos[idx];
Richard Henderson63490392017-06-20 13:43:15 -070095
96 ts->state_ptr = ti;
97 ti->next_copy = ts;
98 ti->prev_copy = ts;
99 ti->is_const = false;
100 ti->mask = -1;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400101 set_bit(idx, temps_used->l);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200102 }
103}
104
Emilio G. Cota34184b02017-07-19 14:32:24 -0400105static void init_arg_info(struct tcg_temp_info *infos,
106 TCGTempSet *temps_used, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700107{
Emilio G. Cota34184b02017-07-19 14:32:24 -0400108 init_ts_info(infos, temps_used, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700109}
110
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000111static int op_bits(TCGOpcode op)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400112{
Richard Henderson8399ad52011-08-17 14:11:45 -0700113 const TCGOpDef *def = &tcg_op_defs[op];
114 return def->flags & TCG_OPF_64BIT ? 64 : 32;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400115}
116
Richard Hendersona62f6f52014-05-22 10:59:12 -0700117static TCGOpcode op_to_mov(TCGOpcode op)
118{
119 switch (op_bits(op)) {
120 case 32:
121 return INDEX_op_mov_i32;
122 case 64:
123 return INDEX_op_mov_i64;
124 default:
125 fprintf(stderr, "op_to_mov: unexpected return value of "
126 "function op_bits.\n");
127 tcg_abort();
128 }
129}
130
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000131static TCGOpcode op_to_movi(TCGOpcode op)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400132{
133 switch (op_bits(op)) {
134 case 32:
135 return INDEX_op_movi_i32;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400136 case 64:
137 return INDEX_op_movi_i64;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400138 default:
139 fprintf(stderr, "op_to_movi: unexpected return value of "
140 "function op_bits.\n");
141 tcg_abort();
142 }
143}
144
Richard Henderson63490392017-06-20 13:43:15 -0700145static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200146{
Richard Henderson63490392017-06-20 13:43:15 -0700147 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200148
149 /* If this is already a global, we can't do better. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600150 if (ts->temp_global) {
Richard Henderson63490392017-06-20 13:43:15 -0700151 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200152 }
153
154 /* Search for a global first. */
Richard Henderson63490392017-06-20 13:43:15 -0700155 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
156 if (i->temp_global) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200157 return i;
158 }
159 }
160
161 /* If it is a temp, search for a temp local. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600162 if (!ts->temp_local) {
Richard Henderson63490392017-06-20 13:43:15 -0700163 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
164 if (ts->temp_local) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200165 return i;
166 }
167 }
168 }
169
170 /* Failure to find a better representation, return the same temp. */
Richard Henderson63490392017-06-20 13:43:15 -0700171 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200172}
173
Richard Henderson63490392017-06-20 13:43:15 -0700174static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200175{
Richard Henderson63490392017-06-20 13:43:15 -0700176 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200177
Richard Henderson63490392017-06-20 13:43:15 -0700178 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200179 return true;
180 }
181
Richard Henderson63490392017-06-20 13:43:15 -0700182 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200183 return false;
184 }
185
Richard Henderson63490392017-06-20 13:43:15 -0700186 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
187 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200188 return true;
189 }
190 }
191
192 return false;
193}
194
Richard Henderson63490392017-06-20 13:43:15 -0700195static bool args_are_copies(TCGArg arg1, TCGArg arg2)
196{
197 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
198}
199
Richard Hendersonacd93702016-12-08 12:28:42 -0800200static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200201{
202 TCGOpcode new_op = op_to_movi(op->opc);
203 tcg_target_ulong mask;
Richard Henderson63490392017-06-20 13:43:15 -0700204 struct tcg_temp_info *di = arg_info(dst);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200205
206 op->opc = new_op;
207
208 reset_temp(dst);
Richard Henderson63490392017-06-20 13:43:15 -0700209 di->is_const = true;
210 di->val = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200211 mask = val;
Aurelien Jarno96152122015-07-10 18:03:30 +0200212 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200213 /* High bits of the destination are now garbage. */
214 mask |= ~0xffffffffull;
215 }
Richard Henderson63490392017-06-20 13:43:15 -0700216 di->mask = mask;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200217
Richard Hendersonacd93702016-12-08 12:28:42 -0800218 op->args[0] = dst;
219 op->args[1] = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200220}
221
Richard Hendersonacd93702016-12-08 12:28:42 -0800222static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400223{
Richard Henderson63490392017-06-20 13:43:15 -0700224 TCGTemp *dst_ts = arg_temp(dst);
225 TCGTemp *src_ts = arg_temp(src);
226 struct tcg_temp_info *di;
227 struct tcg_temp_info *si;
228 tcg_target_ulong mask;
229 TCGOpcode new_op;
230
231 if (ts_are_copies(dst_ts, src_ts)) {
Aurelien Jarno53657182015-06-04 21:53:25 +0200232 tcg_op_remove(s, op);
233 return;
234 }
235
Richard Henderson63490392017-06-20 13:43:15 -0700236 reset_ts(dst_ts);
237 di = ts_info(dst_ts);
238 si = ts_info(src_ts);
239 new_op = op_to_mov(op->opc);
Richard Hendersona62f6f52014-05-22 10:59:12 -0700240
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700241 op->opc = new_op;
Richard Henderson63490392017-06-20 13:43:15 -0700242 op->args[0] = dst;
243 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700244
Richard Henderson63490392017-06-20 13:43:15 -0700245 mask = si->mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700246 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
247 /* High bits of the destination are now garbage. */
248 mask |= ~0xffffffffull;
249 }
Richard Henderson63490392017-06-20 13:43:15 -0700250 di->mask = mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700251
Richard Henderson63490392017-06-20 13:43:15 -0700252 if (src_ts->type == dst_ts->type) {
253 struct tcg_temp_info *ni = ts_info(si->next_copy);
254
255 di->next_copy = si->next_copy;
256 di->prev_copy = src_ts;
257 ni->prev_copy = dst_ts;
258 si->next_copy = dst_ts;
259 di->is_const = si->is_const;
260 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800261 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400262}
263
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000264static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400265{
Richard Henderson03271522013-08-14 14:35:56 -0700266 uint64_t l64, h64;
267
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400268 switch (op) {
269 CASE_OP_32_64(add):
270 return x + y;
271
272 CASE_OP_32_64(sub):
273 return x - y;
274
275 CASE_OP_32_64(mul):
276 return x * y;
277
Kirill Batuzov9a810902011-07-07 16:37:15 +0400278 CASE_OP_32_64(and):
279 return x & y;
280
281 CASE_OP_32_64(or):
282 return x | y;
283
284 CASE_OP_32_64(xor):
285 return x ^ y;
286
Kirill Batuzov55c09752011-07-07 16:37:16 +0400287 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
293 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
299 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
305 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700306 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400307
Kirill Batuzov55c09752011-07-07 16:37:16 +0400308 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700309 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400310
311 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700312 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400313
Kirill Batuzov55c09752011-07-07 16:37:16 +0400314 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700315 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400316
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700317 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400318 return ~x;
319
Richard Hendersoncb25c802011-08-17 14:11:47 -0700320 CASE_OP_32_64(neg):
321 return -x;
322
323 CASE_OP_32_64(andc):
324 return x & ~y;
325
326 CASE_OP_32_64(orc):
327 return x | ~y;
328
329 CASE_OP_32_64(eqv):
330 return ~(x ^ y);
331
332 CASE_OP_32_64(nand):
333 return ~(x & y);
334
335 CASE_OP_32_64(nor):
336 return ~(x | y);
337
Richard Henderson0e28d002016-11-16 09:23:28 +0100338 case INDEX_op_clz_i32:
339 return (uint32_t)x ? clz32(x) : y;
340
341 case INDEX_op_clz_i64:
342 return x ? clz64(x) : y;
343
344 case INDEX_op_ctz_i32:
345 return (uint32_t)x ? ctz32(x) : y;
346
347 case INDEX_op_ctz_i64:
348 return x ? ctz64(x) : y;
349
Richard Hendersona768e4e2016-11-21 11:13:39 +0100350 case INDEX_op_ctpop_i32:
351 return ctpop32(x);
352
353 case INDEX_op_ctpop_i64:
354 return ctpop64(x);
355
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700356 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400357 return (int8_t)x;
358
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700359 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400360 return (int16_t)x;
361
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700362 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400363 return (uint8_t)x;
364
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700365 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400366 return (uint16_t)x;
367
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200368 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400369 case INDEX_op_ext32s_i64:
370 return (int32_t)x;
371
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200372 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700373 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400374 case INDEX_op_ext32u_i64:
375 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400376
Richard Henderson609ad702015-07-24 07:16:00 -0700377 case INDEX_op_extrh_i64_i32:
378 return (uint64_t)x >> 32;
379
Richard Henderson03271522013-08-14 14:35:56 -0700380 case INDEX_op_muluh_i32:
381 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
382 case INDEX_op_mulsh_i32:
383 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
384
385 case INDEX_op_muluh_i64:
386 mulu64(&l64, &h64, x, y);
387 return h64;
388 case INDEX_op_mulsh_i64:
389 muls64(&l64, &h64, x, y);
390 return h64;
391
Richard Henderson01547f72013-08-14 15:22:46 -0700392 case INDEX_op_div_i32:
393 /* Avoid crashing on divide by zero, otherwise undefined. */
394 return (int32_t)x / ((int32_t)y ? : 1);
395 case INDEX_op_divu_i32:
396 return (uint32_t)x / ((uint32_t)y ? : 1);
397 case INDEX_op_div_i64:
398 return (int64_t)x / ((int64_t)y ? : 1);
399 case INDEX_op_divu_i64:
400 return (uint64_t)x / ((uint64_t)y ? : 1);
401
402 case INDEX_op_rem_i32:
403 return (int32_t)x % ((int32_t)y ? : 1);
404 case INDEX_op_remu_i32:
405 return (uint32_t)x % ((uint32_t)y ? : 1);
406 case INDEX_op_rem_i64:
407 return (int64_t)x % ((int64_t)y ? : 1);
408 case INDEX_op_remu_i64:
409 return (uint64_t)x % ((uint64_t)y ? : 1);
410
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400411 default:
412 fprintf(stderr,
413 "Unrecognized operation %d in do_constant_folding.\n", op);
414 tcg_abort();
415 }
416}
417
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000418static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400419{
420 TCGArg res = do_constant_folding_2(op, x, y);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400421 if (op_bits(op) == 32) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200422 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400423 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400424 return res;
425}
426
Richard Henderson9519da72012-10-02 11:32:26 -0700427static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
428{
429 switch (c) {
430 case TCG_COND_EQ:
431 return x == y;
432 case TCG_COND_NE:
433 return x != y;
434 case TCG_COND_LT:
435 return (int32_t)x < (int32_t)y;
436 case TCG_COND_GE:
437 return (int32_t)x >= (int32_t)y;
438 case TCG_COND_LE:
439 return (int32_t)x <= (int32_t)y;
440 case TCG_COND_GT:
441 return (int32_t)x > (int32_t)y;
442 case TCG_COND_LTU:
443 return x < y;
444 case TCG_COND_GEU:
445 return x >= y;
446 case TCG_COND_LEU:
447 return x <= y;
448 case TCG_COND_GTU:
449 return x > y;
450 default:
451 tcg_abort();
452 }
453}
454
455static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
456{
457 switch (c) {
458 case TCG_COND_EQ:
459 return x == y;
460 case TCG_COND_NE:
461 return x != y;
462 case TCG_COND_LT:
463 return (int64_t)x < (int64_t)y;
464 case TCG_COND_GE:
465 return (int64_t)x >= (int64_t)y;
466 case TCG_COND_LE:
467 return (int64_t)x <= (int64_t)y;
468 case TCG_COND_GT:
469 return (int64_t)x > (int64_t)y;
470 case TCG_COND_LTU:
471 return x < y;
472 case TCG_COND_GEU:
473 return x >= y;
474 case TCG_COND_LEU:
475 return x <= y;
476 case TCG_COND_GTU:
477 return x > y;
478 default:
479 tcg_abort();
480 }
481}
482
483static bool do_constant_folding_cond_eq(TCGCond c)
484{
485 switch (c) {
486 case TCG_COND_GT:
487 case TCG_COND_LTU:
488 case TCG_COND_LT:
489 case TCG_COND_GTU:
490 case TCG_COND_NE:
491 return 0;
492 case TCG_COND_GE:
493 case TCG_COND_GEU:
494 case TCG_COND_LE:
495 case TCG_COND_LEU:
496 case TCG_COND_EQ:
497 return 1;
498 default:
499 tcg_abort();
500 }
501}
502
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200503/* Return 2 if the condition can't be simplified, and the result
504 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200505static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
506 TCGArg y, TCGCond c)
507{
Richard Henderson63490392017-06-20 13:43:15 -0700508 tcg_target_ulong xv = arg_info(x)->val;
509 tcg_target_ulong yv = arg_info(y)->val;
510 if (arg_is_const(x) && arg_is_const(y)) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200511 switch (op_bits(op)) {
512 case 32:
Richard Henderson63490392017-06-20 13:43:15 -0700513 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200514 case 64:
Richard Henderson63490392017-06-20 13:43:15 -0700515 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson9519da72012-10-02 11:32:26 -0700516 default:
517 tcg_abort();
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200518 }
Richard Henderson63490392017-06-20 13:43:15 -0700519 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700520 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700521 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200522 switch (c) {
523 case TCG_COND_LTU:
524 return 0;
525 case TCG_COND_GEU:
526 return 1;
527 default:
528 return 2;
529 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200530 }
Alex Bennée550276a2016-09-30 22:30:55 +0100531 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200532}
533
Richard Henderson6c4382f2012-10-02 11:32:27 -0700534/* Return 2 if the condition can't be simplified, and the result
535 of the condition (0 or 1) if it can */
536static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
537{
538 TCGArg al = p1[0], ah = p1[1];
539 TCGArg bl = p2[0], bh = p2[1];
540
Richard Henderson63490392017-06-20 13:43:15 -0700541 if (arg_is_const(bl) && arg_is_const(bh)) {
542 tcg_target_ulong blv = arg_info(bl)->val;
543 tcg_target_ulong bhv = arg_info(bh)->val;
544 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700545
Richard Henderson63490392017-06-20 13:43:15 -0700546 if (arg_is_const(al) && arg_is_const(ah)) {
547 tcg_target_ulong alv = arg_info(al)->val;
548 tcg_target_ulong ahv = arg_info(ah)->val;
549 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700550 return do_constant_folding_cond_64(a, b, c);
551 }
552 if (b == 0) {
553 switch (c) {
554 case TCG_COND_LTU:
555 return 0;
556 case TCG_COND_GEU:
557 return 1;
558 default:
559 break;
560 }
561 }
562 }
Richard Henderson63490392017-06-20 13:43:15 -0700563 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700564 return do_constant_folding_cond_eq(c);
565 }
566 return 2;
567}
568
Richard Henderson24c9ae42012-10-02 11:32:21 -0700569static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
570{
571 TCGArg a1 = *p1, a2 = *p2;
572 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700573 sum += arg_is_const(a1);
574 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700575
576 /* Prefer the constant in second argument, and then the form
577 op a, a, b, which is better handled on non-RISC hosts. */
578 if (sum > 0 || (sum == 0 && dest == a2)) {
579 *p1 = a2;
580 *p2 = a1;
581 return true;
582 }
583 return false;
584}
585
Richard Henderson0bfcb862012-10-02 11:32:23 -0700586static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
587{
588 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700589 sum += arg_is_const(p1[0]);
590 sum += arg_is_const(p1[1]);
591 sum -= arg_is_const(p2[0]);
592 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700593 if (sum > 0) {
594 TCGArg t;
595 t = p1[0], p1[0] = p2[0], p2[0] = t;
596 t = p1[1], p1[1] = p2[1], p2[1] = t;
597 return true;
598 }
599 return false;
600}
601
Kirill Batuzov22613af2011-07-07 16:37:13 +0400602/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200603void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400604{
Richard Henderson15fa08f2017-11-02 15:19:14 +0100605 int nb_temps, nb_globals;
606 TCGOp *op, *op_next, *prev_mb = NULL;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400607 struct tcg_temp_info *infos;
608 TCGTempSet temps_used;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700609
Kirill Batuzov22613af2011-07-07 16:37:13 +0400610 /* Array VALS has an element for each temp.
611 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200612 If this temp is a copy of other ones then the other copies are
613 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400614
615 nb_temps = s->nb_temps;
616 nb_globals = s->nb_globals;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400617 bitmap_zero(temps_used.l, nb_temps);
618 infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps);
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400619
Richard Henderson15fa08f2017-11-02 15:19:14 +0100620 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700621 tcg_target_ulong mask, partmask, affected;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700622 int nb_oargs, nb_iargs, i;
Richard Hendersoncf066672014-03-22 20:06:52 -0700623 TCGArg tmp;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700624 TCGOpcode opc = op->opc;
625 const TCGOpDef *def = &tcg_op_defs[opc];
626
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200627 /* Count the arguments, and initialize the temps that are
628 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700629 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100630 nb_oargs = TCGOP_CALLO(op);
631 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200632 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700633 TCGTemp *ts = arg_temp(op->args[i]);
634 if (ts) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400635 init_ts_info(infos, &temps_used, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200636 }
637 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200638 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700639 nb_oargs = def->nb_oargs;
640 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200641 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400642 init_arg_info(infos, &temps_used, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200643 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700644 }
645
646 /* Do copy propagation */
647 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700648 TCGTemp *ts = arg_temp(op->args[i]);
649 if (ts && ts_is_copy(ts)) {
650 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400651 }
652 }
653
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400654 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700655 switch (opc) {
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400656 CASE_OP_32_64(add):
657 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +0400658 CASE_OP_32_64(and):
659 CASE_OP_32_64(or):
660 CASE_OP_32_64(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700661 CASE_OP_32_64(eqv):
662 CASE_OP_32_64(nand):
663 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700664 CASE_OP_32_64(muluh):
665 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800666 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400667 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200668 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800669 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
670 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200671 }
672 break;
673 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800674 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
675 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200676 }
677 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700678 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800679 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
680 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700681 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700682 /* For movcond, we canonicalize the "false" input reg to match
683 the destination reg so that the tcg backend can implement
684 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800685 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
686 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700687 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700688 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800689 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800690 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
691 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700692 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800693 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800694 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800695 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700696 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700697 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800698 if (swap_commutative2(&op->args[0], &op->args[2])) {
699 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700700 }
701 break;
702 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800703 if (swap_commutative2(&op->args[1], &op->args[3])) {
704 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700705 }
706 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400707 default:
708 break;
709 }
710
Richard Henderson2d497542013-03-21 09:13:33 -0700711 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
712 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700713 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200714 CASE_OP_32_64(shl):
715 CASE_OP_32_64(shr):
716 CASE_OP_32_64(sar):
717 CASE_OP_32_64(rotl):
718 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700719 if (arg_is_const(op->args[1])
720 && arg_info(op->args[1])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800721 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200722 continue;
723 }
724 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700725 CASE_OP_32_64(sub):
726 {
727 TCGOpcode neg_op;
728 bool have_neg;
729
Richard Henderson63490392017-06-20 13:43:15 -0700730 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700731 /* Proceed with possible constant folding. */
732 break;
733 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700734 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700735 neg_op = INDEX_op_neg_i32;
736 have_neg = TCG_TARGET_HAS_neg_i32;
737 } else {
738 neg_op = INDEX_op_neg_i64;
739 have_neg = TCG_TARGET_HAS_neg_i64;
740 }
741 if (!have_neg) {
742 break;
743 }
Richard Henderson63490392017-06-20 13:43:15 -0700744 if (arg_is_const(op->args[1])
745 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700746 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800747 reset_temp(op->args[0]);
748 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700749 continue;
750 }
751 }
752 break;
Richard Hendersone201b562014-01-28 13:15:38 -0800753 CASE_OP_32_64(xor):
754 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700755 if (!arg_is_const(op->args[1])
756 && arg_is_const(op->args[2])
757 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800758 i = 1;
759 goto try_not;
760 }
761 break;
762 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700763 if (!arg_is_const(op->args[1])
764 && arg_is_const(op->args[2])
765 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800766 i = 1;
767 goto try_not;
768 }
769 break;
770 CASE_OP_32_64(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700771 if (!arg_is_const(op->args[2])
772 && arg_is_const(op->args[1])
773 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800774 i = 2;
775 goto try_not;
776 }
777 break;
778 CASE_OP_32_64(orc):
779 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700780 if (!arg_is_const(op->args[2])
781 && arg_is_const(op->args[1])
782 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800783 i = 2;
784 goto try_not;
785 }
786 break;
787 try_not:
788 {
789 TCGOpcode not_op;
790 bool have_not;
791
792 if (def->flags & TCG_OPF_64BIT) {
793 not_op = INDEX_op_not_i64;
794 have_not = TCG_TARGET_HAS_not_i64;
795 } else {
796 not_op = INDEX_op_not_i32;
797 have_not = TCG_TARGET_HAS_not_i32;
798 }
799 if (!have_not) {
800 break;
801 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700802 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800803 reset_temp(op->args[0]);
804 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800805 continue;
806 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200807 default:
808 break;
809 }
810
Richard Henderson464a1442014-01-31 07:42:11 -0600811 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700812 switch (opc) {
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400813 CASE_OP_32_64(add):
814 CASE_OP_32_64(sub):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400815 CASE_OP_32_64(shl):
816 CASE_OP_32_64(shr):
817 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700818 CASE_OP_32_64(rotl):
819 CASE_OP_32_64(rotr):
Aurelien Jarno38ee1882012-09-06 16:47:14 +0200820 CASE_OP_32_64(or):
821 CASE_OP_32_64(xor):
Richard Henderson464a1442014-01-31 07:42:11 -0600822 CASE_OP_32_64(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700823 if (!arg_is_const(op->args[1])
824 && arg_is_const(op->args[2])
825 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800826 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200827 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400828 }
829 break;
Richard Henderson464a1442014-01-31 07:42:11 -0600830 CASE_OP_32_64(and):
831 CASE_OP_32_64(orc):
832 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700833 if (!arg_is_const(op->args[1])
834 && arg_is_const(op->args[2])
835 && arg_info(op->args[2])->val == -1) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800836 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200837 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600838 }
839 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200840 default:
841 break;
842 }
843
Aurelien Jarno30312442013-09-03 08:27:38 +0200844 /* Simplify using known-zero bits. Currently only ops with a single
845 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800846 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800847 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700848 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800849 CASE_OP_32_64(ext8s):
Richard Henderson63490392017-06-20 13:43:15 -0700850 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800851 break;
852 }
853 CASE_OP_32_64(ext8u):
854 mask = 0xff;
855 goto and_const;
856 CASE_OP_32_64(ext16s):
Richard Henderson63490392017-06-20 13:43:15 -0700857 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800858 break;
859 }
860 CASE_OP_32_64(ext16u):
861 mask = 0xffff;
862 goto and_const;
863 case INDEX_op_ext32s_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700864 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800865 break;
866 }
867 case INDEX_op_ext32u_i64:
868 mask = 0xffffffffU;
869 goto and_const;
870
871 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -0700872 mask = arg_info(op->args[2])->mask;
873 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800874 and_const:
Richard Henderson63490392017-06-20 13:43:15 -0700875 affected = arg_info(op->args[1])->mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800876 }
Richard Henderson63490392017-06-20 13:43:15 -0700877 mask = arg_info(op->args[1])->mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800878 break;
879
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200880 case INDEX_op_ext_i32_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700881 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200882 break;
883 }
884 case INDEX_op_extu_i32_i64:
885 /* We do not compute affected as it is a size changing op. */
Richard Henderson63490392017-06-20 13:43:15 -0700886 mask = (uint32_t)arg_info(op->args[1])->mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200887 break;
888
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800889 CASE_OP_32_64(andc):
890 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800891 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700892 if (arg_is_const(op->args[2])) {
893 mask = ~arg_info(op->args[2])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800894 goto and_const;
895 }
Richard Henderson63490392017-06-20 13:43:15 -0700896 /* But we certainly know nothing outside args[1] may be set. */
897 mask = arg_info(op->args[1])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800898 break;
899
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200900 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700901 if (arg_is_const(op->args[2])) {
902 tmp = arg_info(op->args[2])->val & 31;
903 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200904 }
905 break;
906 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700907 if (arg_is_const(op->args[2])) {
908 tmp = arg_info(op->args[2])->val & 63;
909 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800910 }
911 break;
912
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200913 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700914 if (arg_is_const(op->args[2])) {
915 tmp = arg_info(op->args[2])->val & 31;
916 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200917 }
918 break;
919 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700920 if (arg_is_const(op->args[2])) {
921 tmp = arg_info(op->args[2])->val & 63;
922 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800923 }
924 break;
925
Richard Henderson609ad702015-07-24 07:16:00 -0700926 case INDEX_op_extrl_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700927 mask = (uint32_t)arg_info(op->args[1])->mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700928 break;
929 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700930 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700931 break;
932
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800933 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700934 if (arg_is_const(op->args[2])) {
935 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
936 mask = arg_info(op->args[1])->mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800937 }
938 break;
939
940 CASE_OP_32_64(neg):
941 /* Set to 1 all bits to the left of the rightmost. */
Richard Henderson63490392017-06-20 13:43:15 -0700942 mask = -(arg_info(op->args[1])->mask
943 & -arg_info(op->args[1])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800944 break;
945
946 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -0700947 mask = deposit64(arg_info(op->args[1])->mask,
948 op->args[3], op->args[4],
949 arg_info(op->args[2])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800950 break;
951
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500952 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -0700953 mask = extract64(arg_info(op->args[1])->mask,
954 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800955 if (op->args[2] == 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700956 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500957 }
958 break;
959 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -0700960 mask = sextract64(arg_info(op->args[1])->mask,
Richard Hendersonacd93702016-12-08 12:28:42 -0800961 op->args[2], op->args[3]);
962 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700963 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500964 }
965 break;
966
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800967 CASE_OP_32_64(or):
968 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -0700969 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800970 break;
971
Richard Henderson0e28d002016-11-16 09:23:28 +0100972 case INDEX_op_clz_i32:
973 case INDEX_op_ctz_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700974 mask = arg_info(op->args[2])->mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100975 break;
976
977 case INDEX_op_clz_i64:
978 case INDEX_op_ctz_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700979 mask = arg_info(op->args[2])->mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100980 break;
981
Richard Hendersona768e4e2016-11-21 11:13:39 +0100982 case INDEX_op_ctpop_i32:
983 mask = 32 | 31;
984 break;
985 case INDEX_op_ctpop_i64:
986 mask = 64 | 63;
987 break;
988
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800989 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -0700990 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800991 mask = 1;
992 break;
993
994 CASE_OP_32_64(movcond):
Richard Henderson63490392017-06-20 13:43:15 -0700995 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800996 break;
997
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200998 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200999 mask = 0xff;
1000 break;
1001 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001002 mask = 0xffff;
1003 break;
1004 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001005 mask = 0xffffffffu;
1006 break;
1007
1008 CASE_OP_32_64(qemu_ld):
1009 {
Richard Hendersonacd93702016-12-08 12:28:42 -08001010 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Richard Henderson59227d52015-05-12 11:51:44 -07001011 TCGMemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001012 if (!(mop & MO_SIGN)) {
1013 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1014 }
1015 }
1016 break;
1017
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001018 default:
1019 break;
1020 }
1021
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001022 /* 32-bit ops generate 32-bit results. For the result is zero test
1023 below, we can ignore high bits, but for further optimizations we
1024 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -07001025 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001026 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -07001027 mask |= ~(tcg_target_ulong)0xffffffffu;
1028 partmask &= 0xffffffffu;
1029 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001030 }
1031
Richard Henderson24666ba2014-05-22 11:14:10 -07001032 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001033 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001034 tcg_opt_gen_movi(s, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001035 continue;
1036 }
1037 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001038 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001039 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001040 continue;
1041 }
1042
Aurelien Jarno56e49432012-09-06 16:47:13 +02001043 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001044 switch (opc) {
Aurelien Jarno61251c02012-09-06 16:47:14 +02001045 CASE_OP_32_64(and):
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001046 CASE_OP_32_64(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001047 CASE_OP_32_64(muluh):
1048 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001049 if (arg_is_const(op->args[2])
1050 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001051 tcg_opt_gen_movi(s, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001052 continue;
1053 }
1054 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001055 default:
1056 break;
1057 }
1058
1059 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001060 switch (opc) {
Kirill Batuzov9a810902011-07-07 16:37:15 +04001061 CASE_OP_32_64(or):
1062 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -07001063 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001064 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001065 continue;
1066 }
1067 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001068 default:
1069 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001070 }
1071
Aurelien Jarno3c941932012-09-18 19:12:36 +02001072 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001073 switch (opc) {
Richard Hendersone64e9582014-01-28 13:26:17 -08001074 CASE_OP_32_64(andc):
Aurelien Jarno3c941932012-09-18 19:12:36 +02001075 CASE_OP_32_64(sub):
1076 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001077 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001078 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001079 continue;
1080 }
1081 break;
1082 default:
1083 break;
1084 }
1085
Kirill Batuzov22613af2011-07-07 16:37:13 +04001086 /* Propagate constants through copy operations and do constant
1087 folding. Constants will be substituted to arguments by register
1088 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001089 switch (opc) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001090 CASE_OP_32_64(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001091 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001092 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001093 CASE_OP_32_64(movi):
Richard Hendersonacd93702016-12-08 12:28:42 -08001094 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001095 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001096
Kirill Batuzova640f032011-07-07 16:37:17 +04001097 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001098 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001099 CASE_OP_32_64(ext8s):
1100 CASE_OP_32_64(ext8u):
1101 CASE_OP_32_64(ext16s):
1102 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001103 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001104 case INDEX_op_ext32s_i64:
1105 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001106 case INDEX_op_ext_i32_i64:
1107 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001108 case INDEX_op_extrl_i64_i32:
1109 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001110 if (arg_is_const(op->args[1])) {
1111 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001112 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001113 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001114 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001115 goto do_default;
1116
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001117 CASE_OP_32_64(add):
1118 CASE_OP_32_64(sub):
1119 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001120 CASE_OP_32_64(or):
1121 CASE_OP_32_64(and):
1122 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001123 CASE_OP_32_64(shl):
1124 CASE_OP_32_64(shr):
1125 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001126 CASE_OP_32_64(rotl):
1127 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001128 CASE_OP_32_64(andc):
1129 CASE_OP_32_64(orc):
1130 CASE_OP_32_64(eqv):
1131 CASE_OP_32_64(nand):
1132 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001133 CASE_OP_32_64(muluh):
1134 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001135 CASE_OP_32_64(div):
1136 CASE_OP_32_64(divu):
1137 CASE_OP_32_64(rem):
1138 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001139 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1140 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1141 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001142 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001143 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001144 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001145 goto do_default;
1146
Richard Henderson0e28d002016-11-16 09:23:28 +01001147 CASE_OP_32_64(clz):
1148 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001149 if (arg_is_const(op->args[1])) {
1150 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001151 if (v != 0) {
1152 tmp = do_constant_folding(opc, v, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001153 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001154 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001155 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001156 }
1157 break;
1158 }
1159 goto do_default;
1160
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001161 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001162 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1163 tmp = deposit64(arg_info(op->args[1])->val,
1164 op->args[3], op->args[4],
1165 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001166 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001167 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001168 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001169 goto do_default;
1170
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001171 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001172 if (arg_is_const(op->args[1])) {
1173 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001174 op->args[2], op->args[3]);
1175 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001176 break;
1177 }
1178 goto do_default;
1179
1180 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001181 if (arg_is_const(op->args[1])) {
1182 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001183 op->args[2], op->args[3]);
1184 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001185 break;
1186 }
1187 goto do_default;
1188
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001189 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001190 tmp = do_constant_folding_cond(opc, op->args[1],
1191 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001192 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001193 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001194 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001195 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001196 goto do_default;
1197
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001198 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001199 tmp = do_constant_folding_cond(opc, op->args[0],
1200 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001201 if (tmp != 2) {
1202 if (tmp) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001203 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001204 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001205 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001206 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001207 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001208 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001209 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001210 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001211 goto do_default;
1212
Richard Hendersonfa01a202012-09-21 10:13:37 -07001213 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001214 tmp = do_constant_folding_cond(opc, op->args[1],
1215 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001216 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001217 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001218 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001219 }
Richard Henderson63490392017-06-20 13:43:15 -07001220 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
1221 tcg_target_ulong tv = arg_info(op->args[3])->val;
1222 tcg_target_ulong fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001223 TCGCond cond = op->args[5];
Richard Henderson333b21b2016-10-23 20:44:32 -07001224 if (fv == 1 && tv == 0) {
1225 cond = tcg_invert_cond(cond);
1226 } else if (!(tv == 1 && fv == 0)) {
1227 goto do_default;
1228 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001229 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001230 op->opc = opc = (opc == INDEX_op_movcond_i32
1231 ? INDEX_op_setcond_i32
1232 : INDEX_op_setcond_i64);
1233 nb_iargs = 2;
1234 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001235 goto do_default;
1236
Richard Henderson212c3282012-10-02 11:32:28 -07001237 case INDEX_op_add2_i32:
1238 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001239 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1240 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1241 uint32_t al = arg_info(op->args[2])->val;
1242 uint32_t ah = arg_info(op->args[3])->val;
1243 uint32_t bl = arg_info(op->args[4])->val;
1244 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001245 uint64_t a = ((uint64_t)ah << 32) | al;
1246 uint64_t b = ((uint64_t)bh << 32) | bl;
1247 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001248 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson212c3282012-10-02 11:32:28 -07001249
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001250 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001251 a += b;
1252 } else {
1253 a -= b;
1254 }
1255
Richard Hendersonacd93702016-12-08 12:28:42 -08001256 rl = op->args[0];
1257 rh = op->args[1];
1258 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1259 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
Richard Henderson212c3282012-10-02 11:32:28 -07001260 break;
1261 }
1262 goto do_default;
1263
Richard Henderson14149682012-10-02 11:32:30 -07001264 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001265 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1266 uint32_t a = arg_info(op->args[2])->val;
1267 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001268 uint64_t r = (uint64_t)a * b;
1269 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001270 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson14149682012-10-02 11:32:30 -07001271
Richard Hendersonacd93702016-12-08 12:28:42 -08001272 rl = op->args[0];
1273 rh = op->args[1];
1274 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1275 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
Richard Henderson14149682012-10-02 11:32:30 -07001276 break;
1277 }
1278 goto do_default;
1279
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001280 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001281 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1282 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001283 if (tmp != 2) {
1284 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001285 do_brcond_true:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001286 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001287 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001288 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001289 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001290 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001291 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001292 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001293 } else if ((op->args[4] == TCG_COND_LT
1294 || op->args[4] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001295 && arg_is_const(op->args[2])
1296 && arg_info(op->args[2])->val == 0
1297 && arg_is_const(op->args[3])
1298 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001299 /* Simplify LT/GE comparisons vs zero to a single compare
1300 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001301 do_brcond_high:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001302 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001303 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001304 op->args[0] = op->args[1];
1305 op->args[1] = op->args[3];
1306 op->args[2] = op->args[4];
1307 op->args[3] = op->args[5];
1308 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001309 /* Simplify EQ comparisons where one of the pairs
1310 can be simplified. */
1311 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001312 op->args[0], op->args[2],
1313 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001314 if (tmp == 0) {
1315 goto do_brcond_false;
1316 } else if (tmp == 1) {
1317 goto do_brcond_high;
1318 }
1319 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001320 op->args[1], op->args[3],
1321 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001322 if (tmp == 0) {
1323 goto do_brcond_false;
1324 } else if (tmp != 1) {
1325 goto do_default;
1326 }
1327 do_brcond_low:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001328 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001329 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001330 op->args[1] = op->args[2];
1331 op->args[2] = op->args[4];
1332 op->args[3] = op->args[5];
1333 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001334 /* Simplify NE comparisons where one of the pairs
1335 can be simplified. */
1336 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001337 op->args[0], op->args[2],
1338 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001339 if (tmp == 0) {
1340 goto do_brcond_high;
1341 } else if (tmp == 1) {
1342 goto do_brcond_true;
1343 }
1344 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001345 op->args[1], op->args[3],
1346 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001347 if (tmp == 0) {
1348 goto do_brcond_low;
1349 } else if (tmp == 1) {
1350 goto do_brcond_true;
1351 }
1352 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001353 } else {
1354 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001355 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001356 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001357
1358 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001359 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1360 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001361 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001362 do_setcond_const:
Richard Hendersonacd93702016-12-08 12:28:42 -08001363 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1364 } else if ((op->args[5] == TCG_COND_LT
1365 || op->args[5] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001366 && arg_is_const(op->args[3])
1367 && arg_info(op->args[3])->val == 0
1368 && arg_is_const(op->args[4])
1369 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001370 /* Simplify LT/GE comparisons vs zero to a single compare
1371 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001372 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001373 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001374 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001375 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001376 op->args[1] = op->args[2];
1377 op->args[2] = op->args[4];
1378 op->args[3] = op->args[5];
1379 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001380 /* Simplify EQ comparisons where one of the pairs
1381 can be simplified. */
1382 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001383 op->args[1], op->args[3],
1384 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001385 if (tmp == 0) {
1386 goto do_setcond_const;
1387 } else if (tmp == 1) {
1388 goto do_setcond_high;
1389 }
1390 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001391 op->args[2], op->args[4],
1392 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001393 if (tmp == 0) {
1394 goto do_setcond_high;
1395 } else if (tmp != 1) {
1396 goto do_default;
1397 }
1398 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001399 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001400 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001401 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001402 op->args[2] = op->args[3];
1403 op->args[3] = op->args[5];
1404 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001405 /* Simplify NE comparisons where one of the pairs
1406 can be simplified. */
1407 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001408 op->args[1], op->args[3],
1409 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001410 if (tmp == 0) {
1411 goto do_setcond_high;
1412 } else if (tmp == 1) {
1413 goto do_setcond_const;
1414 }
1415 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001416 op->args[2], op->args[4],
1417 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001418 if (tmp == 0) {
1419 goto do_setcond_low;
1420 } else if (tmp == 1) {
1421 goto do_setcond_const;
1422 }
1423 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001424 } else {
1425 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001426 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001427 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001428
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001429 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001430 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001431 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001432 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001433 if (test_bit(i, temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001434 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001435 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001436 }
1437 }
Richard Hendersoncf066672014-03-22 20:06:52 -07001438 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001439
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001440 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001441 do_default:
1442 /* Default case: we know nothing about operation (or were unable
1443 to compute the operation result) so no propagation is done.
1444 We trash everything if the operation is the end of a basic
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001445 block, otherwise we only trash the output args. "mask" is
1446 the non-zero bits mask for the first output arg. */
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001447 if (def->flags & TCG_OPF_BB_END) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001448 bitmap_zero(temps_used.l, nb_temps);
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001449 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -07001450 do_reset_output:
1451 for (i = 0; i < nb_oargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001452 reset_temp(op->args[i]);
Aurelien Jarno30312442013-09-03 08:27:38 +02001453 /* Save the corresponding known-zero bits mask for the
1454 first output argument (only one supported so far). */
1455 if (i == 0) {
Richard Henderson63490392017-06-20 13:43:15 -07001456 arg_info(op->args[i])->mask = mask;
Aurelien Jarno30312442013-09-03 08:27:38 +02001457 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001458 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001459 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001460 break;
1461 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001462
1463 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001464 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001465 switch (opc) {
1466 case INDEX_op_mb:
1467 /* Merge two barriers of the same type into one,
1468 * or a weaker barrier into a stronger one,
1469 * or two weaker barriers into a stronger one.
1470 * mb X; mb Y => mb X|Y
1471 * mb; strl => mb; st
1472 * ldaq; mb => ld; mb
1473 * ldaq; strl => ld; mb; st
1474 * Other combinations are also merged into a strong
1475 * barrier. This is stricter than specified but for
1476 * the purposes of TCG is better than not optimizing.
1477 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001478 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001479 tcg_op_remove(s, op);
1480 break;
1481
1482 default:
1483 /* Opcodes that end the block stop the optimization. */
1484 if ((def->flags & TCG_OPF_BB_END) == 0) {
1485 break;
1486 }
1487 /* fallthru */
1488 case INDEX_op_qemu_ld_i32:
1489 case INDEX_op_qemu_ld_i64:
1490 case INDEX_op_qemu_st_i32:
1491 case INDEX_op_qemu_st_i64:
1492 case INDEX_op_call:
1493 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001494 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001495 break;
1496 }
1497 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001498 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001499 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001500 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001501}