blob: 24faa0626065bd7a68804bf1f90cad13a184f4c7 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040027#include "qemu-common.h"
Paolo Bonzini00f6da62016-03-15 13:16:36 +010028#include "exec/cpu-common.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029#include "tcg-op.h"
30
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040031#define CASE_OP_32_64(x) \
32 glue(glue(case INDEX_op_, x), _i32): \
33 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040034
Richard Henderson170ba882017-11-22 09:07:11 +010035#define CASE_OP_32_64_VEC(x) \
36 glue(glue(case INDEX_op_, x), _i32): \
37 glue(glue(case INDEX_op_, x), _i64): \
38 glue(glue(case INDEX_op_, x), _vec)
39
Kirill Batuzov22613af2011-07-07 16:37:13 +040040struct tcg_temp_info {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020041 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070042 TCGTemp *prev_copy;
43 TCGTemp *next_copy;
Kirill Batuzov22613af2011-07-07 16:37:13 +040044 tcg_target_ulong val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080045 tcg_target_ulong mask;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046};
47
Richard Henderson63490392017-06-20 13:43:15 -070048static inline struct tcg_temp_info *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020049{
Richard Henderson63490392017-06-20 13:43:15 -070050 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020051}
52
Richard Henderson63490392017-06-20 13:43:15 -070053static inline struct tcg_temp_info *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020054{
Richard Henderson63490392017-06-20 13:43:15 -070055 return ts_info(arg_temp(arg));
56}
57
58static inline bool ts_is_const(TCGTemp *ts)
59{
60 return ts_info(ts)->is_const;
61}
62
63static inline bool arg_is_const(TCGArg arg)
64{
65 return ts_is_const(arg_temp(arg));
66}
67
68static inline bool ts_is_copy(TCGTemp *ts)
69{
70 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020071}
72
Aurelien Jarnob41059d2015-07-27 12:41:44 +020073/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070074static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040075{
Richard Henderson63490392017-06-20 13:43:15 -070076 struct tcg_temp_info *ti = ts_info(ts);
77 struct tcg_temp_info *pi = ts_info(ti->prev_copy);
78 struct tcg_temp_info *ni = ts_info(ti->next_copy);
79
80 ni->prev_copy = ti->prev_copy;
81 pi->next_copy = ti->next_copy;
82 ti->next_copy = ts;
83 ti->prev_copy = ts;
84 ti->is_const = false;
85 ti->mask = -1;
86}
87
88static void reset_temp(TCGArg arg)
89{
90 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040091}
92
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020093/* Initialize and activate a temporary. */
Emilio G. Cota34184b02017-07-19 14:32:24 -040094static void init_ts_info(struct tcg_temp_info *infos,
95 TCGTempSet *temps_used, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020096{
Richard Henderson63490392017-06-20 13:43:15 -070097 size_t idx = temp_idx(ts);
Emilio G. Cota34184b02017-07-19 14:32:24 -040098 if (!test_bit(idx, temps_used->l)) {
99 struct tcg_temp_info *ti = &infos[idx];
Richard Henderson63490392017-06-20 13:43:15 -0700100
101 ts->state_ptr = ti;
102 ti->next_copy = ts;
103 ti->prev_copy = ts;
104 ti->is_const = false;
105 ti->mask = -1;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400106 set_bit(idx, temps_used->l);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200107 }
108}
109
Emilio G. Cota34184b02017-07-19 14:32:24 -0400110static void init_arg_info(struct tcg_temp_info *infos,
111 TCGTempSet *temps_used, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700112{
Emilio G. Cota34184b02017-07-19 14:32:24 -0400113 init_ts_info(infos, temps_used, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700114}
115
Richard Henderson63490392017-06-20 13:43:15 -0700116static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200117{
Richard Henderson63490392017-06-20 13:43:15 -0700118 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200119
120 /* If this is already a global, we can't do better. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600121 if (ts->temp_global) {
Richard Henderson63490392017-06-20 13:43:15 -0700122 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200123 }
124
125 /* Search for a global first. */
Richard Henderson63490392017-06-20 13:43:15 -0700126 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
127 if (i->temp_global) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200128 return i;
129 }
130 }
131
132 /* If it is a temp, search for a temp local. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600133 if (!ts->temp_local) {
Richard Henderson63490392017-06-20 13:43:15 -0700134 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
135 if (ts->temp_local) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200136 return i;
137 }
138 }
139 }
140
141 /* Failure to find a better representation, return the same temp. */
Richard Henderson63490392017-06-20 13:43:15 -0700142 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200143}
144
Richard Henderson63490392017-06-20 13:43:15 -0700145static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200146{
Richard Henderson63490392017-06-20 13:43:15 -0700147 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200148
Richard Henderson63490392017-06-20 13:43:15 -0700149 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200150 return true;
151 }
152
Richard Henderson63490392017-06-20 13:43:15 -0700153 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200154 return false;
155 }
156
Richard Henderson63490392017-06-20 13:43:15 -0700157 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
158 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200159 return true;
160 }
161 }
162
163 return false;
164}
165
Richard Henderson63490392017-06-20 13:43:15 -0700166static bool args_are_copies(TCGArg arg1, TCGArg arg2)
167{
168 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
169}
170
Richard Hendersonacd93702016-12-08 12:28:42 -0800171static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200172{
Richard Henderson170ba882017-11-22 09:07:11 +0100173 const TCGOpDef *def;
174 TCGOpcode new_op;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200175 tcg_target_ulong mask;
Richard Henderson63490392017-06-20 13:43:15 -0700176 struct tcg_temp_info *di = arg_info(dst);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200177
Richard Henderson170ba882017-11-22 09:07:11 +0100178 def = &tcg_op_defs[op->opc];
179 if (def->flags & TCG_OPF_VECTOR) {
180 new_op = INDEX_op_dupi_vec;
181 } else if (def->flags & TCG_OPF_64BIT) {
182 new_op = INDEX_op_movi_i64;
183 } else {
184 new_op = INDEX_op_movi_i32;
185 }
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200186 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100187 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
188 op->args[0] = dst;
189 op->args[1] = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200190
191 reset_temp(dst);
Richard Henderson63490392017-06-20 13:43:15 -0700192 di->is_const = true;
193 di->val = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200194 mask = val;
Aurelien Jarno96152122015-07-10 18:03:30 +0200195 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200196 /* High bits of the destination are now garbage. */
197 mask |= ~0xffffffffull;
198 }
Richard Henderson63490392017-06-20 13:43:15 -0700199 di->mask = mask;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200200}
201
Richard Hendersonacd93702016-12-08 12:28:42 -0800202static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400203{
Richard Henderson63490392017-06-20 13:43:15 -0700204 TCGTemp *dst_ts = arg_temp(dst);
205 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100206 const TCGOpDef *def;
Richard Henderson63490392017-06-20 13:43:15 -0700207 struct tcg_temp_info *di;
208 struct tcg_temp_info *si;
209 tcg_target_ulong mask;
210 TCGOpcode new_op;
211
212 if (ts_are_copies(dst_ts, src_ts)) {
Aurelien Jarno53657182015-06-04 21:53:25 +0200213 tcg_op_remove(s, op);
214 return;
215 }
216
Richard Henderson63490392017-06-20 13:43:15 -0700217 reset_ts(dst_ts);
218 di = ts_info(dst_ts);
219 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100220 def = &tcg_op_defs[op->opc];
221 if (def->flags & TCG_OPF_VECTOR) {
222 new_op = INDEX_op_mov_vec;
223 } else if (def->flags & TCG_OPF_64BIT) {
224 new_op = INDEX_op_mov_i64;
225 } else {
226 new_op = INDEX_op_mov_i32;
227 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700228 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100229 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700230 op->args[0] = dst;
231 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700232
Richard Henderson63490392017-06-20 13:43:15 -0700233 mask = si->mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700234 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
235 /* High bits of the destination are now garbage. */
236 mask |= ~0xffffffffull;
237 }
Richard Henderson63490392017-06-20 13:43:15 -0700238 di->mask = mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700239
Richard Henderson63490392017-06-20 13:43:15 -0700240 if (src_ts->type == dst_ts->type) {
241 struct tcg_temp_info *ni = ts_info(si->next_copy);
242
243 di->next_copy = si->next_copy;
244 di->prev_copy = src_ts;
245 ni->prev_copy = dst_ts;
246 si->next_copy = dst_ts;
247 di->is_const = si->is_const;
248 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800249 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400250}
251
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000252static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400253{
Richard Henderson03271522013-08-14 14:35:56 -0700254 uint64_t l64, h64;
255
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400256 switch (op) {
257 CASE_OP_32_64(add):
258 return x + y;
259
260 CASE_OP_32_64(sub):
261 return x - y;
262
263 CASE_OP_32_64(mul):
264 return x * y;
265
Kirill Batuzov9a810902011-07-07 16:37:15 +0400266 CASE_OP_32_64(and):
267 return x & y;
268
269 CASE_OP_32_64(or):
270 return x | y;
271
272 CASE_OP_32_64(xor):
273 return x ^ y;
274
Kirill Batuzov55c09752011-07-07 16:37:16 +0400275 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700276 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400277
Kirill Batuzov55c09752011-07-07 16:37:16 +0400278 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700279 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400280
281 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700282 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400283
Kirill Batuzov55c09752011-07-07 16:37:16 +0400284 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700285 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286
287 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
293 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
299 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700305 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400306 return ~x;
307
Richard Hendersoncb25c802011-08-17 14:11:47 -0700308 CASE_OP_32_64(neg):
309 return -x;
310
311 CASE_OP_32_64(andc):
312 return x & ~y;
313
314 CASE_OP_32_64(orc):
315 return x | ~y;
316
317 CASE_OP_32_64(eqv):
318 return ~(x ^ y);
319
320 CASE_OP_32_64(nand):
321 return ~(x & y);
322
323 CASE_OP_32_64(nor):
324 return ~(x | y);
325
Richard Henderson0e28d002016-11-16 09:23:28 +0100326 case INDEX_op_clz_i32:
327 return (uint32_t)x ? clz32(x) : y;
328
329 case INDEX_op_clz_i64:
330 return x ? clz64(x) : y;
331
332 case INDEX_op_ctz_i32:
333 return (uint32_t)x ? ctz32(x) : y;
334
335 case INDEX_op_ctz_i64:
336 return x ? ctz64(x) : y;
337
Richard Hendersona768e4e2016-11-21 11:13:39 +0100338 case INDEX_op_ctpop_i32:
339 return ctpop32(x);
340
341 case INDEX_op_ctpop_i64:
342 return ctpop64(x);
343
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700344 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400345 return (int8_t)x;
346
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700347 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400348 return (int16_t)x;
349
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700350 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400351 return (uint8_t)x;
352
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700353 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400354 return (uint16_t)x;
355
Richard Henderson64985942018-11-20 08:53:34 +0100356 CASE_OP_32_64(bswap16):
357 return bswap16(x);
358
359 CASE_OP_32_64(bswap32):
360 return bswap32(x);
361
362 case INDEX_op_bswap64_i64:
363 return bswap64(x);
364
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200365 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400366 case INDEX_op_ext32s_i64:
367 return (int32_t)x;
368
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200369 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700370 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400371 case INDEX_op_ext32u_i64:
372 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400373
Richard Henderson609ad702015-07-24 07:16:00 -0700374 case INDEX_op_extrh_i64_i32:
375 return (uint64_t)x >> 32;
376
Richard Henderson03271522013-08-14 14:35:56 -0700377 case INDEX_op_muluh_i32:
378 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
379 case INDEX_op_mulsh_i32:
380 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
381
382 case INDEX_op_muluh_i64:
383 mulu64(&l64, &h64, x, y);
384 return h64;
385 case INDEX_op_mulsh_i64:
386 muls64(&l64, &h64, x, y);
387 return h64;
388
Richard Henderson01547f72013-08-14 15:22:46 -0700389 case INDEX_op_div_i32:
390 /* Avoid crashing on divide by zero, otherwise undefined. */
391 return (int32_t)x / ((int32_t)y ? : 1);
392 case INDEX_op_divu_i32:
393 return (uint32_t)x / ((uint32_t)y ? : 1);
394 case INDEX_op_div_i64:
395 return (int64_t)x / ((int64_t)y ? : 1);
396 case INDEX_op_divu_i64:
397 return (uint64_t)x / ((uint64_t)y ? : 1);
398
399 case INDEX_op_rem_i32:
400 return (int32_t)x % ((int32_t)y ? : 1);
401 case INDEX_op_remu_i32:
402 return (uint32_t)x % ((uint32_t)y ? : 1);
403 case INDEX_op_rem_i64:
404 return (int64_t)x % ((int64_t)y ? : 1);
405 case INDEX_op_remu_i64:
406 return (uint64_t)x % ((uint64_t)y ? : 1);
407
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400408 default:
409 fprintf(stderr,
410 "Unrecognized operation %d in do_constant_folding.\n", op);
411 tcg_abort();
412 }
413}
414
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000415static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400416{
Richard Henderson170ba882017-11-22 09:07:11 +0100417 const TCGOpDef *def = &tcg_op_defs[op];
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400418 TCGArg res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100419 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200420 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400421 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400422 return res;
423}
424
Richard Henderson9519da72012-10-02 11:32:26 -0700425static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
426{
427 switch (c) {
428 case TCG_COND_EQ:
429 return x == y;
430 case TCG_COND_NE:
431 return x != y;
432 case TCG_COND_LT:
433 return (int32_t)x < (int32_t)y;
434 case TCG_COND_GE:
435 return (int32_t)x >= (int32_t)y;
436 case TCG_COND_LE:
437 return (int32_t)x <= (int32_t)y;
438 case TCG_COND_GT:
439 return (int32_t)x > (int32_t)y;
440 case TCG_COND_LTU:
441 return x < y;
442 case TCG_COND_GEU:
443 return x >= y;
444 case TCG_COND_LEU:
445 return x <= y;
446 case TCG_COND_GTU:
447 return x > y;
448 default:
449 tcg_abort();
450 }
451}
452
453static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
454{
455 switch (c) {
456 case TCG_COND_EQ:
457 return x == y;
458 case TCG_COND_NE:
459 return x != y;
460 case TCG_COND_LT:
461 return (int64_t)x < (int64_t)y;
462 case TCG_COND_GE:
463 return (int64_t)x >= (int64_t)y;
464 case TCG_COND_LE:
465 return (int64_t)x <= (int64_t)y;
466 case TCG_COND_GT:
467 return (int64_t)x > (int64_t)y;
468 case TCG_COND_LTU:
469 return x < y;
470 case TCG_COND_GEU:
471 return x >= y;
472 case TCG_COND_LEU:
473 return x <= y;
474 case TCG_COND_GTU:
475 return x > y;
476 default:
477 tcg_abort();
478 }
479}
480
481static bool do_constant_folding_cond_eq(TCGCond c)
482{
483 switch (c) {
484 case TCG_COND_GT:
485 case TCG_COND_LTU:
486 case TCG_COND_LT:
487 case TCG_COND_GTU:
488 case TCG_COND_NE:
489 return 0;
490 case TCG_COND_GE:
491 case TCG_COND_GEU:
492 case TCG_COND_LE:
493 case TCG_COND_LEU:
494 case TCG_COND_EQ:
495 return 1;
496 default:
497 tcg_abort();
498 }
499}
500
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200501/* Return 2 if the condition can't be simplified, and the result
502 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200503static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
504 TCGArg y, TCGCond c)
505{
Richard Henderson63490392017-06-20 13:43:15 -0700506 tcg_target_ulong xv = arg_info(x)->val;
507 tcg_target_ulong yv = arg_info(y)->val;
508 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100509 const TCGOpDef *def = &tcg_op_defs[op];
510 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
511 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700512 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100513 } else {
514 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200515 }
Richard Henderson63490392017-06-20 13:43:15 -0700516 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700517 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700518 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200519 switch (c) {
520 case TCG_COND_LTU:
521 return 0;
522 case TCG_COND_GEU:
523 return 1;
524 default:
525 return 2;
526 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200527 }
Alex Bennée550276a2016-09-30 22:30:55 +0100528 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200529}
530
Richard Henderson6c4382f2012-10-02 11:32:27 -0700531/* Return 2 if the condition can't be simplified, and the result
532 of the condition (0 or 1) if it can */
533static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
534{
535 TCGArg al = p1[0], ah = p1[1];
536 TCGArg bl = p2[0], bh = p2[1];
537
Richard Henderson63490392017-06-20 13:43:15 -0700538 if (arg_is_const(bl) && arg_is_const(bh)) {
539 tcg_target_ulong blv = arg_info(bl)->val;
540 tcg_target_ulong bhv = arg_info(bh)->val;
541 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700542
Richard Henderson63490392017-06-20 13:43:15 -0700543 if (arg_is_const(al) && arg_is_const(ah)) {
544 tcg_target_ulong alv = arg_info(al)->val;
545 tcg_target_ulong ahv = arg_info(ah)->val;
546 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700547 return do_constant_folding_cond_64(a, b, c);
548 }
549 if (b == 0) {
550 switch (c) {
551 case TCG_COND_LTU:
552 return 0;
553 case TCG_COND_GEU:
554 return 1;
555 default:
556 break;
557 }
558 }
559 }
Richard Henderson63490392017-06-20 13:43:15 -0700560 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700561 return do_constant_folding_cond_eq(c);
562 }
563 return 2;
564}
565
Richard Henderson24c9ae42012-10-02 11:32:21 -0700566static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
567{
568 TCGArg a1 = *p1, a2 = *p2;
569 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700570 sum += arg_is_const(a1);
571 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700572
573 /* Prefer the constant in second argument, and then the form
574 op a, a, b, which is better handled on non-RISC hosts. */
575 if (sum > 0 || (sum == 0 && dest == a2)) {
576 *p1 = a2;
577 *p2 = a1;
578 return true;
579 }
580 return false;
581}
582
Richard Henderson0bfcb862012-10-02 11:32:23 -0700583static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
584{
585 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700586 sum += arg_is_const(p1[0]);
587 sum += arg_is_const(p1[1]);
588 sum -= arg_is_const(p2[0]);
589 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700590 if (sum > 0) {
591 TCGArg t;
592 t = p1[0], p1[0] = p2[0], p2[0] = t;
593 t = p1[1], p1[1] = p2[1], p2[1] = t;
594 return true;
595 }
596 return false;
597}
598
Kirill Batuzov22613af2011-07-07 16:37:13 +0400599/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200600void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400601{
Richard Henderson15fa08f2017-11-02 15:19:14 +0100602 int nb_temps, nb_globals;
603 TCGOp *op, *op_next, *prev_mb = NULL;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400604 struct tcg_temp_info *infos;
605 TCGTempSet temps_used;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700606
Kirill Batuzov22613af2011-07-07 16:37:13 +0400607 /* Array VALS has an element for each temp.
608 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200609 If this temp is a copy of other ones then the other copies are
610 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400611
612 nb_temps = s->nb_temps;
613 nb_globals = s->nb_globals;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400614 bitmap_zero(temps_used.l, nb_temps);
615 infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps);
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400616
Richard Henderson15fa08f2017-11-02 15:19:14 +0100617 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700618 tcg_target_ulong mask, partmask, affected;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700619 int nb_oargs, nb_iargs, i;
Richard Hendersoncf066672014-03-22 20:06:52 -0700620 TCGArg tmp;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700621 TCGOpcode opc = op->opc;
622 const TCGOpDef *def = &tcg_op_defs[opc];
623
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200624 /* Count the arguments, and initialize the temps that are
625 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700626 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100627 nb_oargs = TCGOP_CALLO(op);
628 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200629 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700630 TCGTemp *ts = arg_temp(op->args[i]);
631 if (ts) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400632 init_ts_info(infos, &temps_used, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200633 }
634 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200635 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700636 nb_oargs = def->nb_oargs;
637 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200638 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400639 init_arg_info(infos, &temps_used, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200640 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700641 }
642
643 /* Do copy propagation */
644 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700645 TCGTemp *ts = arg_temp(op->args[i]);
646 if (ts && ts_is_copy(ts)) {
647 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400648 }
649 }
650
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400651 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700652 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100653 CASE_OP_32_64_VEC(add):
654 CASE_OP_32_64_VEC(mul):
655 CASE_OP_32_64_VEC(and):
656 CASE_OP_32_64_VEC(or):
657 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700658 CASE_OP_32_64(eqv):
659 CASE_OP_32_64(nand):
660 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700661 CASE_OP_32_64(muluh):
662 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800663 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400664 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200665 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800666 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
667 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200668 }
669 break;
670 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800671 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
672 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200673 }
674 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700675 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800676 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
677 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700678 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700679 /* For movcond, we canonicalize the "false" input reg to match
680 the destination reg so that the tcg backend can implement
681 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800682 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
683 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700684 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700685 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800686 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800687 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
688 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700689 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800690 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800691 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800692 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700693 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700694 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800695 if (swap_commutative2(&op->args[0], &op->args[2])) {
696 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700697 }
698 break;
699 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800700 if (swap_commutative2(&op->args[1], &op->args[3])) {
701 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700702 }
703 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400704 default:
705 break;
706 }
707
Richard Henderson2d497542013-03-21 09:13:33 -0700708 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
709 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700710 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200711 CASE_OP_32_64(shl):
712 CASE_OP_32_64(shr):
713 CASE_OP_32_64(sar):
714 CASE_OP_32_64(rotl):
715 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700716 if (arg_is_const(op->args[1])
717 && arg_info(op->args[1])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800718 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200719 continue;
720 }
721 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100722 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700723 {
724 TCGOpcode neg_op;
725 bool have_neg;
726
Richard Henderson63490392017-06-20 13:43:15 -0700727 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700728 /* Proceed with possible constant folding. */
729 break;
730 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700731 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700732 neg_op = INDEX_op_neg_i32;
733 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100734 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700735 neg_op = INDEX_op_neg_i64;
736 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dd2019-04-20 00:27:24 +0000737 } else if (TCG_TARGET_HAS_neg_vec) {
738 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
739 unsigned vece = TCGOP_VECE(op);
Richard Henderson170ba882017-11-22 09:07:11 +0100740 neg_op = INDEX_op_neg_vec;
Richard Hendersonac383dd2019-04-20 00:27:24 +0000741 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
742 } else {
743 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700744 }
745 if (!have_neg) {
746 break;
747 }
Richard Henderson63490392017-06-20 13:43:15 -0700748 if (arg_is_const(op->args[1])
749 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700750 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800751 reset_temp(op->args[0]);
752 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700753 continue;
754 }
755 }
756 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100757 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800758 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700759 if (!arg_is_const(op->args[1])
760 && arg_is_const(op->args[2])
761 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800762 i = 1;
763 goto try_not;
764 }
765 break;
766 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700767 if (!arg_is_const(op->args[1])
768 && arg_is_const(op->args[2])
769 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800770 i = 1;
771 goto try_not;
772 }
773 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100774 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700775 if (!arg_is_const(op->args[2])
776 && arg_is_const(op->args[1])
777 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800778 i = 2;
779 goto try_not;
780 }
781 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100782 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800783 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700784 if (!arg_is_const(op->args[2])
785 && arg_is_const(op->args[1])
786 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800787 i = 2;
788 goto try_not;
789 }
790 break;
791 try_not:
792 {
793 TCGOpcode not_op;
794 bool have_not;
795
Richard Henderson170ba882017-11-22 09:07:11 +0100796 if (def->flags & TCG_OPF_VECTOR) {
797 not_op = INDEX_op_not_vec;
798 have_not = TCG_TARGET_HAS_not_vec;
799 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800800 not_op = INDEX_op_not_i64;
801 have_not = TCG_TARGET_HAS_not_i64;
802 } else {
803 not_op = INDEX_op_not_i32;
804 have_not = TCG_TARGET_HAS_not_i32;
805 }
806 if (!have_not) {
807 break;
808 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700809 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800810 reset_temp(op->args[0]);
811 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800812 continue;
813 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200814 default:
815 break;
816 }
817
Richard Henderson464a1442014-01-31 07:42:11 -0600818 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700819 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100820 CASE_OP_32_64_VEC(add):
821 CASE_OP_32_64_VEC(sub):
822 CASE_OP_32_64_VEC(or):
823 CASE_OP_32_64_VEC(xor):
824 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400825 CASE_OP_32_64(shl):
826 CASE_OP_32_64(shr):
827 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700828 CASE_OP_32_64(rotl):
829 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700830 if (!arg_is_const(op->args[1])
831 && arg_is_const(op->args[2])
832 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800833 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200834 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400835 }
836 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100837 CASE_OP_32_64_VEC(and):
838 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600839 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700840 if (!arg_is_const(op->args[1])
841 && arg_is_const(op->args[2])
842 && arg_info(op->args[2])->val == -1) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800843 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200844 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600845 }
846 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200847 default:
848 break;
849 }
850
Aurelien Jarno30312442013-09-03 08:27:38 +0200851 /* Simplify using known-zero bits. Currently only ops with a single
852 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800853 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800854 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700855 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800856 CASE_OP_32_64(ext8s):
Richard Henderson63490392017-06-20 13:43:15 -0700857 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800858 break;
859 }
860 CASE_OP_32_64(ext8u):
861 mask = 0xff;
862 goto and_const;
863 CASE_OP_32_64(ext16s):
Richard Henderson63490392017-06-20 13:43:15 -0700864 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800865 break;
866 }
867 CASE_OP_32_64(ext16u):
868 mask = 0xffff;
869 goto and_const;
870 case INDEX_op_ext32s_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700871 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800872 break;
873 }
874 case INDEX_op_ext32u_i64:
875 mask = 0xffffffffU;
876 goto and_const;
877
878 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -0700879 mask = arg_info(op->args[2])->mask;
880 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800881 and_const:
Richard Henderson63490392017-06-20 13:43:15 -0700882 affected = arg_info(op->args[1])->mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800883 }
Richard Henderson63490392017-06-20 13:43:15 -0700884 mask = arg_info(op->args[1])->mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800885 break;
886
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200887 case INDEX_op_ext_i32_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700888 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200889 break;
890 }
891 case INDEX_op_extu_i32_i64:
892 /* We do not compute affected as it is a size changing op. */
Richard Henderson63490392017-06-20 13:43:15 -0700893 mask = (uint32_t)arg_info(op->args[1])->mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200894 break;
895
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800896 CASE_OP_32_64(andc):
897 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800898 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700899 if (arg_is_const(op->args[2])) {
900 mask = ~arg_info(op->args[2])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800901 goto and_const;
902 }
Richard Henderson63490392017-06-20 13:43:15 -0700903 /* But we certainly know nothing outside args[1] may be set. */
904 mask = arg_info(op->args[1])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800905 break;
906
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200907 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700908 if (arg_is_const(op->args[2])) {
909 tmp = arg_info(op->args[2])->val & 31;
910 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200911 }
912 break;
913 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700914 if (arg_is_const(op->args[2])) {
915 tmp = arg_info(op->args[2])->val & 63;
916 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800917 }
918 break;
919
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200920 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700921 if (arg_is_const(op->args[2])) {
922 tmp = arg_info(op->args[2])->val & 31;
923 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200924 }
925 break;
926 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700927 if (arg_is_const(op->args[2])) {
928 tmp = arg_info(op->args[2])->val & 63;
929 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800930 }
931 break;
932
Richard Henderson609ad702015-07-24 07:16:00 -0700933 case INDEX_op_extrl_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700934 mask = (uint32_t)arg_info(op->args[1])->mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700935 break;
936 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700937 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700938 break;
939
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800940 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700941 if (arg_is_const(op->args[2])) {
942 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
943 mask = arg_info(op->args[1])->mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800944 }
945 break;
946
947 CASE_OP_32_64(neg):
948 /* Set to 1 all bits to the left of the rightmost. */
Richard Henderson63490392017-06-20 13:43:15 -0700949 mask = -(arg_info(op->args[1])->mask
950 & -arg_info(op->args[1])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800951 break;
952
953 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -0700954 mask = deposit64(arg_info(op->args[1])->mask,
955 op->args[3], op->args[4],
956 arg_info(op->args[2])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800957 break;
958
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500959 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -0700960 mask = extract64(arg_info(op->args[1])->mask,
961 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800962 if (op->args[2] == 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700963 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500964 }
965 break;
966 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -0700967 mask = sextract64(arg_info(op->args[1])->mask,
Richard Hendersonacd93702016-12-08 12:28:42 -0800968 op->args[2], op->args[3]);
969 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700970 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500971 }
972 break;
973
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800974 CASE_OP_32_64(or):
975 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -0700976 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800977 break;
978
Richard Henderson0e28d002016-11-16 09:23:28 +0100979 case INDEX_op_clz_i32:
980 case INDEX_op_ctz_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700981 mask = arg_info(op->args[2])->mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100982 break;
983
984 case INDEX_op_clz_i64:
985 case INDEX_op_ctz_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700986 mask = arg_info(op->args[2])->mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100987 break;
988
Richard Hendersona768e4e2016-11-21 11:13:39 +0100989 case INDEX_op_ctpop_i32:
990 mask = 32 | 31;
991 break;
992 case INDEX_op_ctpop_i64:
993 mask = 64 | 63;
994 break;
995
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800996 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -0700997 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800998 mask = 1;
999 break;
1000
1001 CASE_OP_32_64(movcond):
Richard Henderson63490392017-06-20 13:43:15 -07001002 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001003 break;
1004
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001005 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001006 mask = 0xff;
1007 break;
1008 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001009 mask = 0xffff;
1010 break;
1011 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001012 mask = 0xffffffffu;
1013 break;
1014
1015 CASE_OP_32_64(qemu_ld):
1016 {
Richard Hendersonacd93702016-12-08 12:28:42 -08001017 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Richard Henderson59227d52015-05-12 11:51:44 -07001018 TCGMemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001019 if (!(mop & MO_SIGN)) {
1020 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1021 }
1022 }
1023 break;
1024
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001025 default:
1026 break;
1027 }
1028
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001029 /* 32-bit ops generate 32-bit results. For the result is zero test
1030 below, we can ignore high bits, but for further optimizations we
1031 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -07001032 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001033 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -07001034 mask |= ~(tcg_target_ulong)0xffffffffu;
1035 partmask &= 0xffffffffu;
1036 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001037 }
1038
Richard Henderson24666ba2014-05-22 11:14:10 -07001039 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001040 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001041 tcg_opt_gen_movi(s, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001042 continue;
1043 }
1044 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001045 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001046 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001047 continue;
1048 }
1049
Aurelien Jarno56e49432012-09-06 16:47:13 +02001050 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001051 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001052 CASE_OP_32_64_VEC(and):
1053 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001054 CASE_OP_32_64(muluh):
1055 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001056 if (arg_is_const(op->args[2])
1057 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001058 tcg_opt_gen_movi(s, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001059 continue;
1060 }
1061 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001062 default:
1063 break;
1064 }
1065
1066 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001067 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001068 CASE_OP_32_64_VEC(or):
1069 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001070 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001071 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001072 continue;
1073 }
1074 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001075 default:
1076 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001077 }
1078
Aurelien Jarno3c941932012-09-18 19:12:36 +02001079 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001080 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001081 CASE_OP_32_64_VEC(andc):
1082 CASE_OP_32_64_VEC(sub):
1083 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001084 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001085 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001086 continue;
1087 }
1088 break;
1089 default:
1090 break;
1091 }
1092
Kirill Batuzov22613af2011-07-07 16:37:13 +04001093 /* Propagate constants through copy operations and do constant
1094 folding. Constants will be substituted to arguments by register
1095 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001096 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001097 CASE_OP_32_64_VEC(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001098 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001099 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001100 CASE_OP_32_64(movi):
Richard Henderson170ba882017-11-22 09:07:11 +01001101 case INDEX_op_dupi_vec:
Richard Hendersonacd93702016-12-08 12:28:42 -08001102 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001103 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001104
Richard Henderson170ba882017-11-22 09:07:11 +01001105 case INDEX_op_dup_vec:
1106 if (arg_is_const(op->args[1])) {
1107 tmp = arg_info(op->args[1])->val;
1108 tmp = dup_const(TCGOP_VECE(op), tmp);
1109 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson1fb57da72018-08-05 16:32:58 -07001110 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001111 }
Richard Henderson1fb57da72018-08-05 16:32:58 -07001112 goto do_default;
Richard Henderson170ba882017-11-22 09:07:11 +01001113
Kirill Batuzova640f032011-07-07 16:37:17 +04001114 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001115 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001116 CASE_OP_32_64(ext8s):
1117 CASE_OP_32_64(ext8u):
1118 CASE_OP_32_64(ext16s):
1119 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001120 CASE_OP_32_64(ctpop):
Richard Henderson64985942018-11-20 08:53:34 +01001121 CASE_OP_32_64(bswap16):
1122 CASE_OP_32_64(bswap32):
1123 case INDEX_op_bswap64_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +04001124 case INDEX_op_ext32s_i64:
1125 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001126 case INDEX_op_ext_i32_i64:
1127 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001128 case INDEX_op_extrl_i64_i32:
1129 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001130 if (arg_is_const(op->args[1])) {
1131 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001132 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001133 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001134 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001135 goto do_default;
1136
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001137 CASE_OP_32_64(add):
1138 CASE_OP_32_64(sub):
1139 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001140 CASE_OP_32_64(or):
1141 CASE_OP_32_64(and):
1142 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001143 CASE_OP_32_64(shl):
1144 CASE_OP_32_64(shr):
1145 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001146 CASE_OP_32_64(rotl):
1147 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001148 CASE_OP_32_64(andc):
1149 CASE_OP_32_64(orc):
1150 CASE_OP_32_64(eqv):
1151 CASE_OP_32_64(nand):
1152 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001153 CASE_OP_32_64(muluh):
1154 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001155 CASE_OP_32_64(div):
1156 CASE_OP_32_64(divu):
1157 CASE_OP_32_64(rem):
1158 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001159 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1160 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1161 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001162 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001163 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001164 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001165 goto do_default;
1166
Richard Henderson0e28d002016-11-16 09:23:28 +01001167 CASE_OP_32_64(clz):
1168 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001169 if (arg_is_const(op->args[1])) {
1170 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001171 if (v != 0) {
1172 tmp = do_constant_folding(opc, v, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001173 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001174 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001175 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001176 }
1177 break;
1178 }
1179 goto do_default;
1180
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001181 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001182 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1183 tmp = deposit64(arg_info(op->args[1])->val,
1184 op->args[3], op->args[4],
1185 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001186 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001187 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001188 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001189 goto do_default;
1190
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001191 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001192 if (arg_is_const(op->args[1])) {
1193 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001194 op->args[2], op->args[3]);
1195 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001196 break;
1197 }
1198 goto do_default;
1199
1200 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001201 if (arg_is_const(op->args[1])) {
1202 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001203 op->args[2], op->args[3]);
1204 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001205 break;
1206 }
1207 goto do_default;
1208
Richard Hendersonfce12962019-02-25 10:29:25 -08001209 CASE_OP_32_64(extract2):
1210 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1211 TCGArg v1 = arg_info(op->args[1])->val;
1212 TCGArg v2 = arg_info(op->args[2])->val;
1213
1214 if (opc == INDEX_op_extract2_i64) {
1215 tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3]));
1216 } else {
1217 tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3]));
1218 tmp = (int32_t)tmp;
1219 }
1220 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1221 break;
1222 }
1223 goto do_default;
1224
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001225 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001226 tmp = do_constant_folding_cond(opc, op->args[1],
1227 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001228 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001229 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001230 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001231 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001232 goto do_default;
1233
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001234 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001235 tmp = do_constant_folding_cond(opc, op->args[0],
1236 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001237 if (tmp != 2) {
1238 if (tmp) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001239 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001240 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001241 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001242 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001243 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001244 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001245 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001246 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001247 goto do_default;
1248
Richard Hendersonfa01a202012-09-21 10:13:37 -07001249 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001250 tmp = do_constant_folding_cond(opc, op->args[1],
1251 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001252 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001253 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001254 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001255 }
Richard Henderson63490392017-06-20 13:43:15 -07001256 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
1257 tcg_target_ulong tv = arg_info(op->args[3])->val;
1258 tcg_target_ulong fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001259 TCGCond cond = op->args[5];
Richard Henderson333b21b2016-10-23 20:44:32 -07001260 if (fv == 1 && tv == 0) {
1261 cond = tcg_invert_cond(cond);
1262 } else if (!(tv == 1 && fv == 0)) {
1263 goto do_default;
1264 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001265 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001266 op->opc = opc = (opc == INDEX_op_movcond_i32
1267 ? INDEX_op_setcond_i32
1268 : INDEX_op_setcond_i64);
1269 nb_iargs = 2;
1270 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001271 goto do_default;
1272
Richard Henderson212c3282012-10-02 11:32:28 -07001273 case INDEX_op_add2_i32:
1274 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001275 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1276 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1277 uint32_t al = arg_info(op->args[2])->val;
1278 uint32_t ah = arg_info(op->args[3])->val;
1279 uint32_t bl = arg_info(op->args[4])->val;
1280 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001281 uint64_t a = ((uint64_t)ah << 32) | al;
1282 uint64_t b = ((uint64_t)bh << 32) | bl;
1283 TCGArg rl, rh;
Emilio G. Cotaac1043f2018-12-09 14:37:19 -05001284 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
Richard Henderson212c3282012-10-02 11:32:28 -07001285
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001286 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001287 a += b;
1288 } else {
1289 a -= b;
1290 }
1291
Richard Hendersonacd93702016-12-08 12:28:42 -08001292 rl = op->args[0];
1293 rh = op->args[1];
1294 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1295 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
Richard Henderson212c3282012-10-02 11:32:28 -07001296 break;
1297 }
1298 goto do_default;
1299
Richard Henderson14149682012-10-02 11:32:30 -07001300 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001301 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1302 uint32_t a = arg_info(op->args[2])->val;
1303 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001304 uint64_t r = (uint64_t)a * b;
1305 TCGArg rl, rh;
Emilio G. Cotaac1043f2018-12-09 14:37:19 -05001306 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
Richard Henderson14149682012-10-02 11:32:30 -07001307
Richard Hendersonacd93702016-12-08 12:28:42 -08001308 rl = op->args[0];
1309 rh = op->args[1];
1310 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1311 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
Richard Henderson14149682012-10-02 11:32:30 -07001312 break;
1313 }
1314 goto do_default;
1315
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001316 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001317 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1318 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001319 if (tmp != 2) {
1320 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001321 do_brcond_true:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001322 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001323 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001324 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001325 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001326 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001327 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001328 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001329 } else if ((op->args[4] == TCG_COND_LT
1330 || op->args[4] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001331 && arg_is_const(op->args[2])
1332 && arg_info(op->args[2])->val == 0
1333 && arg_is_const(op->args[3])
1334 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001335 /* Simplify LT/GE comparisons vs zero to a single compare
1336 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001337 do_brcond_high:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001338 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001339 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001340 op->args[0] = op->args[1];
1341 op->args[1] = op->args[3];
1342 op->args[2] = op->args[4];
1343 op->args[3] = op->args[5];
1344 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001345 /* Simplify EQ comparisons where one of the pairs
1346 can be simplified. */
1347 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001348 op->args[0], op->args[2],
1349 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001350 if (tmp == 0) {
1351 goto do_brcond_false;
1352 } else if (tmp == 1) {
1353 goto do_brcond_high;
1354 }
1355 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001356 op->args[1], op->args[3],
1357 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001358 if (tmp == 0) {
1359 goto do_brcond_false;
1360 } else if (tmp != 1) {
1361 goto do_default;
1362 }
1363 do_brcond_low:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001364 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001365 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001366 op->args[1] = op->args[2];
1367 op->args[2] = op->args[4];
1368 op->args[3] = op->args[5];
1369 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001370 /* Simplify NE comparisons where one of the pairs
1371 can be simplified. */
1372 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001373 op->args[0], op->args[2],
1374 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001375 if (tmp == 0) {
1376 goto do_brcond_high;
1377 } else if (tmp == 1) {
1378 goto do_brcond_true;
1379 }
1380 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001381 op->args[1], op->args[3],
1382 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001383 if (tmp == 0) {
1384 goto do_brcond_low;
1385 } else if (tmp == 1) {
1386 goto do_brcond_true;
1387 }
1388 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001389 } else {
1390 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001391 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001392 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001393
1394 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001395 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1396 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001397 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001398 do_setcond_const:
Richard Hendersonacd93702016-12-08 12:28:42 -08001399 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1400 } else if ((op->args[5] == TCG_COND_LT
1401 || op->args[5] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001402 && arg_is_const(op->args[3])
1403 && arg_info(op->args[3])->val == 0
1404 && arg_is_const(op->args[4])
1405 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001406 /* Simplify LT/GE comparisons vs zero to a single compare
1407 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001408 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001409 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001410 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001411 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001412 op->args[1] = op->args[2];
1413 op->args[2] = op->args[4];
1414 op->args[3] = op->args[5];
1415 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001416 /* Simplify EQ comparisons where one of the pairs
1417 can be simplified. */
1418 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001419 op->args[1], op->args[3],
1420 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001421 if (tmp == 0) {
1422 goto do_setcond_const;
1423 } else if (tmp == 1) {
1424 goto do_setcond_high;
1425 }
1426 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001427 op->args[2], op->args[4],
1428 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001429 if (tmp == 0) {
1430 goto do_setcond_high;
1431 } else if (tmp != 1) {
1432 goto do_default;
1433 }
1434 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001435 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001436 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001437 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001438 op->args[2] = op->args[3];
1439 op->args[3] = op->args[5];
1440 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001441 /* Simplify NE comparisons where one of the pairs
1442 can be simplified. */
1443 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001444 op->args[1], op->args[3],
1445 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001446 if (tmp == 0) {
1447 goto do_setcond_high;
1448 } else if (tmp == 1) {
1449 goto do_setcond_const;
1450 }
1451 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001452 op->args[2], op->args[4],
1453 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001454 if (tmp == 0) {
1455 goto do_setcond_low;
1456 } else if (tmp == 1) {
1457 goto do_setcond_const;
1458 }
1459 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001460 } else {
1461 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001462 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001463 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001464
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001465 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001466 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001467 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001468 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001469 if (test_bit(i, temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001470 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001471 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001472 }
1473 }
Richard Hendersoncf066672014-03-22 20:06:52 -07001474 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001475
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001476 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001477 do_default:
1478 /* Default case: we know nothing about operation (or were unable
1479 to compute the operation result) so no propagation is done.
1480 We trash everything if the operation is the end of a basic
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001481 block, otherwise we only trash the output args. "mask" is
1482 the non-zero bits mask for the first output arg. */
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001483 if (def->flags & TCG_OPF_BB_END) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001484 bitmap_zero(temps_used.l, nb_temps);
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001485 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -07001486 do_reset_output:
1487 for (i = 0; i < nb_oargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001488 reset_temp(op->args[i]);
Aurelien Jarno30312442013-09-03 08:27:38 +02001489 /* Save the corresponding known-zero bits mask for the
1490 first output argument (only one supported so far). */
1491 if (i == 0) {
Richard Henderson63490392017-06-20 13:43:15 -07001492 arg_info(op->args[i])->mask = mask;
Aurelien Jarno30312442013-09-03 08:27:38 +02001493 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001494 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001495 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001496 break;
1497 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001498
1499 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001500 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001501 switch (opc) {
1502 case INDEX_op_mb:
1503 /* Merge two barriers of the same type into one,
1504 * or a weaker barrier into a stronger one,
1505 * or two weaker barriers into a stronger one.
1506 * mb X; mb Y => mb X|Y
1507 * mb; strl => mb; st
1508 * ldaq; mb => ld; mb
1509 * ldaq; strl => ld; mb; st
1510 * Other combinations are also merged into a strong
1511 * barrier. This is stricter than specified but for
1512 * the purposes of TCG is better than not optimizing.
1513 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001514 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001515 tcg_op_remove(s, op);
1516 break;
1517
1518 default:
1519 /* Opcodes that end the block stop the optimization. */
1520 if ((def->flags & TCG_OPF_BB_END) == 0) {
1521 break;
1522 }
1523 /* fallthru */
1524 case INDEX_op_qemu_ld_i32:
1525 case INDEX_op_qemu_ld_i64:
1526 case INDEX_op_qemu_st_i32:
1527 case INDEX_op_qemu_st_i64:
1528 case INDEX_op_call:
1529 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001530 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001531 break;
1532 }
1533 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001534 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001535 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001536 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001537}