blob: b03b9b836376e6f2b128435ced8a07a5ef1b3dd6 [file] [log] [blame]
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public
4 * License v2 as published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
9 * General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public
12 * License along with this program; if not, write to the
13 * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
14 * Boston, MA 021110-1307, USA.
Avi Shchislowskidc7ab962016-03-08 14:22:41 -050015 *
16 * Modified to add field firmware update support,
17 * those modifications are Copyright (c) 2016 SanDisk Corp.
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050018 */
19
Gwendal Grignou771984c2014-07-01 12:46:18 -070020#include <errno.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050021#include <stdio.h>
22#include <stdlib.h>
23#include <string.h>
24#include <sys/ioctl.h>
Gwendal Grignou771984c2014-07-01 12:46:18 -070025#include <sys/param.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050026#include <sys/types.h>
27#include <dirent.h>
28#include <sys/stat.h>
29#include <unistd.h>
30#include <fcntl.h>
31#include <libgen.h>
32#include <limits.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050033#include <ctype.h>
Roman Peniaev023cc7c2014-08-12 23:25:45 +090034#include <errno.h>
35#include <stdint.h>
36#include <assert.h>
Al Cooper1b7f5d72016-06-07 16:35:46 -040037#include <linux/fs.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050038
39#include "mmc.h"
40#include "mmc_cmds.h"
Gwendal Grignou0da2c512015-01-08 15:36:03 -080041#include "ffu.h"
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050042
Nick Sanders9d57aa72014-03-05 21:38:54 -080043#define EXT_CSD_SIZE 512
Gwendal Grignou0da2c512015-01-08 15:36:03 -080044#define FFU_DATA_SIZE 512
Nick Sanders9d57aa72014-03-05 21:38:54 -080045#define CID_SIZE 16
46
Julius Wernerbcc3e2e2016-04-21 16:53:02 -070047/* Sending several commands too close together seems to cause timeouts. */
48#define INTER_COMMAND_GAP_US (50 * 1000)
49
Roman Peniaev023cc7c2014-08-12 23:25:45 +090050#include "3rdparty/hmac_sha/hmac_sha2.h"
Nick Sanders9d57aa72014-03-05 21:38:54 -080051
Al Cooper1b7f5d72016-06-07 16:35:46 -040052#define WP_BLKS_PER_QUERY 32
53
54#define USER_WP_PERM_PSWD_DIS 0x80
55#define USER_WP_CD_PERM_WP_DIS 0x40
56#define USER_WP_US_PERM_WP_DIS 0x10
57#define USER_WP_US_PWR_WP_DIS 0x08
58#define USER_WP_US_PERM_WP_EN 0x04
59#define USER_WP_US_PWR_WP_EN 0x01
60#define USER_WP_CLEAR (USER_WP_US_PERM_WP_DIS | USER_WP_US_PWR_WP_DIS \
61 | USER_WP_US_PERM_WP_EN | USER_WP_US_PWR_WP_EN)
62
63#define WPTYPE_NONE 0
64#define WPTYPE_TEMP 1
65#define WPTYPE_PWRON 2
66#define WPTYPE_PERM 3
67
68
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050069int read_extcsd(int fd, __u8 *ext_csd)
70{
71 int ret = 0;
72 struct mmc_ioc_cmd idata;
73 memset(&idata, 0, sizeof(idata));
Nick Sanders9d57aa72014-03-05 21:38:54 -080074 memset(ext_csd, 0, sizeof(__u8) * EXT_CSD_SIZE);
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050075 idata.write_flag = 0;
76 idata.opcode = MMC_SEND_EXT_CSD;
77 idata.arg = 0;
78 idata.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
Nick Sanders9d57aa72014-03-05 21:38:54 -080079 idata.blksz = EXT_CSD_SIZE;
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050080 idata.blocks = 1;
81 mmc_ioc_cmd_set_data(idata, ext_csd);
82
83 ret = ioctl(fd, MMC_IOC_CMD, &idata);
84 if (ret)
Nick Sanders9d57aa72014-03-05 21:38:54 -080085 perror("ioctl SEND_EXT_CSD");
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050086
87 return ret;
88}
89
90int write_extcsd_value(int fd, __u8 index, __u8 value)
91{
92 int ret = 0;
93 struct mmc_ioc_cmd idata;
94
95 memset(&idata, 0, sizeof(idata));
96 idata.write_flag = 1;
97 idata.opcode = MMC_SWITCH;
98 idata.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
99 (index << 16) |
100 (value << 8) |
101 EXT_CSD_CMD_SET_NORMAL;
102 idata.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
103
104 ret = ioctl(fd, MMC_IOC_CMD, &idata);
105 if (ret)
Nick Sanders9d57aa72014-03-05 21:38:54 -0800106 perror("ioctl Write EXT CSD");
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -0500107
108 return ret;
109}
110
Ben Gardiner27c357d2013-05-30 17:12:47 -0400111int send_status(int fd, __u32 *response)
112{
113 int ret = 0;
114 struct mmc_ioc_cmd idata;
115
116 memset(&idata, 0, sizeof(idata));
117 idata.opcode = MMC_SEND_STATUS;
118 idata.arg = (1 << 16);
119 idata.flags = MMC_RSP_R1 | MMC_CMD_AC;
120
121 ret = ioctl(fd, MMC_IOC_CMD, &idata);
122 if (ret)
123 perror("ioctl");
124
125 *response = idata.response[0];
126
127 return ret;
128}
129
Al Cooper1b7f5d72016-06-07 16:35:46 -0400130static __u32 get_size_in_blks(int fd)
131{
132 int res;
133 int size;
134
135 res = ioctl(fd, BLKGETSIZE, &size);
136 if (res) {
137 fprintf(stderr, "Error getting device size, errno: %d\n",
138 errno);
139 perror("");
140 return -1;
141 }
142 return size;
143}
144
145static int set_write_protect(int fd, __u32 blk_addr, int on_off)
146{
147 int ret = 0;
148 struct mmc_ioc_cmd idata;
149
150 memset(&idata, 0, sizeof(idata));
151 idata.write_flag = 1;
152 if (on_off)
153 idata.opcode = MMC_SET_WRITE_PROT;
154 else
155 idata.opcode = MMC_CLEAR_WRITE_PROT;
156 idata.arg = blk_addr;
157 idata.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
158
159 ret = ioctl(fd, MMC_IOC_CMD, &idata);
160 if (ret)
161 perror("ioctl");
162
163 return ret;
164}
165
166static int send_write_protect_type(int fd, __u32 blk_addr, __u64 *group_bits)
167{
168 int ret = 0;
169 struct mmc_ioc_cmd idata;
170 __u8 buf[8];
171 __u64 bits = 0;
172 int x;
173
174 memset(&idata, 0, sizeof(idata));
175 idata.write_flag = 0;
176 idata.opcode = MMC_SEND_WRITE_PROT_TYPE;
177 idata.blksz = 8,
178 idata.blocks = 1,
179 idata.arg = blk_addr;
180 idata.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
181 mmc_ioc_cmd_set_data(idata, buf);
182
183 ret = ioctl(fd, MMC_IOC_CMD, &idata);
184 if (ret)
185 perror("ioctl");
186 for (x = 0; x < sizeof(buf); x++)
187 bits |= (__u64)(buf[7 - x]) << (x * 8);
188 *group_bits = bits;
189 return ret;
190}
191
192static void print_writeprotect_boot_status(__u8 *ext_csd)
Chris Ballb9c7a172012-02-20 12:34:25 -0500193{
194 __u8 reg;
Al Cooper786418c2015-04-29 18:12:35 -0400195 __u8 ext_csd_rev = ext_csd[EXT_CSD_REV];
Chris Ballb9c7a172012-02-20 12:34:25 -0500196
197 /* A43: reserved [174:0] */
198 if (ext_csd_rev >= 5) {
199 printf("Boot write protection status registers"
200 " [BOOT_WP_STATUS]: 0x%02x\n", ext_csd[174]);
201
202 reg = ext_csd[EXT_CSD_BOOT_WP];
203 printf("Boot Area Write protection [BOOT_WP]: 0x%02x\n", reg);
204 printf(" Power ro locking: ");
205 if (reg & EXT_CSD_BOOT_WP_B_PWR_WP_DIS)
206 printf("not possible\n");
207 else
208 printf("possible\n");
209
210 printf(" Permanent ro locking: ");
211 if (reg & EXT_CSD_BOOT_WP_B_PERM_WP_DIS)
212 printf("not possible\n");
213 else
214 printf("possible\n");
215
216 printf(" ro lock status: ");
217 if (reg & EXT_CSD_BOOT_WP_B_PWR_WP_EN)
218 printf("locked until next power on\n");
219 else if (reg & EXT_CSD_BOOT_WP_B_PERM_WP_EN)
220 printf("locked permanently\n");
221 else
222 printf("not locked\n");
223 }
224}
225
Al Cooper1b7f5d72016-06-07 16:35:46 -0400226static int get_wp_group_size_in_blks(__u8 *ext_csd, __u32 *size)
227{
228 __u8 ext_csd_rev = ext_csd[EXT_CSD_REV];
229
230 if ((ext_csd_rev < 5) || (ext_csd[EXT_CSD_ERASE_GROUP_DEF] == 0))
231 return 1;
232
233 *size = ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
234 ext_csd[EXT_CSD_HC_WP_GRP_SIZE] * 1024;
235 return 0;
236}
237
238
239int do_writeprotect_boot_get(int nargs, char **argv)
Chris Ballb9c7a172012-02-20 12:34:25 -0500240{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800241 __u8 ext_csd[EXT_CSD_SIZE];
Chris Ballb9c7a172012-02-20 12:34:25 -0500242 int fd, ret;
243 char *device;
244
Al Cooper1b7f5d72016-06-07 16:35:46 -0400245 CHECK(nargs != 2,
246 "Usage: mmc writeprotect boot get </path/to/mmcblkX>\n",
247 exit(1));
Chris Ballb9c7a172012-02-20 12:34:25 -0500248
249 device = argv[1];
250
251 fd = open(device, O_RDWR);
252 if (fd < 0) {
253 perror("open");
254 exit(1);
255 }
256
257 ret = read_extcsd(fd, ext_csd);
258 if (ret) {
259 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
260 exit(1);
261 }
262
Al Cooper1b7f5d72016-06-07 16:35:46 -0400263 print_writeprotect_boot_status(ext_csd);
Chris Ballb9c7a172012-02-20 12:34:25 -0500264
265 return ret;
266}
267
Al Cooper1b7f5d72016-06-07 16:35:46 -0400268int do_writeprotect_boot_set(int nargs, char **argv)
Chris Ballb9c7a172012-02-20 12:34:25 -0500269{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800270 __u8 ext_csd[EXT_CSD_SIZE], value;
Chris Ballb9c7a172012-02-20 12:34:25 -0500271 int fd, ret;
272 char *device;
273
Al Cooper1b7f5d72016-06-07 16:35:46 -0400274 CHECK(nargs != 2,
275 "Usage: mmc writeprotect boot set </path/to/mmcblkX>\n",
276 exit(1));
Chris Ballb9c7a172012-02-20 12:34:25 -0500277
278 device = argv[1];
279
280 fd = open(device, O_RDWR);
281 if (fd < 0) {
282 perror("open");
283 exit(1);
284 }
285
286 ret = read_extcsd(fd, ext_csd);
287 if (ret) {
288 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
289 exit(1);
290 }
291
292 value = ext_csd[EXT_CSD_BOOT_WP] |
293 EXT_CSD_BOOT_WP_B_PWR_WP_EN;
294 ret = write_extcsd_value(fd, EXT_CSD_BOOT_WP, value);
295 if (ret) {
296 fprintf(stderr, "Could not write 0x%02x to "
297 "EXT_CSD[%d] in %s\n",
298 value, EXT_CSD_BOOT_WP, device);
299 exit(1);
300 }
301
302 return ret;
303}
304
Al Cooper1b7f5d72016-06-07 16:35:46 -0400305static char *prot_desc[] = {
306 "No",
307 "Temporary",
308 "Power-on",
309 "Permanent"
310};
311
312static void print_wp_status(__u32 wp_sizeblks, __u32 start_group,
313 __u32 end_group, int rptype)
314{
315 printf("Write Protect Groups %d-%d (Blocks %d-%d), ",
316 start_group, end_group,
317 start_group * wp_sizeblks, ((end_group + 1) * wp_sizeblks) - 1);
318 printf("%s Write Protection\n", prot_desc[rptype]);
319}
320
321
322int do_writeprotect_user_get(int nargs, char **argv)
323{
324 __u8 ext_csd[512];
325 int fd, ret;
326 char *device;
327 int x;
328 int y = 0;
329 __u32 wp_sizeblks;
330 __u32 dev_sizeblks;
331 __u32 cnt;
332 __u64 bits;
333 __u32 wpblk;
334 __u32 last_wpblk = 0;
335 __u32 prot;
336 __u32 last_prot = -1;
337 int remain;
338
339 CHECK(nargs != 2,
340 "Usage: mmc writeprotect user get </path/to/mmcblkX>\n",
341 exit(1));
342
343 device = argv[1];
344
345 fd = open(device, O_RDWR);
346 if (fd < 0) {
347 perror("open");
348 exit(1);
349 }
350 ret = read_extcsd(fd, ext_csd);
351 if (ret) {
352 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
353 exit(1);
354 }
355
356 ret = get_wp_group_size_in_blks(ext_csd, &wp_sizeblks);
357 if (ret)
358 exit(1);
359 printf("Write Protect Group size in blocks/bytes: %d/%d\n",
360 wp_sizeblks, wp_sizeblks * 512);
361 dev_sizeblks = get_size_in_blks(fd);
362 cnt = dev_sizeblks / wp_sizeblks;
363 for (x = 0; x < cnt; x += WP_BLKS_PER_QUERY) {
364 ret = send_write_protect_type(fd, x * wp_sizeblks, &bits);
365 if (ret)
366 break;
367 remain = cnt - x;
368 if (remain > WP_BLKS_PER_QUERY)
369 remain = WP_BLKS_PER_QUERY;
370 for (y = 0; y < remain; y++) {
371 prot = (bits >> (y * 2)) & 0x3;
372 if (prot != last_prot) {
373 /* not first time */
374 if (last_prot != -1) {
375 wpblk = x + y;
376 print_wp_status(wp_sizeblks,
377 last_wpblk,
378 wpblk - 1,
379 last_prot);
380 last_wpblk = wpblk;
381 }
382 last_prot = prot;
383 }
384 }
385 }
386 if (last_wpblk != (x + y - 1))
387 print_wp_status(wp_sizeblks, last_wpblk, cnt - 1, last_prot);
388
389 return ret;
390}
391
392int do_writeprotect_user_set(int nargs, char **argv)
393{
394 __u8 ext_csd[512];
395 int fd, ret;
396 char *device;
397 int blk_start;
398 int blk_cnt;
399 __u32 wp_blks;
400 __u8 user_wp;
401 int x;
402 int wptype;
403
404 if (nargs != 5)
405 goto usage;
406 device = argv[4];
407 fd = open(device, O_RDWR);
408 if (fd < 0) {
409 perror("open");
410 exit(1);
411 }
412 if (!strcmp(argv[1], "none")) {
413 wptype = WPTYPE_NONE;
414 } else if (!strcmp(argv[1], "temp")) {
415 wptype = WPTYPE_TEMP;
416 } else if (!strcmp(argv[1], "pwron")) {
417 wptype = WPTYPE_PWRON;
418#ifdef DANGEROUS_COMMANDS_ENABLED
419 } else if (!strcmp(argv[1], "perm")) {
420 wptype = WPTYPE_PERM;
421#endif /* DANGEROUS_COMMANDS_ENABLED */
422 } else {
423 fprintf(stderr, "Error, invalid \"type\"\n");
424 goto usage;
425 }
426 ret = read_extcsd(fd, ext_csd);
427 if (ret) {
428 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
429 exit(1);
430 }
431 ret = get_wp_group_size_in_blks(ext_csd, &wp_blks);
432 if (ret) {
433 fprintf(stderr, "Operation not supported for this device\n");
434 exit(1);
435 }
436 blk_start = strtol(argv[2], NULL, 0);
437 blk_cnt = strtol(argv[3], NULL, 0);
438 if ((blk_start % wp_blks) || (blk_cnt % wp_blks)) {
439 fprintf(stderr, "<start block> and <blocks> must be a ");
440 fprintf(stderr, "multiple of the Write Protect Group (%d)\n",
441 wp_blks);
442 exit(1);
443 }
444 if (wptype != WPTYPE_NONE) {
445 user_wp = ext_csd[EXT_CSD_USER_WP];
446 user_wp &= ~USER_WP_CLEAR;
447 switch (wptype) {
448 case WPTYPE_TEMP:
449 break;
450 case WPTYPE_PWRON:
451 user_wp |= USER_WP_US_PWR_WP_EN;
452 break;
453 case WPTYPE_PERM:
454 user_wp |= USER_WP_US_PERM_WP_EN;
455 break;
456 }
457 if (user_wp != ext_csd[EXT_CSD_USER_WP]) {
458 ret = write_extcsd_value(fd, EXT_CSD_USER_WP, user_wp);
459 if (ret) {
460 fprintf(stderr, "Error setting EXT_CSD\n");
461 exit(1);
462 }
463 }
464 }
465 for (x = 0; x < blk_cnt; x += wp_blks) {
466 ret = set_write_protect(fd, blk_start + x,
467 wptype != WPTYPE_NONE);
468 if (ret) {
469 fprintf(stderr,
470 "Could not set write protect for %s\n", device);
471 exit(1);
472 }
473 }
474 if (wptype != WPTYPE_NONE) {
475 ret = write_extcsd_value(fd, EXT_CSD_USER_WP,
476 ext_csd[EXT_CSD_USER_WP]);
477 if (ret) {
478 fprintf(stderr, "Error restoring EXT_CSD\n");
479 exit(1);
480 }
481 }
482 return ret;
483
484usage:
485 fprintf(stderr,
486 "Usage: mmc writeprotect user set <type><start block><blocks><device>\n");
487 exit(1);
488}
489
Saugata Dasb7e25992012-05-17 09:26:34 -0400490int do_disable_512B_emulation(int nargs, char **argv)
491{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800492 __u8 ext_csd[EXT_CSD_SIZE], native_sector_size, data_sector_size, wr_rel_param;
Saugata Dasb7e25992012-05-17 09:26:34 -0400493 int fd, ret;
494 char *device;
495
496 CHECK(nargs != 2, "Usage: mmc disable 512B emulation </path/to/mmcblkX>\n", exit(1));
497 device = argv[1];
498
499 fd = open(device, O_RDWR);
500 if (fd < 0) {
501 perror("open");
502 exit(1);
503 }
504
505 ret = read_extcsd(fd, ext_csd);
506 if (ret) {
507 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
508 exit(1);
509 }
510
511 wr_rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
512 native_sector_size = ext_csd[EXT_CSD_NATIVE_SECTOR_SIZE];
513 data_sector_size = ext_csd[EXT_CSD_DATA_SECTOR_SIZE];
514
515 if (native_sector_size && !data_sector_size &&
516 (wr_rel_param & EN_REL_WR)) {
517 ret = write_extcsd_value(fd, EXT_CSD_USE_NATIVE_SECTOR, 1);
518
519 if (ret) {
520 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
Tomas Melin295dd7a2016-08-29 11:45:44 -0400521 1, EXT_CSD_NATIVE_SECTOR_SIZE, device);
Saugata Dasb7e25992012-05-17 09:26:34 -0400522 exit(1);
523 }
524 printf("MMC disable 512B emulation successful. Now reset the device to switch to 4KB native sector mode.\n");
525 } else if (native_sector_size && data_sector_size) {
526 printf("MMC 512B emulation mode is already disabled; doing nothing.\n");
527 } else {
528 printf("MMC does not support disabling 512B emulation mode.\n");
529 }
530
531 return ret;
532}
533
Giuseppe CAVALLARO7bd13202012-04-19 10:58:37 +0200534int do_write_boot_en(int nargs, char **argv)
535{
536 __u8 ext_csd[512];
537 __u8 value = 0;
538 int fd, ret;
539 char *device;
540 int boot_area, send_ack;
541
542 CHECK(nargs != 4, "Usage: mmc bootpart enable <partition_number> "
543 "<send_ack> </path/to/mmcblkX>\n", exit(1));
544
545 /*
546 * If <send_ack> is 1, the device will send acknowledgment
547 * pattern "010" to the host when boot operation begins.
548 * If <send_ack> is 0, it won't.
549 */
550 boot_area = strtol(argv[1], NULL, 10);
551 send_ack = strtol(argv[2], NULL, 10);
552 device = argv[3];
553
554 fd = open(device, O_RDWR);
555 if (fd < 0) {
556 perror("open");
557 exit(1);
558 }
559
560 ret = read_extcsd(fd, ext_csd);
561 if (ret) {
562 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
563 exit(1);
564 }
565
566 value = ext_csd[EXT_CSD_PART_CONFIG];
567
568 switch (boot_area) {
Markus Schuetterlefbc0e6c2016-03-19 08:42:41 +0100569 case EXT_CSD_PART_CONFIG_ACC_NONE:
570 value &= ~(7 << 3);
571 break;
Giuseppe CAVALLARO7bd13202012-04-19 10:58:37 +0200572 case EXT_CSD_PART_CONFIG_ACC_BOOT0:
573 value |= (1 << 3);
574 value &= ~(3 << 4);
575 break;
576 case EXT_CSD_PART_CONFIG_ACC_BOOT1:
577 value |= (1 << 4);
578 value &= ~(1 << 3);
579 value &= ~(1 << 5);
580 break;
581 case EXT_CSD_PART_CONFIG_ACC_USER_AREA:
582 value |= (boot_area << 3);
583 break;
584 default:
585 fprintf(stderr, "Cannot enable the boot area\n");
586 exit(1);
587 }
588 if (send_ack)
589 value |= EXT_CSD_PART_CONFIG_ACC_ACK;
590 else
591 value &= ~EXT_CSD_PART_CONFIG_ACC_ACK;
592
593 ret = write_extcsd_value(fd, EXT_CSD_PART_CONFIG, value);
594 if (ret) {
595 fprintf(stderr, "Could not write 0x%02x to "
596 "EXT_CSD[%d] in %s\n",
597 value, EXT_CSD_PART_CONFIG, device);
598 exit(1);
599 }
600 return ret;
601}
602
Al Cooper794314c2015-05-01 08:24:37 -0400603int do_boot_bus_conditions_set(int nargs, char **argv)
604{
605 __u8 ext_csd[512];
606 __u8 value = 0;
607 int fd, ret;
608 char *device;
609
610 CHECK(nargs != 5, "Usage: mmc: bootbus set <boot_mode> "
611 "<reset_boot_bus_conditions> <boot_bus_width> <device>\n",
612 exit(1));
613
614 if (strcmp(argv[1], "single_backward") == 0)
615 value |= 0;
616 else if (strcmp(argv[1], "single_hs") == 0)
617 value |= 0x8;
618 else if (strcmp(argv[1], "dual") == 0)
619 value |= 0x10;
620 else {
621 fprintf(stderr, "illegal <boot_mode> specified\n");
622 exit(1);
623 }
624
625 if (strcmp(argv[2], "x1") == 0)
626 value |= 0;
627 else if (strcmp(argv[2], "retain") == 0)
628 value |= 0x4;
629 else {
630 fprintf(stderr,
631 "illegal <reset_boot_bus_conditions> specified\n");
632 exit(1);
633 }
634
635 if (strcmp(argv[3], "x1") == 0)
636 value |= 0;
637 else if (strcmp(argv[3], "x4") == 0)
638 value |= 0x1;
639 else if (strcmp(argv[3], "x8") == 0)
640 value |= 0x2;
641 else {
642 fprintf(stderr, "illegal <boot_bus_width> specified\n");
643 exit(1);
644 }
645
646 device = argv[4];
647 fd = open(device, O_RDWR);
648 if (fd < 0) {
649 perror("open");
650 exit(1);
651 }
652
653 ret = read_extcsd(fd, ext_csd);
654 if (ret) {
655 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
656 exit(1);
657 }
658 printf("Changing ext_csd[BOOT_BUS_CONDITIONS] from 0x%02x to 0x%02x\n",
659 ext_csd[EXT_CSD_BOOT_BUS_CONDITIONS], value);
660
661 ret = write_extcsd_value(fd, EXT_CSD_BOOT_BUS_CONDITIONS, value);
662 if (ret) {
663 fprintf(stderr, "Could not write 0x%02x to "
664 "EXT_CSD[%d] in %s\n",
665 value, EXT_CSD_BOOT_BUS_CONDITIONS, device);
666 exit(1);
667 }
668 close(fd);
669 return ret;
670}
671
Chris Ballf74dfe22012-10-19 16:49:55 -0400672int do_hwreset(int value, int nargs, char **argv)
673{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800674 __u8 ext_csd[EXT_CSD_SIZE];
Chris Ballf74dfe22012-10-19 16:49:55 -0400675 int fd, ret;
676 char *device;
677
678 CHECK(nargs != 2, "Usage: mmc hwreset enable </path/to/mmcblkX>\n",
679 exit(1));
680
681 device = argv[1];
682
683 fd = open(device, O_RDWR);
684 if (fd < 0) {
685 perror("open");
686 exit(1);
687 }
688
689 ret = read_extcsd(fd, ext_csd);
690 if (ret) {
691 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
692 exit(1);
693 }
694
695 if ((ext_csd[EXT_CSD_RST_N_FUNCTION] & EXT_CSD_RST_N_EN_MASK) ==
696 EXT_CSD_HW_RESET_EN) {
697 fprintf(stderr,
698 "H/W Reset is already permanently enabled on %s\n",
699 device);
700 exit(1);
701 }
702 if ((ext_csd[EXT_CSD_RST_N_FUNCTION] & EXT_CSD_RST_N_EN_MASK) ==
703 EXT_CSD_HW_RESET_DIS) {
704 fprintf(stderr,
705 "H/W Reset is already permanently disabled on %s\n",
706 device);
707 exit(1);
708 }
709
710 ret = write_extcsd_value(fd, EXT_CSD_RST_N_FUNCTION, value);
711 if (ret) {
712 fprintf(stderr,
713 "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
714 value, EXT_CSD_RST_N_FUNCTION, device);
715 exit(1);
716 }
717
718 return ret;
719}
720
721int do_hwreset_en(int nargs, char **argv)
722{
723 return do_hwreset(EXT_CSD_HW_RESET_EN, nargs, argv);
724}
725
726int do_hwreset_dis(int nargs, char **argv)
727{
728 return do_hwreset(EXT_CSD_HW_RESET_DIS, nargs, argv);
729}
730
Jaehoon Chung86496512012-09-21 10:08:05 +0000731int do_write_bkops_en(int nargs, char **argv)
732{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800733 __u8 ext_csd[EXT_CSD_SIZE], value = 0;
Jaehoon Chung86496512012-09-21 10:08:05 +0000734 int fd, ret;
735 char *device;
736
737 CHECK(nargs != 2, "Usage: mmc bkops enable </path/to/mmcblkX>\n",
738 exit(1));
739
740 device = argv[1];
741
742 fd = open(device, O_RDWR);
743 if (fd < 0) {
744 perror("open");
745 exit(1);
746 }
747
748 ret = read_extcsd(fd, ext_csd);
749 if (ret) {
750 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
751 exit(1);
752 }
753
754 if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
755 fprintf(stderr, "%s doesn't support BKOPS\n", device);
756 exit(1);
757 }
758
759 ret = write_extcsd_value(fd, EXT_CSD_BKOPS_EN, BKOPS_ENABLE);
760 if (ret) {
761 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
762 value, EXT_CSD_BKOPS_EN, device);
763 exit(1);
764 }
765
766 return ret;
767}
768
Ben Gardiner27c357d2013-05-30 17:12:47 -0400769int do_status_get(int nargs, char **argv)
770{
771 __u32 response;
772 int fd, ret;
773 char *device;
774
775 CHECK(nargs != 2, "Usage: mmc status get </path/to/mmcblkX>\n",
776 exit(1));
777
778 device = argv[1];
779
780 fd = open(device, O_RDWR);
781 if (fd < 0) {
782 perror("open");
783 exit(1);
784 }
785
786 ret = send_status(fd, &response);
787 if (ret) {
788 fprintf(stderr, "Could not read response to SEND_STATUS from %s\n", device);
789 exit(1);
790 }
791
792 printf("SEND_STATUS response: 0x%08x\n", response);
793
794 return ret;
795}
796
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -0800797__u32 get_word_from_ext_csd(__u8 *ext_csd_loc)
798{
799 return (ext_csd_loc[3] << 24) |
800 (ext_csd_loc[2] << 16) |
801 (ext_csd_loc[1] << 8) |
802 ext_csd_loc[0];
803}
804
Ben Gardiner4e850232013-05-30 17:12:49 -0400805unsigned int get_sector_count(__u8 *ext_csd)
806{
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -0800807 return get_word_from_ext_csd(&ext_csd[EXT_CSD_SEC_COUNT_0]);
Ben Gardiner4e850232013-05-30 17:12:49 -0400808}
809
810int is_blockaddresed(__u8 *ext_csd)
811{
812 unsigned int sectors = get_sector_count(ext_csd);
813
Tomas Melin2e610662016-08-29 11:41:10 -0400814 /* over 2GiB devices are block-addressed */
Ben Gardiner4e850232013-05-30 17:12:49 -0400815 return (sectors > (2u * 1024 * 1024 * 1024) / 512);
816}
817
Ben Gardinerf82e27a2013-05-30 17:12:50 -0400818unsigned int get_hc_wp_grp_size(__u8 *ext_csd)
819{
820 return ext_csd[221];
821}
822
823unsigned int get_hc_erase_grp_size(__u8 *ext_csd)
824{
825 return ext_csd[224];
826}
827
Ben Gardinere6e84e92013-09-19 11:14:27 -0400828int set_partitioning_setting_completed(int dry_run, const char * const device,
829 int fd)
830{
831 int ret;
832
Tomas Melin4dadd872016-08-29 11:55:08 -0400833 if (dry_run == 1) {
Ben Gardinere6e84e92013-09-19 11:14:27 -0400834 fprintf(stderr, "NOT setting PARTITION_SETTING_COMPLETED\n");
835 fprintf(stderr, "These changes will not take effect neither "
836 "now nor after a power cycle\n");
837 return 1;
Tomas Melin4dadd872016-08-29 11:55:08 -0400838 } else if (dry_run == 2) {
839 printf("-c given, expecting more partition settings before "
840 "writing PARTITION_SETTING_COMPLETED\n");
841 return 0;
Ben Gardinere6e84e92013-09-19 11:14:27 -0400842 }
843
844 fprintf(stderr, "setting OTP PARTITION_SETTING_COMPLETED!\n");
845 ret = write_extcsd_value(fd, EXT_CSD_PARTITION_SETTING_COMPLETED, 0x1);
846 if (ret) {
847 fprintf(stderr, "Could not write 0x1 to "
848 "EXT_CSD[%d] in %s\n",
849 EXT_CSD_PARTITION_SETTING_COMPLETED, device);
850 return 1;
851 }
852
853 __u32 response;
854 ret = send_status(fd, &response);
855 if (ret) {
856 fprintf(stderr, "Could not get response to SEND_STATUS "
857 "from %s\n", device);
858 return 1;
859 }
860
861 if (response & R1_SWITCH_ERROR) {
862 fprintf(stderr, "Setting OTP PARTITION_SETTING_COMPLETED "
863 "failed on %s\n", device);
864 return 1;
865 }
866
867 fprintf(stderr, "Setting OTP PARTITION_SETTING_COMPLETED on "
868 "%s SUCCESS\n", device);
869 fprintf(stderr, "Device power cycle needed for settings to "
870 "take effect.\n"
871 "Confirm that PARTITION_SETTING_COMPLETED bit is set "
872 "using 'extcsd read' after power cycle\n");
873
874 return 0;
875}
876
Balaji T K1fdb7f92015-04-29 18:12:32 -0400877int check_enhanced_area_total_limit(const char * const device, int fd)
878{
879 __u8 ext_csd[512];
880 __u32 regl;
881 unsigned long max_enh_area_sz, user_area_sz, enh_area_sz = 0;
882 unsigned long gp4_part_sz, gp3_part_sz, gp2_part_sz, gp1_part_sz;
Balaji T Kd78ce082015-04-29 18:12:33 -0400883 unsigned long total_sz, total_gp_user_sz;
Balaji T K1fdb7f92015-04-29 18:12:32 -0400884 unsigned int wp_sz, erase_sz;
885 int ret;
886
887 ret = read_extcsd(fd, ext_csd);
888 if (ret) {
889 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
890 exit(1);
891 }
892 wp_sz = get_hc_wp_grp_size(ext_csd);
893 erase_sz = get_hc_erase_grp_size(ext_csd);
894
895 regl = (ext_csd[EXT_CSD_GP_SIZE_MULT_4_2] << 16) |
896 (ext_csd[EXT_CSD_GP_SIZE_MULT_4_1] << 8) |
897 ext_csd[EXT_CSD_GP_SIZE_MULT_4_0];
898 gp4_part_sz = 512l * regl * erase_sz * wp_sz;
899 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_4) {
900 enh_area_sz += gp4_part_sz;
901 printf("Enhanced GP4 Partition Size [GP_SIZE_MULT_4]: 0x%06x\n", regl);
902 printf(" i.e. %lu KiB\n", gp4_part_sz);
903 }
904
905 regl = (ext_csd[EXT_CSD_GP_SIZE_MULT_3_2] << 16) |
906 (ext_csd[EXT_CSD_GP_SIZE_MULT_3_1] << 8) |
907 ext_csd[EXT_CSD_GP_SIZE_MULT_3_0];
908 gp3_part_sz = 512l * regl * erase_sz * wp_sz;
909 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_3) {
910 enh_area_sz += gp3_part_sz;
911 printf("Enhanced GP3 Partition Size [GP_SIZE_MULT_3]: 0x%06x\n", regl);
912 printf(" i.e. %lu KiB\n", gp3_part_sz);
913 }
914
915 regl = (ext_csd[EXT_CSD_GP_SIZE_MULT_2_2] << 16) |
916 (ext_csd[EXT_CSD_GP_SIZE_MULT_2_1] << 8) |
917 ext_csd[EXT_CSD_GP_SIZE_MULT_2_0];
918 gp2_part_sz = 512l * regl * erase_sz * wp_sz;
919 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_2) {
920 enh_area_sz += gp2_part_sz;
921 printf("Enhanced GP2 Partition Size [GP_SIZE_MULT_2]: 0x%06x\n", regl);
922 printf(" i.e. %lu KiB\n", gp2_part_sz);
923 }
924
925 regl = (ext_csd[EXT_CSD_GP_SIZE_MULT_1_2] << 16) |
926 (ext_csd[EXT_CSD_GP_SIZE_MULT_1_1] << 8) |
927 ext_csd[EXT_CSD_GP_SIZE_MULT_1_0];
928 gp1_part_sz = 512l * regl * erase_sz * wp_sz;
929 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_1) {
930 enh_area_sz += gp1_part_sz;
931 printf("Enhanced GP1 Partition Size [GP_SIZE_MULT_1]: 0x%06x\n", regl);
932 printf(" i.e. %lu KiB\n", gp1_part_sz);
933 }
934
935 regl = (ext_csd[EXT_CSD_ENH_SIZE_MULT_2] << 16) |
936 (ext_csd[EXT_CSD_ENH_SIZE_MULT_1] << 8) |
937 ext_csd[EXT_CSD_ENH_SIZE_MULT_0];
938 user_area_sz = 512l * regl * erase_sz * wp_sz;
939 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_USR) {
940 enh_area_sz += user_area_sz;
941 printf("Enhanced User Data Area Size [ENH_SIZE_MULT]: 0x%06x\n", regl);
942 printf(" i.e. %lu KiB\n", user_area_sz);
943 }
944
945 regl = (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_2] << 16) |
946 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_1] << 8) |
947 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_0];
948 max_enh_area_sz = 512l * regl * erase_sz * wp_sz;
949 printf("Max Enhanced Area Size [MAX_ENH_SIZE_MULT]: 0x%06x\n", regl);
950 printf(" i.e. %lu KiB\n", max_enh_area_sz);
951 if (enh_area_sz > max_enh_area_sz) {
952 fprintf(stderr,
953 "Programmed total enhanced size %lu KiB cannot exceed max enhanced area %lu KiB %s\n",
954 enh_area_sz, max_enh_area_sz, device);
955 return 1;
956 }
Balaji T Kd78ce082015-04-29 18:12:33 -0400957 total_sz = get_sector_count(ext_csd) / 2;
958 total_gp_user_sz = gp4_part_sz + gp3_part_sz + gp2_part_sz +
959 gp1_part_sz + user_area_sz;
960 if (total_gp_user_sz > total_sz) {
961 fprintf(stderr,
962 "requested total partition size %lu KiB cannot exceed card capacity %lu KiB %s\n",
963 total_gp_user_sz, total_sz, device);
964 return 1;
965 }
966
967 return 0;
968}
969
970int do_create_gp_partition(int nargs, char **argv)
971{
972 __u8 value;
973 __u8 ext_csd[512];
974 __u8 address;
975 int fd, ret;
976 char *device;
977 int dry_run = 1;
978 int partition, enh_attr, ext_attr;
979 unsigned int length_kib, gp_size_mult;
980 unsigned long align;
981
Tomas Melin4dadd872016-08-29 11:55:08 -0400982 CHECK(nargs != 7, "Usage: mmc gp create <-y|-n|-c> <length KiB> "
Balaji T Kd78ce082015-04-29 18:12:33 -0400983 "<partition> <enh_attr> <ext_attr> </path/to/mmcblkX>\n", exit(1));
984
Tomas Melin4dadd872016-08-29 11:55:08 -0400985 if (!strcmp("-y", argv[1])) {
Balaji T Kd78ce082015-04-29 18:12:33 -0400986 dry_run = 0;
Tomas Melin4dadd872016-08-29 11:55:08 -0400987 } else if (!strcmp("-c", argv[1])) {
988 dry_run = 2;
989 }
Balaji T Kd78ce082015-04-29 18:12:33 -0400990
991 length_kib = strtol(argv[2], NULL, 10);
992 partition = strtol(argv[3], NULL, 10);
993 enh_attr = strtol(argv[4], NULL, 10);
994 ext_attr = strtol(argv[5], NULL, 10);
995 device = argv[6];
996
Marcus Folkessoncb04fde2015-11-18 15:06:16 -0500997 if (partition < 1 || partition > 4) {
998 printf("Invalid gp partition number; valid range [1-4].\n");
Balaji T Kd78ce082015-04-29 18:12:33 -0400999 exit(1);
1000 }
1001
1002 if (enh_attr && ext_attr) {
1003 printf("Not allowed to set both enhanced attribute and extended attribute\n");
1004 exit(1);
1005 }
1006
1007 fd = open(device, O_RDWR);
1008 if (fd < 0) {
1009 perror("open");
1010 exit(1);
1011 }
1012
1013 ret = read_extcsd(fd, ext_csd);
1014 if (ret) {
1015 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1016 exit(1);
1017 }
1018
1019 /* assert not PARTITION_SETTING_COMPLETED */
1020 if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED]) {
1021 printf(" Device is already partitioned\n");
1022 exit(1);
1023 }
1024
1025 align = 512l * get_hc_wp_grp_size(ext_csd) * get_hc_erase_grp_size(ext_csd);
1026 gp_size_mult = (length_kib + align/2l) / align;
1027
1028 /* set EXT_CSD_ERASE_GROUP_DEF bit 0 */
1029 ret = write_extcsd_value(fd, EXT_CSD_ERASE_GROUP_DEF, 0x1);
1030 if (ret) {
1031 fprintf(stderr, "Could not write 0x1 to EXT_CSD[%d] in %s\n",
1032 EXT_CSD_ERASE_GROUP_DEF, device);
1033 exit(1);
1034 }
1035
1036 value = (gp_size_mult >> 16) & 0xff;
1037 address = EXT_CSD_GP_SIZE_MULT_1_2 + (partition - 1) * 3;
1038 ret = write_extcsd_value(fd, address, value);
1039 if (ret) {
1040 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1041 value, address, device);
1042 exit(1);
1043 }
1044 value = (gp_size_mult >> 8) & 0xff;
1045 address = EXT_CSD_GP_SIZE_MULT_1_1 + (partition - 1) * 3;
1046 ret = write_extcsd_value(fd, address, value);
1047 if (ret) {
1048 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1049 value, address, device);
1050 exit(1);
1051 }
1052 value = gp_size_mult & 0xff;
1053 address = EXT_CSD_GP_SIZE_MULT_1_0 + (partition - 1) * 3;
1054 ret = write_extcsd_value(fd, address, value);
1055 if (ret) {
1056 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1057 value, address, device);
1058 exit(1);
1059 }
1060
1061 value = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1062 if (enh_attr)
1063 value |= (1 << partition);
1064 else
1065 value &= ~(1 << partition);
1066
1067 ret = write_extcsd_value(fd, EXT_CSD_PARTITIONS_ATTRIBUTE, value);
1068 if (ret) {
1069 fprintf(stderr, "Could not write EXT_CSD_ENH_%x to EXT_CSD[%d] in %s\n",
1070 partition, EXT_CSD_PARTITIONS_ATTRIBUTE, device);
1071 exit(1);
1072 }
1073
1074 address = EXT_CSD_EXT_PARTITIONS_ATTRIBUTE_0 + (partition - 1) / 2;
1075 value = ext_csd[address];
1076 if (ext_attr)
1077 value |= (ext_attr << (4 * ((partition - 1) % 2)));
1078 else
1079 value &= (0xF << (4 * ((partition % 2))));
1080
1081 ret = write_extcsd_value(fd, address, value);
1082 if (ret) {
1083 fprintf(stderr, "Could not write 0x%x to EXT_CSD[%d] in %s\n",
1084 value, address, device);
1085 exit(1);
1086 }
1087
1088 ret = check_enhanced_area_total_limit(device, fd);
1089 if (ret)
1090 exit(1);
1091
Tomas Melin20379fa2016-08-29 12:02:28 -04001092 if (set_partitioning_setting_completed(dry_run, device, fd))
Balaji T Kd78ce082015-04-29 18:12:33 -04001093 exit(1);
Balaji T K1fdb7f92015-04-29 18:12:32 -04001094
1095 return 0;
1096}
1097
Ben Gardinerd91d3692013-05-30 17:12:51 -04001098int do_enh_area_set(int nargs, char **argv)
1099{
1100 __u8 value;
Nick Sanders9d57aa72014-03-05 21:38:54 -08001101 __u8 ext_csd[EXT_CSD_SIZE];
Ben Gardinerd91d3692013-05-30 17:12:51 -04001102 int fd, ret;
1103 char *device;
1104 int dry_run = 1;
1105 unsigned int start_kib, length_kib, enh_start_addr, enh_size_mult;
1106 unsigned long align;
1107
Tomas Melin4dadd872016-08-29 11:55:08 -04001108 CHECK(nargs != 5, "Usage: mmc enh_area set <-y|-n|-c> <start KiB> <length KiB> "
Ben Gardinerd91d3692013-05-30 17:12:51 -04001109 "</path/to/mmcblkX>\n", exit(1));
1110
Tomas Melin4dadd872016-08-29 11:55:08 -04001111 if (!strcmp("-y", argv[1])) {
Ben Gardinerd91d3692013-05-30 17:12:51 -04001112 dry_run = 0;
Tomas Melin4dadd872016-08-29 11:55:08 -04001113 } else if (!strcmp("-c", argv[1])) {
1114 dry_run = 2;
1115 }
Ben Gardinerd91d3692013-05-30 17:12:51 -04001116
1117 start_kib = strtol(argv[2], NULL, 10);
1118 length_kib = strtol(argv[3], NULL, 10);
1119 device = argv[4];
1120
1121 fd = open(device, O_RDWR);
1122 if (fd < 0) {
1123 perror("open");
1124 exit(1);
1125 }
1126
1127 ret = read_extcsd(fd, ext_csd);
1128 if (ret) {
1129 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1130 exit(1);
1131 }
1132
1133 /* assert ENH_ATTRIBUTE_EN */
1134 if (!(ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & EXT_CSD_ENH_ATTRIBUTE_EN))
1135 {
1136 printf(" Device cannot have enhanced tech.\n");
1137 exit(1);
1138 }
1139
1140 /* assert not PARTITION_SETTING_COMPLETED */
1141 if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED])
1142 {
1143 printf(" Device is already partitioned\n");
1144 exit(1);
1145 }
1146
1147 align = 512l * get_hc_wp_grp_size(ext_csd) * get_hc_erase_grp_size(ext_csd);
1148
1149 enh_size_mult = (length_kib + align/2l) / align;
1150
1151 enh_start_addr = start_kib * 1024 / (is_blockaddresed(ext_csd) ? 512 : 1);
1152 enh_start_addr /= align;
1153 enh_start_addr *= align;
1154
1155 /* set EXT_CSD_ERASE_GROUP_DEF bit 0 */
1156 ret = write_extcsd_value(fd, EXT_CSD_ERASE_GROUP_DEF, 0x1);
1157 if (ret) {
1158 fprintf(stderr, "Could not write 0x1 to "
1159 "EXT_CSD[%d] in %s\n",
1160 EXT_CSD_ERASE_GROUP_DEF, device);
1161 exit(1);
1162 }
1163
1164 /* write to ENH_START_ADDR and ENH_SIZE_MULT and PARTITIONS_ATTRIBUTE's ENH_USR bit */
1165 value = (enh_start_addr >> 24) & 0xff;
1166 ret = write_extcsd_value(fd, EXT_CSD_ENH_START_ADDR_3, value);
1167 if (ret) {
1168 fprintf(stderr, "Could not write 0x%02x to "
1169 "EXT_CSD[%d] in %s\n", value,
1170 EXT_CSD_ENH_START_ADDR_3, device);
1171 exit(1);
1172 }
1173 value = (enh_start_addr >> 16) & 0xff;
1174 ret = write_extcsd_value(fd, EXT_CSD_ENH_START_ADDR_2, value);
1175 if (ret) {
1176 fprintf(stderr, "Could not write 0x%02x to "
1177 "EXT_CSD[%d] in %s\n", value,
1178 EXT_CSD_ENH_START_ADDR_2, device);
1179 exit(1);
1180 }
1181 value = (enh_start_addr >> 8) & 0xff;
1182 ret = write_extcsd_value(fd, EXT_CSD_ENH_START_ADDR_1, value);
1183 if (ret) {
1184 fprintf(stderr, "Could not write 0x%02x to "
1185 "EXT_CSD[%d] in %s\n", value,
1186 EXT_CSD_ENH_START_ADDR_1, device);
1187 exit(1);
1188 }
1189 value = enh_start_addr & 0xff;
1190 ret = write_extcsd_value(fd, EXT_CSD_ENH_START_ADDR_0, value);
1191 if (ret) {
1192 fprintf(stderr, "Could not write 0x%02x to "
1193 "EXT_CSD[%d] in %s\n", value,
1194 EXT_CSD_ENH_START_ADDR_0, device);
1195 exit(1);
1196 }
1197
1198 value = (enh_size_mult >> 16) & 0xff;
1199 ret = write_extcsd_value(fd, EXT_CSD_ENH_SIZE_MULT_2, value);
1200 if (ret) {
1201 fprintf(stderr, "Could not write 0x%02x to "
1202 "EXT_CSD[%d] in %s\n", value,
1203 EXT_CSD_ENH_SIZE_MULT_2, device);
1204 exit(1);
1205 }
1206 value = (enh_size_mult >> 8) & 0xff;
1207 ret = write_extcsd_value(fd, EXT_CSD_ENH_SIZE_MULT_1, value);
1208 if (ret) {
1209 fprintf(stderr, "Could not write 0x%02x to "
1210 "EXT_CSD[%d] in %s\n", value,
1211 EXT_CSD_ENH_SIZE_MULT_1, device);
1212 exit(1);
1213 }
1214 value = enh_size_mult & 0xff;
1215 ret = write_extcsd_value(fd, EXT_CSD_ENH_SIZE_MULT_0, value);
1216 if (ret) {
1217 fprintf(stderr, "Could not write 0x%02x to "
1218 "EXT_CSD[%d] in %s\n", value,
1219 EXT_CSD_ENH_SIZE_MULT_0, device);
1220 exit(1);
1221 }
Balaji T K1fdb7f92015-04-29 18:12:32 -04001222 value = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] | EXT_CSD_ENH_USR;
1223 ret = write_extcsd_value(fd, EXT_CSD_PARTITIONS_ATTRIBUTE, value);
Ben Gardinerd91d3692013-05-30 17:12:51 -04001224 if (ret) {
1225 fprintf(stderr, "Could not write EXT_CSD_ENH_USR to "
1226 "EXT_CSD[%d] in %s\n",
1227 EXT_CSD_PARTITIONS_ATTRIBUTE, device);
1228 exit(1);
1229 }
1230
Balaji T K1fdb7f92015-04-29 18:12:32 -04001231 ret = check_enhanced_area_total_limit(device, fd);
1232 if (ret)
1233 exit(1);
1234
Ben Gardinere6e84e92013-09-19 11:14:27 -04001235 printf("Done setting ENH_USR area on %s\n", device);
Ben Gardinerd91d3692013-05-30 17:12:51 -04001236
Tomas Melin20379fa2016-08-29 12:02:28 -04001237 if (set_partitioning_setting_completed(dry_run, device, fd))
Ben Gardinerd91d3692013-05-30 17:12:51 -04001238 exit(1);
Ben Gardinerd91d3692013-05-30 17:12:51 -04001239
1240 return 0;
1241}
1242
Ben Gardiner196d0d22013-09-19 11:14:29 -04001243int do_write_reliability_set(int nargs, char **argv)
1244{
1245 __u8 value;
Nick Sanders9d57aa72014-03-05 21:38:54 -08001246 __u8 ext_csd[EXT_CSD_SIZE];
Ben Gardiner196d0d22013-09-19 11:14:29 -04001247 int fd, ret;
1248
1249 int dry_run = 1;
1250 int partition;
1251 char *device;
1252
1253 CHECK(nargs != 4, "Usage: mmc write_reliability set <-y|-n> "
1254 "<partition> </path/to/mmcblkX>\n", exit(1));
1255
1256 if (!strcmp("-y", argv[1]))
1257 dry_run = 0;
1258
1259 partition = strtol(argv[2], NULL, 10);
1260 device = argv[3];
1261
1262 fd = open(device, O_RDWR);
1263 if (fd < 0) {
1264 perror("open");
1265 exit(1);
1266 }
1267
1268 ret = read_extcsd(fd, ext_csd);
1269 if (ret) {
1270 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1271 exit(1);
1272 }
1273
1274 /* assert not PARTITION_SETTING_COMPLETED */
1275 if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED])
1276 {
1277 printf(" Device is already partitioned\n");
1278 exit(1);
1279 }
1280
1281 /* assert HS_CTRL_REL */
1282 if (!(ext_csd[EXT_CSD_WR_REL_PARAM] & HS_CTRL_REL)) {
1283 printf("Cannot set write reliability parameters, WR_REL_SET is "
1284 "read-only\n");
1285 exit(1);
1286 }
1287
1288 value = ext_csd[EXT_CSD_WR_REL_SET] | (1<<partition);
1289 ret = write_extcsd_value(fd, EXT_CSD_WR_REL_SET, value);
1290 if (ret) {
1291 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1292 value, EXT_CSD_WR_REL_SET, device);
1293 exit(1);
1294 }
1295
1296 printf("Done setting EXT_CSD_WR_REL_SET to 0x%02x on %s\n",
1297 value, device);
1298
Tomas Melin20379fa2016-08-29 12:02:28 -04001299 if (set_partitioning_setting_completed(dry_run, device, fd))
Ben Gardiner196d0d22013-09-19 11:14:29 -04001300 exit(1);
1301
1302 return 0;
1303}
1304
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001305int do_read_extcsd(int nargs, char **argv)
1306{
Nick Sanders9d57aa72014-03-05 21:38:54 -08001307 __u8 ext_csd[EXT_CSD_SIZE], ext_csd_rev, reg;
Oliver Metz11f2cea2013-09-23 08:40:52 +02001308 __u32 regl;
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001309 int fd, ret;
1310 char *device;
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001311 const char *str;
Gwendal Grignoueb1cd012015-01-08 15:34:55 -08001312 const char *ver_str[] = {
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001313 "4.0", /* 0 */
1314 "4.1", /* 1 */
1315 "4.2", /* 2 */
1316 "4.3", /* 3 */
1317 "Obsolete", /* 4 */
1318 "4.41", /* 5 */
1319 "4.5", /* 6 */
1320 "5.0", /* 7 */
Puthikorn Voravootivatc384aec2015-04-28 11:28:41 -07001321 "5.1", /* 8 */
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001322 };
1323 int boot_access;
1324 const char* boot_access_str[] = {
1325 "No access to boot partition", /* 0 */
1326 "R/W Boot Partition 1", /* 1 */
1327 "R/W Boot Partition 2", /* 2 */
1328 "R/W Replay Protected Memory Block (RPMB)", /* 3 */
1329 };
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001330
Chris Ball8ba44662012-04-19 13:22:54 -04001331 CHECK(nargs != 2, "Usage: mmc extcsd read </path/to/mmcblkX>\n",
1332 exit(1));
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001333
1334 device = argv[1];
1335
1336 fd = open(device, O_RDWR);
1337 if (fd < 0) {
1338 perror("open");
1339 exit(1);
1340 }
1341
1342 ret = read_extcsd(fd, ext_csd);
1343 if (ret) {
1344 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1345 exit(1);
1346 }
1347
Al Cooper786418c2015-04-29 18:12:35 -04001348 ext_csd_rev = ext_csd[EXT_CSD_REV];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001349
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001350 if ((ext_csd_rev < sizeof(ver_str)/sizeof(char*)) &&
1351 (ext_csd_rev != 4))
1352 str = ver_str[ext_csd_rev];
1353 else
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001354 goto out_free;
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001355
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001356 printf("=============================================\n");
1357 printf(" Extended CSD rev 1.%d (MMC %s)\n", ext_csd_rev, str);
1358 printf("=============================================\n\n");
1359
1360 if (ext_csd_rev < 3)
1361 goto out_free; /* No ext_csd */
1362
1363 /* Parse the Extended CSD registers.
1364 * Reserved bit should be read as "0" in case of spec older
1365 * than A441.
1366 */
1367 reg = ext_csd[EXT_CSD_S_CMD_SET];
1368 printf("Card Supported Command sets [S_CMD_SET: 0x%02x]\n", reg);
1369 if (!reg)
Chris Ballb9c7a172012-02-20 12:34:25 -05001370 printf(" - Standard MMC command sets\n");
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001371
1372 reg = ext_csd[EXT_CSD_HPI_FEATURE];
1373 printf("HPI Features [HPI_FEATURE: 0x%02x]: ", reg);
1374 if (reg & EXT_CSD_HPI_SUPP) {
1375 if (reg & EXT_CSD_HPI_IMPL)
Chris Ballb9c7a172012-02-20 12:34:25 -05001376 printf("implementation based on CMD12\n");
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001377 else
1378 printf("implementation based on CMD13\n");
1379 }
1380
1381 printf("Background operations support [BKOPS_SUPPORT: 0x%02x]\n",
1382 ext_csd[502]);
1383
1384 if (ext_csd_rev >= 6) {
1385 printf("Max Packet Read Cmd [MAX_PACKED_READS: 0x%02x]\n",
1386 ext_csd[501]);
1387 printf("Max Packet Write Cmd [MAX_PACKED_WRITES: 0x%02x]\n",
1388 ext_csd[500]);
1389 printf("Data TAG support [DATA_TAG_SUPPORT: 0x%02x]\n",
1390 ext_csd[499]);
1391
1392 printf("Data TAG Unit Size [TAG_UNIT_SIZE: 0x%02x]\n",
1393 ext_csd[498]);
1394 printf("Tag Resources Size [TAG_RES_SIZE: 0x%02x]\n",
1395 ext_csd[497]);
1396 printf("Context Management Capabilities"
1397 " [CONTEXT_CAPABILITIES: 0x%02x]\n", ext_csd[496]);
1398 printf("Large Unit Size [LARGE_UNIT_SIZE_M1: 0x%02x]\n",
1399 ext_csd[495]);
1400 printf("Extended partition attribute support"
1401 " [EXT_SUPPORT: 0x%02x]\n", ext_csd[494]);
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001402 }
1403 if (ext_csd_rev >= 7) {
1404 int j;
1405 int eol_info;
1406 char* eol_info_str[] = {
1407 "Not Defined", /* 0 */
1408 "Normal", /* 1 */
1409 "Warning", /* 2 */
1410 "Urgent", /* 3 */
1411 };
1412
1413 printf("Supported modes [SUPPORTED_MODES: 0x%02x]\n",
1414 ext_csd[493]);
1415 printf("FFU features [FFU_FEATURES: 0x%02x]\n",
1416 ext_csd[492]);
1417 printf("Operation codes timeout"
1418 " [OPERATION_CODE_TIMEOUT: 0x%02x]\n",
1419 ext_csd[491]);
1420 printf("FFU Argument [FFU_ARG: 0x%08x]\n",
1421 get_word_from_ext_csd(&ext_csd[487]));
1422 printf("Number of FW sectors correctly programmed"
1423 " [NUMBER_OF_FW_SECTORS_CORRECTLY_PROGRAMMED: %d]\n",
1424 get_word_from_ext_csd(&ext_csd[302]));
1425 printf("Vendor proprietary health report:\n");
1426 for (j = 301; j >= 270; j--)
1427 printf("[VENDOR_PROPRIETARY_HEALTH_REPORT[%d]]:"
1428 " 0x%02x\n", j, ext_csd[j]);
1429 for (j = 269; j >= 268; j--) {
1430 __u8 life_used=ext_csd[j];
Puthikorn Voravootivat6bb37ea2014-03-03 17:55:51 -08001431 char est_type = 'B' + (j - 269);
1432 printf("Device life time estimation type %c"
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001433 " [DEVICE_LIFE_TIME_EST_TYP_%c: 0x%02x]\n",
Puthikorn Voravootivat6bb37ea2014-03-03 17:55:51 -08001434 est_type, est_type, life_used);
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001435 if (life_used >= 0x1 && life_used <= 0xa)
1436 printf(" i.e. %d%% - %d%% device life time"
1437 " used\n",
1438 (life_used - 1) * 10, life_used * 10);
1439 else if (life_used == 0xb)
1440 printf(" i.e. Exceeded its maximum estimated"
1441 " device life time\n");
1442 }
1443 eol_info = ext_csd[267];
1444 printf("Pre EOL information [PRE_EOL_INFO: 0x%02x]\n",
1445 eol_info);
1446 if (eol_info < sizeof(eol_info_str)/sizeof(char*))
1447 printf(" i.e. %s\n", eol_info_str[eol_info]);
1448 else
1449 printf(" i.e. Reserved\n");
1450
1451 printf("Optimal read size [OPTIMAL_READ_SIZE: 0x%02x]\n",
1452 ext_csd[266]);
1453 printf("Optimal write size [OPTIMAL_WRITE_SIZE: 0x%02x]\n",
1454 ext_csd[265]);
1455 printf("Optimal trim unit size"
1456 " [OPTIMAL_TRIM_UNIT_SIZE: 0x%02x]\n", ext_csd[264]);
1457 printf("Device version [DEVICE_VERSION: 0x%02x - 0x%02x]\n",
1458 ext_csd[263], ext_csd[262]);
1459 printf("Firmware version:\n");
1460 for (j = 261; j >= 254; j--)
1461 printf("[FIRMWARE_VERSION[%d]]:"
1462 " 0x%02x\n", j, ext_csd[j]);
1463
1464 printf("Power class for 200MHz, DDR at VCC= 3.6V"
1465 " [PWR_CL_DDR_200_360: 0x%02x]\n", ext_csd[253]);
1466 }
1467 if (ext_csd_rev >= 6) {
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001468 printf("Generic CMD6 Timer [GENERIC_CMD6_TIME: 0x%02x]\n",
1469 ext_csd[248]);
1470 printf("Power off notification [POWER_OFF_LONG_TIME: 0x%02x]\n",
1471 ext_csd[247]);
1472 printf("Cache Size [CACHE_SIZE] is %d KiB\n",
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001473 get_word_from_ext_csd(&ext_csd[249]));
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001474 }
1475
1476 /* A441: Reserved [501:247]
1477 A43: reserved [246:229] */
1478 if (ext_csd_rev >= 5) {
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001479 printf("Background operations status"
Chris Ballb9c7a172012-02-20 12:34:25 -05001480 " [BKOPS_STATUS: 0x%02x]\n", ext_csd[246]);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001481
1482 /* CORRECTLY_PRG_SECTORS_NUM [245:242] TODO */
1483
1484 printf("1st Initialisation Time after programmed sector"
1485 " [INI_TIMEOUT_AP: 0x%02x]\n", ext_csd[241]);
1486
1487 /* A441: reserved [240] */
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001488 printf("Power class for 52MHz, DDR at 3.6V"
1489 " [PWR_CL_DDR_52_360: 0x%02x]\n", ext_csd[239]);
1490 printf("Power class for 52MHz, DDR at 1.95V"
1491 " [PWR_CL_DDR_52_195: 0x%02x]\n", ext_csd[238]);
1492
1493 /* A441: reserved [237-236] */
1494
1495 if (ext_csd_rev >= 6) {
1496 printf("Power class for 200MHz at 3.6V"
1497 " [PWR_CL_200_360: 0x%02x]\n", ext_csd[237]);
1498 printf("Power class for 200MHz, at 1.95V"
1499 " [PWR_CL_200_195: 0x%02x]\n", ext_csd[236]);
1500 }
Chris Ballb9c7a172012-02-20 12:34:25 -05001501 printf("Minimum Performance for 8bit at 52MHz in DDR mode:\n");
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001502 printf(" [MIN_PERF_DDR_W_8_52: 0x%02x]\n", ext_csd[235]);
1503 printf(" [MIN_PERF_DDR_R_8_52: 0x%02x]\n", ext_csd[234]);
1504 /* A441: reserved [233] */
1505 printf("TRIM Multiplier [TRIM_MULT: 0x%02x]\n", ext_csd[232]);
1506 printf("Secure Feature support [SEC_FEATURE_SUPPORT: 0x%02x]\n",
1507 ext_csd[231]);
1508 }
1509 if (ext_csd_rev == 5) { /* Obsolete in 4.5 */
1510 printf("Secure Erase Multiplier [SEC_ERASE_MULT: 0x%02x]\n",
1511 ext_csd[230]);
1512 printf("Secure TRIM Multiplier [SEC_TRIM_MULT: 0x%02x]\n",
1513 ext_csd[229]);
1514 }
1515 reg = ext_csd[EXT_CSD_BOOT_INFO];
1516 printf("Boot Information [BOOT_INFO: 0x%02x]\n", reg);
1517 if (reg & EXT_CSD_BOOT_INFO_ALT)
1518 printf(" Device supports alternative boot method\n");
1519 if (reg & EXT_CSD_BOOT_INFO_DDR_DDR)
1520 printf(" Device supports dual data rate during boot\n");
1521 if (reg & EXT_CSD_BOOT_INFO_HS_MODE)
1522 printf(" Device supports high speed timing during boot\n");
1523
1524 /* A441/A43: reserved [227] */
1525 printf("Boot partition size [BOOT_SIZE_MULTI: 0x%02x]\n", ext_csd[226]);
1526 printf("Access size [ACC_SIZE: 0x%02x]\n", ext_csd[225]);
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001527
1528 reg = get_hc_erase_grp_size(ext_csd);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001529 printf("High-capacity erase unit size [HC_ERASE_GRP_SIZE: 0x%02x]\n",
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001530 reg);
1531 printf(" i.e. %u KiB\n", 512 * reg);
1532
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001533 printf("High-capacity erase timeout [ERASE_TIMEOUT_MULT: 0x%02x]\n",
1534 ext_csd[223]);
1535 printf("Reliable write sector count [REL_WR_SEC_C: 0x%02x]\n",
1536 ext_csd[222]);
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001537
1538 reg = get_hc_wp_grp_size(ext_csd);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001539 printf("High-capacity W protect group size [HC_WP_GRP_SIZE: 0x%02x]\n",
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001540 reg);
1541 printf(" i.e. %lu KiB\n", 512l * get_hc_erase_grp_size(ext_csd) * reg);
1542
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001543 printf("Sleep current (VCC) [S_C_VCC: 0x%02x]\n", ext_csd[220]);
1544 printf("Sleep current (VCCQ) [S_C_VCCQ: 0x%02x]\n", ext_csd[219]);
1545 /* A441/A43: reserved [218] */
1546 printf("Sleep/awake timeout [S_A_TIMEOUT: 0x%02x]\n", ext_csd[217]);
1547 /* A441/A43: reserved [216] */
Ben Gardiner4e850232013-05-30 17:12:49 -04001548
1549 unsigned int sectors = get_sector_count(ext_csd);
1550 printf("Sector Count [SEC_COUNT: 0x%08x]\n", sectors);
1551 if (is_blockaddresed(ext_csd))
1552 printf(" Device is block-addressed\n");
1553 else
1554 printf(" Device is NOT block-addressed\n");
1555
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001556 /* A441/A43: reserved [211] */
1557 printf("Minimum Write Performance for 8bit:\n");
1558 printf(" [MIN_PERF_W_8_52: 0x%02x]\n", ext_csd[210]);
1559 printf(" [MIN_PERF_R_8_52: 0x%02x]\n", ext_csd[209]);
1560 printf(" [MIN_PERF_W_8_26_4_52: 0x%02x]\n", ext_csd[208]);
1561 printf(" [MIN_PERF_R_8_26_4_52: 0x%02x]\n", ext_csd[207]);
1562 printf("Minimum Write Performance for 4bit:\n");
1563 printf(" [MIN_PERF_W_4_26: 0x%02x]\n", ext_csd[206]);
1564 printf(" [MIN_PERF_R_4_26: 0x%02x]\n", ext_csd[205]);
1565 /* A441/A43: reserved [204] */
1566 printf("Power classes registers:\n");
1567 printf(" [PWR_CL_26_360: 0x%02x]\n", ext_csd[203]);
1568 printf(" [PWR_CL_52_360: 0x%02x]\n", ext_csd[202]);
1569 printf(" [PWR_CL_26_195: 0x%02x]\n", ext_csd[201]);
1570 printf(" [PWR_CL_52_195: 0x%02x]\n", ext_csd[200]);
1571
1572 /* A43: reserved [199:198] */
1573 if (ext_csd_rev >= 5) {
1574 printf("Partition switching timing "
1575 "[PARTITION_SWITCH_TIME: 0x%02x]\n", ext_csd[199]);
1576 printf("Out-of-interrupt busy timing"
1577 " [OUT_OF_INTERRUPT_TIME: 0x%02x]\n", ext_csd[198]);
1578 }
1579
1580 /* A441/A43: reserved [197] [195] [193] [190] [188]
1581 * [186] [184] [182] [180] [176] */
1582
1583 if (ext_csd_rev >= 6)
1584 printf("I/O Driver Strength [DRIVER_STRENGTH: 0x%02x]\n",
1585 ext_csd[197]);
1586
Oleg Matcovschi64f63a32013-05-23 17:11:07 -07001587 /* DEVICE_TYPE in A45, CARD_TYPE in A441 */
Gwendal Grignouc2faa3d2015-04-28 10:00:45 -07001588 printf("Card Type [CARD_TYPE: 0x%02x - %02x]\n",
1589 ext_csd[196], ext_csd[195]);
1590 reg = ext_csd[195];
1591 if (reg & 0x02) printf(" HS533 Dual Data Rate eMMC @266MHz 1.2VI/O\n");
1592 if (reg & 0x01) printf(" HS533 Dual Data Rate eMMC @266MHz 1.8VI/O\n");
Oleg Matcovschi64f63a32013-05-23 17:11:07 -07001593 reg = ext_csd[196];
Gwendal Grignouc2faa3d2015-04-28 10:00:45 -07001594 if (reg & 0x80) printf(" HS400 Dual Data Rate eMMC @200MHz 1.2VI/O\n");
1595 if (reg & 0x40) printf(" HS400 Dual Data Rate eMMC @200MHz 1.8VI/O\n");
Oleg Matcovschi64f63a32013-05-23 17:11:07 -07001596 if (reg & 0x20) printf(" HS200 Single Data Rate eMMC @200MHz 1.2VI/O\n");
1597 if (reg & 0x10) printf(" HS200 Single Data Rate eMMC @200MHz 1.8VI/O\n");
1598 if (reg & 0x08) printf(" HS Dual Data Rate eMMC @52MHz 1.2VI/O\n");
1599 if (reg & 0x04) printf(" HS Dual Data Rate eMMC @52MHz 1.8V or 3VI/O\n");
1600 if (reg & 0x02) printf(" HS eMMC @52MHz - at rated device voltage(s)\n");
1601 if (reg & 0x01) printf(" HS eMMC @26MHz - at rated device voltage(s)\n");
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001602
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001603 printf("CSD structure version [CSD_STRUCTURE: 0x%02x]\n", ext_csd[194]);
Al Cooper786418c2015-04-29 18:12:35 -04001604 /* ext_csd_rev = ext_csd[EXT_CSD_REV] (already done!!!) */
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001605 printf("Command set [CMD_SET: 0x%02x]\n", ext_csd[191]);
1606 printf("Command set revision [CMD_SET_REV: 0x%02x]\n", ext_csd[189]);
1607 printf("Power class [POWER_CLASS: 0x%02x]\n", ext_csd[187]);
1608 printf("High-speed interface timing [HS_TIMING: 0x%02x]\n",
1609 ext_csd[185]);
1610 /* bus_width: ext_csd[183] not readable */
1611 printf("Erased memory content [ERASED_MEM_CONT: 0x%02x]\n",
1612 ext_csd[181]);
1613 reg = ext_csd[EXT_CSD_BOOT_CFG];
1614 printf("Boot configuration bytes [PARTITION_CONFIG: 0x%02x]\n", reg);
Mario Schuknecht8c0c40d2013-05-15 08:28:04 +02001615 switch ((reg & EXT_CSD_BOOT_CFG_EN)>>3) {
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001616 case 0x0:
1617 printf(" Not boot enable\n");
1618 break;
1619 case 0x1:
1620 printf(" Boot Partition 1 enabled\n");
1621 break;
1622 case 0x2:
1623 printf(" Boot Partition 2 enabled\n");
1624 break;
1625 case 0x7:
1626 printf(" User Area Enabled for boot\n");
1627 break;
1628 }
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001629 boot_access = reg & EXT_CSD_BOOT_CFG_ACC;
1630 if (boot_access < sizeof(boot_access_str) / sizeof(char*))
1631 printf(" %s\n", boot_access_str[boot_access]);
1632 else
Mario Schuknecht8c0c40d2013-05-15 08:28:04 +02001633 printf(" Access to General Purpose partition %d\n",
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001634 boot_access - 3);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001635
1636 printf("Boot config protection [BOOT_CONFIG_PROT: 0x%02x]\n",
1637 ext_csd[178]);
1638 printf("Boot bus Conditions [BOOT_BUS_CONDITIONS: 0x%02x]\n",
1639 ext_csd[177]);
1640 printf("High-density erase group definition"
Ben Gardinerd91d3692013-05-30 17:12:51 -04001641 " [ERASE_GROUP_DEF: 0x%02x]\n", ext_csd[EXT_CSD_ERASE_GROUP_DEF]);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001642
Al Cooper1b7f5d72016-06-07 16:35:46 -04001643 print_writeprotect_boot_status(ext_csd);
Chris Ballb9c7a172012-02-20 12:34:25 -05001644
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001645 if (ext_csd_rev >= 5) {
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001646 /* A441]: reserved [172] */
1647 printf("User area write protection register"
1648 " [USER_WP]: 0x%02x\n", ext_csd[171]);
1649 /* A441]: reserved [170] */
1650 printf("FW configuration [FW_CONFIG]: 0x%02x\n", ext_csd[169]);
1651 printf("RPMB Size [RPMB_SIZE_MULT]: 0x%02x\n", ext_csd[168]);
Ben Gardiner4da1c0d2013-09-19 11:14:28 -04001652
1653 reg = ext_csd[EXT_CSD_WR_REL_SET];
1654 const char * const fast = "existing data is at risk if a power "
1655 "failure occurs during a write operation";
1656 const char * const reliable = "the device protects existing "
1657 "data if a power failure occurs during a write "
1658 "operation";
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001659 printf("Write reliability setting register"
Ben Gardiner4da1c0d2013-09-19 11:14:28 -04001660 " [WR_REL_SET]: 0x%02x\n", reg);
1661
1662 printf(" user area: %s\n", reg & (1<<0) ? reliable : fast);
1663 int i;
1664 for (i = 1; i <= 4; i++) {
1665 printf(" partition %d: %s\n", i,
1666 reg & (1<<i) ? reliable : fast);
1667 }
1668
1669 reg = ext_csd[EXT_CSD_WR_REL_PARAM];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001670 printf("Write reliability parameter register"
Ben Gardiner4da1c0d2013-09-19 11:14:28 -04001671 " [WR_REL_PARAM]: 0x%02x\n", reg);
1672 if (reg & 0x01)
1673 printf(" Device supports writing EXT_CSD_WR_REL_SET\n");
1674 if (reg & 0x04)
1675 printf(" Device supports the enhanced def. of reliable "
1676 "write\n");
1677
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001678 /* sanitize_start ext_csd[165]]: not readable
1679 * bkops_start ext_csd[164]]: only writable */
1680 printf("Enable background operations handshake"
1681 " [BKOPS_EN]: 0x%02x\n", ext_csd[163]);
1682 printf("H/W reset function"
1683 " [RST_N_FUNCTION]: 0x%02x\n", ext_csd[162]);
1684 printf("HPI management [HPI_MGMT]: 0x%02x\n", ext_csd[161]);
Ben Gardiner82bd9502013-06-27 11:04:10 -04001685 reg = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001686 printf("Partitioning Support [PARTITIONING_SUPPORT]: 0x%02x\n",
1687 reg);
Ben Gardiner82bd9502013-06-27 11:04:10 -04001688 if (reg & EXT_CSD_PARTITIONING_EN)
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001689 printf(" Device support partitioning feature\n");
1690 else
1691 printf(" Device NOT support partitioning feature\n");
Ben Gardiner82bd9502013-06-27 11:04:10 -04001692 if (reg & EXT_CSD_ENH_ATTRIBUTE_EN)
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001693 printf(" Device can have enhanced tech.\n");
1694 else
1695 printf(" Device cannot have enhanced tech.\n");
1696
Oliver Metz11f2cea2013-09-23 08:40:52 +02001697 regl = (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_2] << 16) |
Oliver Metz22f26412013-09-23 08:40:51 +02001698 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_1] << 8) |
1699 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_0];
1700
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001701 printf("Max Enhanced Area Size [MAX_ENH_SIZE_MULT]: 0x%06x\n",
Oliver Metz11f2cea2013-09-23 08:40:52 +02001702 regl);
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001703 unsigned int wp_sz = get_hc_wp_grp_size(ext_csd);
1704 unsigned int erase_sz = get_hc_erase_grp_size(ext_csd);
Oliver Metz11f2cea2013-09-23 08:40:52 +02001705 printf(" i.e. %lu KiB\n", 512l * regl * wp_sz * erase_sz);
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001706
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001707 printf("Partitions attribute [PARTITIONS_ATTRIBUTE]: 0x%02x\n",
Ben Gardinerd91d3692013-05-30 17:12:51 -04001708 ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]);
Ben Gardinera6cd98d2013-05-30 17:12:46 -04001709 reg = ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001710 printf("Partitioning Setting"
1711 " [PARTITION_SETTING_COMPLETED]: 0x%02x\n",
Ben Gardinera6cd98d2013-05-30 17:12:46 -04001712 reg);
1713 if (reg)
1714 printf(" Device partition setting complete\n");
1715 else
1716 printf(" Device partition setting NOT complete\n");
1717
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001718 printf("General Purpose Partition Size\n"
1719 " [GP_SIZE_MULT_4]: 0x%06x\n", (ext_csd[154] << 16) |
1720 (ext_csd[153] << 8) | ext_csd[152]);
1721 printf(" [GP_SIZE_MULT_3]: 0x%06x\n", (ext_csd[151] << 16) |
1722 (ext_csd[150] << 8) | ext_csd[149]);
1723 printf(" [GP_SIZE_MULT_2]: 0x%06x\n", (ext_csd[148] << 16) |
1724 (ext_csd[147] << 8) | ext_csd[146]);
1725 printf(" [GP_SIZE_MULT_1]: 0x%06x\n", (ext_csd[145] << 16) |
1726 (ext_csd[144] << 8) | ext_csd[143]);
1727
Oliver Metz11f2cea2013-09-23 08:40:52 +02001728 regl = (ext_csd[EXT_CSD_ENH_SIZE_MULT_2] << 16) |
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001729 (ext_csd[EXT_CSD_ENH_SIZE_MULT_1] << 8) |
1730 ext_csd[EXT_CSD_ENH_SIZE_MULT_0];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001731 printf("Enhanced User Data Area Size"
Oliver Metz11f2cea2013-09-23 08:40:52 +02001732 " [ENH_SIZE_MULT]: 0x%06x\n", regl);
1733 printf(" i.e. %lu KiB\n", 512l * regl *
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001734 get_hc_erase_grp_size(ext_csd) *
1735 get_hc_wp_grp_size(ext_csd));
Ben Gardiner68f490b2013-05-30 17:12:48 -04001736
Oliver Metz11f2cea2013-09-23 08:40:52 +02001737 regl = (ext_csd[EXT_CSD_ENH_START_ADDR_3] << 24) |
Ben Gardiner68f490b2013-05-30 17:12:48 -04001738 (ext_csd[EXT_CSD_ENH_START_ADDR_2] << 16) |
1739 (ext_csd[EXT_CSD_ENH_START_ADDR_1] << 8) |
1740 ext_csd[EXT_CSD_ENH_START_ADDR_0];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001741 printf("Enhanced User Data Start Address"
Oliver Metz11f2cea2013-09-23 08:40:52 +02001742 " [ENH_START_ADDR]: 0x%06x\n", regl);
Ben Gardiner4e850232013-05-30 17:12:49 -04001743 printf(" i.e. %lu bytes offset\n", (is_blockaddresed(ext_csd) ?
Tomas Melin2e610662016-08-29 11:41:10 -04001744 512l : 1l) * regl);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001745
1746 /* A441]: reserved [135] */
1747 printf("Bad Block Management mode"
1748 " [SEC_BAD_BLK_MGMNT]: 0x%02x\n", ext_csd[134]);
1749 /* A441: reserved [133:0] */
1750 }
1751 /* B45 */
1752 if (ext_csd_rev >= 6) {
1753 int j;
1754 /* tcase_support ext_csd[132] not readable */
1755 printf("Periodic Wake-up [PERIODIC_WAKEUP]: 0x%02x\n",
1756 ext_csd[131]);
1757 printf("Program CID/CSD in DDR mode support"
1758 " [PROGRAM_CID_CSD_DDR_SUPPORT]: 0x%02x\n",
1759 ext_csd[130]);
1760
1761 for (j = 127; j >= 64; j--)
1762 printf("Vendor Specific Fields"
1763 " [VENDOR_SPECIFIC_FIELD[%d]]: 0x%02x\n",
1764 j, ext_csd[j]);
1765
Gwendal Grignoue966e672014-07-07 14:03:13 -07001766 reg = ext_csd[63];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001767 printf("Native sector size [NATIVE_SECTOR_SIZE]: 0x%02x\n",
Gwendal Grignoue966e672014-07-07 14:03:13 -07001768 reg);
1769 if (reg == 0x00)
1770 printf(" i.e. 512 B\n");
1771 else if (reg == 0x01)
1772 printf(" i.e. 4 KiB\n");
1773 else
1774 printf(" i.e. Reserved\n");
1775
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001776 printf("Sector size emulation [USE_NATIVE_SECTOR]: 0x%02x\n",
1777 ext_csd[62]);
Gwendal Grignoue966e672014-07-07 14:03:13 -07001778 reg = ext_csd[61];
1779 printf("Sector size [DATA_SECTOR_SIZE]: 0x%02x\n", reg);
1780 if (reg == 0x00)
1781 printf(" i.e. 512 B\n");
1782 else if (reg == 0x01)
1783 printf(" i.e. 4 KiB\n");
1784 else
1785 printf(" i.e. Reserved\n");
1786
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001787 printf("1st initialization after disabling sector"
1788 " size emulation [INI_TIMEOUT_EMU]: 0x%02x\n",
1789 ext_csd[60]);
1790 printf("Class 6 commands control [CLASS_6_CTRL]: 0x%02x\n",
1791 ext_csd[59]);
1792 printf("Number of addressed group to be Released"
1793 "[DYNCAP_NEEDED]: 0x%02x\n", ext_csd[58]);
1794 printf("Exception events control"
1795 " [EXCEPTION_EVENTS_CTRL]: 0x%04x\n",
1796 (ext_csd[57] << 8) | ext_csd[56]);
1797 printf("Exception events status"
1798 "[EXCEPTION_EVENTS_STATUS]: 0x%04x\n",
1799 (ext_csd[55] << 8) | ext_csd[54]);
1800 printf("Extended Partitions Attribute"
1801 " [EXT_PARTITIONS_ATTRIBUTE]: 0x%04x\n",
1802 (ext_csd[53] << 8) | ext_csd[52]);
1803
1804 for (j = 51; j >= 37; j--)
1805 printf("Context configuration"
1806 " [CONTEXT_CONF[%d]]: 0x%02x\n", j, ext_csd[j]);
1807
1808 printf("Packed command status"
1809 " [PACKED_COMMAND_STATUS]: 0x%02x\n", ext_csd[36]);
1810 printf("Packed command failure index"
1811 " [PACKED_FAILURE_INDEX]: 0x%02x\n", ext_csd[35]);
1812 printf("Power Off Notification"
1813 " [POWER_OFF_NOTIFICATION]: 0x%02x\n", ext_csd[34]);
Oleg Matcovschi64f63a32013-05-23 17:11:07 -07001814 printf("Control to turn the Cache ON/OFF"
1815 " [CACHE_CTRL]: 0x%02x\n", ext_csd[33]);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001816 /* flush_cache ext_csd[32] not readable */
1817 /*Reserved [31:0] */
1818 }
Gwendal Grignoue966e672014-07-07 14:03:13 -07001819 if (ext_csd_rev >= 7) {
1820 printf("Mode config [MODE_CONFIG: 0x%02x]\n", ext_csd[30]);
1821 printf("Mode operation codes [MODE_OPERATION_CODES: 0x%02x]\n",
1822 ext_csd[29]);
1823
1824 reg = ext_csd[26];
1825 printf("FFU status [FFU_STATUS: 0x%02x]\n", reg);
1826 switch (reg) {
1827 case 0x00:
1828 printf(" Success\n");
1829 break;
1830 case 0x10:
1831 printf(" General error\n");
1832 break;
1833 case 0x11:
1834 printf(" Firmware install error\n");
1835 break;
1836 case 0x12:
1837 printf(" Error in downloading firmware\n");
1838 break;
1839 default:
1840 printf(" Reserved\n");
1841 }
1842 printf("Pre loading data size [PRE_LOADING_DATA_SIZE] is"
1843 " %d sector size\n",
1844 get_word_from_ext_csd(&ext_csd[22]));
1845 printf("Max pre loading data size [MAX_PRE_LOADING_DATA_SIZE] is"
1846 " %d sector size\n",
1847 get_word_from_ext_csd(&ext_csd[18]));
1848 printf("Product state awareness enablement"
1849 " [PRODUCT_STATE_AWARENESS_ENABLEMENT: 0x%02x]\n",
1850 ext_csd[17]);
1851 printf("Secure Removal Type [SECURE_REMOVAL_TYPE: 0x%02x]\n",
1852 ext_csd[16]);
1853 }
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001854
Avi Shchislowskidc7ab962016-03-08 14:22:41 -05001855 if (ext_csd_rev >= 7) {
1856 printf("eMMC Firmware Version: %s\n",
1857 (char*)&ext_csd[EXT_CSD_FIRMWARE_VERSION]);
1858 }
Adrian Hunterbb1600b2016-06-10 11:28:59 +03001859
1860 if (ext_csd_rev >= 8) {
1861 printf("Command Queue Support [CMDQ_SUPPORT]: 0x%02x\n",
1862 ext_csd[EXT_CSD_CMDQ_SUPPORT]);
1863 printf("Command Queue Depth [CMDQ_DEPTH]: %u\n",
1864 (ext_csd[EXT_CSD_CMDQ_DEPTH] & 0x1f) + 1);
1865 printf("Command Enabled [CMDQ_MODE_EN]: 0x%02x\n",
1866 ext_csd[EXT_CSD_CMDQ_MODE_EN]);
1867 }
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001868out_free:
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001869 return ret;
1870}
Yaniv Gardi21bb4732013-05-26 13:25:33 -04001871
Nick Sanders9d57aa72014-03-05 21:38:54 -08001872int do_dump_extcsd(int nargs, char **argv)
1873{
1874 __u8 ext_csd[EXT_CSD_SIZE];
1875 int fd, ret;
1876 char *device;
1877 int i, j;
1878
1879 CHECK(nargs != 2, "Usage: mmc extcsd dump </path/to/mmcblkX>\n",
1880 exit(1));
1881
1882 device = argv[1];
1883
1884 fd = open(device, O_RDWR);
1885 if (fd < 0) {
1886 perror("Failed to open mmc device");
1887 exit(1);
1888 }
1889
1890 ret = read_extcsd(fd, ext_csd);
1891 if (ret) {
1892 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1893 exit(1);
1894 }
1895
1896 /* Dump all bytes so that any undecoded or proprietary registers */
1897 /* can be acessed. */
1898 printf("EXT_CSD binary dump:\n");
1899 for (i = 0; i < EXT_CSD_SIZE; i+= 16) {
1900 printf(" %3d: %3x: ", i, i);
1901 for (j = 0; (j < 16) && (i + j < EXT_CSD_SIZE); j++) {
1902 printf(" %02x", ext_csd[i+j]);
1903 }
1904 printf("\n");
1905 }
1906
1907 return ret;
1908}
1909
Yaniv Gardi21bb4732013-05-26 13:25:33 -04001910int do_sanitize(int nargs, char **argv)
1911{
1912 int fd, ret;
1913 char *device;
1914
1915 CHECK(nargs != 2, "Usage: mmc sanitize </path/to/mmcblkX>\n",
1916 exit(1));
1917
1918 device = argv[1];
1919
1920 fd = open(device, O_RDWR);
1921 if (fd < 0) {
1922 perror("open");
1923 exit(1);
1924 }
1925
1926 ret = write_extcsd_value(fd, EXT_CSD_SANITIZE_START, 1);
1927 if (ret) {
1928 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1929 1, EXT_CSD_SANITIZE_START, device);
1930 exit(1);
1931 }
1932
1933 return ret;
1934
1935}
1936
Julius Wernerbcc3e2e2016-04-21 16:53:02 -07001937enum blockprotect_mode {
1938 BLOCKPROTECT_TEMPORARY = 0,
1939 BLOCKPROTECT_POWERON,
1940 BLOCKPROTECT_PERMANENT,
1941};
1942
1943int write_blockprotect(int fd, __u32 sector, int enable)
1944{
1945 struct mmc_ioc_cmd cmd;
1946 int ret;
1947
1948 memset(&cmd, 0, sizeof(cmd));
1949 cmd.write_flag = 1;
1950 cmd.opcode = enable ? MMC_SET_WRITE_PROT : MMC_CLR_WRITE_PROT;
1951 cmd.arg = sector;
1952 cmd.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
1953
1954 ret = ioctl(fd, MMC_IOC_CMD, &cmd);
1955 if (ret)
1956 perror("SET/CLR_WRITE_PROT command");
1957 return ret;
1958}
1959
1960int do_blockprotect_enable(int nargs, char **argv)
1961{
1962 __u8 ext_csd[EXT_CSD_SIZE];
1963 __u8 user_wp;
1964 __u32 sector;
1965 char *end;
1966 int ret, fd;
1967 int arg_index = 0;
1968 enum blockprotect_mode mode = BLOCKPROTECT_TEMPORARY;
1969
1970 if (nargs > 0 && !strcmp(argv[1], "-r")) {
1971 arg_index++;
1972 mode = BLOCKPROTECT_POWERON;
1973 } else if (nargs > 0 && !strcmp(argv[1], "-p")) {
1974 arg_index++;
1975 mode = BLOCKPROTECT_PERMANENT;
1976 }
1977
1978 CHECK(nargs != 3 + arg_index, "Usage: mmc blockprotect enable [-p|-r] <device> <write protect block>\n", exit(1));
1979
1980 sector = strtoul(argv[2 + arg_index], &end, 0);
1981 if (*end != '\0') {
1982 fprintf(stderr, "Not a block number: %s\n",
1983 argv[2 + arg_index]);
1984 exit(1);
1985 }
1986
1987 fd = open(argv[1 + arg_index], O_RDWR);
1988 if (fd < 0) {
1989 perror("open");
1990 exit(1);
1991 }
1992
1993 if (read_extcsd(fd, ext_csd))
1994 exit(1);
1995
1996 user_wp = ext_csd[EXT_CSD_USER_WP];
1997 user_wp &= ~(EXT_CSD_US_PERM_WP_EN | EXT_CSD_US_PWR_WP_EN);
1998 if (mode == BLOCKPROTECT_POWERON)
1999 user_wp |= EXT_CSD_US_PWR_WP_EN;
2000 else if (mode == BLOCKPROTECT_PERMANENT)
2001 user_wp |= EXT_CSD_US_PERM_WP_EN;
2002
2003 ret = write_extcsd_value(fd, EXT_CSD_USER_WP, user_wp);
2004 if (ret) {
2005 perror("update EXT_CSD[USER_WP]");
2006 exit(1);
2007 }
2008
2009 usleep(INTER_COMMAND_GAP_US);
2010
2011 ret = write_blockprotect(fd, sector, 1);
2012
2013 usleep(INTER_COMMAND_GAP_US);
2014
2015 user_wp &= ~(EXT_CSD_US_PERM_WP_EN | EXT_CSD_US_PWR_WP_EN);
2016 if (write_extcsd_value(fd, EXT_CSD_USER_WP, user_wp)) {
2017 perror("reset EXT_CSD[USER_WP]");
2018 if (!ret)
2019 ret = -1;
2020 }
2021
2022 return ret;
2023}
2024
2025int do_blockprotect_disable(int nargs, char **argv)
2026{
2027 __u32 sector;
2028 char *end;
2029 int fd;
2030
2031 CHECK(nargs != 3, "Usage: mmc blockprotect disable <device> <write protect block>\n", exit(1));
2032
2033 sector = strtoul(argv[2], &end, 0);
2034 if (*end != '\0') {
2035 fprintf(stderr, "Not a block number: %s\n", argv[2]);
2036 exit(1);
2037 }
2038
2039
2040 fd = open(argv[1], O_RDWR);
2041 if (fd < 0) {
2042 perror("open");
2043 exit(1);
2044 }
2045
2046 return write_blockprotect(fd, sector, 0);
2047}
2048
2049int do_blockprotect_read(int nargs, char **argv)
2050{
2051 __u8 wp_bits[8];
2052 __u32 sector;
2053 char *end;
2054 int fd;
2055 struct mmc_ioc_cmd cmd;
2056
2057 CHECK(nargs != 3, "Usage: mmc blockprotect read <device> <write protect block>\n", exit(1));
2058
2059 fd = open(argv[1], O_RDWR);
2060 if (fd < 0) {
2061 perror("open");
2062 exit(1);
2063 }
2064
2065 sector = strtoul(argv[2], &end, 0);
2066 if (*end != '\0') {
2067 fprintf(stderr, "Not a block number: %s\n", argv[2]);
2068 exit(1);
2069 }
2070
2071 memset(&cmd, 0, sizeof(cmd));
2072 cmd.write_flag = 0;
2073 cmd.opcode = MMC_SEND_WRITE_PROT_TYPE;
2074 cmd.arg = sector;
2075 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
2076 cmd.blksz = sizeof(wp_bits);
2077 cmd.blocks = 1;
2078 mmc_ioc_cmd_set_data(cmd, wp_bits);
2079
2080 if (ioctl(fd, MMC_IOC_CMD, &cmd)) {
2081 perror("SEND_WRITE_PROT_TYPE command");
2082 exit(1);
2083 }
2084
2085 printf("Sector %u write protection: ", sector);
2086 switch (wp_bits[7] & 3) {
2087 case 0:
2088 printf("NONE\n");
2089 break;
2090 case 1:
2091 printf("TEMPORARY\n");
2092 break;
2093 case 2:
2094 printf("POWER-ON\n");
2095 break;
2096 case 3:
2097 printf("PERMANENT\n");
2098 break;
2099 }
2100
2101 return 0;
2102}
2103
2104int do_blockprotect_info(int nargs, char **argv)
2105{
2106 __u8 ext_csd[EXT_CSD_SIZE];
2107 __u8 user_wp;
2108 int fd, wp_sz, erase_sz;
2109
2110 CHECK(nargs != 2, "Usage: mmc blockprotect info <device>\n", exit(1));
2111
2112 fd = open(argv[1], O_RDWR);
2113 if (fd < 0) {
2114 perror("open");
2115 exit(1);
2116 }
2117
2118 if (read_extcsd(fd, ext_csd))
2119 exit(1);
2120
2121 if (ext_csd[EXT_CSD_CLASS_6_CTRL] != 0) {
2122 fprintf(stderr, "Block protection commands not supported: "
2123 "CLASS_6_CTRL set.\n");
2124 exit(1);
2125 }
2126
2127 if ((ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x1) != 0x1) {
2128 fprintf(stderr, "Block protection commands not supported: "
2129 "high-capacity sizes not enabled.\n");
2130 exit(1);
2131 }
2132
2133 wp_sz = get_hc_wp_grp_size(ext_csd);
2134 erase_sz = get_hc_erase_grp_size(ext_csd);
2135
2136 if (erase_sz == 0 || wp_sz == 0) {
2137 fprintf(stderr, "Block protection commands not supported: "
2138 "no high-capacity size for erase or WP blocks.\n");
2139 exit(1);
2140 }
2141
2142 printf("Write protect block size in sectors: %d\n",
2143 erase_sz * wp_sz * 1024);
2144
2145 user_wp = ext_csd[EXT_CSD_USER_WP];
2146 printf("Permanent write protection: %s\n",
2147 user_wp & EXT_CSD_US_PERM_WP_DIS ? "forbidden" : "allowed");
2148 printf("Power-on write protection: %s\n",
2149 user_wp & EXT_CSD_US_PWR_WP_DIS ? "forbidden" : "allowed");
2150
2151 return 0;
2152}
2153
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002154static const char* const mmc_ffu_hack_names[] = {
2155 [MMC_OVERRIDE_FFU_ARG] = "ffu_arg",
2156};
2157
Gwendal Grignou771984c2014-07-01 12:46:18 -07002158int do_emmc50_ffu (int nargs, char **argv)
2159{
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002160 int fd, ret, i, argc=1, ffu_hack=0;
2161 char *device, *type, *path;
2162 __u64 value;
2163 union {
2164 __u8 data[FFU_DATA_SIZE];
2165 struct mmc_ffu_args ffu_args;
2166 } ffu_data;
2167 struct mmc_ffu_args *ffu_args = &ffu_data.ffu_args;
Gwendal Grignou0f757342014-10-16 16:52:46 -07002168 struct mmc_ioc_cmd mmc_ioc_cmd;
Gwendal Grignou771984c2014-07-01 12:46:18 -07002169
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002170 while (!strcmp("-k", argv[argc])) {
2171 ret = sscanf(argv[++argc], "%m[^:]:0x%llx", &type, &value);
2172 if (ret < 1) {
2173 fprintf(stderr, "Invalid hack: %s\n", argv[argc]);
2174 exit(1);
2175 }
2176 for (i = 0; i < MMC_HACK_LEN; i++) {
2177 if (!strcmp(type, mmc_ffu_hack_names[i])) {
2178 ffu_args->hack[ffu_hack].type = i;
2179 if (ret == 2) {
2180 ffu_args->hack[ffu_hack].value = value;
2181 }
2182 ffu_hack++;
2183 if (ffu_hack * sizeof(struct mmc_ffu_hack) +
2184 sizeof(struct mmc_ffu_args) >
2185 FFU_DATA_SIZE) {
2186 fprintf(stderr, "Too many %d hacks",
2187 ffu_hack);
2188 exit(1);
2189 }
2190 break;
2191 }
2192 }
2193 if (i == MMC_HACK_LEN) {
2194 fprintf(stderr, "Hack type %s not found\n", type);
2195 fprintf(stderr, "Supported types are: ");
2196 for (i = 0; i < MMC_HACK_LEN; i++)
2197 fprintf(stderr, "%s%s", mmc_ffu_hack_names[i],
2198 (i == MMC_HACK_LEN-1 ? "\n": ", "));
Gwendal Grignou771984c2014-07-01 12:46:18 -07002199
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002200 exit(1);
2201 }
2202 free(type);
2203 argc++;
2204 }
2205 ffu_args->hack_nb = ffu_hack;
2206
2207 path = argv[argc++];
2208 if (strlen(path) >= FFU_NAME_LEN) {
Gwendal Grignou771984c2014-07-01 12:46:18 -07002209 fprintf(stderr, "Filename \"%.20s\" too long\n", path);
2210 exit(1);
2211 }
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002212 strcpy(ffu_args->name, path);
2213 device = argv[argc++];
Gwendal Grignou771984c2014-07-01 12:46:18 -07002214 fd = open(device, O_RDWR);
2215 if (fd < 0) {
2216 perror("open");
2217 exit(1);
2218 }
2219
Gwendal Grignou0f757342014-10-16 16:52:46 -07002220 /* prepare and send ioctl */
2221 memset(&mmc_ioc_cmd, 0, sizeof(mmc_ioc_cmd));
2222 mmc_ioc_cmd.opcode = MMC_FFU_INVOKE_OP;
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002223 mmc_ioc_cmd.blksz = FFU_DATA_SIZE;
Gwendal Grignou0f757342014-10-16 16:52:46 -07002224 mmc_ioc_cmd.blocks = 1;
2225 mmc_ioc_cmd.arg = 0;
2226 mmc_ioc_cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
2227 mmc_ioc_cmd.write_flag = 1;
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002228 mmc_ioc_cmd_set_data(mmc_ioc_cmd, ffu_args);
Gwendal Grignou0f757342014-10-16 16:52:46 -07002229 ret = ioctl(fd, MMC_IOC_CMD, &mmc_ioc_cmd);
Gwendal Grignou771984c2014-07-01 12:46:18 -07002230 if (ret) {
2231 fprintf(stderr, "FFU install failed : %s\n", strerror(errno));
2232 exit(1);
2233 }
2234
2235 close(fd);
2236 return 0;
2237}
2238
Roman Peniaev023cc7c2014-08-12 23:25:45 +09002239#define DO_IO(func, fd, buf, nbyte) \
2240 ({ \
2241 ssize_t ret = 0, r; \
2242 do { \
2243 r = func(fd, buf + ret, nbyte - ret); \
2244 if (r < 0 && errno != EINTR) { \
2245 ret = -1; \
2246 break; \
2247 } \
2248 else if (r > 0) \
2249 ret += r; \
2250 } while (r != 0 && (size_t)ret != nbyte); \
2251 \
2252 ret; \
2253 })
2254
2255enum rpmb_op_type {
2256 MMC_RPMB_WRITE_KEY = 0x01,
2257 MMC_RPMB_READ_CNT = 0x02,
2258 MMC_RPMB_WRITE = 0x03,
2259 MMC_RPMB_READ = 0x04,
2260
2261 /* For internal usage only, do not use it directly */
2262 MMC_RPMB_READ_RESP = 0x05
2263};
2264
2265struct rpmb_frame {
2266 u_int8_t stuff[196];
2267 u_int8_t key_mac[32];
2268 u_int8_t data[256];
2269 u_int8_t nonce[16];
2270 u_int32_t write_counter;
2271 u_int16_t addr;
2272 u_int16_t block_count;
2273 u_int16_t result;
2274 u_int16_t req_resp;
2275};
2276
2277/* Performs RPMB operation.
2278 *
2279 * @fd: RPMB device on which we should perform ioctl command
2280 * @frame_in: input RPMB frame, should be properly inited
2281 * @frame_out: output (result) RPMB frame. Caller is responsible for checking
2282 * result and req_resp for output frame.
2283 * @out_cnt: count of outer frames. Used only for multiple blocks reading,
2284 * in the other cases -EINVAL will be returned.
2285 */
2286static int do_rpmb_op(int fd,
2287 const struct rpmb_frame *frame_in,
2288 struct rpmb_frame *frame_out,
2289 unsigned int out_cnt)
2290{
2291 int err;
2292 u_int16_t rpmb_type;
2293
2294 struct mmc_ioc_cmd ioc = {
2295 .arg = 0x0,
2296 .blksz = 512,
2297 .blocks = 1,
2298 .write_flag = 1,
2299 .opcode = MMC_WRITE_MULTIPLE_BLOCK,
2300 .flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC,
2301 .data_ptr = (uintptr_t)frame_in
2302 };
2303
2304 if (!frame_in || !frame_out || !out_cnt)
2305 return -EINVAL;
2306
2307 rpmb_type = be16toh(frame_in->req_resp);
2308
2309 switch(rpmb_type) {
2310 case MMC_RPMB_WRITE:
2311 case MMC_RPMB_WRITE_KEY:
2312 if (out_cnt != 1) {
2313 err = -EINVAL;
2314 goto out;
2315 }
2316
2317 /* Write request */
2318 ioc.write_flag |= (1<<31);
2319 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2320 if (err < 0) {
2321 err = -errno;
2322 goto out;
2323 }
2324
2325 /* Result request */
2326 memset(frame_out, 0, sizeof(*frame_out));
2327 frame_out->req_resp = htobe16(MMC_RPMB_READ_RESP);
2328 ioc.write_flag = 1;
2329 ioc.data_ptr = (uintptr_t)frame_out;
2330 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2331 if (err < 0) {
2332 err = -errno;
2333 goto out;
2334 }
2335
2336 /* Get response */
2337 ioc.write_flag = 0;
2338 ioc.opcode = MMC_READ_MULTIPLE_BLOCK;
2339 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2340 if (err < 0) {
2341 err = -errno;
2342 goto out;
2343 }
2344
2345 break;
2346 case MMC_RPMB_READ_CNT:
2347 if (out_cnt != 1) {
2348 err = -EINVAL;
2349 goto out;
2350 }
2351 /* fall through */
2352
2353 case MMC_RPMB_READ:
2354 /* Request */
2355 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2356 if (err < 0) {
2357 err = -errno;
2358 goto out;
2359 }
2360
2361 /* Get response */
2362 ioc.write_flag = 0;
2363 ioc.opcode = MMC_READ_MULTIPLE_BLOCK;
2364 ioc.blocks = out_cnt;
2365 ioc.data_ptr = (uintptr_t)frame_out;
2366 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2367 if (err < 0) {
2368 err = -errno;
2369 goto out;
2370 }
2371
2372 break;
2373 default:
2374 err = -EINVAL;
2375 goto out;
2376 }
2377
2378out:
2379 return err;
2380}
2381
2382int do_rpmb_write_key(int nargs, char **argv)
2383{
2384 int ret, dev_fd, key_fd;
2385 struct rpmb_frame frame_in = {
2386 .req_resp = htobe16(MMC_RPMB_WRITE_KEY)
2387 }, frame_out;
2388
2389 CHECK(nargs != 3, "Usage: mmc rpmb write-key </path/to/mmcblkXrpmb> </path/to/key>\n",
2390 exit(1));
2391
2392 dev_fd = open(argv[1], O_RDWR);
2393 if (dev_fd < 0) {
2394 perror("device open");
2395 exit(1);
2396 }
2397
2398 if (0 == strcmp(argv[2], "-"))
2399 key_fd = STDIN_FILENO;
2400 else {
2401 key_fd = open(argv[2], O_RDONLY);
2402 if (key_fd < 0) {
2403 perror("can't open key file");
2404 exit(1);
2405 }
2406 }
2407
2408 /* Read the auth key */
2409 ret = DO_IO(read, key_fd, frame_in.key_mac, sizeof(frame_in.key_mac));
2410 if (ret < 0) {
2411 perror("read the key");
2412 exit(1);
2413 } else if (ret != sizeof(frame_in.key_mac)) {
2414 printf("Auth key must be %lu bytes length, but we read only %d, exit\n",
2415 (unsigned long)sizeof(frame_in.key_mac),
2416 ret);
2417 exit(1);
2418 }
2419
2420 /* Execute RPMB op */
2421 ret = do_rpmb_op(dev_fd, &frame_in, &frame_out, 1);
2422 if (ret != 0) {
2423 perror("RPMB ioctl failed");
2424 exit(1);
2425 }
2426
2427 /* Check RPMB response */
2428 if (frame_out.result != 0) {
2429 printf("RPMB operation failed, retcode 0x%04x\n",
2430 be16toh(frame_out.result));
2431 exit(1);
2432 }
2433
2434 close(dev_fd);
2435 if (key_fd != STDIN_FILENO)
2436 close(key_fd);
2437
2438 return ret;
2439}
2440
2441int rpmb_read_counter(int dev_fd, unsigned int *cnt)
2442{
2443 int ret;
2444 struct rpmb_frame frame_in = {
2445 .req_resp = htobe16(MMC_RPMB_READ_CNT)
2446 }, frame_out;
2447
2448 /* Execute RPMB op */
2449 ret = do_rpmb_op(dev_fd, &frame_in, &frame_out, 1);
2450 if (ret != 0) {
2451 perror("RPMB ioctl failed");
2452 exit(1);
2453 }
2454
2455 /* Check RPMB response */
2456 if (frame_out.result != 0)
2457 return be16toh(frame_out.result);
2458
2459 *cnt = be32toh(frame_out.write_counter);
2460
2461 return 0;
2462}
2463
2464int do_rpmb_read_counter(int nargs, char **argv)
2465{
2466 int ret, dev_fd;
2467 unsigned int cnt;
2468
2469 CHECK(nargs != 2, "Usage: mmc rpmb read-counter </path/to/mmcblkXrpmb>\n",
2470 exit(1));
2471
2472 dev_fd = open(argv[1], O_RDWR);
2473 if (dev_fd < 0) {
2474 perror("device open");
2475 exit(1);
2476 }
2477
2478 ret = rpmb_read_counter(dev_fd, &cnt);
2479
2480 /* Check RPMB response */
2481 if (ret != 0) {
2482 printf("RPMB operation failed, retcode 0x%04x\n", ret);
2483 exit(1);
2484 }
2485
2486 close(dev_fd);
2487
2488 printf("Counter value: 0x%08x\n", cnt);
2489
2490 return ret;
2491}
2492
2493int do_rpmb_read_block(int nargs, char **argv)
2494{
2495 int i, ret, dev_fd, data_fd, key_fd = -1;
2496 uint16_t addr, blocks_cnt;
2497 unsigned char key[32];
2498 struct rpmb_frame frame_in = {
2499 .req_resp = htobe16(MMC_RPMB_READ),
2500 }, *frame_out_p;
2501
2502 CHECK(nargs != 5 && nargs != 6, "Usage: mmc rpmb read-block </path/to/mmcblkXrpmb> <address> <blocks count> </path/to/output_file> [/path/to/key]\n",
2503 exit(1));
2504
2505 dev_fd = open(argv[1], O_RDWR);
2506 if (dev_fd < 0) {
2507 perror("device open");
2508 exit(1);
2509 }
2510
2511 /* Get block address */
2512 errno = 0;
2513 addr = strtol(argv[2], NULL, 0);
2514 if (errno) {
2515 perror("incorrect address");
2516 exit(1);
2517 }
2518 frame_in.addr = htobe16(addr);
2519
2520 /* Get blocks count */
2521 errno = 0;
2522 blocks_cnt = strtol(argv[3], NULL, 0);
2523 if (errno) {
2524 perror("incorrect blocks count");
2525 exit(1);
2526 }
2527
2528 if (!blocks_cnt) {
2529 printf("please, specify valid blocks count number\n");
2530 exit(1);
2531 }
2532
2533 frame_out_p = calloc(sizeof(*frame_out_p), blocks_cnt);
2534 if (!frame_out_p) {
2535 printf("can't allocate memory for RPMB outer frames\n");
2536 exit(1);
2537 }
2538
2539 /* Write 256b data */
2540 if (0 == strcmp(argv[4], "-"))
2541 data_fd = STDOUT_FILENO;
2542 else {
2543 data_fd = open(argv[4], O_WRONLY | O_CREAT | O_APPEND,
2544 S_IRUSR | S_IWUSR);
2545 if (data_fd < 0) {
2546 perror("can't open output file");
2547 exit(1);
2548 }
2549 }
2550
2551 /* Key is specified */
2552 if (nargs == 6) {
2553 if (0 == strcmp(argv[5], "-"))
2554 key_fd = STDIN_FILENO;
2555 else {
2556 key_fd = open(argv[5], O_RDONLY);
2557 if (key_fd < 0) {
2558 perror("can't open input key file");
2559 exit(1);
2560 }
2561 }
2562
2563 ret = DO_IO(read, key_fd, key, sizeof(key));
2564 if (ret < 0) {
2565 perror("read the key data");
2566 exit(1);
2567 } else if (ret != sizeof(key)) {
2568 printf("Data must be %lu bytes length, but we read only %d, exit\n",
2569 (unsigned long)sizeof(key),
2570 ret);
2571 exit(1);
2572 }
2573 }
2574
2575 /* Execute RPMB op */
2576 ret = do_rpmb_op(dev_fd, &frame_in, frame_out_p, blocks_cnt);
2577 if (ret != 0) {
2578 perror("RPMB ioctl failed");
2579 exit(1);
2580 }
2581
2582 /* Check RPMB response */
2583 if (frame_out_p[blocks_cnt - 1].result != 0) {
2584 printf("RPMB operation failed, retcode 0x%04x\n",
2585 be16toh(frame_out_p[blocks_cnt - 1].result));
2586 exit(1);
2587 }
2588
2589 /* Do we have to verify data against key? */
2590 if (nargs == 6) {
2591 unsigned char mac[32];
2592 hmac_sha256_ctx ctx;
2593 struct rpmb_frame *frame_out = NULL;
2594
2595 hmac_sha256_init(&ctx, key, sizeof(key));
2596 for (i = 0; i < blocks_cnt; i++) {
2597 frame_out = &frame_out_p[i];
2598 hmac_sha256_update(&ctx, frame_out->data,
2599 sizeof(*frame_out) -
2600 offsetof(struct rpmb_frame, data));
2601 }
2602
2603 hmac_sha256_final(&ctx, mac, sizeof(mac));
2604
2605 /* Impossible */
2606 assert(frame_out);
2607
2608 /* Compare calculated MAC and MAC from last frame */
2609 if (memcmp(mac, frame_out->key_mac, sizeof(mac))) {
2610 printf("RPMB MAC missmatch\n");
2611 exit(1);
2612 }
2613 }
2614
2615 /* Write data */
2616 for (i = 0; i < blocks_cnt; i++) {
2617 struct rpmb_frame *frame_out = &frame_out_p[i];
2618 ret = DO_IO(write, data_fd, frame_out->data, sizeof(frame_out->data));
2619 if (ret < 0) {
2620 perror("write the data");
2621 exit(1);
2622 } else if (ret != sizeof(frame_out->data)) {
2623 printf("Data must be %lu bytes length, but we wrote only %d, exit\n",
2624 (unsigned long)sizeof(frame_out->data),
2625 ret);
2626 exit(1);
2627 }
2628 }
2629
2630 free(frame_out_p);
2631 close(dev_fd);
2632 if (data_fd != STDOUT_FILENO)
2633 close(data_fd);
2634 if (key_fd != -1 && key_fd != STDIN_FILENO)
2635 close(key_fd);
2636
2637 return ret;
2638}
2639
2640int do_rpmb_write_block(int nargs, char **argv)
2641{
2642 int ret, dev_fd, key_fd, data_fd;
2643 unsigned char key[32];
2644 uint16_t addr;
2645 unsigned int cnt;
2646 struct rpmb_frame frame_in = {
2647 .req_resp = htobe16(MMC_RPMB_WRITE),
2648 .block_count = htobe16(1)
2649 }, frame_out;
2650
2651 CHECK(nargs != 5, "Usage: mmc rpmb write-block </path/to/mmcblkXrpmb> <address> </path/to/input_file> </path/to/key>\n",
2652 exit(1));
2653
2654 dev_fd = open(argv[1], O_RDWR);
2655 if (dev_fd < 0) {
2656 perror("device open");
2657 exit(1);
2658 }
2659
2660 ret = rpmb_read_counter(dev_fd, &cnt);
2661 /* Check RPMB response */
2662 if (ret != 0) {
2663 printf("RPMB read counter operation failed, retcode 0x%04x\n", ret);
2664 exit(1);
2665 }
2666 frame_in.write_counter = htobe32(cnt);
2667
2668 /* Get block address */
2669 errno = 0;
2670 addr = strtol(argv[2], NULL, 0);
2671 if (errno) {
2672 perror("incorrect address");
2673 exit(1);
2674 }
2675 frame_in.addr = htobe16(addr);
2676
2677 /* Read 256b data */
2678 if (0 == strcmp(argv[3], "-"))
2679 data_fd = STDIN_FILENO;
2680 else {
2681 data_fd = open(argv[3], O_RDONLY);
2682 if (data_fd < 0) {
2683 perror("can't open input file");
2684 exit(1);
2685 }
2686 }
2687
2688 ret = DO_IO(read, data_fd, frame_in.data, sizeof(frame_in.data));
2689 if (ret < 0) {
2690 perror("read the data");
2691 exit(1);
2692 } else if (ret != sizeof(frame_in.data)) {
2693 printf("Data must be %lu bytes length, but we read only %d, exit\n",
2694 (unsigned long)sizeof(frame_in.data),
2695 ret);
2696 exit(1);
2697 }
2698
2699 /* Read the auth key */
2700 if (0 == strcmp(argv[4], "-"))
2701 key_fd = STDIN_FILENO;
2702 else {
2703 key_fd = open(argv[4], O_RDONLY);
2704 if (key_fd < 0) {
2705 perror("can't open key file");
2706 exit(1);
2707 }
2708 }
2709
2710 ret = DO_IO(read, key_fd, key, sizeof(key));
2711 if (ret < 0) {
2712 perror("read the key");
2713 exit(1);
2714 } else if (ret != sizeof(key)) {
2715 printf("Auth key must be %lu bytes length, but we read only %d, exit\n",
2716 (unsigned long)sizeof(key),
2717 ret);
2718 exit(1);
2719 }
2720
2721 /* Calculate HMAC SHA256 */
2722 hmac_sha256(
2723 key, sizeof(key),
2724 frame_in.data, sizeof(frame_in) - offsetof(struct rpmb_frame, data),
2725 frame_in.key_mac, sizeof(frame_in.key_mac));
2726
2727 /* Execute RPMB op */
2728 ret = do_rpmb_op(dev_fd, &frame_in, &frame_out, 1);
2729 if (ret != 0) {
2730 perror("RPMB ioctl failed");
2731 exit(1);
2732 }
2733
2734 /* Check RPMB response */
2735 if (frame_out.result != 0) {
2736 printf("RPMB operation failed, retcode 0x%04x\n",
2737 be16toh(frame_out.result));
2738 exit(1);
2739 }
2740
2741 close(dev_fd);
2742 if (data_fd != STDIN_FILENO)
2743 close(data_fd);
2744 if (key_fd != STDIN_FILENO)
2745 close(key_fd);
2746
2747 return ret;
2748}
Al Cooper786418c2015-04-29 18:12:35 -04002749
2750int do_cache_ctrl(int value, int nargs, char **argv)
2751{
2752 __u8 ext_csd[512];
2753 int fd, ret;
2754 char *device;
2755
2756 CHECK(nargs != 2, "Usage: mmc cache enable </path/to/mmcblkX>\n",
2757 exit(1));
2758
2759 device = argv[1];
2760
2761 fd = open(device, O_RDWR);
2762 if (fd < 0) {
2763 perror("open");
2764 exit(1);
2765 }
2766
2767 ret = read_extcsd(fd, ext_csd);
2768 if (ret) {
2769 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
2770 exit(1);
2771 }
2772
2773 if (ext_csd[EXT_CSD_REV] < EXT_CSD_REV_V4_5) {
2774 fprintf(stderr,
2775 "The CACHE option is only availabe on devices >= "
2776 "MMC 4.5 %s\n", device);
2777 exit(1);
2778 }
2779
2780 /* If the cache size is zero, this device does not have a cache */
2781 if (!(ext_csd[EXT_CSD_CACHE_SIZE_3] ||
2782 ext_csd[EXT_CSD_CACHE_SIZE_2] ||
2783 ext_csd[EXT_CSD_CACHE_SIZE_1] ||
2784 ext_csd[EXT_CSD_CACHE_SIZE_0])) {
2785 fprintf(stderr,
2786 "The CACHE option is not available on %s\n",
2787 device);
2788 exit(1);
2789 }
2790 ret = write_extcsd_value(fd, EXT_CSD_CACHE_CTRL, value);
2791 if (ret) {
2792 fprintf(stderr,
2793 "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
2794 value, EXT_CSD_CACHE_CTRL, device);
2795 exit(1);
2796 }
2797
2798 return ret;
2799}
2800
2801int do_cache_en(int nargs, char **argv)
2802{
2803 return do_cache_ctrl(1, nargs, argv);
2804}
2805
2806int do_cache_dis(int nargs, char **argv)
2807{
2808 return do_cache_ctrl(0, nargs, argv);
2809}
Avi Shchislowskidc7ab962016-03-08 14:22:41 -05002810
2811int do_ffu(int nargs, char **argv)
2812{
2813#ifndef MMC_IOC_MULTI_CMD
2814 fprintf(stderr, "mmc-utils has been compiled without MMC_IOC_MULTI_CMD"
2815 " support, needed by FFU.\n");
2816 exit(1);
2817#else
2818 int dev_fd, img_fd;
2819 int sect_done = 0, retry = 3, ret = -EINVAL;
2820 unsigned int sect_size;
2821 __u8 ext_csd[EXT_CSD_SIZE];
2822 __u8 *buf;
2823 __u32 arg;
2824 off_t fw_size;
2825 ssize_t chunk_size;
2826 char *device;
2827 struct mmc_ioc_multi_cmd *multi_cmd;
2828
2829 CHECK(nargs != 3, "Usage: ffu <image name> </path/to/mmcblkX> \n",
2830 exit(1));
2831
2832 device = argv[2];
2833 dev_fd = open(device, O_RDWR);
2834 if (dev_fd < 0) {
2835 perror("device open failed");
2836 exit(1);
2837 }
2838 img_fd = open(argv[1], O_RDONLY);
2839 if (img_fd < 0) {
2840 perror("image open failed");
2841 close(dev_fd);
2842 exit(1);
2843 }
2844
2845 buf = malloc(512);
2846 multi_cmd = calloc(1, sizeof(struct mmc_ioc_multi_cmd) +
2847 3 * sizeof(struct mmc_ioc_cmd));
2848 if (!buf || !multi_cmd) {
2849 perror("failed to allocate memory");
2850 goto out;
2851 }
2852
2853 ret = read_extcsd(dev_fd, ext_csd);
2854 if (ret) {
2855 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
2856 goto out;
2857 }
2858
2859 if (ext_csd[EXT_CSD_REV] < EXT_CSD_REV_V5_0) {
2860 fprintf(stderr,
2861 "The FFU feature is only available on devices >= "
2862 "MMC 5.0, not supported in %s\n", device);
2863 goto out;
2864 }
2865
2866 if (!(ext_csd[EXT_CSD_SUPPORTED_MODES] & EXT_CSD_FFU)) {
2867 fprintf(stderr, "FFU is not supported in %s\n", device);
2868 goto out;
2869 }
2870
2871 if (ext_csd[EXT_CSD_FW_CONFIG] & EXT_CSD_UPDATE_DISABLE) {
2872 fprintf(stderr, "Firmware update was disabled in %s\n", device);
2873 goto out;
2874 }
2875
2876 fw_size = lseek(img_fd, 0, SEEK_END);
2877
2878 if (fw_size == 0) {
2879 fprintf(stderr, "Firmware image is empty");
2880 goto out;
2881 }
2882
2883 sect_size = (ext_csd[EXT_CSD_DATA_SECTOR_SIZE] == 0) ? 512 : 4096;
2884 if (fw_size % sect_size) {
2885 fprintf(stderr, "Firmware data size (%jd) is not aligned!\n", (intmax_t)fw_size);
2886 goto out;
2887 }
2888
2889 /* set CMD ARG */
2890 arg = ext_csd[EXT_CSD_FFU_ARG_0] |
2891 ext_csd[EXT_CSD_FFU_ARG_1] << 8 |
2892 ext_csd[EXT_CSD_FFU_ARG_2] << 16 |
2893 ext_csd[EXT_CSD_FFU_ARG_3] << 24;
2894
2895 /* prepare multi_cmd to be sent */
2896 multi_cmd->num_of_cmds = 3;
2897
2898 /* put device into ffu mode */
2899 multi_cmd->cmds[0].opcode = MMC_SWITCH;
2900 multi_cmd->cmds[0].arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
2901 (EXT_CSD_MODE_CONFIG << 16) |
2902 (EXT_CSD_FFU_MODE << 8) |
2903 EXT_CSD_CMD_SET_NORMAL;
2904 multi_cmd->cmds[0].flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
2905 multi_cmd->cmds[0].write_flag = 1;
2906
2907 /* send image chunk */
2908 multi_cmd->cmds[1].opcode = MMC_WRITE_BLOCK;
2909 multi_cmd->cmds[1].blksz = sect_size;
2910 multi_cmd->cmds[1].blocks = 1;
2911 multi_cmd->cmds[1].arg = arg;
2912 multi_cmd->cmds[1].flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
2913 multi_cmd->cmds[1].write_flag = 1;
2914 mmc_ioc_cmd_set_data(multi_cmd->cmds[1], buf);
2915
2916 /* return device into normal mode */
2917 multi_cmd->cmds[2].opcode = MMC_SWITCH;
2918 multi_cmd->cmds[2].arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
2919 (EXT_CSD_MODE_CONFIG << 16) |
2920 (EXT_CSD_NORMAL_MODE << 8) |
2921 EXT_CSD_CMD_SET_NORMAL;
2922 multi_cmd->cmds[2].flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
2923 multi_cmd->cmds[2].write_flag = 1;
2924
2925do_retry:
2926 /* read firmware chunk */
2927 lseek(img_fd, 0, SEEK_SET);
2928 chunk_size = read(img_fd, buf, 512);
2929
2930 while (chunk_size > 0) {
2931 /* send ioctl with multi-cmd */
2932 ret = ioctl(dev_fd, MMC_IOC_MULTI_CMD, multi_cmd);
2933
2934 if (ret) {
2935 perror("Multi-cmd ioctl");
2936 /* In case multi-cmd ioctl failed before exiting from ffu mode */
2937 ioctl(dev_fd, MMC_IOC_CMD, &multi_cmd->cmds[2]);
2938 goto out;
2939 }
2940
2941 ret = read_extcsd(dev_fd, ext_csd);
2942 if (ret) {
2943 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
2944 goto out;
2945 }
2946
2947 /* Test if we need to restart the download */
2948 sect_done = ext_csd[EXT_CSD_NUM_OF_FW_SEC_PROG_0] |
2949 ext_csd[EXT_CSD_NUM_OF_FW_SEC_PROG_1] << 8 |
2950 ext_csd[EXT_CSD_NUM_OF_FW_SEC_PROG_2] << 16 |
2951 ext_csd[EXT_CSD_NUM_OF_FW_SEC_PROG_3] << 24;
2952 /* By spec, host should re-start download from the first sector if sect_done is 0 */
2953 if (sect_done == 0) {
2954 if (retry > 0) {
2955 retry--;
2956 fprintf(stderr, "Programming failed. Retrying... (%d)\n", retry);
2957 goto do_retry;
2958 }
2959 fprintf(stderr, "Programming failed! Aborting...\n");
2960 goto out;
2961 } else {
2962 fprintf(stderr, "Programmed %d/%jd bytes\r", sect_done * sect_size, (intmax_t)fw_size);
2963 }
2964
2965 /* read the next firmware chunk (if any) */
2966 chunk_size = read(img_fd, buf, 512);
2967 }
2968
2969 if ((sect_done * sect_size) == fw_size) {
2970 fprintf(stderr, "Programmed %jd/%jd bytes\n", (intmax_t)fw_size, (intmax_t)fw_size);
2971 fprintf(stderr, "Programming finished with status %d \n", ret);
2972 }
2973 else {
2974 fprintf(stderr, "FW size and number of sectors written mismatch. Status return %d\n", ret);
2975 goto out;
2976 }
2977
2978 /* check mode operation for ffu install*/
2979 if (!ext_csd[EXT_CSD_FFU_FEATURES]) {
2980 fprintf(stderr, "Please reboot to complete firmware installation on %s\n", device);
2981 } else {
2982 fprintf(stderr, "Installing firmware on %s...\n", device);
2983 /* Re-enter ffu mode and install the firmware */
2984 multi_cmd->num_of_cmds = 2;
2985
2986 /* set ext_csd to install mode */
2987 multi_cmd->cmds[1].opcode = MMC_SWITCH;
2988 multi_cmd->cmds[1].blksz = 0;
2989 multi_cmd->cmds[1].blocks = 0;
2990 multi_cmd->cmds[1].arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
2991 (EXT_CSD_MODE_OPERATION_CODES << 16) |
2992 (EXT_CSD_FFU_INSTALL << 8) |
2993 EXT_CSD_CMD_SET_NORMAL;
2994 multi_cmd->cmds[1].flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
2995 multi_cmd->cmds[1].write_flag = 1;
2996
2997 /* send ioctl with multi-cmd */
2998 ret = ioctl(dev_fd, MMC_IOC_MULTI_CMD, multi_cmd);
2999
3000 if (ret) {
3001 perror("Multi-cmd ioctl failed setting install mode");
3002 /* In case multi-cmd ioctl failed before exiting from ffu mode */
3003 ioctl(dev_fd, MMC_IOC_CMD, &multi_cmd->cmds[2]);
3004 goto out;
3005 }
3006
3007 ret = read_extcsd(dev_fd, ext_csd);
3008 if (ret) {
3009 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
3010 goto out;
3011 }
3012
3013 /* return status */
3014 ret = ext_csd[EXT_CSD_FFU_STATUS];
3015 if (ret) {
3016 fprintf(stderr, "%s: error %d during FFU install:\n", device, ret);
3017 goto out;
3018 } else {
3019 fprintf(stderr, "FFU finished successfully\n");
3020 }
3021 }
3022
3023out:
3024 free(buf);
3025 free(multi_cmd);
3026 close(img_fd);
3027 close(dev_fd);
3028 return ret;
3029#endif
3030}