blob: 672d15d9f119babc6257196181e4913b4b769f1b [file] [log] [blame]
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public
4 * License v2 as published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
9 * General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public
12 * License along with this program; if not, write to the
13 * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
14 * Boston, MA 021110-1307, USA.
Avi Shchislowskidc7ab962016-03-08 14:22:41 -050015 *
16 * Modified to add field firmware update support,
17 * those modifications are Copyright (c) 2016 SanDisk Corp.
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050018 */
19
Gwendal Grignou771984c2014-07-01 12:46:18 -070020#include <errno.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050021#include <stdio.h>
22#include <stdlib.h>
23#include <string.h>
24#include <sys/ioctl.h>
Gwendal Grignou771984c2014-07-01 12:46:18 -070025#include <sys/param.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050026#include <sys/types.h>
27#include <dirent.h>
28#include <sys/stat.h>
29#include <unistd.h>
30#include <fcntl.h>
31#include <libgen.h>
32#include <limits.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050033#include <ctype.h>
Roman Peniaev023cc7c2014-08-12 23:25:45 +090034#include <errno.h>
35#include <stdint.h>
36#include <assert.h>
Al Cooper1b7f5d72016-06-07 16:35:46 -040037#include <linux/fs.h>
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050038
39#include "mmc.h"
40#include "mmc_cmds.h"
Gwendal Grignou0da2c512015-01-08 15:36:03 -080041#include "ffu.h"
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050042
Nick Sanders9d57aa72014-03-05 21:38:54 -080043#define EXT_CSD_SIZE 512
Gwendal Grignou0da2c512015-01-08 15:36:03 -080044#define FFU_DATA_SIZE 512
Nick Sanders9d57aa72014-03-05 21:38:54 -080045#define CID_SIZE 16
46
Julius Wernerbcc3e2e2016-04-21 16:53:02 -070047/* Sending several commands too close together seems to cause timeouts. */
48#define INTER_COMMAND_GAP_US (50 * 1000)
49
Roman Peniaev023cc7c2014-08-12 23:25:45 +090050#include "3rdparty/hmac_sha/hmac_sha2.h"
Nick Sanders9d57aa72014-03-05 21:38:54 -080051
Al Cooper1b7f5d72016-06-07 16:35:46 -040052#define WP_BLKS_PER_QUERY 32
53
54#define USER_WP_PERM_PSWD_DIS 0x80
55#define USER_WP_CD_PERM_WP_DIS 0x40
56#define USER_WP_US_PERM_WP_DIS 0x10
57#define USER_WP_US_PWR_WP_DIS 0x08
58#define USER_WP_US_PERM_WP_EN 0x04
59#define USER_WP_US_PWR_WP_EN 0x01
60#define USER_WP_CLEAR (USER_WP_US_PERM_WP_DIS | USER_WP_US_PWR_WP_DIS \
61 | USER_WP_US_PERM_WP_EN | USER_WP_US_PWR_WP_EN)
62
63#define WPTYPE_NONE 0
64#define WPTYPE_TEMP 1
65#define WPTYPE_PWRON 2
66#define WPTYPE_PERM 3
67
68
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050069int read_extcsd(int fd, __u8 *ext_csd)
70{
71 int ret = 0;
72 struct mmc_ioc_cmd idata;
73 memset(&idata, 0, sizeof(idata));
Nick Sanders9d57aa72014-03-05 21:38:54 -080074 memset(ext_csd, 0, sizeof(__u8) * EXT_CSD_SIZE);
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050075 idata.write_flag = 0;
76 idata.opcode = MMC_SEND_EXT_CSD;
77 idata.arg = 0;
78 idata.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
Nick Sanders9d57aa72014-03-05 21:38:54 -080079 idata.blksz = EXT_CSD_SIZE;
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050080 idata.blocks = 1;
81 mmc_ioc_cmd_set_data(idata, ext_csd);
82
83 ret = ioctl(fd, MMC_IOC_CMD, &idata);
84 if (ret)
Nick Sanders9d57aa72014-03-05 21:38:54 -080085 perror("ioctl SEND_EXT_CSD");
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -050086
87 return ret;
88}
89
90int write_extcsd_value(int fd, __u8 index, __u8 value)
91{
92 int ret = 0;
93 struct mmc_ioc_cmd idata;
94
95 memset(&idata, 0, sizeof(idata));
96 idata.write_flag = 1;
97 idata.opcode = MMC_SWITCH;
98 idata.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
99 (index << 16) |
100 (value << 8) |
101 EXT_CSD_CMD_SET_NORMAL;
102 idata.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
103
104 ret = ioctl(fd, MMC_IOC_CMD, &idata);
105 if (ret)
Nick Sanders9d57aa72014-03-05 21:38:54 -0800106 perror("ioctl Write EXT CSD");
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -0500107
108 return ret;
109}
110
Ben Gardiner27c357d2013-05-30 17:12:47 -0400111int send_status(int fd, __u32 *response)
112{
113 int ret = 0;
114 struct mmc_ioc_cmd idata;
115
116 memset(&idata, 0, sizeof(idata));
117 idata.opcode = MMC_SEND_STATUS;
118 idata.arg = (1 << 16);
119 idata.flags = MMC_RSP_R1 | MMC_CMD_AC;
120
121 ret = ioctl(fd, MMC_IOC_CMD, &idata);
122 if (ret)
123 perror("ioctl");
124
125 *response = idata.response[0];
126
127 return ret;
128}
129
Al Cooper1b7f5d72016-06-07 16:35:46 -0400130static __u32 get_size_in_blks(int fd)
131{
132 int res;
133 int size;
134
135 res = ioctl(fd, BLKGETSIZE, &size);
136 if (res) {
137 fprintf(stderr, "Error getting device size, errno: %d\n",
138 errno);
139 perror("");
140 return -1;
141 }
142 return size;
143}
144
145static int set_write_protect(int fd, __u32 blk_addr, int on_off)
146{
147 int ret = 0;
148 struct mmc_ioc_cmd idata;
149
150 memset(&idata, 0, sizeof(idata));
151 idata.write_flag = 1;
152 if (on_off)
153 idata.opcode = MMC_SET_WRITE_PROT;
154 else
155 idata.opcode = MMC_CLEAR_WRITE_PROT;
156 idata.arg = blk_addr;
157 idata.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
158
159 ret = ioctl(fd, MMC_IOC_CMD, &idata);
160 if (ret)
161 perror("ioctl");
162
163 return ret;
164}
165
166static int send_write_protect_type(int fd, __u32 blk_addr, __u64 *group_bits)
167{
168 int ret = 0;
169 struct mmc_ioc_cmd idata;
170 __u8 buf[8];
171 __u64 bits = 0;
172 int x;
173
174 memset(&idata, 0, sizeof(idata));
175 idata.write_flag = 0;
176 idata.opcode = MMC_SEND_WRITE_PROT_TYPE;
177 idata.blksz = 8,
178 idata.blocks = 1,
179 idata.arg = blk_addr;
180 idata.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
181 mmc_ioc_cmd_set_data(idata, buf);
182
183 ret = ioctl(fd, MMC_IOC_CMD, &idata);
184 if (ret)
185 perror("ioctl");
186 for (x = 0; x < sizeof(buf); x++)
187 bits |= (__u64)(buf[7 - x]) << (x * 8);
188 *group_bits = bits;
189 return ret;
190}
191
192static void print_writeprotect_boot_status(__u8 *ext_csd)
Chris Ballb9c7a172012-02-20 12:34:25 -0500193{
194 __u8 reg;
Al Cooper786418c2015-04-29 18:12:35 -0400195 __u8 ext_csd_rev = ext_csd[EXT_CSD_REV];
Chris Ballb9c7a172012-02-20 12:34:25 -0500196
197 /* A43: reserved [174:0] */
198 if (ext_csd_rev >= 5) {
199 printf("Boot write protection status registers"
200 " [BOOT_WP_STATUS]: 0x%02x\n", ext_csd[174]);
201
202 reg = ext_csd[EXT_CSD_BOOT_WP];
203 printf("Boot Area Write protection [BOOT_WP]: 0x%02x\n", reg);
204 printf(" Power ro locking: ");
205 if (reg & EXT_CSD_BOOT_WP_B_PWR_WP_DIS)
206 printf("not possible\n");
207 else
208 printf("possible\n");
209
210 printf(" Permanent ro locking: ");
211 if (reg & EXT_CSD_BOOT_WP_B_PERM_WP_DIS)
212 printf("not possible\n");
213 else
214 printf("possible\n");
215
216 printf(" ro lock status: ");
217 if (reg & EXT_CSD_BOOT_WP_B_PWR_WP_EN)
218 printf("locked until next power on\n");
219 else if (reg & EXT_CSD_BOOT_WP_B_PERM_WP_EN)
220 printf("locked permanently\n");
221 else
222 printf("not locked\n");
223 }
224}
225
Al Cooper1b7f5d72016-06-07 16:35:46 -0400226static int get_wp_group_size_in_blks(__u8 *ext_csd, __u32 *size)
227{
228 __u8 ext_csd_rev = ext_csd[EXT_CSD_REV];
229
230 if ((ext_csd_rev < 5) || (ext_csd[EXT_CSD_ERASE_GROUP_DEF] == 0))
231 return 1;
232
233 *size = ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
234 ext_csd[EXT_CSD_HC_WP_GRP_SIZE] * 1024;
235 return 0;
236}
237
238
239int do_writeprotect_boot_get(int nargs, char **argv)
Chris Ballb9c7a172012-02-20 12:34:25 -0500240{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800241 __u8 ext_csd[EXT_CSD_SIZE];
Chris Ballb9c7a172012-02-20 12:34:25 -0500242 int fd, ret;
243 char *device;
244
Al Cooper1b7f5d72016-06-07 16:35:46 -0400245 CHECK(nargs != 2,
246 "Usage: mmc writeprotect boot get </path/to/mmcblkX>\n",
247 exit(1));
Chris Ballb9c7a172012-02-20 12:34:25 -0500248
249 device = argv[1];
250
251 fd = open(device, O_RDWR);
252 if (fd < 0) {
253 perror("open");
254 exit(1);
255 }
256
257 ret = read_extcsd(fd, ext_csd);
258 if (ret) {
259 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
260 exit(1);
261 }
262
Al Cooper1b7f5d72016-06-07 16:35:46 -0400263 print_writeprotect_boot_status(ext_csd);
Chris Ballb9c7a172012-02-20 12:34:25 -0500264
265 return ret;
266}
267
Al Cooper1b7f5d72016-06-07 16:35:46 -0400268int do_writeprotect_boot_set(int nargs, char **argv)
Chris Ballb9c7a172012-02-20 12:34:25 -0500269{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800270 __u8 ext_csd[EXT_CSD_SIZE], value;
Chris Ballb9c7a172012-02-20 12:34:25 -0500271 int fd, ret;
272 char *device;
273
Al Cooper1b7f5d72016-06-07 16:35:46 -0400274 CHECK(nargs != 2,
275 "Usage: mmc writeprotect boot set </path/to/mmcblkX>\n",
276 exit(1));
Chris Ballb9c7a172012-02-20 12:34:25 -0500277
278 device = argv[1];
279
280 fd = open(device, O_RDWR);
281 if (fd < 0) {
282 perror("open");
283 exit(1);
284 }
285
286 ret = read_extcsd(fd, ext_csd);
287 if (ret) {
288 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
289 exit(1);
290 }
291
292 value = ext_csd[EXT_CSD_BOOT_WP] |
293 EXT_CSD_BOOT_WP_B_PWR_WP_EN;
294 ret = write_extcsd_value(fd, EXT_CSD_BOOT_WP, value);
295 if (ret) {
296 fprintf(stderr, "Could not write 0x%02x to "
297 "EXT_CSD[%d] in %s\n",
298 value, EXT_CSD_BOOT_WP, device);
299 exit(1);
300 }
301
302 return ret;
303}
304
Al Cooper1b7f5d72016-06-07 16:35:46 -0400305static char *prot_desc[] = {
306 "No",
307 "Temporary",
308 "Power-on",
309 "Permanent"
310};
311
312static void print_wp_status(__u32 wp_sizeblks, __u32 start_group,
313 __u32 end_group, int rptype)
314{
315 printf("Write Protect Groups %d-%d (Blocks %d-%d), ",
316 start_group, end_group,
317 start_group * wp_sizeblks, ((end_group + 1) * wp_sizeblks) - 1);
318 printf("%s Write Protection\n", prot_desc[rptype]);
319}
320
321
322int do_writeprotect_user_get(int nargs, char **argv)
323{
324 __u8 ext_csd[512];
325 int fd, ret;
326 char *device;
327 int x;
328 int y = 0;
329 __u32 wp_sizeblks;
330 __u32 dev_sizeblks;
331 __u32 cnt;
332 __u64 bits;
333 __u32 wpblk;
334 __u32 last_wpblk = 0;
335 __u32 prot;
336 __u32 last_prot = -1;
337 int remain;
338
339 CHECK(nargs != 2,
340 "Usage: mmc writeprotect user get </path/to/mmcblkX>\n",
341 exit(1));
342
343 device = argv[1];
344
345 fd = open(device, O_RDWR);
346 if (fd < 0) {
347 perror("open");
348 exit(1);
349 }
350 ret = read_extcsd(fd, ext_csd);
351 if (ret) {
352 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
353 exit(1);
354 }
355
356 ret = get_wp_group_size_in_blks(ext_csd, &wp_sizeblks);
357 if (ret)
358 exit(1);
359 printf("Write Protect Group size in blocks/bytes: %d/%d\n",
360 wp_sizeblks, wp_sizeblks * 512);
361 dev_sizeblks = get_size_in_blks(fd);
362 cnt = dev_sizeblks / wp_sizeblks;
363 for (x = 0; x < cnt; x += WP_BLKS_PER_QUERY) {
364 ret = send_write_protect_type(fd, x * wp_sizeblks, &bits);
365 if (ret)
366 break;
367 remain = cnt - x;
368 if (remain > WP_BLKS_PER_QUERY)
369 remain = WP_BLKS_PER_QUERY;
370 for (y = 0; y < remain; y++) {
371 prot = (bits >> (y * 2)) & 0x3;
372 if (prot != last_prot) {
373 /* not first time */
374 if (last_prot != -1) {
375 wpblk = x + y;
376 print_wp_status(wp_sizeblks,
377 last_wpblk,
378 wpblk - 1,
379 last_prot);
380 last_wpblk = wpblk;
381 }
382 last_prot = prot;
383 }
384 }
385 }
386 if (last_wpblk != (x + y - 1))
387 print_wp_status(wp_sizeblks, last_wpblk, cnt - 1, last_prot);
388
389 return ret;
390}
391
392int do_writeprotect_user_set(int nargs, char **argv)
393{
394 __u8 ext_csd[512];
395 int fd, ret;
396 char *device;
397 int blk_start;
398 int blk_cnt;
399 __u32 wp_blks;
400 __u8 user_wp;
401 int x;
402 int wptype;
403
404 if (nargs != 5)
405 goto usage;
406 device = argv[4];
407 fd = open(device, O_RDWR);
408 if (fd < 0) {
409 perror("open");
410 exit(1);
411 }
412 if (!strcmp(argv[1], "none")) {
413 wptype = WPTYPE_NONE;
414 } else if (!strcmp(argv[1], "temp")) {
415 wptype = WPTYPE_TEMP;
416 } else if (!strcmp(argv[1], "pwron")) {
417 wptype = WPTYPE_PWRON;
418#ifdef DANGEROUS_COMMANDS_ENABLED
419 } else if (!strcmp(argv[1], "perm")) {
420 wptype = WPTYPE_PERM;
421#endif /* DANGEROUS_COMMANDS_ENABLED */
422 } else {
423 fprintf(stderr, "Error, invalid \"type\"\n");
424 goto usage;
425 }
426 ret = read_extcsd(fd, ext_csd);
427 if (ret) {
428 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
429 exit(1);
430 }
431 ret = get_wp_group_size_in_blks(ext_csd, &wp_blks);
432 if (ret) {
433 fprintf(stderr, "Operation not supported for this device\n");
434 exit(1);
435 }
436 blk_start = strtol(argv[2], NULL, 0);
437 blk_cnt = strtol(argv[3], NULL, 0);
438 if ((blk_start % wp_blks) || (blk_cnt % wp_blks)) {
439 fprintf(stderr, "<start block> and <blocks> must be a ");
440 fprintf(stderr, "multiple of the Write Protect Group (%d)\n",
441 wp_blks);
442 exit(1);
443 }
444 if (wptype != WPTYPE_NONE) {
445 user_wp = ext_csd[EXT_CSD_USER_WP];
446 user_wp &= ~USER_WP_CLEAR;
447 switch (wptype) {
448 case WPTYPE_TEMP:
449 break;
450 case WPTYPE_PWRON:
451 user_wp |= USER_WP_US_PWR_WP_EN;
452 break;
453 case WPTYPE_PERM:
454 user_wp |= USER_WP_US_PERM_WP_EN;
455 break;
456 }
457 if (user_wp != ext_csd[EXT_CSD_USER_WP]) {
458 ret = write_extcsd_value(fd, EXT_CSD_USER_WP, user_wp);
459 if (ret) {
460 fprintf(stderr, "Error setting EXT_CSD\n");
461 exit(1);
462 }
463 }
464 }
465 for (x = 0; x < blk_cnt; x += wp_blks) {
466 ret = set_write_protect(fd, blk_start + x,
467 wptype != WPTYPE_NONE);
468 if (ret) {
469 fprintf(stderr,
470 "Could not set write protect for %s\n", device);
471 exit(1);
472 }
473 }
474 if (wptype != WPTYPE_NONE) {
475 ret = write_extcsd_value(fd, EXT_CSD_USER_WP,
476 ext_csd[EXT_CSD_USER_WP]);
477 if (ret) {
478 fprintf(stderr, "Error restoring EXT_CSD\n");
479 exit(1);
480 }
481 }
482 return ret;
483
484usage:
485 fprintf(stderr,
486 "Usage: mmc writeprotect user set <type><start block><blocks><device>\n");
487 exit(1);
488}
489
Saugata Dasb7e25992012-05-17 09:26:34 -0400490int do_disable_512B_emulation(int nargs, char **argv)
491{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800492 __u8 ext_csd[EXT_CSD_SIZE], native_sector_size, data_sector_size, wr_rel_param;
Saugata Dasb7e25992012-05-17 09:26:34 -0400493 int fd, ret;
494 char *device;
495
496 CHECK(nargs != 2, "Usage: mmc disable 512B emulation </path/to/mmcblkX>\n", exit(1));
497 device = argv[1];
498
499 fd = open(device, O_RDWR);
500 if (fd < 0) {
501 perror("open");
502 exit(1);
503 }
504
505 ret = read_extcsd(fd, ext_csd);
506 if (ret) {
507 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
508 exit(1);
509 }
510
511 wr_rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
512 native_sector_size = ext_csd[EXT_CSD_NATIVE_SECTOR_SIZE];
513 data_sector_size = ext_csd[EXT_CSD_DATA_SECTOR_SIZE];
514
515 if (native_sector_size && !data_sector_size &&
516 (wr_rel_param & EN_REL_WR)) {
517 ret = write_extcsd_value(fd, EXT_CSD_USE_NATIVE_SECTOR, 1);
518
519 if (ret) {
520 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
521 1, EXT_CSD_BOOT_WP, device);
522 exit(1);
523 }
524 printf("MMC disable 512B emulation successful. Now reset the device to switch to 4KB native sector mode.\n");
525 } else if (native_sector_size && data_sector_size) {
526 printf("MMC 512B emulation mode is already disabled; doing nothing.\n");
527 } else {
528 printf("MMC does not support disabling 512B emulation mode.\n");
529 }
530
531 return ret;
532}
533
Giuseppe CAVALLARO7bd13202012-04-19 10:58:37 +0200534int do_write_boot_en(int nargs, char **argv)
535{
536 __u8 ext_csd[512];
537 __u8 value = 0;
538 int fd, ret;
539 char *device;
540 int boot_area, send_ack;
541
542 CHECK(nargs != 4, "Usage: mmc bootpart enable <partition_number> "
543 "<send_ack> </path/to/mmcblkX>\n", exit(1));
544
545 /*
546 * If <send_ack> is 1, the device will send acknowledgment
547 * pattern "010" to the host when boot operation begins.
548 * If <send_ack> is 0, it won't.
549 */
550 boot_area = strtol(argv[1], NULL, 10);
551 send_ack = strtol(argv[2], NULL, 10);
552 device = argv[3];
553
554 fd = open(device, O_RDWR);
555 if (fd < 0) {
556 perror("open");
557 exit(1);
558 }
559
560 ret = read_extcsd(fd, ext_csd);
561 if (ret) {
562 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
563 exit(1);
564 }
565
566 value = ext_csd[EXT_CSD_PART_CONFIG];
567
568 switch (boot_area) {
Markus Schuetterlefbc0e6c2016-03-19 08:42:41 +0100569 case EXT_CSD_PART_CONFIG_ACC_NONE:
570 value &= ~(7 << 3);
571 break;
Giuseppe CAVALLARO7bd13202012-04-19 10:58:37 +0200572 case EXT_CSD_PART_CONFIG_ACC_BOOT0:
573 value |= (1 << 3);
574 value &= ~(3 << 4);
575 break;
576 case EXT_CSD_PART_CONFIG_ACC_BOOT1:
577 value |= (1 << 4);
578 value &= ~(1 << 3);
579 value &= ~(1 << 5);
580 break;
581 case EXT_CSD_PART_CONFIG_ACC_USER_AREA:
582 value |= (boot_area << 3);
583 break;
584 default:
585 fprintf(stderr, "Cannot enable the boot area\n");
586 exit(1);
587 }
588 if (send_ack)
589 value |= EXT_CSD_PART_CONFIG_ACC_ACK;
590 else
591 value &= ~EXT_CSD_PART_CONFIG_ACC_ACK;
592
593 ret = write_extcsd_value(fd, EXT_CSD_PART_CONFIG, value);
594 if (ret) {
595 fprintf(stderr, "Could not write 0x%02x to "
596 "EXT_CSD[%d] in %s\n",
597 value, EXT_CSD_PART_CONFIG, device);
598 exit(1);
599 }
600 return ret;
601}
602
Al Cooper794314c2015-05-01 08:24:37 -0400603int do_boot_bus_conditions_set(int nargs, char **argv)
604{
605 __u8 ext_csd[512];
606 __u8 value = 0;
607 int fd, ret;
608 char *device;
609
610 CHECK(nargs != 5, "Usage: mmc: bootbus set <boot_mode> "
611 "<reset_boot_bus_conditions> <boot_bus_width> <device>\n",
612 exit(1));
613
614 if (strcmp(argv[1], "single_backward") == 0)
615 value |= 0;
616 else if (strcmp(argv[1], "single_hs") == 0)
617 value |= 0x8;
618 else if (strcmp(argv[1], "dual") == 0)
619 value |= 0x10;
620 else {
621 fprintf(stderr, "illegal <boot_mode> specified\n");
622 exit(1);
623 }
624
625 if (strcmp(argv[2], "x1") == 0)
626 value |= 0;
627 else if (strcmp(argv[2], "retain") == 0)
628 value |= 0x4;
629 else {
630 fprintf(stderr,
631 "illegal <reset_boot_bus_conditions> specified\n");
632 exit(1);
633 }
634
635 if (strcmp(argv[3], "x1") == 0)
636 value |= 0;
637 else if (strcmp(argv[3], "x4") == 0)
638 value |= 0x1;
639 else if (strcmp(argv[3], "x8") == 0)
640 value |= 0x2;
641 else {
642 fprintf(stderr, "illegal <boot_bus_width> specified\n");
643 exit(1);
644 }
645
646 device = argv[4];
647 fd = open(device, O_RDWR);
648 if (fd < 0) {
649 perror("open");
650 exit(1);
651 }
652
653 ret = read_extcsd(fd, ext_csd);
654 if (ret) {
655 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
656 exit(1);
657 }
658 printf("Changing ext_csd[BOOT_BUS_CONDITIONS] from 0x%02x to 0x%02x\n",
659 ext_csd[EXT_CSD_BOOT_BUS_CONDITIONS], value);
660
661 ret = write_extcsd_value(fd, EXT_CSD_BOOT_BUS_CONDITIONS, value);
662 if (ret) {
663 fprintf(stderr, "Could not write 0x%02x to "
664 "EXT_CSD[%d] in %s\n",
665 value, EXT_CSD_BOOT_BUS_CONDITIONS, device);
666 exit(1);
667 }
668 close(fd);
669 return ret;
670}
671
Chris Ballf74dfe22012-10-19 16:49:55 -0400672int do_hwreset(int value, int nargs, char **argv)
673{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800674 __u8 ext_csd[EXT_CSD_SIZE];
Chris Ballf74dfe22012-10-19 16:49:55 -0400675 int fd, ret;
676 char *device;
677
678 CHECK(nargs != 2, "Usage: mmc hwreset enable </path/to/mmcblkX>\n",
679 exit(1));
680
681 device = argv[1];
682
683 fd = open(device, O_RDWR);
684 if (fd < 0) {
685 perror("open");
686 exit(1);
687 }
688
689 ret = read_extcsd(fd, ext_csd);
690 if (ret) {
691 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
692 exit(1);
693 }
694
695 if ((ext_csd[EXT_CSD_RST_N_FUNCTION] & EXT_CSD_RST_N_EN_MASK) ==
696 EXT_CSD_HW_RESET_EN) {
697 fprintf(stderr,
698 "H/W Reset is already permanently enabled on %s\n",
699 device);
700 exit(1);
701 }
702 if ((ext_csd[EXT_CSD_RST_N_FUNCTION] & EXT_CSD_RST_N_EN_MASK) ==
703 EXT_CSD_HW_RESET_DIS) {
704 fprintf(stderr,
705 "H/W Reset is already permanently disabled on %s\n",
706 device);
707 exit(1);
708 }
709
710 ret = write_extcsd_value(fd, EXT_CSD_RST_N_FUNCTION, value);
711 if (ret) {
712 fprintf(stderr,
713 "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
714 value, EXT_CSD_RST_N_FUNCTION, device);
715 exit(1);
716 }
717
718 return ret;
719}
720
721int do_hwreset_en(int nargs, char **argv)
722{
723 return do_hwreset(EXT_CSD_HW_RESET_EN, nargs, argv);
724}
725
726int do_hwreset_dis(int nargs, char **argv)
727{
728 return do_hwreset(EXT_CSD_HW_RESET_DIS, nargs, argv);
729}
730
Jaehoon Chung86496512012-09-21 10:08:05 +0000731int do_write_bkops_en(int nargs, char **argv)
732{
Nick Sanders9d57aa72014-03-05 21:38:54 -0800733 __u8 ext_csd[EXT_CSD_SIZE], value = 0;
Jaehoon Chung86496512012-09-21 10:08:05 +0000734 int fd, ret;
735 char *device;
736
737 CHECK(nargs != 2, "Usage: mmc bkops enable </path/to/mmcblkX>\n",
738 exit(1));
739
740 device = argv[1];
741
742 fd = open(device, O_RDWR);
743 if (fd < 0) {
744 perror("open");
745 exit(1);
746 }
747
748 ret = read_extcsd(fd, ext_csd);
749 if (ret) {
750 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
751 exit(1);
752 }
753
754 if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
755 fprintf(stderr, "%s doesn't support BKOPS\n", device);
756 exit(1);
757 }
758
759 ret = write_extcsd_value(fd, EXT_CSD_BKOPS_EN, BKOPS_ENABLE);
760 if (ret) {
761 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
762 value, EXT_CSD_BKOPS_EN, device);
763 exit(1);
764 }
765
766 return ret;
767}
768
Ben Gardiner27c357d2013-05-30 17:12:47 -0400769int do_status_get(int nargs, char **argv)
770{
771 __u32 response;
772 int fd, ret;
773 char *device;
774
775 CHECK(nargs != 2, "Usage: mmc status get </path/to/mmcblkX>\n",
776 exit(1));
777
778 device = argv[1];
779
780 fd = open(device, O_RDWR);
781 if (fd < 0) {
782 perror("open");
783 exit(1);
784 }
785
786 ret = send_status(fd, &response);
787 if (ret) {
788 fprintf(stderr, "Could not read response to SEND_STATUS from %s\n", device);
789 exit(1);
790 }
791
792 printf("SEND_STATUS response: 0x%08x\n", response);
793
794 return ret;
795}
796
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -0800797__u32 get_word_from_ext_csd(__u8 *ext_csd_loc)
798{
799 return (ext_csd_loc[3] << 24) |
800 (ext_csd_loc[2] << 16) |
801 (ext_csd_loc[1] << 8) |
802 ext_csd_loc[0];
803}
804
Ben Gardiner4e850232013-05-30 17:12:49 -0400805unsigned int get_sector_count(__u8 *ext_csd)
806{
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -0800807 return get_word_from_ext_csd(&ext_csd[EXT_CSD_SEC_COUNT_0]);
Ben Gardiner4e850232013-05-30 17:12:49 -0400808}
809
810int is_blockaddresed(__u8 *ext_csd)
811{
812 unsigned int sectors = get_sector_count(ext_csd);
813
814 return (sectors > (2u * 1024 * 1024 * 1024) / 512);
815}
816
Ben Gardinerf82e27a2013-05-30 17:12:50 -0400817unsigned int get_hc_wp_grp_size(__u8 *ext_csd)
818{
819 return ext_csd[221];
820}
821
822unsigned int get_hc_erase_grp_size(__u8 *ext_csd)
823{
824 return ext_csd[224];
825}
826
Ben Gardinere6e84e92013-09-19 11:14:27 -0400827int set_partitioning_setting_completed(int dry_run, const char * const device,
828 int fd)
829{
830 int ret;
831
832 if (dry_run) {
833 fprintf(stderr, "NOT setting PARTITION_SETTING_COMPLETED\n");
834 fprintf(stderr, "These changes will not take effect neither "
835 "now nor after a power cycle\n");
836 return 1;
837 }
838
839 fprintf(stderr, "setting OTP PARTITION_SETTING_COMPLETED!\n");
840 ret = write_extcsd_value(fd, EXT_CSD_PARTITION_SETTING_COMPLETED, 0x1);
841 if (ret) {
842 fprintf(stderr, "Could not write 0x1 to "
843 "EXT_CSD[%d] in %s\n",
844 EXT_CSD_PARTITION_SETTING_COMPLETED, device);
845 return 1;
846 }
847
848 __u32 response;
849 ret = send_status(fd, &response);
850 if (ret) {
851 fprintf(stderr, "Could not get response to SEND_STATUS "
852 "from %s\n", device);
853 return 1;
854 }
855
856 if (response & R1_SWITCH_ERROR) {
857 fprintf(stderr, "Setting OTP PARTITION_SETTING_COMPLETED "
858 "failed on %s\n", device);
859 return 1;
860 }
861
862 fprintf(stderr, "Setting OTP PARTITION_SETTING_COMPLETED on "
863 "%s SUCCESS\n", device);
864 fprintf(stderr, "Device power cycle needed for settings to "
865 "take effect.\n"
866 "Confirm that PARTITION_SETTING_COMPLETED bit is set "
867 "using 'extcsd read' after power cycle\n");
868
869 return 0;
870}
871
Balaji T K1fdb7f92015-04-29 18:12:32 -0400872int check_enhanced_area_total_limit(const char * const device, int fd)
873{
874 __u8 ext_csd[512];
875 __u32 regl;
876 unsigned long max_enh_area_sz, user_area_sz, enh_area_sz = 0;
877 unsigned long gp4_part_sz, gp3_part_sz, gp2_part_sz, gp1_part_sz;
Balaji T Kd78ce082015-04-29 18:12:33 -0400878 unsigned long total_sz, total_gp_user_sz;
Balaji T K1fdb7f92015-04-29 18:12:32 -0400879 unsigned int wp_sz, erase_sz;
880 int ret;
881
882 ret = read_extcsd(fd, ext_csd);
883 if (ret) {
884 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
885 exit(1);
886 }
887 wp_sz = get_hc_wp_grp_size(ext_csd);
888 erase_sz = get_hc_erase_grp_size(ext_csd);
889
890 regl = (ext_csd[EXT_CSD_GP_SIZE_MULT_4_2] << 16) |
891 (ext_csd[EXT_CSD_GP_SIZE_MULT_4_1] << 8) |
892 ext_csd[EXT_CSD_GP_SIZE_MULT_4_0];
893 gp4_part_sz = 512l * regl * erase_sz * wp_sz;
894 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_4) {
895 enh_area_sz += gp4_part_sz;
896 printf("Enhanced GP4 Partition Size [GP_SIZE_MULT_4]: 0x%06x\n", regl);
897 printf(" i.e. %lu KiB\n", gp4_part_sz);
898 }
899
900 regl = (ext_csd[EXT_CSD_GP_SIZE_MULT_3_2] << 16) |
901 (ext_csd[EXT_CSD_GP_SIZE_MULT_3_1] << 8) |
902 ext_csd[EXT_CSD_GP_SIZE_MULT_3_0];
903 gp3_part_sz = 512l * regl * erase_sz * wp_sz;
904 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_3) {
905 enh_area_sz += gp3_part_sz;
906 printf("Enhanced GP3 Partition Size [GP_SIZE_MULT_3]: 0x%06x\n", regl);
907 printf(" i.e. %lu KiB\n", gp3_part_sz);
908 }
909
910 regl = (ext_csd[EXT_CSD_GP_SIZE_MULT_2_2] << 16) |
911 (ext_csd[EXT_CSD_GP_SIZE_MULT_2_1] << 8) |
912 ext_csd[EXT_CSD_GP_SIZE_MULT_2_0];
913 gp2_part_sz = 512l * regl * erase_sz * wp_sz;
914 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_2) {
915 enh_area_sz += gp2_part_sz;
916 printf("Enhanced GP2 Partition Size [GP_SIZE_MULT_2]: 0x%06x\n", regl);
917 printf(" i.e. %lu KiB\n", gp2_part_sz);
918 }
919
920 regl = (ext_csd[EXT_CSD_GP_SIZE_MULT_1_2] << 16) |
921 (ext_csd[EXT_CSD_GP_SIZE_MULT_1_1] << 8) |
922 ext_csd[EXT_CSD_GP_SIZE_MULT_1_0];
923 gp1_part_sz = 512l * regl * erase_sz * wp_sz;
924 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_1) {
925 enh_area_sz += gp1_part_sz;
926 printf("Enhanced GP1 Partition Size [GP_SIZE_MULT_1]: 0x%06x\n", regl);
927 printf(" i.e. %lu KiB\n", gp1_part_sz);
928 }
929
930 regl = (ext_csd[EXT_CSD_ENH_SIZE_MULT_2] << 16) |
931 (ext_csd[EXT_CSD_ENH_SIZE_MULT_1] << 8) |
932 ext_csd[EXT_CSD_ENH_SIZE_MULT_0];
933 user_area_sz = 512l * regl * erase_sz * wp_sz;
934 if (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & EXT_CSD_ENH_USR) {
935 enh_area_sz += user_area_sz;
936 printf("Enhanced User Data Area Size [ENH_SIZE_MULT]: 0x%06x\n", regl);
937 printf(" i.e. %lu KiB\n", user_area_sz);
938 }
939
940 regl = (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_2] << 16) |
941 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_1] << 8) |
942 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_0];
943 max_enh_area_sz = 512l * regl * erase_sz * wp_sz;
944 printf("Max Enhanced Area Size [MAX_ENH_SIZE_MULT]: 0x%06x\n", regl);
945 printf(" i.e. %lu KiB\n", max_enh_area_sz);
946 if (enh_area_sz > max_enh_area_sz) {
947 fprintf(stderr,
948 "Programmed total enhanced size %lu KiB cannot exceed max enhanced area %lu KiB %s\n",
949 enh_area_sz, max_enh_area_sz, device);
950 return 1;
951 }
Balaji T Kd78ce082015-04-29 18:12:33 -0400952 total_sz = get_sector_count(ext_csd) / 2;
953 total_gp_user_sz = gp4_part_sz + gp3_part_sz + gp2_part_sz +
954 gp1_part_sz + user_area_sz;
955 if (total_gp_user_sz > total_sz) {
956 fprintf(stderr,
957 "requested total partition size %lu KiB cannot exceed card capacity %lu KiB %s\n",
958 total_gp_user_sz, total_sz, device);
959 return 1;
960 }
961
962 return 0;
963}
964
965int do_create_gp_partition(int nargs, char **argv)
966{
967 __u8 value;
968 __u8 ext_csd[512];
969 __u8 address;
970 int fd, ret;
971 char *device;
972 int dry_run = 1;
973 int partition, enh_attr, ext_attr;
974 unsigned int length_kib, gp_size_mult;
975 unsigned long align;
976
977 CHECK(nargs != 7, "Usage: mmc gp create <-y|-n> <length KiB> "
978 "<partition> <enh_attr> <ext_attr> </path/to/mmcblkX>\n", exit(1));
979
980 if (!strcmp("-y", argv[1]))
981 dry_run = 0;
982
983 length_kib = strtol(argv[2], NULL, 10);
984 partition = strtol(argv[3], NULL, 10);
985 enh_attr = strtol(argv[4], NULL, 10);
986 ext_attr = strtol(argv[5], NULL, 10);
987 device = argv[6];
988
Marcus Folkessoncb04fde2015-11-18 15:06:16 -0500989 if (partition < 1 || partition > 4) {
990 printf("Invalid gp partition number; valid range [1-4].\n");
Balaji T Kd78ce082015-04-29 18:12:33 -0400991 exit(1);
992 }
993
994 if (enh_attr && ext_attr) {
995 printf("Not allowed to set both enhanced attribute and extended attribute\n");
996 exit(1);
997 }
998
999 fd = open(device, O_RDWR);
1000 if (fd < 0) {
1001 perror("open");
1002 exit(1);
1003 }
1004
1005 ret = read_extcsd(fd, ext_csd);
1006 if (ret) {
1007 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1008 exit(1);
1009 }
1010
1011 /* assert not PARTITION_SETTING_COMPLETED */
1012 if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED]) {
1013 printf(" Device is already partitioned\n");
1014 exit(1);
1015 }
1016
1017 align = 512l * get_hc_wp_grp_size(ext_csd) * get_hc_erase_grp_size(ext_csd);
1018 gp_size_mult = (length_kib + align/2l) / align;
1019
1020 /* set EXT_CSD_ERASE_GROUP_DEF bit 0 */
1021 ret = write_extcsd_value(fd, EXT_CSD_ERASE_GROUP_DEF, 0x1);
1022 if (ret) {
1023 fprintf(stderr, "Could not write 0x1 to EXT_CSD[%d] in %s\n",
1024 EXT_CSD_ERASE_GROUP_DEF, device);
1025 exit(1);
1026 }
1027
1028 value = (gp_size_mult >> 16) & 0xff;
1029 address = EXT_CSD_GP_SIZE_MULT_1_2 + (partition - 1) * 3;
1030 ret = write_extcsd_value(fd, address, value);
1031 if (ret) {
1032 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1033 value, address, device);
1034 exit(1);
1035 }
1036 value = (gp_size_mult >> 8) & 0xff;
1037 address = EXT_CSD_GP_SIZE_MULT_1_1 + (partition - 1) * 3;
1038 ret = write_extcsd_value(fd, address, value);
1039 if (ret) {
1040 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1041 value, address, device);
1042 exit(1);
1043 }
1044 value = gp_size_mult & 0xff;
1045 address = EXT_CSD_GP_SIZE_MULT_1_0 + (partition - 1) * 3;
1046 ret = write_extcsd_value(fd, address, value);
1047 if (ret) {
1048 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1049 value, address, device);
1050 exit(1);
1051 }
1052
1053 value = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1054 if (enh_attr)
1055 value |= (1 << partition);
1056 else
1057 value &= ~(1 << partition);
1058
1059 ret = write_extcsd_value(fd, EXT_CSD_PARTITIONS_ATTRIBUTE, value);
1060 if (ret) {
1061 fprintf(stderr, "Could not write EXT_CSD_ENH_%x to EXT_CSD[%d] in %s\n",
1062 partition, EXT_CSD_PARTITIONS_ATTRIBUTE, device);
1063 exit(1);
1064 }
1065
1066 address = EXT_CSD_EXT_PARTITIONS_ATTRIBUTE_0 + (partition - 1) / 2;
1067 value = ext_csd[address];
1068 if (ext_attr)
1069 value |= (ext_attr << (4 * ((partition - 1) % 2)));
1070 else
1071 value &= (0xF << (4 * ((partition % 2))));
1072
1073 ret = write_extcsd_value(fd, address, value);
1074 if (ret) {
1075 fprintf(stderr, "Could not write 0x%x to EXT_CSD[%d] in %s\n",
1076 value, address, device);
1077 exit(1);
1078 }
1079
1080 ret = check_enhanced_area_total_limit(device, fd);
1081 if (ret)
1082 exit(1);
1083
1084 if (!set_partitioning_setting_completed(dry_run, device, fd))
1085 exit(1);
Balaji T K1fdb7f92015-04-29 18:12:32 -04001086
1087 return 0;
1088}
1089
Ben Gardinerd91d3692013-05-30 17:12:51 -04001090int do_enh_area_set(int nargs, char **argv)
1091{
1092 __u8 value;
Nick Sanders9d57aa72014-03-05 21:38:54 -08001093 __u8 ext_csd[EXT_CSD_SIZE];
Ben Gardinerd91d3692013-05-30 17:12:51 -04001094 int fd, ret;
1095 char *device;
1096 int dry_run = 1;
1097 unsigned int start_kib, length_kib, enh_start_addr, enh_size_mult;
1098 unsigned long align;
1099
1100 CHECK(nargs != 5, "Usage: mmc enh_area set <-y|-n> <start KiB> <length KiB> "
1101 "</path/to/mmcblkX>\n", exit(1));
1102
1103 if (!strcmp("-y", argv[1]))
1104 dry_run = 0;
1105
1106 start_kib = strtol(argv[2], NULL, 10);
1107 length_kib = strtol(argv[3], NULL, 10);
1108 device = argv[4];
1109
1110 fd = open(device, O_RDWR);
1111 if (fd < 0) {
1112 perror("open");
1113 exit(1);
1114 }
1115
1116 ret = read_extcsd(fd, ext_csd);
1117 if (ret) {
1118 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1119 exit(1);
1120 }
1121
1122 /* assert ENH_ATTRIBUTE_EN */
1123 if (!(ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & EXT_CSD_ENH_ATTRIBUTE_EN))
1124 {
1125 printf(" Device cannot have enhanced tech.\n");
1126 exit(1);
1127 }
1128
1129 /* assert not PARTITION_SETTING_COMPLETED */
1130 if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED])
1131 {
1132 printf(" Device is already partitioned\n");
1133 exit(1);
1134 }
1135
1136 align = 512l * get_hc_wp_grp_size(ext_csd) * get_hc_erase_grp_size(ext_csd);
1137
1138 enh_size_mult = (length_kib + align/2l) / align;
1139
1140 enh_start_addr = start_kib * 1024 / (is_blockaddresed(ext_csd) ? 512 : 1);
1141 enh_start_addr /= align;
1142 enh_start_addr *= align;
1143
1144 /* set EXT_CSD_ERASE_GROUP_DEF bit 0 */
1145 ret = write_extcsd_value(fd, EXT_CSD_ERASE_GROUP_DEF, 0x1);
1146 if (ret) {
1147 fprintf(stderr, "Could not write 0x1 to "
1148 "EXT_CSD[%d] in %s\n",
1149 EXT_CSD_ERASE_GROUP_DEF, device);
1150 exit(1);
1151 }
1152
1153 /* write to ENH_START_ADDR and ENH_SIZE_MULT and PARTITIONS_ATTRIBUTE's ENH_USR bit */
1154 value = (enh_start_addr >> 24) & 0xff;
1155 ret = write_extcsd_value(fd, EXT_CSD_ENH_START_ADDR_3, value);
1156 if (ret) {
1157 fprintf(stderr, "Could not write 0x%02x to "
1158 "EXT_CSD[%d] in %s\n", value,
1159 EXT_CSD_ENH_START_ADDR_3, device);
1160 exit(1);
1161 }
1162 value = (enh_start_addr >> 16) & 0xff;
1163 ret = write_extcsd_value(fd, EXT_CSD_ENH_START_ADDR_2, value);
1164 if (ret) {
1165 fprintf(stderr, "Could not write 0x%02x to "
1166 "EXT_CSD[%d] in %s\n", value,
1167 EXT_CSD_ENH_START_ADDR_2, device);
1168 exit(1);
1169 }
1170 value = (enh_start_addr >> 8) & 0xff;
1171 ret = write_extcsd_value(fd, EXT_CSD_ENH_START_ADDR_1, value);
1172 if (ret) {
1173 fprintf(stderr, "Could not write 0x%02x to "
1174 "EXT_CSD[%d] in %s\n", value,
1175 EXT_CSD_ENH_START_ADDR_1, device);
1176 exit(1);
1177 }
1178 value = enh_start_addr & 0xff;
1179 ret = write_extcsd_value(fd, EXT_CSD_ENH_START_ADDR_0, value);
1180 if (ret) {
1181 fprintf(stderr, "Could not write 0x%02x to "
1182 "EXT_CSD[%d] in %s\n", value,
1183 EXT_CSD_ENH_START_ADDR_0, device);
1184 exit(1);
1185 }
1186
1187 value = (enh_size_mult >> 16) & 0xff;
1188 ret = write_extcsd_value(fd, EXT_CSD_ENH_SIZE_MULT_2, value);
1189 if (ret) {
1190 fprintf(stderr, "Could not write 0x%02x to "
1191 "EXT_CSD[%d] in %s\n", value,
1192 EXT_CSD_ENH_SIZE_MULT_2, device);
1193 exit(1);
1194 }
1195 value = (enh_size_mult >> 8) & 0xff;
1196 ret = write_extcsd_value(fd, EXT_CSD_ENH_SIZE_MULT_1, value);
1197 if (ret) {
1198 fprintf(stderr, "Could not write 0x%02x to "
1199 "EXT_CSD[%d] in %s\n", value,
1200 EXT_CSD_ENH_SIZE_MULT_1, device);
1201 exit(1);
1202 }
1203 value = enh_size_mult & 0xff;
1204 ret = write_extcsd_value(fd, EXT_CSD_ENH_SIZE_MULT_0, value);
1205 if (ret) {
1206 fprintf(stderr, "Could not write 0x%02x to "
1207 "EXT_CSD[%d] in %s\n", value,
1208 EXT_CSD_ENH_SIZE_MULT_0, device);
1209 exit(1);
1210 }
Balaji T K1fdb7f92015-04-29 18:12:32 -04001211 value = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] | EXT_CSD_ENH_USR;
1212 ret = write_extcsd_value(fd, EXT_CSD_PARTITIONS_ATTRIBUTE, value);
Ben Gardinerd91d3692013-05-30 17:12:51 -04001213 if (ret) {
1214 fprintf(stderr, "Could not write EXT_CSD_ENH_USR to "
1215 "EXT_CSD[%d] in %s\n",
1216 EXT_CSD_PARTITIONS_ATTRIBUTE, device);
1217 exit(1);
1218 }
1219
Balaji T K1fdb7f92015-04-29 18:12:32 -04001220 ret = check_enhanced_area_total_limit(device, fd);
1221 if (ret)
1222 exit(1);
1223
Ben Gardinere6e84e92013-09-19 11:14:27 -04001224 printf("Done setting ENH_USR area on %s\n", device);
Ben Gardinerd91d3692013-05-30 17:12:51 -04001225
Ben Gardinere6e84e92013-09-19 11:14:27 -04001226 if (!set_partitioning_setting_completed(dry_run, device, fd))
Ben Gardinerd91d3692013-05-30 17:12:51 -04001227 exit(1);
Ben Gardinerd91d3692013-05-30 17:12:51 -04001228
1229 return 0;
1230}
1231
Ben Gardiner196d0d22013-09-19 11:14:29 -04001232int do_write_reliability_set(int nargs, char **argv)
1233{
1234 __u8 value;
Nick Sanders9d57aa72014-03-05 21:38:54 -08001235 __u8 ext_csd[EXT_CSD_SIZE];
Ben Gardiner196d0d22013-09-19 11:14:29 -04001236 int fd, ret;
1237
1238 int dry_run = 1;
1239 int partition;
1240 char *device;
1241
1242 CHECK(nargs != 4, "Usage: mmc write_reliability set <-y|-n> "
1243 "<partition> </path/to/mmcblkX>\n", exit(1));
1244
1245 if (!strcmp("-y", argv[1]))
1246 dry_run = 0;
1247
1248 partition = strtol(argv[2], NULL, 10);
1249 device = argv[3];
1250
1251 fd = open(device, O_RDWR);
1252 if (fd < 0) {
1253 perror("open");
1254 exit(1);
1255 }
1256
1257 ret = read_extcsd(fd, ext_csd);
1258 if (ret) {
1259 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1260 exit(1);
1261 }
1262
1263 /* assert not PARTITION_SETTING_COMPLETED */
1264 if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED])
1265 {
1266 printf(" Device is already partitioned\n");
1267 exit(1);
1268 }
1269
1270 /* assert HS_CTRL_REL */
1271 if (!(ext_csd[EXT_CSD_WR_REL_PARAM] & HS_CTRL_REL)) {
1272 printf("Cannot set write reliability parameters, WR_REL_SET is "
1273 "read-only\n");
1274 exit(1);
1275 }
1276
1277 value = ext_csd[EXT_CSD_WR_REL_SET] | (1<<partition);
1278 ret = write_extcsd_value(fd, EXT_CSD_WR_REL_SET, value);
1279 if (ret) {
1280 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1281 value, EXT_CSD_WR_REL_SET, device);
1282 exit(1);
1283 }
1284
1285 printf("Done setting EXT_CSD_WR_REL_SET to 0x%02x on %s\n",
1286 value, device);
1287
1288 if (!set_partitioning_setting_completed(dry_run, device, fd))
1289 exit(1);
1290
1291 return 0;
1292}
1293
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001294int do_read_extcsd(int nargs, char **argv)
1295{
Nick Sanders9d57aa72014-03-05 21:38:54 -08001296 __u8 ext_csd[EXT_CSD_SIZE], ext_csd_rev, reg;
Oliver Metz11f2cea2013-09-23 08:40:52 +02001297 __u32 regl;
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001298 int fd, ret;
1299 char *device;
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001300 const char *str;
Gwendal Grignoueb1cd012015-01-08 15:34:55 -08001301 const char *ver_str[] = {
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001302 "4.0", /* 0 */
1303 "4.1", /* 1 */
1304 "4.2", /* 2 */
1305 "4.3", /* 3 */
1306 "Obsolete", /* 4 */
1307 "4.41", /* 5 */
1308 "4.5", /* 6 */
1309 "5.0", /* 7 */
Puthikorn Voravootivatc384aec2015-04-28 11:28:41 -07001310 "5.1", /* 8 */
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001311 };
1312 int boot_access;
1313 const char* boot_access_str[] = {
1314 "No access to boot partition", /* 0 */
1315 "R/W Boot Partition 1", /* 1 */
1316 "R/W Boot Partition 2", /* 2 */
1317 "R/W Replay Protected Memory Block (RPMB)", /* 3 */
1318 };
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001319
Chris Ball8ba44662012-04-19 13:22:54 -04001320 CHECK(nargs != 2, "Usage: mmc extcsd read </path/to/mmcblkX>\n",
1321 exit(1));
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001322
1323 device = argv[1];
1324
1325 fd = open(device, O_RDWR);
1326 if (fd < 0) {
1327 perror("open");
1328 exit(1);
1329 }
1330
1331 ret = read_extcsd(fd, ext_csd);
1332 if (ret) {
1333 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1334 exit(1);
1335 }
1336
Al Cooper786418c2015-04-29 18:12:35 -04001337 ext_csd_rev = ext_csd[EXT_CSD_REV];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001338
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001339 if ((ext_csd_rev < sizeof(ver_str)/sizeof(char*)) &&
1340 (ext_csd_rev != 4))
1341 str = ver_str[ext_csd_rev];
1342 else
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001343 goto out_free;
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001344
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001345 printf("=============================================\n");
1346 printf(" Extended CSD rev 1.%d (MMC %s)\n", ext_csd_rev, str);
1347 printf("=============================================\n\n");
1348
1349 if (ext_csd_rev < 3)
1350 goto out_free; /* No ext_csd */
1351
1352 /* Parse the Extended CSD registers.
1353 * Reserved bit should be read as "0" in case of spec older
1354 * than A441.
1355 */
1356 reg = ext_csd[EXT_CSD_S_CMD_SET];
1357 printf("Card Supported Command sets [S_CMD_SET: 0x%02x]\n", reg);
1358 if (!reg)
Chris Ballb9c7a172012-02-20 12:34:25 -05001359 printf(" - Standard MMC command sets\n");
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001360
1361 reg = ext_csd[EXT_CSD_HPI_FEATURE];
1362 printf("HPI Features [HPI_FEATURE: 0x%02x]: ", reg);
1363 if (reg & EXT_CSD_HPI_SUPP) {
1364 if (reg & EXT_CSD_HPI_IMPL)
Chris Ballb9c7a172012-02-20 12:34:25 -05001365 printf("implementation based on CMD12\n");
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001366 else
1367 printf("implementation based on CMD13\n");
1368 }
1369
1370 printf("Background operations support [BKOPS_SUPPORT: 0x%02x]\n",
1371 ext_csd[502]);
1372
1373 if (ext_csd_rev >= 6) {
1374 printf("Max Packet Read Cmd [MAX_PACKED_READS: 0x%02x]\n",
1375 ext_csd[501]);
1376 printf("Max Packet Write Cmd [MAX_PACKED_WRITES: 0x%02x]\n",
1377 ext_csd[500]);
1378 printf("Data TAG support [DATA_TAG_SUPPORT: 0x%02x]\n",
1379 ext_csd[499]);
1380
1381 printf("Data TAG Unit Size [TAG_UNIT_SIZE: 0x%02x]\n",
1382 ext_csd[498]);
1383 printf("Tag Resources Size [TAG_RES_SIZE: 0x%02x]\n",
1384 ext_csd[497]);
1385 printf("Context Management Capabilities"
1386 " [CONTEXT_CAPABILITIES: 0x%02x]\n", ext_csd[496]);
1387 printf("Large Unit Size [LARGE_UNIT_SIZE_M1: 0x%02x]\n",
1388 ext_csd[495]);
1389 printf("Extended partition attribute support"
1390 " [EXT_SUPPORT: 0x%02x]\n", ext_csd[494]);
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001391 }
1392 if (ext_csd_rev >= 7) {
1393 int j;
1394 int eol_info;
1395 char* eol_info_str[] = {
1396 "Not Defined", /* 0 */
1397 "Normal", /* 1 */
1398 "Warning", /* 2 */
1399 "Urgent", /* 3 */
1400 };
1401
1402 printf("Supported modes [SUPPORTED_MODES: 0x%02x]\n",
1403 ext_csd[493]);
1404 printf("FFU features [FFU_FEATURES: 0x%02x]\n",
1405 ext_csd[492]);
1406 printf("Operation codes timeout"
1407 " [OPERATION_CODE_TIMEOUT: 0x%02x]\n",
1408 ext_csd[491]);
1409 printf("FFU Argument [FFU_ARG: 0x%08x]\n",
1410 get_word_from_ext_csd(&ext_csd[487]));
1411 printf("Number of FW sectors correctly programmed"
1412 " [NUMBER_OF_FW_SECTORS_CORRECTLY_PROGRAMMED: %d]\n",
1413 get_word_from_ext_csd(&ext_csd[302]));
1414 printf("Vendor proprietary health report:\n");
1415 for (j = 301; j >= 270; j--)
1416 printf("[VENDOR_PROPRIETARY_HEALTH_REPORT[%d]]:"
1417 " 0x%02x\n", j, ext_csd[j]);
1418 for (j = 269; j >= 268; j--) {
1419 __u8 life_used=ext_csd[j];
Puthikorn Voravootivat6bb37ea2014-03-03 17:55:51 -08001420 char est_type = 'B' + (j - 269);
1421 printf("Device life time estimation type %c"
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001422 " [DEVICE_LIFE_TIME_EST_TYP_%c: 0x%02x]\n",
Puthikorn Voravootivat6bb37ea2014-03-03 17:55:51 -08001423 est_type, est_type, life_used);
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001424 if (life_used >= 0x1 && life_used <= 0xa)
1425 printf(" i.e. %d%% - %d%% device life time"
1426 " used\n",
1427 (life_used - 1) * 10, life_used * 10);
1428 else if (life_used == 0xb)
1429 printf(" i.e. Exceeded its maximum estimated"
1430 " device life time\n");
1431 }
1432 eol_info = ext_csd[267];
1433 printf("Pre EOL information [PRE_EOL_INFO: 0x%02x]\n",
1434 eol_info);
1435 if (eol_info < sizeof(eol_info_str)/sizeof(char*))
1436 printf(" i.e. %s\n", eol_info_str[eol_info]);
1437 else
1438 printf(" i.e. Reserved\n");
1439
1440 printf("Optimal read size [OPTIMAL_READ_SIZE: 0x%02x]\n",
1441 ext_csd[266]);
1442 printf("Optimal write size [OPTIMAL_WRITE_SIZE: 0x%02x]\n",
1443 ext_csd[265]);
1444 printf("Optimal trim unit size"
1445 " [OPTIMAL_TRIM_UNIT_SIZE: 0x%02x]\n", ext_csd[264]);
1446 printf("Device version [DEVICE_VERSION: 0x%02x - 0x%02x]\n",
1447 ext_csd[263], ext_csd[262]);
1448 printf("Firmware version:\n");
1449 for (j = 261; j >= 254; j--)
1450 printf("[FIRMWARE_VERSION[%d]]:"
1451 " 0x%02x\n", j, ext_csd[j]);
1452
1453 printf("Power class for 200MHz, DDR at VCC= 3.6V"
1454 " [PWR_CL_DDR_200_360: 0x%02x]\n", ext_csd[253]);
1455 }
1456 if (ext_csd_rev >= 6) {
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001457 printf("Generic CMD6 Timer [GENERIC_CMD6_TIME: 0x%02x]\n",
1458 ext_csd[248]);
1459 printf("Power off notification [POWER_OFF_LONG_TIME: 0x%02x]\n",
1460 ext_csd[247]);
1461 printf("Cache Size [CACHE_SIZE] is %d KiB\n",
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001462 get_word_from_ext_csd(&ext_csd[249]));
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001463 }
1464
1465 /* A441: Reserved [501:247]
1466 A43: reserved [246:229] */
1467 if (ext_csd_rev >= 5) {
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001468 printf("Background operations status"
Chris Ballb9c7a172012-02-20 12:34:25 -05001469 " [BKOPS_STATUS: 0x%02x]\n", ext_csd[246]);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001470
1471 /* CORRECTLY_PRG_SECTORS_NUM [245:242] TODO */
1472
1473 printf("1st Initialisation Time after programmed sector"
1474 " [INI_TIMEOUT_AP: 0x%02x]\n", ext_csd[241]);
1475
1476 /* A441: reserved [240] */
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001477 printf("Power class for 52MHz, DDR at 3.6V"
1478 " [PWR_CL_DDR_52_360: 0x%02x]\n", ext_csd[239]);
1479 printf("Power class for 52MHz, DDR at 1.95V"
1480 " [PWR_CL_DDR_52_195: 0x%02x]\n", ext_csd[238]);
1481
1482 /* A441: reserved [237-236] */
1483
1484 if (ext_csd_rev >= 6) {
1485 printf("Power class for 200MHz at 3.6V"
1486 " [PWR_CL_200_360: 0x%02x]\n", ext_csd[237]);
1487 printf("Power class for 200MHz, at 1.95V"
1488 " [PWR_CL_200_195: 0x%02x]\n", ext_csd[236]);
1489 }
Chris Ballb9c7a172012-02-20 12:34:25 -05001490 printf("Minimum Performance for 8bit at 52MHz in DDR mode:\n");
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001491 printf(" [MIN_PERF_DDR_W_8_52: 0x%02x]\n", ext_csd[235]);
1492 printf(" [MIN_PERF_DDR_R_8_52: 0x%02x]\n", ext_csd[234]);
1493 /* A441: reserved [233] */
1494 printf("TRIM Multiplier [TRIM_MULT: 0x%02x]\n", ext_csd[232]);
1495 printf("Secure Feature support [SEC_FEATURE_SUPPORT: 0x%02x]\n",
1496 ext_csd[231]);
1497 }
1498 if (ext_csd_rev == 5) { /* Obsolete in 4.5 */
1499 printf("Secure Erase Multiplier [SEC_ERASE_MULT: 0x%02x]\n",
1500 ext_csd[230]);
1501 printf("Secure TRIM Multiplier [SEC_TRIM_MULT: 0x%02x]\n",
1502 ext_csd[229]);
1503 }
1504 reg = ext_csd[EXT_CSD_BOOT_INFO];
1505 printf("Boot Information [BOOT_INFO: 0x%02x]\n", reg);
1506 if (reg & EXT_CSD_BOOT_INFO_ALT)
1507 printf(" Device supports alternative boot method\n");
1508 if (reg & EXT_CSD_BOOT_INFO_DDR_DDR)
1509 printf(" Device supports dual data rate during boot\n");
1510 if (reg & EXT_CSD_BOOT_INFO_HS_MODE)
1511 printf(" Device supports high speed timing during boot\n");
1512
1513 /* A441/A43: reserved [227] */
1514 printf("Boot partition size [BOOT_SIZE_MULTI: 0x%02x]\n", ext_csd[226]);
1515 printf("Access size [ACC_SIZE: 0x%02x]\n", ext_csd[225]);
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001516
1517 reg = get_hc_erase_grp_size(ext_csd);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001518 printf("High-capacity erase unit size [HC_ERASE_GRP_SIZE: 0x%02x]\n",
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001519 reg);
1520 printf(" i.e. %u KiB\n", 512 * reg);
1521
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001522 printf("High-capacity erase timeout [ERASE_TIMEOUT_MULT: 0x%02x]\n",
1523 ext_csd[223]);
1524 printf("Reliable write sector count [REL_WR_SEC_C: 0x%02x]\n",
1525 ext_csd[222]);
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001526
1527 reg = get_hc_wp_grp_size(ext_csd);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001528 printf("High-capacity W protect group size [HC_WP_GRP_SIZE: 0x%02x]\n",
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001529 reg);
1530 printf(" i.e. %lu KiB\n", 512l * get_hc_erase_grp_size(ext_csd) * reg);
1531
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001532 printf("Sleep current (VCC) [S_C_VCC: 0x%02x]\n", ext_csd[220]);
1533 printf("Sleep current (VCCQ) [S_C_VCCQ: 0x%02x]\n", ext_csd[219]);
1534 /* A441/A43: reserved [218] */
1535 printf("Sleep/awake timeout [S_A_TIMEOUT: 0x%02x]\n", ext_csd[217]);
1536 /* A441/A43: reserved [216] */
Ben Gardiner4e850232013-05-30 17:12:49 -04001537
1538 unsigned int sectors = get_sector_count(ext_csd);
1539 printf("Sector Count [SEC_COUNT: 0x%08x]\n", sectors);
1540 if (is_blockaddresed(ext_csd))
1541 printf(" Device is block-addressed\n");
1542 else
1543 printf(" Device is NOT block-addressed\n");
1544
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001545 /* A441/A43: reserved [211] */
1546 printf("Minimum Write Performance for 8bit:\n");
1547 printf(" [MIN_PERF_W_8_52: 0x%02x]\n", ext_csd[210]);
1548 printf(" [MIN_PERF_R_8_52: 0x%02x]\n", ext_csd[209]);
1549 printf(" [MIN_PERF_W_8_26_4_52: 0x%02x]\n", ext_csd[208]);
1550 printf(" [MIN_PERF_R_8_26_4_52: 0x%02x]\n", ext_csd[207]);
1551 printf("Minimum Write Performance for 4bit:\n");
1552 printf(" [MIN_PERF_W_4_26: 0x%02x]\n", ext_csd[206]);
1553 printf(" [MIN_PERF_R_4_26: 0x%02x]\n", ext_csd[205]);
1554 /* A441/A43: reserved [204] */
1555 printf("Power classes registers:\n");
1556 printf(" [PWR_CL_26_360: 0x%02x]\n", ext_csd[203]);
1557 printf(" [PWR_CL_52_360: 0x%02x]\n", ext_csd[202]);
1558 printf(" [PWR_CL_26_195: 0x%02x]\n", ext_csd[201]);
1559 printf(" [PWR_CL_52_195: 0x%02x]\n", ext_csd[200]);
1560
1561 /* A43: reserved [199:198] */
1562 if (ext_csd_rev >= 5) {
1563 printf("Partition switching timing "
1564 "[PARTITION_SWITCH_TIME: 0x%02x]\n", ext_csd[199]);
1565 printf("Out-of-interrupt busy timing"
1566 " [OUT_OF_INTERRUPT_TIME: 0x%02x]\n", ext_csd[198]);
1567 }
1568
1569 /* A441/A43: reserved [197] [195] [193] [190] [188]
1570 * [186] [184] [182] [180] [176] */
1571
1572 if (ext_csd_rev >= 6)
1573 printf("I/O Driver Strength [DRIVER_STRENGTH: 0x%02x]\n",
1574 ext_csd[197]);
1575
Oleg Matcovschi64f63a32013-05-23 17:11:07 -07001576 /* DEVICE_TYPE in A45, CARD_TYPE in A441 */
Gwendal Grignouc2faa3d2015-04-28 10:00:45 -07001577 printf("Card Type [CARD_TYPE: 0x%02x - %02x]\n",
1578 ext_csd[196], ext_csd[195]);
1579 reg = ext_csd[195];
1580 if (reg & 0x02) printf(" HS533 Dual Data Rate eMMC @266MHz 1.2VI/O\n");
1581 if (reg & 0x01) printf(" HS533 Dual Data Rate eMMC @266MHz 1.8VI/O\n");
Oleg Matcovschi64f63a32013-05-23 17:11:07 -07001582 reg = ext_csd[196];
Gwendal Grignouc2faa3d2015-04-28 10:00:45 -07001583 if (reg & 0x80) printf(" HS400 Dual Data Rate eMMC @200MHz 1.2VI/O\n");
1584 if (reg & 0x40) printf(" HS400 Dual Data Rate eMMC @200MHz 1.8VI/O\n");
Oleg Matcovschi64f63a32013-05-23 17:11:07 -07001585 if (reg & 0x20) printf(" HS200 Single Data Rate eMMC @200MHz 1.2VI/O\n");
1586 if (reg & 0x10) printf(" HS200 Single Data Rate eMMC @200MHz 1.8VI/O\n");
1587 if (reg & 0x08) printf(" HS Dual Data Rate eMMC @52MHz 1.2VI/O\n");
1588 if (reg & 0x04) printf(" HS Dual Data Rate eMMC @52MHz 1.8V or 3VI/O\n");
1589 if (reg & 0x02) printf(" HS eMMC @52MHz - at rated device voltage(s)\n");
1590 if (reg & 0x01) printf(" HS eMMC @26MHz - at rated device voltage(s)\n");
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001591
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001592 printf("CSD structure version [CSD_STRUCTURE: 0x%02x]\n", ext_csd[194]);
Al Cooper786418c2015-04-29 18:12:35 -04001593 /* ext_csd_rev = ext_csd[EXT_CSD_REV] (already done!!!) */
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001594 printf("Command set [CMD_SET: 0x%02x]\n", ext_csd[191]);
1595 printf("Command set revision [CMD_SET_REV: 0x%02x]\n", ext_csd[189]);
1596 printf("Power class [POWER_CLASS: 0x%02x]\n", ext_csd[187]);
1597 printf("High-speed interface timing [HS_TIMING: 0x%02x]\n",
1598 ext_csd[185]);
1599 /* bus_width: ext_csd[183] not readable */
1600 printf("Erased memory content [ERASED_MEM_CONT: 0x%02x]\n",
1601 ext_csd[181]);
1602 reg = ext_csd[EXT_CSD_BOOT_CFG];
1603 printf("Boot configuration bytes [PARTITION_CONFIG: 0x%02x]\n", reg);
Mario Schuknecht8c0c40d2013-05-15 08:28:04 +02001604 switch ((reg & EXT_CSD_BOOT_CFG_EN)>>3) {
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001605 case 0x0:
1606 printf(" Not boot enable\n");
1607 break;
1608 case 0x1:
1609 printf(" Boot Partition 1 enabled\n");
1610 break;
1611 case 0x2:
1612 printf(" Boot Partition 2 enabled\n");
1613 break;
1614 case 0x7:
1615 printf(" User Area Enabled for boot\n");
1616 break;
1617 }
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001618 boot_access = reg & EXT_CSD_BOOT_CFG_ACC;
1619 if (boot_access < sizeof(boot_access_str) / sizeof(char*))
1620 printf(" %s\n", boot_access_str[boot_access]);
1621 else
Mario Schuknecht8c0c40d2013-05-15 08:28:04 +02001622 printf(" Access to General Purpose partition %d\n",
Gwendal Grignou9b8d99c2014-01-28 13:48:05 -08001623 boot_access - 3);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001624
1625 printf("Boot config protection [BOOT_CONFIG_PROT: 0x%02x]\n",
1626 ext_csd[178]);
1627 printf("Boot bus Conditions [BOOT_BUS_CONDITIONS: 0x%02x]\n",
1628 ext_csd[177]);
1629 printf("High-density erase group definition"
Ben Gardinerd91d3692013-05-30 17:12:51 -04001630 " [ERASE_GROUP_DEF: 0x%02x]\n", ext_csd[EXT_CSD_ERASE_GROUP_DEF]);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001631
Al Cooper1b7f5d72016-06-07 16:35:46 -04001632 print_writeprotect_boot_status(ext_csd);
Chris Ballb9c7a172012-02-20 12:34:25 -05001633
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001634 if (ext_csd_rev >= 5) {
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001635 /* A441]: reserved [172] */
1636 printf("User area write protection register"
1637 " [USER_WP]: 0x%02x\n", ext_csd[171]);
1638 /* A441]: reserved [170] */
1639 printf("FW configuration [FW_CONFIG]: 0x%02x\n", ext_csd[169]);
1640 printf("RPMB Size [RPMB_SIZE_MULT]: 0x%02x\n", ext_csd[168]);
Ben Gardiner4da1c0d2013-09-19 11:14:28 -04001641
1642 reg = ext_csd[EXT_CSD_WR_REL_SET];
1643 const char * const fast = "existing data is at risk if a power "
1644 "failure occurs during a write operation";
1645 const char * const reliable = "the device protects existing "
1646 "data if a power failure occurs during a write "
1647 "operation";
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001648 printf("Write reliability setting register"
Ben Gardiner4da1c0d2013-09-19 11:14:28 -04001649 " [WR_REL_SET]: 0x%02x\n", reg);
1650
1651 printf(" user area: %s\n", reg & (1<<0) ? reliable : fast);
1652 int i;
1653 for (i = 1; i <= 4; i++) {
1654 printf(" partition %d: %s\n", i,
1655 reg & (1<<i) ? reliable : fast);
1656 }
1657
1658 reg = ext_csd[EXT_CSD_WR_REL_PARAM];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001659 printf("Write reliability parameter register"
Ben Gardiner4da1c0d2013-09-19 11:14:28 -04001660 " [WR_REL_PARAM]: 0x%02x\n", reg);
1661 if (reg & 0x01)
1662 printf(" Device supports writing EXT_CSD_WR_REL_SET\n");
1663 if (reg & 0x04)
1664 printf(" Device supports the enhanced def. of reliable "
1665 "write\n");
1666
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001667 /* sanitize_start ext_csd[165]]: not readable
1668 * bkops_start ext_csd[164]]: only writable */
1669 printf("Enable background operations handshake"
1670 " [BKOPS_EN]: 0x%02x\n", ext_csd[163]);
1671 printf("H/W reset function"
1672 " [RST_N_FUNCTION]: 0x%02x\n", ext_csd[162]);
1673 printf("HPI management [HPI_MGMT]: 0x%02x\n", ext_csd[161]);
Ben Gardiner82bd9502013-06-27 11:04:10 -04001674 reg = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001675 printf("Partitioning Support [PARTITIONING_SUPPORT]: 0x%02x\n",
1676 reg);
Ben Gardiner82bd9502013-06-27 11:04:10 -04001677 if (reg & EXT_CSD_PARTITIONING_EN)
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001678 printf(" Device support partitioning feature\n");
1679 else
1680 printf(" Device NOT support partitioning feature\n");
Ben Gardiner82bd9502013-06-27 11:04:10 -04001681 if (reg & EXT_CSD_ENH_ATTRIBUTE_EN)
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001682 printf(" Device can have enhanced tech.\n");
1683 else
1684 printf(" Device cannot have enhanced tech.\n");
1685
Oliver Metz11f2cea2013-09-23 08:40:52 +02001686 regl = (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_2] << 16) |
Oliver Metz22f26412013-09-23 08:40:51 +02001687 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_1] << 8) |
1688 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT_0];
1689
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001690 printf("Max Enhanced Area Size [MAX_ENH_SIZE_MULT]: 0x%06x\n",
Oliver Metz11f2cea2013-09-23 08:40:52 +02001691 regl);
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001692 unsigned int wp_sz = get_hc_wp_grp_size(ext_csd);
1693 unsigned int erase_sz = get_hc_erase_grp_size(ext_csd);
Oliver Metz11f2cea2013-09-23 08:40:52 +02001694 printf(" i.e. %lu KiB\n", 512l * regl * wp_sz * erase_sz);
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001695
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001696 printf("Partitions attribute [PARTITIONS_ATTRIBUTE]: 0x%02x\n",
Ben Gardinerd91d3692013-05-30 17:12:51 -04001697 ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]);
Ben Gardinera6cd98d2013-05-30 17:12:46 -04001698 reg = ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001699 printf("Partitioning Setting"
1700 " [PARTITION_SETTING_COMPLETED]: 0x%02x\n",
Ben Gardinera6cd98d2013-05-30 17:12:46 -04001701 reg);
1702 if (reg)
1703 printf(" Device partition setting complete\n");
1704 else
1705 printf(" Device partition setting NOT complete\n");
1706
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001707 printf("General Purpose Partition Size\n"
1708 " [GP_SIZE_MULT_4]: 0x%06x\n", (ext_csd[154] << 16) |
1709 (ext_csd[153] << 8) | ext_csd[152]);
1710 printf(" [GP_SIZE_MULT_3]: 0x%06x\n", (ext_csd[151] << 16) |
1711 (ext_csd[150] << 8) | ext_csd[149]);
1712 printf(" [GP_SIZE_MULT_2]: 0x%06x\n", (ext_csd[148] << 16) |
1713 (ext_csd[147] << 8) | ext_csd[146]);
1714 printf(" [GP_SIZE_MULT_1]: 0x%06x\n", (ext_csd[145] << 16) |
1715 (ext_csd[144] << 8) | ext_csd[143]);
1716
Oliver Metz11f2cea2013-09-23 08:40:52 +02001717 regl = (ext_csd[EXT_CSD_ENH_SIZE_MULT_2] << 16) |
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001718 (ext_csd[EXT_CSD_ENH_SIZE_MULT_1] << 8) |
1719 ext_csd[EXT_CSD_ENH_SIZE_MULT_0];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001720 printf("Enhanced User Data Area Size"
Oliver Metz11f2cea2013-09-23 08:40:52 +02001721 " [ENH_SIZE_MULT]: 0x%06x\n", regl);
1722 printf(" i.e. %lu KiB\n", 512l * regl *
Ben Gardinerf82e27a2013-05-30 17:12:50 -04001723 get_hc_erase_grp_size(ext_csd) *
1724 get_hc_wp_grp_size(ext_csd));
Ben Gardiner68f490b2013-05-30 17:12:48 -04001725
Oliver Metz11f2cea2013-09-23 08:40:52 +02001726 regl = (ext_csd[EXT_CSD_ENH_START_ADDR_3] << 24) |
Ben Gardiner68f490b2013-05-30 17:12:48 -04001727 (ext_csd[EXT_CSD_ENH_START_ADDR_2] << 16) |
1728 (ext_csd[EXT_CSD_ENH_START_ADDR_1] << 8) |
1729 ext_csd[EXT_CSD_ENH_START_ADDR_0];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001730 printf("Enhanced User Data Start Address"
Oliver Metz11f2cea2013-09-23 08:40:52 +02001731 " [ENH_START_ADDR]: 0x%06x\n", regl);
Ben Gardiner4e850232013-05-30 17:12:49 -04001732 printf(" i.e. %lu bytes offset\n", (is_blockaddresed(ext_csd) ?
Oliver Metz11f2cea2013-09-23 08:40:52 +02001733 1l : 512l) * regl);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001734
1735 /* A441]: reserved [135] */
1736 printf("Bad Block Management mode"
1737 " [SEC_BAD_BLK_MGMNT]: 0x%02x\n", ext_csd[134]);
1738 /* A441: reserved [133:0] */
1739 }
1740 /* B45 */
1741 if (ext_csd_rev >= 6) {
1742 int j;
1743 /* tcase_support ext_csd[132] not readable */
1744 printf("Periodic Wake-up [PERIODIC_WAKEUP]: 0x%02x\n",
1745 ext_csd[131]);
1746 printf("Program CID/CSD in DDR mode support"
1747 " [PROGRAM_CID_CSD_DDR_SUPPORT]: 0x%02x\n",
1748 ext_csd[130]);
1749
1750 for (j = 127; j >= 64; j--)
1751 printf("Vendor Specific Fields"
1752 " [VENDOR_SPECIFIC_FIELD[%d]]: 0x%02x\n",
1753 j, ext_csd[j]);
1754
Gwendal Grignoue966e672014-07-07 14:03:13 -07001755 reg = ext_csd[63];
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001756 printf("Native sector size [NATIVE_SECTOR_SIZE]: 0x%02x\n",
Gwendal Grignoue966e672014-07-07 14:03:13 -07001757 reg);
1758 if (reg == 0x00)
1759 printf(" i.e. 512 B\n");
1760 else if (reg == 0x01)
1761 printf(" i.e. 4 KiB\n");
1762 else
1763 printf(" i.e. Reserved\n");
1764
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001765 printf("Sector size emulation [USE_NATIVE_SECTOR]: 0x%02x\n",
1766 ext_csd[62]);
Gwendal Grignoue966e672014-07-07 14:03:13 -07001767 reg = ext_csd[61];
1768 printf("Sector size [DATA_SECTOR_SIZE]: 0x%02x\n", reg);
1769 if (reg == 0x00)
1770 printf(" i.e. 512 B\n");
1771 else if (reg == 0x01)
1772 printf(" i.e. 4 KiB\n");
1773 else
1774 printf(" i.e. Reserved\n");
1775
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001776 printf("1st initialization after disabling sector"
1777 " size emulation [INI_TIMEOUT_EMU]: 0x%02x\n",
1778 ext_csd[60]);
1779 printf("Class 6 commands control [CLASS_6_CTRL]: 0x%02x\n",
1780 ext_csd[59]);
1781 printf("Number of addressed group to be Released"
1782 "[DYNCAP_NEEDED]: 0x%02x\n", ext_csd[58]);
1783 printf("Exception events control"
1784 " [EXCEPTION_EVENTS_CTRL]: 0x%04x\n",
1785 (ext_csd[57] << 8) | ext_csd[56]);
1786 printf("Exception events status"
1787 "[EXCEPTION_EVENTS_STATUS]: 0x%04x\n",
1788 (ext_csd[55] << 8) | ext_csd[54]);
1789 printf("Extended Partitions Attribute"
1790 " [EXT_PARTITIONS_ATTRIBUTE]: 0x%04x\n",
1791 (ext_csd[53] << 8) | ext_csd[52]);
1792
1793 for (j = 51; j >= 37; j--)
1794 printf("Context configuration"
1795 " [CONTEXT_CONF[%d]]: 0x%02x\n", j, ext_csd[j]);
1796
1797 printf("Packed command status"
1798 " [PACKED_COMMAND_STATUS]: 0x%02x\n", ext_csd[36]);
1799 printf("Packed command failure index"
1800 " [PACKED_FAILURE_INDEX]: 0x%02x\n", ext_csd[35]);
1801 printf("Power Off Notification"
1802 " [POWER_OFF_NOTIFICATION]: 0x%02x\n", ext_csd[34]);
Oleg Matcovschi64f63a32013-05-23 17:11:07 -07001803 printf("Control to turn the Cache ON/OFF"
1804 " [CACHE_CTRL]: 0x%02x\n", ext_csd[33]);
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001805 /* flush_cache ext_csd[32] not readable */
1806 /*Reserved [31:0] */
1807 }
Gwendal Grignoue966e672014-07-07 14:03:13 -07001808 if (ext_csd_rev >= 7) {
1809 printf("Mode config [MODE_CONFIG: 0x%02x]\n", ext_csd[30]);
1810 printf("Mode operation codes [MODE_OPERATION_CODES: 0x%02x]\n",
1811 ext_csd[29]);
1812
1813 reg = ext_csd[26];
1814 printf("FFU status [FFU_STATUS: 0x%02x]\n", reg);
1815 switch (reg) {
1816 case 0x00:
1817 printf(" Success\n");
1818 break;
1819 case 0x10:
1820 printf(" General error\n");
1821 break;
1822 case 0x11:
1823 printf(" Firmware install error\n");
1824 break;
1825 case 0x12:
1826 printf(" Error in downloading firmware\n");
1827 break;
1828 default:
1829 printf(" Reserved\n");
1830 }
1831 printf("Pre loading data size [PRE_LOADING_DATA_SIZE] is"
1832 " %d sector size\n",
1833 get_word_from_ext_csd(&ext_csd[22]));
1834 printf("Max pre loading data size [MAX_PRE_LOADING_DATA_SIZE] is"
1835 " %d sector size\n",
1836 get_word_from_ext_csd(&ext_csd[18]));
1837 printf("Product state awareness enablement"
1838 " [PRODUCT_STATE_AWARENESS_ENABLEMENT: 0x%02x]\n",
1839 ext_csd[17]);
1840 printf("Secure Removal Type [SECURE_REMOVAL_TYPE: 0x%02x]\n",
1841 ext_csd[16]);
1842 }
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001843
Avi Shchislowskidc7ab962016-03-08 14:22:41 -05001844 if (ext_csd_rev >= 7) {
1845 printf("eMMC Firmware Version: %s\n",
1846 (char*)&ext_csd[EXT_CSD_FIRMWARE_VERSION]);
1847 }
Adrian Hunterbb1600b2016-06-10 11:28:59 +03001848
1849 if (ext_csd_rev >= 8) {
1850 printf("Command Queue Support [CMDQ_SUPPORT]: 0x%02x\n",
1851 ext_csd[EXT_CSD_CMDQ_SUPPORT]);
1852 printf("Command Queue Depth [CMDQ_DEPTH]: %u\n",
1853 (ext_csd[EXT_CSD_CMDQ_DEPTH] & 0x1f) + 1);
1854 printf("Command Enabled [CMDQ_MODE_EN]: 0x%02x\n",
1855 ext_csd[EXT_CSD_CMDQ_MODE_EN]);
1856 }
Giuseppe CAVALLAROa5bf4a22012-02-20 09:45:29 +01001857out_free:
Johan RUDHOLMa8bfde72012-02-12 11:46:44 -05001858 return ret;
1859}
Yaniv Gardi21bb4732013-05-26 13:25:33 -04001860
Nick Sanders9d57aa72014-03-05 21:38:54 -08001861int do_dump_extcsd(int nargs, char **argv)
1862{
1863 __u8 ext_csd[EXT_CSD_SIZE];
1864 int fd, ret;
1865 char *device;
1866 int i, j;
1867
1868 CHECK(nargs != 2, "Usage: mmc extcsd dump </path/to/mmcblkX>\n",
1869 exit(1));
1870
1871 device = argv[1];
1872
1873 fd = open(device, O_RDWR);
1874 if (fd < 0) {
1875 perror("Failed to open mmc device");
1876 exit(1);
1877 }
1878
1879 ret = read_extcsd(fd, ext_csd);
1880 if (ret) {
1881 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
1882 exit(1);
1883 }
1884
1885 /* Dump all bytes so that any undecoded or proprietary registers */
1886 /* can be acessed. */
1887 printf("EXT_CSD binary dump:\n");
1888 for (i = 0; i < EXT_CSD_SIZE; i+= 16) {
1889 printf(" %3d: %3x: ", i, i);
1890 for (j = 0; (j < 16) && (i + j < EXT_CSD_SIZE); j++) {
1891 printf(" %02x", ext_csd[i+j]);
1892 }
1893 printf("\n");
1894 }
1895
1896 return ret;
1897}
1898
Yaniv Gardi21bb4732013-05-26 13:25:33 -04001899int do_sanitize(int nargs, char **argv)
1900{
1901 int fd, ret;
1902 char *device;
1903
1904 CHECK(nargs != 2, "Usage: mmc sanitize </path/to/mmcblkX>\n",
1905 exit(1));
1906
1907 device = argv[1];
1908
1909 fd = open(device, O_RDWR);
1910 if (fd < 0) {
1911 perror("open");
1912 exit(1);
1913 }
1914
1915 ret = write_extcsd_value(fd, EXT_CSD_SANITIZE_START, 1);
1916 if (ret) {
1917 fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
1918 1, EXT_CSD_SANITIZE_START, device);
1919 exit(1);
1920 }
1921
1922 return ret;
1923
1924}
1925
Julius Wernerbcc3e2e2016-04-21 16:53:02 -07001926enum blockprotect_mode {
1927 BLOCKPROTECT_TEMPORARY = 0,
1928 BLOCKPROTECT_POWERON,
1929 BLOCKPROTECT_PERMANENT,
1930};
1931
1932int write_blockprotect(int fd, __u32 sector, int enable)
1933{
1934 struct mmc_ioc_cmd cmd;
1935 int ret;
1936
1937 memset(&cmd, 0, sizeof(cmd));
1938 cmd.write_flag = 1;
1939 cmd.opcode = enable ? MMC_SET_WRITE_PROT : MMC_CLR_WRITE_PROT;
1940 cmd.arg = sector;
1941 cmd.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
1942
1943 ret = ioctl(fd, MMC_IOC_CMD, &cmd);
1944 if (ret)
1945 perror("SET/CLR_WRITE_PROT command");
1946 return ret;
1947}
1948
1949int do_blockprotect_enable(int nargs, char **argv)
1950{
1951 __u8 ext_csd[EXT_CSD_SIZE];
1952 __u8 user_wp;
1953 __u32 sector;
1954 char *end;
1955 int ret, fd;
1956 int arg_index = 0;
1957 enum blockprotect_mode mode = BLOCKPROTECT_TEMPORARY;
1958
1959 if (nargs > 0 && !strcmp(argv[1], "-r")) {
1960 arg_index++;
1961 mode = BLOCKPROTECT_POWERON;
1962 } else if (nargs > 0 && !strcmp(argv[1], "-p")) {
1963 arg_index++;
1964 mode = BLOCKPROTECT_PERMANENT;
1965 }
1966
1967 CHECK(nargs != 3 + arg_index, "Usage: mmc blockprotect enable [-p|-r] <device> <write protect block>\n", exit(1));
1968
1969 sector = strtoul(argv[2 + arg_index], &end, 0);
1970 if (*end != '\0') {
1971 fprintf(stderr, "Not a block number: %s\n",
1972 argv[2 + arg_index]);
1973 exit(1);
1974 }
1975
1976 fd = open(argv[1 + arg_index], O_RDWR);
1977 if (fd < 0) {
1978 perror("open");
1979 exit(1);
1980 }
1981
1982 if (read_extcsd(fd, ext_csd))
1983 exit(1);
1984
1985 user_wp = ext_csd[EXT_CSD_USER_WP];
1986 user_wp &= ~(EXT_CSD_US_PERM_WP_EN | EXT_CSD_US_PWR_WP_EN);
1987 if (mode == BLOCKPROTECT_POWERON)
1988 user_wp |= EXT_CSD_US_PWR_WP_EN;
1989 else if (mode == BLOCKPROTECT_PERMANENT)
1990 user_wp |= EXT_CSD_US_PERM_WP_EN;
1991
1992 ret = write_extcsd_value(fd, EXT_CSD_USER_WP, user_wp);
1993 if (ret) {
1994 perror("update EXT_CSD[USER_WP]");
1995 exit(1);
1996 }
1997
1998 usleep(INTER_COMMAND_GAP_US);
1999
2000 ret = write_blockprotect(fd, sector, 1);
2001
2002 usleep(INTER_COMMAND_GAP_US);
2003
2004 user_wp &= ~(EXT_CSD_US_PERM_WP_EN | EXT_CSD_US_PWR_WP_EN);
2005 if (write_extcsd_value(fd, EXT_CSD_USER_WP, user_wp)) {
2006 perror("reset EXT_CSD[USER_WP]");
2007 if (!ret)
2008 ret = -1;
2009 }
2010
2011 return ret;
2012}
2013
2014int do_blockprotect_disable(int nargs, char **argv)
2015{
2016 __u32 sector;
2017 char *end;
2018 int fd;
2019
2020 CHECK(nargs != 3, "Usage: mmc blockprotect disable <device> <write protect block>\n", exit(1));
2021
2022 sector = strtoul(argv[2], &end, 0);
2023 if (*end != '\0') {
2024 fprintf(stderr, "Not a block number: %s\n", argv[2]);
2025 exit(1);
2026 }
2027
2028
2029 fd = open(argv[1], O_RDWR);
2030 if (fd < 0) {
2031 perror("open");
2032 exit(1);
2033 }
2034
2035 return write_blockprotect(fd, sector, 0);
2036}
2037
2038int do_blockprotect_read(int nargs, char **argv)
2039{
2040 __u8 wp_bits[8];
2041 __u32 sector;
2042 char *end;
2043 int fd;
2044 struct mmc_ioc_cmd cmd;
2045
2046 CHECK(nargs != 3, "Usage: mmc blockprotect read <device> <write protect block>\n", exit(1));
2047
2048 fd = open(argv[1], O_RDWR);
2049 if (fd < 0) {
2050 perror("open");
2051 exit(1);
2052 }
2053
2054 sector = strtoul(argv[2], &end, 0);
2055 if (*end != '\0') {
2056 fprintf(stderr, "Not a block number: %s\n", argv[2]);
2057 exit(1);
2058 }
2059
2060 memset(&cmd, 0, sizeof(cmd));
2061 cmd.write_flag = 0;
2062 cmd.opcode = MMC_SEND_WRITE_PROT_TYPE;
2063 cmd.arg = sector;
2064 cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
2065 cmd.blksz = sizeof(wp_bits);
2066 cmd.blocks = 1;
2067 mmc_ioc_cmd_set_data(cmd, wp_bits);
2068
2069 if (ioctl(fd, MMC_IOC_CMD, &cmd)) {
2070 perror("SEND_WRITE_PROT_TYPE command");
2071 exit(1);
2072 }
2073
2074 printf("Sector %u write protection: ", sector);
2075 switch (wp_bits[7] & 3) {
2076 case 0:
2077 printf("NONE\n");
2078 break;
2079 case 1:
2080 printf("TEMPORARY\n");
2081 break;
2082 case 2:
2083 printf("POWER-ON\n");
2084 break;
2085 case 3:
2086 printf("PERMANENT\n");
2087 break;
2088 }
2089
2090 return 0;
2091}
2092
2093int do_blockprotect_info(int nargs, char **argv)
2094{
2095 __u8 ext_csd[EXT_CSD_SIZE];
2096 __u8 user_wp;
2097 int fd, wp_sz, erase_sz;
2098
2099 CHECK(nargs != 2, "Usage: mmc blockprotect info <device>\n", exit(1));
2100
2101 fd = open(argv[1], O_RDWR);
2102 if (fd < 0) {
2103 perror("open");
2104 exit(1);
2105 }
2106
2107 if (read_extcsd(fd, ext_csd))
2108 exit(1);
2109
2110 if (ext_csd[EXT_CSD_CLASS_6_CTRL] != 0) {
2111 fprintf(stderr, "Block protection commands not supported: "
2112 "CLASS_6_CTRL set.\n");
2113 exit(1);
2114 }
2115
2116 if ((ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x1) != 0x1) {
2117 fprintf(stderr, "Block protection commands not supported: "
2118 "high-capacity sizes not enabled.\n");
2119 exit(1);
2120 }
2121
2122 wp_sz = get_hc_wp_grp_size(ext_csd);
2123 erase_sz = get_hc_erase_grp_size(ext_csd);
2124
2125 if (erase_sz == 0 || wp_sz == 0) {
2126 fprintf(stderr, "Block protection commands not supported: "
2127 "no high-capacity size for erase or WP blocks.\n");
2128 exit(1);
2129 }
2130
2131 printf("Write protect block size in sectors: %d\n",
2132 erase_sz * wp_sz * 1024);
2133
2134 user_wp = ext_csd[EXT_CSD_USER_WP];
2135 printf("Permanent write protection: %s\n",
2136 user_wp & EXT_CSD_US_PERM_WP_DIS ? "forbidden" : "allowed");
2137 printf("Power-on write protection: %s\n",
2138 user_wp & EXT_CSD_US_PWR_WP_DIS ? "forbidden" : "allowed");
2139
2140 return 0;
2141}
2142
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002143static const char* const mmc_ffu_hack_names[] = {
2144 [MMC_OVERRIDE_FFU_ARG] = "ffu_arg",
2145};
2146
Gwendal Grignou771984c2014-07-01 12:46:18 -07002147int do_emmc50_ffu (int nargs, char **argv)
2148{
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002149 int fd, ret, i, argc=1, ffu_hack=0;
2150 char *device, *type, *path;
2151 __u64 value;
2152 union {
2153 __u8 data[FFU_DATA_SIZE];
2154 struct mmc_ffu_args ffu_args;
2155 } ffu_data;
2156 struct mmc_ffu_args *ffu_args = &ffu_data.ffu_args;
Gwendal Grignou0f757342014-10-16 16:52:46 -07002157 struct mmc_ioc_cmd mmc_ioc_cmd;
Gwendal Grignou771984c2014-07-01 12:46:18 -07002158
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002159 while (!strcmp("-k", argv[argc])) {
2160 ret = sscanf(argv[++argc], "%m[^:]:0x%llx", &type, &value);
2161 if (ret < 1) {
2162 fprintf(stderr, "Invalid hack: %s\n", argv[argc]);
2163 exit(1);
2164 }
2165 for (i = 0; i < MMC_HACK_LEN; i++) {
2166 if (!strcmp(type, mmc_ffu_hack_names[i])) {
2167 ffu_args->hack[ffu_hack].type = i;
2168 if (ret == 2) {
2169 ffu_args->hack[ffu_hack].value = value;
2170 }
2171 ffu_hack++;
2172 if (ffu_hack * sizeof(struct mmc_ffu_hack) +
2173 sizeof(struct mmc_ffu_args) >
2174 FFU_DATA_SIZE) {
2175 fprintf(stderr, "Too many %d hacks",
2176 ffu_hack);
2177 exit(1);
2178 }
2179 break;
2180 }
2181 }
2182 if (i == MMC_HACK_LEN) {
2183 fprintf(stderr, "Hack type %s not found\n", type);
2184 fprintf(stderr, "Supported types are: ");
2185 for (i = 0; i < MMC_HACK_LEN; i++)
2186 fprintf(stderr, "%s%s", mmc_ffu_hack_names[i],
2187 (i == MMC_HACK_LEN-1 ? "\n": ", "));
Gwendal Grignou771984c2014-07-01 12:46:18 -07002188
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002189 exit(1);
2190 }
2191 free(type);
2192 argc++;
2193 }
2194 ffu_args->hack_nb = ffu_hack;
2195
2196 path = argv[argc++];
2197 if (strlen(path) >= FFU_NAME_LEN) {
Gwendal Grignou771984c2014-07-01 12:46:18 -07002198 fprintf(stderr, "Filename \"%.20s\" too long\n", path);
2199 exit(1);
2200 }
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002201 strcpy(ffu_args->name, path);
2202 device = argv[argc++];
Gwendal Grignou771984c2014-07-01 12:46:18 -07002203 fd = open(device, O_RDWR);
2204 if (fd < 0) {
2205 perror("open");
2206 exit(1);
2207 }
2208
Gwendal Grignou0f757342014-10-16 16:52:46 -07002209 /* prepare and send ioctl */
2210 memset(&mmc_ioc_cmd, 0, sizeof(mmc_ioc_cmd));
2211 mmc_ioc_cmd.opcode = MMC_FFU_INVOKE_OP;
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002212 mmc_ioc_cmd.blksz = FFU_DATA_SIZE;
Gwendal Grignou0f757342014-10-16 16:52:46 -07002213 mmc_ioc_cmd.blocks = 1;
2214 mmc_ioc_cmd.arg = 0;
2215 mmc_ioc_cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
2216 mmc_ioc_cmd.write_flag = 1;
Gwendal Grignou0da2c512015-01-08 15:36:03 -08002217 mmc_ioc_cmd_set_data(mmc_ioc_cmd, ffu_args);
Gwendal Grignou0f757342014-10-16 16:52:46 -07002218 ret = ioctl(fd, MMC_IOC_CMD, &mmc_ioc_cmd);
Gwendal Grignou771984c2014-07-01 12:46:18 -07002219 if (ret) {
2220 fprintf(stderr, "FFU install failed : %s\n", strerror(errno));
2221 exit(1);
2222 }
2223
2224 close(fd);
2225 return 0;
2226}
2227
Roman Peniaev023cc7c2014-08-12 23:25:45 +09002228#define DO_IO(func, fd, buf, nbyte) \
2229 ({ \
2230 ssize_t ret = 0, r; \
2231 do { \
2232 r = func(fd, buf + ret, nbyte - ret); \
2233 if (r < 0 && errno != EINTR) { \
2234 ret = -1; \
2235 break; \
2236 } \
2237 else if (r > 0) \
2238 ret += r; \
2239 } while (r != 0 && (size_t)ret != nbyte); \
2240 \
2241 ret; \
2242 })
2243
2244enum rpmb_op_type {
2245 MMC_RPMB_WRITE_KEY = 0x01,
2246 MMC_RPMB_READ_CNT = 0x02,
2247 MMC_RPMB_WRITE = 0x03,
2248 MMC_RPMB_READ = 0x04,
2249
2250 /* For internal usage only, do not use it directly */
2251 MMC_RPMB_READ_RESP = 0x05
2252};
2253
2254struct rpmb_frame {
2255 u_int8_t stuff[196];
2256 u_int8_t key_mac[32];
2257 u_int8_t data[256];
2258 u_int8_t nonce[16];
2259 u_int32_t write_counter;
2260 u_int16_t addr;
2261 u_int16_t block_count;
2262 u_int16_t result;
2263 u_int16_t req_resp;
2264};
2265
2266/* Performs RPMB operation.
2267 *
2268 * @fd: RPMB device on which we should perform ioctl command
2269 * @frame_in: input RPMB frame, should be properly inited
2270 * @frame_out: output (result) RPMB frame. Caller is responsible for checking
2271 * result and req_resp for output frame.
2272 * @out_cnt: count of outer frames. Used only for multiple blocks reading,
2273 * in the other cases -EINVAL will be returned.
2274 */
2275static int do_rpmb_op(int fd,
2276 const struct rpmb_frame *frame_in,
2277 struct rpmb_frame *frame_out,
2278 unsigned int out_cnt)
2279{
2280 int err;
2281 u_int16_t rpmb_type;
2282
2283 struct mmc_ioc_cmd ioc = {
2284 .arg = 0x0,
2285 .blksz = 512,
2286 .blocks = 1,
2287 .write_flag = 1,
2288 .opcode = MMC_WRITE_MULTIPLE_BLOCK,
2289 .flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC,
2290 .data_ptr = (uintptr_t)frame_in
2291 };
2292
2293 if (!frame_in || !frame_out || !out_cnt)
2294 return -EINVAL;
2295
2296 rpmb_type = be16toh(frame_in->req_resp);
2297
2298 switch(rpmb_type) {
2299 case MMC_RPMB_WRITE:
2300 case MMC_RPMB_WRITE_KEY:
2301 if (out_cnt != 1) {
2302 err = -EINVAL;
2303 goto out;
2304 }
2305
2306 /* Write request */
2307 ioc.write_flag |= (1<<31);
2308 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2309 if (err < 0) {
2310 err = -errno;
2311 goto out;
2312 }
2313
2314 /* Result request */
2315 memset(frame_out, 0, sizeof(*frame_out));
2316 frame_out->req_resp = htobe16(MMC_RPMB_READ_RESP);
2317 ioc.write_flag = 1;
2318 ioc.data_ptr = (uintptr_t)frame_out;
2319 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2320 if (err < 0) {
2321 err = -errno;
2322 goto out;
2323 }
2324
2325 /* Get response */
2326 ioc.write_flag = 0;
2327 ioc.opcode = MMC_READ_MULTIPLE_BLOCK;
2328 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2329 if (err < 0) {
2330 err = -errno;
2331 goto out;
2332 }
2333
2334 break;
2335 case MMC_RPMB_READ_CNT:
2336 if (out_cnt != 1) {
2337 err = -EINVAL;
2338 goto out;
2339 }
2340 /* fall through */
2341
2342 case MMC_RPMB_READ:
2343 /* Request */
2344 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2345 if (err < 0) {
2346 err = -errno;
2347 goto out;
2348 }
2349
2350 /* Get response */
2351 ioc.write_flag = 0;
2352 ioc.opcode = MMC_READ_MULTIPLE_BLOCK;
2353 ioc.blocks = out_cnt;
2354 ioc.data_ptr = (uintptr_t)frame_out;
2355 err = ioctl(fd, MMC_IOC_CMD, &ioc);
2356 if (err < 0) {
2357 err = -errno;
2358 goto out;
2359 }
2360
2361 break;
2362 default:
2363 err = -EINVAL;
2364 goto out;
2365 }
2366
2367out:
2368 return err;
2369}
2370
2371int do_rpmb_write_key(int nargs, char **argv)
2372{
2373 int ret, dev_fd, key_fd;
2374 struct rpmb_frame frame_in = {
2375 .req_resp = htobe16(MMC_RPMB_WRITE_KEY)
2376 }, frame_out;
2377
2378 CHECK(nargs != 3, "Usage: mmc rpmb write-key </path/to/mmcblkXrpmb> </path/to/key>\n",
2379 exit(1));
2380
2381 dev_fd = open(argv[1], O_RDWR);
2382 if (dev_fd < 0) {
2383 perror("device open");
2384 exit(1);
2385 }
2386
2387 if (0 == strcmp(argv[2], "-"))
2388 key_fd = STDIN_FILENO;
2389 else {
2390 key_fd = open(argv[2], O_RDONLY);
2391 if (key_fd < 0) {
2392 perror("can't open key file");
2393 exit(1);
2394 }
2395 }
2396
2397 /* Read the auth key */
2398 ret = DO_IO(read, key_fd, frame_in.key_mac, sizeof(frame_in.key_mac));
2399 if (ret < 0) {
2400 perror("read the key");
2401 exit(1);
2402 } else if (ret != sizeof(frame_in.key_mac)) {
2403 printf("Auth key must be %lu bytes length, but we read only %d, exit\n",
2404 (unsigned long)sizeof(frame_in.key_mac),
2405 ret);
2406 exit(1);
2407 }
2408
2409 /* Execute RPMB op */
2410 ret = do_rpmb_op(dev_fd, &frame_in, &frame_out, 1);
2411 if (ret != 0) {
2412 perror("RPMB ioctl failed");
2413 exit(1);
2414 }
2415
2416 /* Check RPMB response */
2417 if (frame_out.result != 0) {
2418 printf("RPMB operation failed, retcode 0x%04x\n",
2419 be16toh(frame_out.result));
2420 exit(1);
2421 }
2422
2423 close(dev_fd);
2424 if (key_fd != STDIN_FILENO)
2425 close(key_fd);
2426
2427 return ret;
2428}
2429
2430int rpmb_read_counter(int dev_fd, unsigned int *cnt)
2431{
2432 int ret;
2433 struct rpmb_frame frame_in = {
2434 .req_resp = htobe16(MMC_RPMB_READ_CNT)
2435 }, frame_out;
2436
2437 /* Execute RPMB op */
2438 ret = do_rpmb_op(dev_fd, &frame_in, &frame_out, 1);
2439 if (ret != 0) {
2440 perror("RPMB ioctl failed");
2441 exit(1);
2442 }
2443
2444 /* Check RPMB response */
2445 if (frame_out.result != 0)
2446 return be16toh(frame_out.result);
2447
2448 *cnt = be32toh(frame_out.write_counter);
2449
2450 return 0;
2451}
2452
2453int do_rpmb_read_counter(int nargs, char **argv)
2454{
2455 int ret, dev_fd;
2456 unsigned int cnt;
2457
2458 CHECK(nargs != 2, "Usage: mmc rpmb read-counter </path/to/mmcblkXrpmb>\n",
2459 exit(1));
2460
2461 dev_fd = open(argv[1], O_RDWR);
2462 if (dev_fd < 0) {
2463 perror("device open");
2464 exit(1);
2465 }
2466
2467 ret = rpmb_read_counter(dev_fd, &cnt);
2468
2469 /* Check RPMB response */
2470 if (ret != 0) {
2471 printf("RPMB operation failed, retcode 0x%04x\n", ret);
2472 exit(1);
2473 }
2474
2475 close(dev_fd);
2476
2477 printf("Counter value: 0x%08x\n", cnt);
2478
2479 return ret;
2480}
2481
2482int do_rpmb_read_block(int nargs, char **argv)
2483{
2484 int i, ret, dev_fd, data_fd, key_fd = -1;
2485 uint16_t addr, blocks_cnt;
2486 unsigned char key[32];
2487 struct rpmb_frame frame_in = {
2488 .req_resp = htobe16(MMC_RPMB_READ),
2489 }, *frame_out_p;
2490
2491 CHECK(nargs != 5 && nargs != 6, "Usage: mmc rpmb read-block </path/to/mmcblkXrpmb> <address> <blocks count> </path/to/output_file> [/path/to/key]\n",
2492 exit(1));
2493
2494 dev_fd = open(argv[1], O_RDWR);
2495 if (dev_fd < 0) {
2496 perror("device open");
2497 exit(1);
2498 }
2499
2500 /* Get block address */
2501 errno = 0;
2502 addr = strtol(argv[2], NULL, 0);
2503 if (errno) {
2504 perror("incorrect address");
2505 exit(1);
2506 }
2507 frame_in.addr = htobe16(addr);
2508
2509 /* Get blocks count */
2510 errno = 0;
2511 blocks_cnt = strtol(argv[3], NULL, 0);
2512 if (errno) {
2513 perror("incorrect blocks count");
2514 exit(1);
2515 }
2516
2517 if (!blocks_cnt) {
2518 printf("please, specify valid blocks count number\n");
2519 exit(1);
2520 }
2521
2522 frame_out_p = calloc(sizeof(*frame_out_p), blocks_cnt);
2523 if (!frame_out_p) {
2524 printf("can't allocate memory for RPMB outer frames\n");
2525 exit(1);
2526 }
2527
2528 /* Write 256b data */
2529 if (0 == strcmp(argv[4], "-"))
2530 data_fd = STDOUT_FILENO;
2531 else {
2532 data_fd = open(argv[4], O_WRONLY | O_CREAT | O_APPEND,
2533 S_IRUSR | S_IWUSR);
2534 if (data_fd < 0) {
2535 perror("can't open output file");
2536 exit(1);
2537 }
2538 }
2539
2540 /* Key is specified */
2541 if (nargs == 6) {
2542 if (0 == strcmp(argv[5], "-"))
2543 key_fd = STDIN_FILENO;
2544 else {
2545 key_fd = open(argv[5], O_RDONLY);
2546 if (key_fd < 0) {
2547 perror("can't open input key file");
2548 exit(1);
2549 }
2550 }
2551
2552 ret = DO_IO(read, key_fd, key, sizeof(key));
2553 if (ret < 0) {
2554 perror("read the key data");
2555 exit(1);
2556 } else if (ret != sizeof(key)) {
2557 printf("Data must be %lu bytes length, but we read only %d, exit\n",
2558 (unsigned long)sizeof(key),
2559 ret);
2560 exit(1);
2561 }
2562 }
2563
2564 /* Execute RPMB op */
2565 ret = do_rpmb_op(dev_fd, &frame_in, frame_out_p, blocks_cnt);
2566 if (ret != 0) {
2567 perror("RPMB ioctl failed");
2568 exit(1);
2569 }
2570
2571 /* Check RPMB response */
2572 if (frame_out_p[blocks_cnt - 1].result != 0) {
2573 printf("RPMB operation failed, retcode 0x%04x\n",
2574 be16toh(frame_out_p[blocks_cnt - 1].result));
2575 exit(1);
2576 }
2577
2578 /* Do we have to verify data against key? */
2579 if (nargs == 6) {
2580 unsigned char mac[32];
2581 hmac_sha256_ctx ctx;
2582 struct rpmb_frame *frame_out = NULL;
2583
2584 hmac_sha256_init(&ctx, key, sizeof(key));
2585 for (i = 0; i < blocks_cnt; i++) {
2586 frame_out = &frame_out_p[i];
2587 hmac_sha256_update(&ctx, frame_out->data,
2588 sizeof(*frame_out) -
2589 offsetof(struct rpmb_frame, data));
2590 }
2591
2592 hmac_sha256_final(&ctx, mac, sizeof(mac));
2593
2594 /* Impossible */
2595 assert(frame_out);
2596
2597 /* Compare calculated MAC and MAC from last frame */
2598 if (memcmp(mac, frame_out->key_mac, sizeof(mac))) {
2599 printf("RPMB MAC missmatch\n");
2600 exit(1);
2601 }
2602 }
2603
2604 /* Write data */
2605 for (i = 0; i < blocks_cnt; i++) {
2606 struct rpmb_frame *frame_out = &frame_out_p[i];
2607 ret = DO_IO(write, data_fd, frame_out->data, sizeof(frame_out->data));
2608 if (ret < 0) {
2609 perror("write the data");
2610 exit(1);
2611 } else if (ret != sizeof(frame_out->data)) {
2612 printf("Data must be %lu bytes length, but we wrote only %d, exit\n",
2613 (unsigned long)sizeof(frame_out->data),
2614 ret);
2615 exit(1);
2616 }
2617 }
2618
2619 free(frame_out_p);
2620 close(dev_fd);
2621 if (data_fd != STDOUT_FILENO)
2622 close(data_fd);
2623 if (key_fd != -1 && key_fd != STDIN_FILENO)
2624 close(key_fd);
2625
2626 return ret;
2627}
2628
2629int do_rpmb_write_block(int nargs, char **argv)
2630{
2631 int ret, dev_fd, key_fd, data_fd;
2632 unsigned char key[32];
2633 uint16_t addr;
2634 unsigned int cnt;
2635 struct rpmb_frame frame_in = {
2636 .req_resp = htobe16(MMC_RPMB_WRITE),
2637 .block_count = htobe16(1)
2638 }, frame_out;
2639
2640 CHECK(nargs != 5, "Usage: mmc rpmb write-block </path/to/mmcblkXrpmb> <address> </path/to/input_file> </path/to/key>\n",
2641 exit(1));
2642
2643 dev_fd = open(argv[1], O_RDWR);
2644 if (dev_fd < 0) {
2645 perror("device open");
2646 exit(1);
2647 }
2648
2649 ret = rpmb_read_counter(dev_fd, &cnt);
2650 /* Check RPMB response */
2651 if (ret != 0) {
2652 printf("RPMB read counter operation failed, retcode 0x%04x\n", ret);
2653 exit(1);
2654 }
2655 frame_in.write_counter = htobe32(cnt);
2656
2657 /* Get block address */
2658 errno = 0;
2659 addr = strtol(argv[2], NULL, 0);
2660 if (errno) {
2661 perror("incorrect address");
2662 exit(1);
2663 }
2664 frame_in.addr = htobe16(addr);
2665
2666 /* Read 256b data */
2667 if (0 == strcmp(argv[3], "-"))
2668 data_fd = STDIN_FILENO;
2669 else {
2670 data_fd = open(argv[3], O_RDONLY);
2671 if (data_fd < 0) {
2672 perror("can't open input file");
2673 exit(1);
2674 }
2675 }
2676
2677 ret = DO_IO(read, data_fd, frame_in.data, sizeof(frame_in.data));
2678 if (ret < 0) {
2679 perror("read the data");
2680 exit(1);
2681 } else if (ret != sizeof(frame_in.data)) {
2682 printf("Data must be %lu bytes length, but we read only %d, exit\n",
2683 (unsigned long)sizeof(frame_in.data),
2684 ret);
2685 exit(1);
2686 }
2687
2688 /* Read the auth key */
2689 if (0 == strcmp(argv[4], "-"))
2690 key_fd = STDIN_FILENO;
2691 else {
2692 key_fd = open(argv[4], O_RDONLY);
2693 if (key_fd < 0) {
2694 perror("can't open key file");
2695 exit(1);
2696 }
2697 }
2698
2699 ret = DO_IO(read, key_fd, key, sizeof(key));
2700 if (ret < 0) {
2701 perror("read the key");
2702 exit(1);
2703 } else if (ret != sizeof(key)) {
2704 printf("Auth key must be %lu bytes length, but we read only %d, exit\n",
2705 (unsigned long)sizeof(key),
2706 ret);
2707 exit(1);
2708 }
2709
2710 /* Calculate HMAC SHA256 */
2711 hmac_sha256(
2712 key, sizeof(key),
2713 frame_in.data, sizeof(frame_in) - offsetof(struct rpmb_frame, data),
2714 frame_in.key_mac, sizeof(frame_in.key_mac));
2715
2716 /* Execute RPMB op */
2717 ret = do_rpmb_op(dev_fd, &frame_in, &frame_out, 1);
2718 if (ret != 0) {
2719 perror("RPMB ioctl failed");
2720 exit(1);
2721 }
2722
2723 /* Check RPMB response */
2724 if (frame_out.result != 0) {
2725 printf("RPMB operation failed, retcode 0x%04x\n",
2726 be16toh(frame_out.result));
2727 exit(1);
2728 }
2729
2730 close(dev_fd);
2731 if (data_fd != STDIN_FILENO)
2732 close(data_fd);
2733 if (key_fd != STDIN_FILENO)
2734 close(key_fd);
2735
2736 return ret;
2737}
Al Cooper786418c2015-04-29 18:12:35 -04002738
2739int do_cache_ctrl(int value, int nargs, char **argv)
2740{
2741 __u8 ext_csd[512];
2742 int fd, ret;
2743 char *device;
2744
2745 CHECK(nargs != 2, "Usage: mmc cache enable </path/to/mmcblkX>\n",
2746 exit(1));
2747
2748 device = argv[1];
2749
2750 fd = open(device, O_RDWR);
2751 if (fd < 0) {
2752 perror("open");
2753 exit(1);
2754 }
2755
2756 ret = read_extcsd(fd, ext_csd);
2757 if (ret) {
2758 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
2759 exit(1);
2760 }
2761
2762 if (ext_csd[EXT_CSD_REV] < EXT_CSD_REV_V4_5) {
2763 fprintf(stderr,
2764 "The CACHE option is only availabe on devices >= "
2765 "MMC 4.5 %s\n", device);
2766 exit(1);
2767 }
2768
2769 /* If the cache size is zero, this device does not have a cache */
2770 if (!(ext_csd[EXT_CSD_CACHE_SIZE_3] ||
2771 ext_csd[EXT_CSD_CACHE_SIZE_2] ||
2772 ext_csd[EXT_CSD_CACHE_SIZE_1] ||
2773 ext_csd[EXT_CSD_CACHE_SIZE_0])) {
2774 fprintf(stderr,
2775 "The CACHE option is not available on %s\n",
2776 device);
2777 exit(1);
2778 }
2779 ret = write_extcsd_value(fd, EXT_CSD_CACHE_CTRL, value);
2780 if (ret) {
2781 fprintf(stderr,
2782 "Could not write 0x%02x to EXT_CSD[%d] in %s\n",
2783 value, EXT_CSD_CACHE_CTRL, device);
2784 exit(1);
2785 }
2786
2787 return ret;
2788}
2789
2790int do_cache_en(int nargs, char **argv)
2791{
2792 return do_cache_ctrl(1, nargs, argv);
2793}
2794
2795int do_cache_dis(int nargs, char **argv)
2796{
2797 return do_cache_ctrl(0, nargs, argv);
2798}
Avi Shchislowskidc7ab962016-03-08 14:22:41 -05002799
2800int do_ffu(int nargs, char **argv)
2801{
2802#ifndef MMC_IOC_MULTI_CMD
2803 fprintf(stderr, "mmc-utils has been compiled without MMC_IOC_MULTI_CMD"
2804 " support, needed by FFU.\n");
2805 exit(1);
2806#else
2807 int dev_fd, img_fd;
2808 int sect_done = 0, retry = 3, ret = -EINVAL;
2809 unsigned int sect_size;
2810 __u8 ext_csd[EXT_CSD_SIZE];
2811 __u8 *buf;
2812 __u32 arg;
2813 off_t fw_size;
2814 ssize_t chunk_size;
2815 char *device;
2816 struct mmc_ioc_multi_cmd *multi_cmd;
2817
2818 CHECK(nargs != 3, "Usage: ffu <image name> </path/to/mmcblkX> \n",
2819 exit(1));
2820
2821 device = argv[2];
2822 dev_fd = open(device, O_RDWR);
2823 if (dev_fd < 0) {
2824 perror("device open failed");
2825 exit(1);
2826 }
2827 img_fd = open(argv[1], O_RDONLY);
2828 if (img_fd < 0) {
2829 perror("image open failed");
2830 close(dev_fd);
2831 exit(1);
2832 }
2833
2834 buf = malloc(512);
2835 multi_cmd = calloc(1, sizeof(struct mmc_ioc_multi_cmd) +
2836 3 * sizeof(struct mmc_ioc_cmd));
2837 if (!buf || !multi_cmd) {
2838 perror("failed to allocate memory");
2839 goto out;
2840 }
2841
2842 ret = read_extcsd(dev_fd, ext_csd);
2843 if (ret) {
2844 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
2845 goto out;
2846 }
2847
2848 if (ext_csd[EXT_CSD_REV] < EXT_CSD_REV_V5_0) {
2849 fprintf(stderr,
2850 "The FFU feature is only available on devices >= "
2851 "MMC 5.0, not supported in %s\n", device);
2852 goto out;
2853 }
2854
2855 if (!(ext_csd[EXT_CSD_SUPPORTED_MODES] & EXT_CSD_FFU)) {
2856 fprintf(stderr, "FFU is not supported in %s\n", device);
2857 goto out;
2858 }
2859
2860 if (ext_csd[EXT_CSD_FW_CONFIG] & EXT_CSD_UPDATE_DISABLE) {
2861 fprintf(stderr, "Firmware update was disabled in %s\n", device);
2862 goto out;
2863 }
2864
2865 fw_size = lseek(img_fd, 0, SEEK_END);
2866
2867 if (fw_size == 0) {
2868 fprintf(stderr, "Firmware image is empty");
2869 goto out;
2870 }
2871
2872 sect_size = (ext_csd[EXT_CSD_DATA_SECTOR_SIZE] == 0) ? 512 : 4096;
2873 if (fw_size % sect_size) {
2874 fprintf(stderr, "Firmware data size (%jd) is not aligned!\n", (intmax_t)fw_size);
2875 goto out;
2876 }
2877
2878 /* set CMD ARG */
2879 arg = ext_csd[EXT_CSD_FFU_ARG_0] |
2880 ext_csd[EXT_CSD_FFU_ARG_1] << 8 |
2881 ext_csd[EXT_CSD_FFU_ARG_2] << 16 |
2882 ext_csd[EXT_CSD_FFU_ARG_3] << 24;
2883
2884 /* prepare multi_cmd to be sent */
2885 multi_cmd->num_of_cmds = 3;
2886
2887 /* put device into ffu mode */
2888 multi_cmd->cmds[0].opcode = MMC_SWITCH;
2889 multi_cmd->cmds[0].arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
2890 (EXT_CSD_MODE_CONFIG << 16) |
2891 (EXT_CSD_FFU_MODE << 8) |
2892 EXT_CSD_CMD_SET_NORMAL;
2893 multi_cmd->cmds[0].flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
2894 multi_cmd->cmds[0].write_flag = 1;
2895
2896 /* send image chunk */
2897 multi_cmd->cmds[1].opcode = MMC_WRITE_BLOCK;
2898 multi_cmd->cmds[1].blksz = sect_size;
2899 multi_cmd->cmds[1].blocks = 1;
2900 multi_cmd->cmds[1].arg = arg;
2901 multi_cmd->cmds[1].flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
2902 multi_cmd->cmds[1].write_flag = 1;
2903 mmc_ioc_cmd_set_data(multi_cmd->cmds[1], buf);
2904
2905 /* return device into normal mode */
2906 multi_cmd->cmds[2].opcode = MMC_SWITCH;
2907 multi_cmd->cmds[2].arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
2908 (EXT_CSD_MODE_CONFIG << 16) |
2909 (EXT_CSD_NORMAL_MODE << 8) |
2910 EXT_CSD_CMD_SET_NORMAL;
2911 multi_cmd->cmds[2].flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
2912 multi_cmd->cmds[2].write_flag = 1;
2913
2914do_retry:
2915 /* read firmware chunk */
2916 lseek(img_fd, 0, SEEK_SET);
2917 chunk_size = read(img_fd, buf, 512);
2918
2919 while (chunk_size > 0) {
2920 /* send ioctl with multi-cmd */
2921 ret = ioctl(dev_fd, MMC_IOC_MULTI_CMD, multi_cmd);
2922
2923 if (ret) {
2924 perror("Multi-cmd ioctl");
2925 /* In case multi-cmd ioctl failed before exiting from ffu mode */
2926 ioctl(dev_fd, MMC_IOC_CMD, &multi_cmd->cmds[2]);
2927 goto out;
2928 }
2929
2930 ret = read_extcsd(dev_fd, ext_csd);
2931 if (ret) {
2932 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
2933 goto out;
2934 }
2935
2936 /* Test if we need to restart the download */
2937 sect_done = ext_csd[EXT_CSD_NUM_OF_FW_SEC_PROG_0] |
2938 ext_csd[EXT_CSD_NUM_OF_FW_SEC_PROG_1] << 8 |
2939 ext_csd[EXT_CSD_NUM_OF_FW_SEC_PROG_2] << 16 |
2940 ext_csd[EXT_CSD_NUM_OF_FW_SEC_PROG_3] << 24;
2941 /* By spec, host should re-start download from the first sector if sect_done is 0 */
2942 if (sect_done == 0) {
2943 if (retry > 0) {
2944 retry--;
2945 fprintf(stderr, "Programming failed. Retrying... (%d)\n", retry);
2946 goto do_retry;
2947 }
2948 fprintf(stderr, "Programming failed! Aborting...\n");
2949 goto out;
2950 } else {
2951 fprintf(stderr, "Programmed %d/%jd bytes\r", sect_done * sect_size, (intmax_t)fw_size);
2952 }
2953
2954 /* read the next firmware chunk (if any) */
2955 chunk_size = read(img_fd, buf, 512);
2956 }
2957
2958 if ((sect_done * sect_size) == fw_size) {
2959 fprintf(stderr, "Programmed %jd/%jd bytes\n", (intmax_t)fw_size, (intmax_t)fw_size);
2960 fprintf(stderr, "Programming finished with status %d \n", ret);
2961 }
2962 else {
2963 fprintf(stderr, "FW size and number of sectors written mismatch. Status return %d\n", ret);
2964 goto out;
2965 }
2966
2967 /* check mode operation for ffu install*/
2968 if (!ext_csd[EXT_CSD_FFU_FEATURES]) {
2969 fprintf(stderr, "Please reboot to complete firmware installation on %s\n", device);
2970 } else {
2971 fprintf(stderr, "Installing firmware on %s...\n", device);
2972 /* Re-enter ffu mode and install the firmware */
2973 multi_cmd->num_of_cmds = 2;
2974
2975 /* set ext_csd to install mode */
2976 multi_cmd->cmds[1].opcode = MMC_SWITCH;
2977 multi_cmd->cmds[1].blksz = 0;
2978 multi_cmd->cmds[1].blocks = 0;
2979 multi_cmd->cmds[1].arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
2980 (EXT_CSD_MODE_OPERATION_CODES << 16) |
2981 (EXT_CSD_FFU_INSTALL << 8) |
2982 EXT_CSD_CMD_SET_NORMAL;
2983 multi_cmd->cmds[1].flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC;
2984 multi_cmd->cmds[1].write_flag = 1;
2985
2986 /* send ioctl with multi-cmd */
2987 ret = ioctl(dev_fd, MMC_IOC_MULTI_CMD, multi_cmd);
2988
2989 if (ret) {
2990 perror("Multi-cmd ioctl failed setting install mode");
2991 /* In case multi-cmd ioctl failed before exiting from ffu mode */
2992 ioctl(dev_fd, MMC_IOC_CMD, &multi_cmd->cmds[2]);
2993 goto out;
2994 }
2995
2996 ret = read_extcsd(dev_fd, ext_csd);
2997 if (ret) {
2998 fprintf(stderr, "Could not read EXT_CSD from %s\n", device);
2999 goto out;
3000 }
3001
3002 /* return status */
3003 ret = ext_csd[EXT_CSD_FFU_STATUS];
3004 if (ret) {
3005 fprintf(stderr, "%s: error %d during FFU install:\n", device, ret);
3006 goto out;
3007 } else {
3008 fprintf(stderr, "FFU finished successfully\n");
3009 }
3010 }
3011
3012out:
3013 free(buf);
3014 free(multi_cmd);
3015 close(img_fd);
3016 close(dev_fd);
3017 return ret;
3018#endif
3019}