stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 1 | /* |
uwe | b25f1ea | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 3 | * |
uwe | 555dd97 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
| 5 | * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com> |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 6 | * Copyright (C) 2005-2009 coresystems GmbH |
hailfinger | 77c5d93 | 2009-06-15 12:10:57 +0000 | [diff] [blame] | 7 | * Copyright (C) 2006-2009 Carl-Daniel Hailfinger |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 8 | * |
uwe | b25f1ea | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 13 | * |
uwe | b25f1ea | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 18 | * |
uwe | b25f1ea | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
stepan | 5c3f138 | 2007-02-06 19:47:50 +0000 | [diff] [blame] | 22 | */ |
| 23 | |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 24 | #ifndef __FLASH_H__ |
| 25 | #define __FLASH_H__ 1 |
| 26 | |
ollie | 6a60099 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 27 | #include <stdint.h> |
hailfinger | d43a4e3 | 2010-06-03 00:49:50 +0000 | [diff] [blame] | 28 | #include <stddef.h> |
hailfinger | 088dc81 | 2009-12-14 03:32:24 +0000 | [diff] [blame] | 29 | #include "hwaccess.h" |
oxygene | 3ad3b33 | 2010-01-06 22:14:39 +0000 | [diff] [blame] | 30 | #ifdef _WIN32 |
| 31 | #include <windows.h> |
| 32 | #undef min |
| 33 | #undef max |
| 34 | #endif |
hailfinger | e1f062f | 2008-05-22 13:22:45 +0000 | [diff] [blame] | 35 | |
Stefan Reinauer | e64faaf | 2011-05-03 18:03:25 -0700 | [diff] [blame] | 36 | /* Are timers broken? */ |
| 37 | extern int broken_timer; |
| 38 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 39 | struct flashctx; /* forward declare */ |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 40 | #define ERROR_PTR ((void*)-1) |
| 41 | |
hailfinger | ee9ee13 | 2010-10-08 00:37:55 +0000 | [diff] [blame] | 42 | /* Error codes */ |
| 43 | #define TIMEOUT_ERROR -101 |
| 44 | |
Louis Yung-Chieh Lo | 5d95f04 | 2011-09-01 17:33:06 +0800 | [diff] [blame] | 45 | /* for verify_it variable in flashrom.c and cli_mfg.c */ |
| 46 | enum { |
| 47 | VERIFY_OFF = 0, |
| 48 | VERIFY_FULL, |
| 49 | VERIFY_PARTIAL, |
| 50 | }; |
| 51 | |
David Hendricks | 5477739 | 2015-01-11 18:55:14 -0800 | [diff] [blame] | 52 | /* |
| 53 | * This is shared between handle_partial_read() and erase_and_write_flash(). |
| 54 | * If a partial write is to be performed, the read function needs to guess what |
| 55 | * the eraseable block size is in case the region specified is not aligned. Then |
| 56 | * it can ensure any data within the same block but outside the specified region |
| 57 | * is read and later restored. The erase/write function will need to find a |
| 58 | * usable erase function with the same size. |
| 59 | * |
| 60 | * Some chips support multiple opcodes to erase a particular block size, so |
| 61 | * we'll leave that guesswork to erase_and_write_flash(). Any opcode is allowed |
| 62 | * so long as the alignment used during partial read and erase are the same. |
| 63 | */ |
| 64 | extern unsigned int required_erase_size; |
| 65 | |
hailfinger | 8271963 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 66 | typedef unsigned long chipaddr; |
| 67 | |
Souvik Ghosh | 052210a | 2016-07-11 12:29:05 -0700 | [diff] [blame] | 68 | int register_shutdown(int (*function) (struct flashctx *flash, void *data), void *data); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 69 | #define CHIP_RESTORE_CALLBACK int (*func) (struct flashctx *flash, uint8_t status) |
David Hendricks | bf36f09 | 2010-11-02 23:39:29 -0700 | [diff] [blame] | 70 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 71 | int register_chip_restore(CHIP_RESTORE_CALLBACK, struct flashctx *flash, uint8_t status); |
uwe | abe92a5 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 72 | void *programmer_map_flash_region(const char *descr, unsigned long phys_addr, |
| 73 | size_t len); |
| 74 | void programmer_unmap_flash_region(void *virt_addr, size_t len); |
hailfinger | e5829f6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 75 | void programmer_delay(int usecs); |
hailfinger | ba3761a | 2009-03-05 19:24:22 +0000 | [diff] [blame] | 76 | |
uwe | 16f9909 | 2008-03-12 11:54:51 +0000 | [diff] [blame] | 77 | #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) |
| 78 | |
hailfinger | 4016746 | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 79 | enum chipbustype { |
hailfinger | e1e41ea | 2011-07-27 07:13:06 +0000 | [diff] [blame] | 80 | BUS_NONE = 0, |
| 81 | BUS_PARALLEL = 1 << 0, |
| 82 | BUS_LPC = 1 << 1, |
| 83 | BUS_FWH = 1 << 2, |
| 84 | BUS_SPI = 1 << 3, |
hailfinger | fe7cd9e | 2011-11-04 21:35:26 +0000 | [diff] [blame] | 85 | BUS_PROG = 1 << 4, |
hailfinger | e1e41ea | 2011-07-27 07:13:06 +0000 | [diff] [blame] | 86 | BUS_NONSPI = BUS_PARALLEL | BUS_LPC | BUS_FWH, |
hailfinger | 4016746 | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 87 | }; |
| 88 | |
David Hendricks | 80f62d2 | 2010-10-08 11:09:35 -0700 | [diff] [blame] | 89 | /* used to select bus which target chip resides */ |
| 90 | extern enum chipbustype target_bus; |
| 91 | |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 92 | /* |
| 93 | * How many different contiguous runs of erase blocks with one size each do |
| 94 | * we have for a given erase function? |
| 95 | */ |
| 96 | #define NUM_ERASEREGIONS 5 |
| 97 | |
| 98 | /* |
| 99 | * How many different erase functions do we have per chip? |
hailfinger | c33d473 | 2010-07-29 13:09:18 +0000 | [diff] [blame] | 100 | * Atmel AT25FS010 has 6 different functions. |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 101 | */ |
hailfinger | c33d473 | 2010-07-29 13:09:18 +0000 | [diff] [blame] | 102 | #define NUM_ERASEFUNCTIONS 6 |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 103 | |
hailfinger | 80dea31 | 2010-01-09 03:15:50 +0000 | [diff] [blame] | 104 | #define FEATURE_REGISTERMAP (1 << 0) |
| 105 | #define FEATURE_BYTEWRITES (1 << 1) |
snelson | c685534 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 106 | #define FEATURE_LONG_RESET (0 << 4) |
| 107 | #define FEATURE_SHORT_RESET (1 << 4) |
| 108 | #define FEATURE_EITHER_RESET FEATURE_LONG_RESET |
hailfinger | b07dc97 | 2010-10-20 21:13:19 +0000 | [diff] [blame] | 109 | #define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET) |
hailfinger | 80dea31 | 2010-01-09 03:15:50 +0000 | [diff] [blame] | 110 | #define FEATURE_ADDR_FULL (0 << 2) |
| 111 | #define FEATURE_ADDR_MASK (3 << 2) |
snelson | c685534 | 2010-01-28 23:55:12 +0000 | [diff] [blame] | 112 | #define FEATURE_ADDR_2AA (1 << 2) |
| 113 | #define FEATURE_ADDR_AAA (2 << 2) |
mkarcher | 9ded5fe | 2010-04-03 10:27:08 +0000 | [diff] [blame] | 114 | #define FEATURE_ADDR_SHIFTED (1 << 5) |
hailfinger | c33d473 | 2010-07-29 13:09:18 +0000 | [diff] [blame] | 115 | #define FEATURE_WRSR_EWSR (1 << 6) |
| 116 | #define FEATURE_WRSR_WREN (1 << 7) |
| 117 | #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) |
snelson | 63133f9 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 118 | |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 119 | /* Erasing flash produces zeroes rather than ones */ |
| 120 | #define FEATURE_ERASE_TO_ZERO (1 << 8) |
Duncan Laurie | 06ffd52 | 2015-10-26 12:56:08 -0700 | [diff] [blame] | 121 | #define FEATURE_UNBOUND_READ (1 << 10) |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 122 | |
David Hendricks | 8c08421 | 2015-11-17 22:29:36 -0800 | [diff] [blame] | 123 | struct voltage_range { |
| 124 | uint16_t min, max; |
| 125 | }; |
| 126 | |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 127 | struct flashchip { |
uwe | dfcd15f | 2008-03-14 23:55:58 +0000 | [diff] [blame] | 128 | const char *vendor; |
uwe | 6ed6d95 | 2007-12-04 21:49:06 +0000 | [diff] [blame] | 129 | const char *name; |
hailfinger | 4016746 | 2009-05-31 17:57:34 +0000 | [diff] [blame] | 130 | |
| 131 | enum chipbustype bustype; |
| 132 | |
uwe | fa98ca1 | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 133 | /* |
| 134 | * With 32bit manufacture_id and model_id we can cover IDs up to |
hailfinger | 428f201 | 2007-12-31 01:49:00 +0000 | [diff] [blame] | 135 | * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's |
| 136 | * Identification code. |
| 137 | */ |
| 138 | uint32_t manufacture_id; |
| 139 | uint32_t model_id; |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 140 | |
stefanct | 707f13b | 2011-05-19 02:58:17 +0000 | [diff] [blame] | 141 | /* Total chip size in kilobytes */ |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 142 | unsigned int total_size; |
stefanct | 707f13b | 2011-05-19 02:58:17 +0000 | [diff] [blame] | 143 | /* Chip page size in bytes */ |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 144 | unsigned int page_size; |
snelson | 63133f9 | 2010-01-04 17:15:23 +0000 | [diff] [blame] | 145 | int feature_bits; |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 146 | |
uwe | fa98ca1 | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 147 | /* |
| 148 | * Indicate if flashrom has been tested with this flash chip and if |
stuge | 9cd64bd | 2008-05-03 04:34:37 +0000 | [diff] [blame] | 149 | * everything worked correctly. |
| 150 | */ |
| 151 | uint32_t tested; |
| 152 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 153 | int (*probe) (struct flashctx *flash); |
hailfinger | d5b3592 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 154 | |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 155 | /* Delay after "enter/exit ID mode" commands in microseconds. |
| 156 | * NB: negative values have special meanings, see TIMING_* below. |
| 157 | */ |
| 158 | signed int probe_timing; |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 159 | |
| 160 | /* |
hailfinger | c4fac58 | 2009-12-22 13:04:53 +0000 | [diff] [blame] | 161 | * Erase blocks and associated erase function. Any chip erase function |
| 162 | * is stored as chip-sized virtual block together with said function. |
stefanct | 707f13b | 2011-05-19 02:58:17 +0000 | [diff] [blame] | 163 | * The first one that fits will be chosen. There is currently no way to |
| 164 | * influence that behaviour. For testing just comment out the other |
| 165 | * elements or set the function pointer to NULL. |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 166 | */ |
| 167 | struct block_eraser { |
| 168 | struct eraseblock{ |
stefanct | 312d9ff | 2011-06-12 19:47:55 +0000 | [diff] [blame] | 169 | unsigned int size; /* Eraseblock size in bytes */ |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 170 | unsigned int count; /* Number of contiguous blocks with that size */ |
| 171 | } eraseblocks[NUM_ERASEREGIONS]; |
stefanct | 9e6b98a | 2011-05-28 02:37:14 +0000 | [diff] [blame] | 172 | /* a block_erase function should try to erase one block of size |
| 173 | * 'blocklen' at address 'blockaddr' and return 0 on success. */ |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 174 | int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen); |
hailfinger | 7df2136 | 2009-09-05 02:30:58 +0000 | [diff] [blame] | 175 | } block_erasers[NUM_ERASEFUNCTIONS]; |
| 176 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 177 | int (*printlock) (struct flashctx *flash); |
| 178 | int (*unlock) (struct flashctx *flash); |
| 179 | int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); |
| 180 | int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); |
| 181 | uint8_t (*read_status) (const struct flashctx *flash); |
| 182 | int (*write_status) (const struct flashctx *flash, int status); |
David Hendricks | 8c08421 | 2015-11-17 22:29:36 -0800 | [diff] [blame] | 183 | struct voltage_range voltage; |
David Hendricks | f7924d1 | 2010-06-10 21:26:44 -0700 | [diff] [blame] | 184 | struct wp *wp; |
rminnich | 8d3ff91 | 2003-10-25 17:01:29 +0000 | [diff] [blame] | 185 | }; |
| 186 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 187 | /* struct flashctx must always contain struct flashchip at the beginning. */ |
| 188 | struct flashctx { |
| 189 | const char *vendor; |
| 190 | const char *name; |
| 191 | enum chipbustype bustype; |
| 192 | uint32_t manufacture_id; |
| 193 | uint32_t model_id; |
| 194 | int total_size; |
| 195 | int page_size; |
| 196 | int feature_bits; |
| 197 | uint32_t tested; |
| 198 | int (*probe) (struct flashctx *flash); |
| 199 | int probe_timing; |
| 200 | struct block_eraser block_erasers[NUM_ERASEFUNCTIONS]; |
| 201 | int (*printlock) (struct flashctx *flash); |
| 202 | int (*unlock) (struct flashctx *flash); |
| 203 | int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); |
| 204 | int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); |
| 205 | uint8_t (*read_status) (const struct flashctx *flash); |
| 206 | int (*write_status) (const struct flashctx *flash, int status); |
| 207 | struct voltage_range voltage; |
| 208 | struct wp *wp; |
| 209 | /* struct flashchip ends here. */ |
| 210 | chipaddr virtual_memory; |
| 211 | /* Some flash devices have an additional register space. */ |
| 212 | chipaddr virtual_registers; |
Souvik Ghosh | 63b92f9 | 2016-06-29 18:45:52 -0700 | [diff] [blame] | 213 | struct registered_programmer *pgm; |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 214 | }; |
| 215 | |
| 216 | |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 217 | /* This is the byte value we expect to see in erased regions of the flash */ |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 218 | int flash_erase_value(struct flashctx *flash); |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 219 | |
| 220 | /* This is a byte value that indicates that the region is not erased */ |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 221 | int flash_unerased_value(struct flashctx *flash); |
Simon Glass | 4c21413 | 2013-07-16 10:09:28 -0600 | [diff] [blame] | 222 | |
stuge | 9cd64bd | 2008-05-03 04:34:37 +0000 | [diff] [blame] | 223 | #define TEST_UNTESTED 0 |
| 224 | |
uwe | 4e204a2 | 2009-05-28 15:07:42 +0000 | [diff] [blame] | 225 | #define TEST_OK_PROBE (1 << 0) |
| 226 | #define TEST_OK_READ (1 << 1) |
| 227 | #define TEST_OK_ERASE (1 << 2) |
| 228 | #define TEST_OK_WRITE (1 << 3) |
Duncan Laurie | 06ffd52 | 2015-10-26 12:56:08 -0700 | [diff] [blame] | 229 | #define TEST_OK_UREAD (1 << 4) |
uwe | 4e204a2 | 2009-05-28 15:07:42 +0000 | [diff] [blame] | 230 | #define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ) |
| 231 | #define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE) |
David Hendricks | 2674603 | 2015-11-23 19:58:22 -0800 | [diff] [blame] | 232 | #define TEST_OK_PREU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_UREAD) |
| 233 | #define TEST_OK_PRU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_UREAD) |
hailfinger | 80f4868 | 2009-09-23 22:01:33 +0000 | [diff] [blame] | 234 | #define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE) |
uwe | 4e204a2 | 2009-05-28 15:07:42 +0000 | [diff] [blame] | 235 | #define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE) |
Duncan Laurie | 06ffd52 | 2015-10-26 12:56:08 -0700 | [diff] [blame] | 236 | #define TEST_OK_PREWU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE | TEST_OK_UREAD) |
| 237 | #define TEST_OK_MASK 0x1f |
stuge | 9cd64bd | 2008-05-03 04:34:37 +0000 | [diff] [blame] | 238 | |
Duncan Laurie | 06ffd52 | 2015-10-26 12:56:08 -0700 | [diff] [blame] | 239 | #define TEST_BAD_PROBE (1 << 5) |
| 240 | #define TEST_BAD_READ (1 << 6) |
| 241 | #define TEST_BAD_ERASE (1 << 7) |
| 242 | #define TEST_BAD_WRITE (1 << 8) |
| 243 | #define TEST_BAD_UREAD (1 << 9) |
uwe | 4e204a2 | 2009-05-28 15:07:42 +0000 | [diff] [blame] | 244 | #define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE) |
Duncan Laurie | 06ffd52 | 2015-10-26 12:56:08 -0700 | [diff] [blame] | 245 | #define TEST_BAD_PREWU (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE | TEST_BAD_UREAD) |
| 246 | #define TEST_BAD_MASK 0x3e0 |
stuge | 9cd64bd | 2008-05-03 04:34:37 +0000 | [diff] [blame] | 247 | |
hailfinger | d5b3592 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 248 | /* Timing used in probe routines. ZERO is -2 to differentiate between an unset |
| 249 | * field and zero delay. |
Simon Glass | 8dc8273 | 2013-07-16 10:13:51 -0600 | [diff] [blame] | 250 | * |
hailfinger | d5b3592 | 2009-06-03 14:46:22 +0000 | [diff] [blame] | 251 | * SPI devices will always have zero delay and ignore this field. |
| 252 | */ |
| 253 | #define TIMING_FIXME -1 |
| 254 | /* this is intentionally same value as fixme */ |
| 255 | #define TIMING_IGNORED -1 |
| 256 | #define TIMING_ZERO -2 |
| 257 | |
hailfinger | 48ed3e2 | 2011-05-04 00:39:50 +0000 | [diff] [blame] | 258 | extern const struct flashchip flashchips[]; |
Ramya Vijaykumar | e6a7ca8 | 2015-05-12 14:27:29 +0530 | [diff] [blame] | 259 | extern const struct flashchip flashchips_hwseq[]; |
ollie | 6a60099 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 260 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 261 | void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); |
| 262 | void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); |
| 263 | void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); |
| 264 | void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len); |
| 265 | uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr); |
| 266 | uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr); |
| 267 | uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr); |
| 268 | void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); |
| 269 | |
uwe | 884cc8b | 2009-06-17 12:07:12 +0000 | [diff] [blame] | 270 | /* print.c */ |
| 271 | char *flashbuses_to_text(enum chipbustype bustype); |
hailfinger | a50d60e | 2009-11-17 09:57:34 +0000 | [diff] [blame] | 272 | void print_supported(void); |
hailfinger | a50d60e | 2009-11-17 09:57:34 +0000 | [diff] [blame] | 273 | void print_supported_wiki(void); |
uwe | a3a82c9 | 2009-05-15 17:02:34 +0000 | [diff] [blame] | 274 | |
uwe | 4529d20 | 2007-08-23 13:34:59 +0000 | [diff] [blame] | 275 | /* flashrom.c */ |
hailfinger | b247c7a | 2010-03-08 00:42:32 +0000 | [diff] [blame] | 276 | enum write_granularity { |
| 277 | write_gran_1bit, |
| 278 | write_gran_1byte, |
| 279 | write_gran_256bytes, |
| 280 | }; |
hailfinger | 80422e2 | 2009-12-13 22:28:00 +0000 | [diff] [blame] | 281 | extern enum chipbustype buses_supported; |
Souvik Ghosh | 3c963a4 | 2016-07-19 18:48:15 -0700 | [diff] [blame] | 282 | extern int verbose_screen; |
| 283 | extern int verbose_logfile; |
krause | 2eb7621 | 2011-01-17 07:50:42 +0000 | [diff] [blame] | 284 | extern const char flashrom_version[]; |
hailfinger | 92cd8e3 | 2010-01-07 03:24:05 +0000 | [diff] [blame] | 285 | extern char *chip_to_probe; |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 286 | void map_flash_registers(struct flashctx *flash); |
| 287 | int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); |
| 288 | int erase_flash(struct flashctx *flash); |
Souvik Ghosh | 63b92f9 | 2016-06-29 18:45:52 -0700 | [diff] [blame] | 289 | int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 290 | int read_flash(struct flashctx *flash, uint8_t *buf, |
David Hendricks | e345194 | 2013-03-21 17:23:29 -0700 | [diff] [blame] | 291 | unsigned int start, unsigned int len); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 292 | int read_flash_to_file(struct flashctx *flash, const char *filename); |
hailfinger | 7b41474 | 2009-06-13 12:04:03 +0000 | [diff] [blame] | 293 | int min(int a, int b); |
hailfinger | 7af8369 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 294 | int max(int a, int b); |
hailfinger | f76cc32 | 2010-11-09 22:00:31 +0000 | [diff] [blame] | 295 | void tolower_string(char *str); |
stefanct | 5270028 | 2011-06-26 17:38:17 +0000 | [diff] [blame] | 296 | char *extract_param(char **haystack, const char *needle, const char *delim); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 297 | int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message); |
uwe | 884cc8b | 2009-06-17 12:07:12 +0000 | [diff] [blame] | 298 | char *strcat_realloc(char *dest, const char *src); |
hailfinger | 92cd8e3 | 2010-01-07 03:24:05 +0000 | [diff] [blame] | 299 | void print_version(void); |
Souvik Ghosh | 3c963a4 | 2016-07-19 18:48:15 -0700 | [diff] [blame] | 300 | void print_buildinfo(void); |
hailfinger | 74819ad | 2010-05-15 15:04:37 +0000 | [diff] [blame] | 301 | void print_banner(void); |
hailfinger | f79d171 | 2010-10-06 23:48:34 +0000 | [diff] [blame] | 302 | void list_programmers_linebreak(int startcol, int cols, int paren); |
hailfinger | 92cd8e3 | 2010-01-07 03:24:05 +0000 | [diff] [blame] | 303 | int selfcheck(void); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 304 | int doit(struct flashctx *flash, int force, const char *filename, int read_it, |
Simon Glass | 9ad06c1 | 2013-07-03 22:08:17 +0900 | [diff] [blame] | 305 | int write_it, int erase_it, int verify_it, int extract_it, |
| 306 | const char *diff_file); |
stefanct | 5270028 | 2011-06-26 17:38:17 +0000 | [diff] [blame] | 307 | int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename); |
| 308 | int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename); |
uwe | 884cc8b | 2009-06-17 12:07:12 +0000 | [diff] [blame] | 309 | |
| 310 | #define OK 0 |
| 311 | #define NT 1 /* Not tested */ |
uwe | 4529d20 | 2007-08-23 13:34:59 +0000 | [diff] [blame] | 312 | |
David Hendricks | 1ed1d35 | 2011-11-23 17:54:37 -0800 | [diff] [blame] | 313 | /* what to do in case of an error */ |
| 314 | enum error_action { |
| 315 | error_fail, /* fail immediately */ |
| 316 | error_ignore, /* non-fatal error; continue */ |
| 317 | }; |
| 318 | |
uwe | 97e8e27 | 2011-09-03 17:15:00 +0000 | [diff] [blame] | 319 | /* Something happened that shouldn't happen, but we can go on. */ |
mkarcher | 74d3013 | 2010-07-22 18:04:15 +0000 | [diff] [blame] | 320 | #define ERROR_NONFATAL 0x100 |
| 321 | |
uwe | 97e8e27 | 2011-09-03 17:15:00 +0000 | [diff] [blame] | 322 | /* Something happened that shouldn't happen, we'll abort. */ |
| 323 | #define ERROR_FATAL -0xee |
Souvik Ghosh | 63b92f9 | 2016-06-29 18:45:52 -0700 | [diff] [blame] | 324 | #define ERROR_FLASHROM_BUG -200 |
| 325 | /* We reached one of the hardcoded limits of flashrom. This can be fixed by |
| 326 | * increasing the limit of a compile-time allocation or by switching to dynamic |
| 327 | * allocation. |
| 328 | * Note: If this warning is triggered, check first for runaway registrations. |
| 329 | */ |
| 330 | #define ERROR_FLASHROM_LIMIT -201 |
uwe | 97e8e27 | 2011-09-03 17:15:00 +0000 | [diff] [blame] | 331 | |
David Hendricks | 1ed1d35 | 2011-11-23 17:54:37 -0800 | [diff] [blame] | 332 | /* Operation failed due to access restriction set in programmer or flash chip */ |
| 333 | #define ACCESS_DENIED -7 |
| 334 | extern enum error_action access_denied_action; |
| 335 | |
| 336 | /* convenience function for checking return codes */ |
| 337 | extern int ignore_error(int x); |
| 338 | |
snelson | 9cba3c6 | 2010-01-07 20:09:33 +0000 | [diff] [blame] | 339 | /* cli_output.c */ |
Souvik Ghosh | 3c963a4 | 2016-07-19 18:48:15 -0700 | [diff] [blame] | 340 | #ifndef STANDALONE |
| 341 | int open_logfile(const char * const filename); |
| 342 | int close_logfile(void); |
| 343 | void start_logging(void); |
| 344 | #endif |
hailfinger | 63932d4 | 2010-06-04 23:20:21 +0000 | [diff] [blame] | 345 | /* Let gcc and clang check for correct printf-style format strings. */ |
| 346 | int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3))); |
hailfinger | e7326b2 | 2010-01-09 03:22:31 +0000 | [diff] [blame] | 347 | #define MSG_ERROR 0 |
| 348 | #define MSG_INFO 1 |
| 349 | #define MSG_DEBUG 2 |
stefanct | ee85053 | 2011-08-04 17:40:25 +0000 | [diff] [blame] | 350 | #define MSG_DEBUG2 3 |
| 351 | #define MSG_BARF 4 |
hailfinger | e7326b2 | 2010-01-09 03:22:31 +0000 | [diff] [blame] | 352 | #define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ |
| 353 | #define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ |
| 354 | #define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ |
| 355 | #define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */ |
| 356 | #define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */ |
| 357 | #define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */ |
| 358 | #define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */ |
| 359 | #define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */ |
| 360 | #define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */ |
stefanct | ee85053 | 2011-08-04 17:40:25 +0000 | [diff] [blame] | 361 | #define msg_gdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* general debug2 */ |
| 362 | #define msg_pdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* programmer debug2 */ |
| 363 | #define msg_cdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* chip debug2 */ |
hailfinger | e7326b2 | 2010-01-09 03:22:31 +0000 | [diff] [blame] | 364 | #define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */ |
| 365 | #define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */ |
| 366 | #define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */ |
snelson | 9cba3c6 | 2010-01-07 20:09:33 +0000 | [diff] [blame] | 367 | |
Louis Yung-Chieh Lo | 1f6bbf5 | 2011-04-06 10:24:38 +0800 | [diff] [blame] | 368 | /* cli_mfg.c */ |
| 369 | extern int set_ignore_fmap; |
hailfinger | 92cd8e3 | 2010-01-07 03:24:05 +0000 | [diff] [blame] | 370 | |
uwe | 4529d20 | 2007-08-23 13:34:59 +0000 | [diff] [blame] | 371 | /* layout.c */ |
Louis Yung-Chieh Lo | 5d95f04 | 2011-09-01 17:33:06 +0800 | [diff] [blame] | 372 | int specified_partition(); |
uwe | 4529d20 | 2007-08-23 13:34:59 +0000 | [diff] [blame] | 373 | int read_romlayout(char *name); |
| 374 | int find_romentry(char *name); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 375 | int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); |
| 376 | int add_fmap_entries(struct flashctx *flash); |
Louis Yung-Chieh Lo | bb9049c | 2011-05-10 16:06:28 +0800 | [diff] [blame] | 377 | int get_num_include_args(void); |
David Hendricks | d0ea9ed | 2011-03-04 17:31:57 -0800 | [diff] [blame] | 378 | int register_include_arg(char *name); |
| 379 | int process_include_args(void); |
David Hendricks | df29a83 | 2013-06-28 14:33:51 -0700 | [diff] [blame] | 380 | int num_include_files(void); |
| 381 | int included_regions_overlap(void); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 382 | int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents); |
Louis Yung-Chieh Lo | 9c7525f | 2011-03-04 12:32:02 +0800 | [diff] [blame] | 383 | int handle_partial_read( |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 384 | struct flashctx *flash, |
Louis Yung-Chieh Lo | 9c7525f | 2011-03-04 12:32:02 +0800 | [diff] [blame] | 385 | uint8_t *buf, |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 386 | int (*read) (struct flashctx *flash, uint8_t *buf, |
David Hendricks | bec6e0c | 2011-11-23 16:40:04 -0800 | [diff] [blame] | 387 | unsigned int start, unsigned int len), |
| 388 | int write_to_file); |
Louis Yung-Chieh Lo | 9c7525f | 2011-03-04 12:32:02 +0800 | [diff] [blame] | 389 | /* RETURN: the number of partitions that have beenpartial read. |
| 390 | * ==0 means no partition is specified. |
| 391 | * < 0 means writing file error. */ |
Louis Yung-Chieh Lo | 5d95f04 | 2011-09-01 17:33:06 +0800 | [diff] [blame] | 392 | int handle_partial_verify( |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 393 | struct flashctx *flash, |
Louis Yung-Chieh Lo | 5d95f04 | 2011-09-01 17:33:06 +0800 | [diff] [blame] | 394 | uint8_t *buf, |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 395 | int (*verify) (struct flashctx *flash, uint8_t *buf, unsigned int start, |
David Hendricks | bec6e0c | 2011-11-23 16:40:04 -0800 | [diff] [blame] | 396 | unsigned int len, const char* message)); |
Louis Yung-Chieh Lo | 5d95f04 | 2011-09-01 17:33:06 +0800 | [diff] [blame] | 397 | /* RETURN: ==0 means all identical. |
| 398 | !=0 means buf and flash are different. */ |
uwe | 4529d20 | 2007-08-23 13:34:59 +0000 | [diff] [blame] | 399 | |
stepan | 745615e | 2007-10-15 21:44:47 +0000 | [diff] [blame] | 400 | /* spi.c */ |
hailfinger | 68002c2 | 2009-07-10 21:08:55 +0000 | [diff] [blame] | 401 | struct spi_command { |
| 402 | unsigned int writecnt; |
| 403 | unsigned int readcnt; |
| 404 | const unsigned char *writearr; |
| 405 | unsigned char *readarr; |
| 406 | }; |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 407 | int spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, |
uwe | fa98ca1 | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 408 | const unsigned char *writearr, unsigned char *readarr); |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 409 | int spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds); |
| 410 | uint32_t spi_get_valid_read_addr(struct flashctx *flash); |
uwe | af9b4df | 2008-09-26 13:19:02 +0000 | [diff] [blame] | 411 | |
David Hendricks | 8c08421 | 2015-11-17 22:29:36 -0800 | [diff] [blame] | 412 | #define NUM_VOLTAGE_RANGES 16 |
| 413 | extern struct voltage_range voltage_ranges[]; |
| 414 | /* returns number of unique voltage ranges, or <0 to indicate failure */ |
| 415 | extern int flash_supported_voltage_ranges(enum chipbustype bus); |
| 416 | |
Souvik Ghosh | 63b92f9 | 2016-06-29 18:45:52 -0700 | [diff] [blame] | 417 | enum chipbustype get_buses_supported(void); |
ollie | 5b62157 | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 418 | #endif /* !__FLASH_H__ */ |