Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the libsigrok project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Bert Vermeulen <bert@biot.com> |
| 5 | * |
| 6 | * This program is free software: you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation, either version 3 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
Bert Vermeulen | 22c18b0 | 2014-09-05 03:49:25 +0200 | [diff] [blame] | 20 | #include <string.h> |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 21 | #include "protocol.h" |
| 22 | |
| 23 | #define CH_IDX(x) (1 << x) |
| 24 | |
Bert Vermeulen | 22c18b0 | 2014-09-05 03:49:25 +0200 | [diff] [blame] | 25 | const char *pps_vendors[][2] = { |
| 26 | { "RIGOL TECHNOLOGIES", "Rigol" }, |
Bert Vermeulen | bc4a2a4 | 2014-09-08 12:44:16 +0200 | [diff] [blame] | 27 | { "HEWLETT-PACKARD", "HP" }, |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 28 | }; |
| 29 | |
Bert Vermeulen | 22c18b0 | 2014-09-05 03:49:25 +0200 | [diff] [blame] | 30 | const char *get_vendor(const char *raw_vendor) |
| 31 | { |
| 32 | unsigned int i; |
| 33 | |
| 34 | for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) { |
| 35 | if (!strcasecmp(raw_vendor, pps_vendors[i][0])) |
| 36 | return pps_vendors[i][1]; |
| 37 | } |
| 38 | |
| 39 | return raw_vendor; |
| 40 | } |
| 41 | |
Bert Vermeulen | 584560f | 2014-09-16 17:49:20 +0200 | [diff] [blame] | 42 | static const uint32_t devopts_none[] = { }; |
Bert Vermeulen | bfc8679 | 2014-09-09 13:22:24 +0200 | [diff] [blame] | 43 | |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 44 | /* Rigol DP800 series */ |
Bert Vermeulen | 584560f | 2014-09-16 17:49:20 +0200 | [diff] [blame] | 45 | static const uint32_t rigol_dp800_devopts[] = { |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 46 | SR_CONF_POWER_SUPPLY, |
| 47 | SR_CONF_CONTINUOUS, |
Bert Vermeulen | 5827f61 | 2014-09-17 15:28:29 +0200 | [diff] [blame] | 48 | SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET, |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 49 | }; |
| 50 | |
Bert Vermeulen | 584560f | 2014-09-16 17:49:20 +0200 | [diff] [blame] | 51 | static const uint32_t rigol_dp800_devopts_cg[] = { |
Bert Vermeulen | 5827f61 | 2014-09-17 15:28:29 +0200 | [diff] [blame] | 52 | SR_CONF_OUTPUT_REGULATION | SR_CONF_GET, |
| 53 | SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, |
| 54 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, |
| 55 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, |
| 56 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, |
| 57 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET, |
| 58 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, |
| 59 | SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET, |
Bert Vermeulen | ca95e90 | 2014-10-15 12:03:00 +0200 | [diff] [blame] | 60 | SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
Bert Vermeulen | 5827f61 | 2014-09-17 15:28:29 +0200 | [diff] [blame] | 61 | SR_CONF_OUTPUT_CURRENT | SR_CONF_GET, |
Bert Vermeulen | ca95e90 | 2014-10-15 12:03:00 +0200 | [diff] [blame] | 62 | SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
Bert Vermeulen | 5827f61 | 2014-09-17 15:28:29 +0200 | [diff] [blame] | 63 | SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET, |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 64 | }; |
| 65 | |
Bert Vermeulen | 3222ee1 | 2014-09-05 12:52:57 +0200 | [diff] [blame] | 66 | struct channel_spec rigol_dp831_ch[] = { |
| 67 | { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 } }, |
| 68 | { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 } }, |
| 69 | { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 } }, |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 70 | }; |
| 71 | |
Bert Vermeulen | 3222ee1 | 2014-09-05 12:52:57 +0200 | [diff] [blame] | 72 | struct channel_spec rigol_dp832_ch[] = { |
| 73 | { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 } }, |
| 74 | { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 } }, |
| 75 | { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 } }, |
| 76 | }; |
| 77 | |
| 78 | struct channel_group_spec rigol_dp800_cg[] = { |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 79 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, |
| 80 | { "2", CH_IDX(1), PPS_OVP | PPS_OCP }, |
| 81 | { "3", CH_IDX(2), PPS_OVP | PPS_OCP }, |
| 82 | }; |
| 83 | |
Bert Vermeulen | 3222ee1 | 2014-09-05 12:52:57 +0200 | [diff] [blame] | 84 | struct scpi_command rigol_dp800_cmd[] = { |
Bert Vermeulen | 60475cd | 2014-10-16 13:23:21 +0200 | [diff] [blame^] | 85 | { SCPI_CMD_REMOTE, "SYST:REMOTE" }, |
| 86 | { SCPI_CMD_LOCAL, "SYST:LOCAL" }, |
| 87 | { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" }, |
| 88 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, |
| 89 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, |
| 90 | { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" }, |
| 91 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, |
| 92 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, |
| 93 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, |
| 94 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, |
| 95 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" }, |
| 96 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, |
| 97 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, |
| 98 | { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" }, |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 99 | { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" }, |
Bert Vermeulen | 53a8180 | 2014-10-10 16:00:33 +0200 | [diff] [blame] | 100 | { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" }, |
| 101 | { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" }, |
Bert Vermeulen | 60475cd | 2014-10-16 13:23:21 +0200 | [diff] [blame^] | 102 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" }, |
| 103 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" }, |
| 104 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" }, |
| 105 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" }, |
| 106 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" }, |
| 107 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" }, |
| 108 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" }, |
| 109 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" }, |
| 110 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" }, |
| 111 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" }, |
| 112 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" }, |
| 113 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" }, |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 114 | }; |
| 115 | |
Bert Vermeulen | bfc8679 | 2014-09-09 13:22:24 +0200 | [diff] [blame] | 116 | /* HP 663xx series */ |
Bert Vermeulen | 584560f | 2014-09-16 17:49:20 +0200 | [diff] [blame] | 117 | static const uint32_t hp_6632b_devopts[] = { |
Bert Vermeulen | bc4a2a4 | 2014-09-08 12:44:16 +0200 | [diff] [blame] | 118 | SR_CONF_POWER_SUPPLY, |
| 119 | SR_CONF_CONTINUOUS, |
Bert Vermeulen | 5827f61 | 2014-09-17 15:28:29 +0200 | [diff] [blame] | 120 | SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET, |
| 121 | SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET, |
| 122 | SR_CONF_OUTPUT_CURRENT | SR_CONF_GET, |
Bert Vermeulen | ca95e90 | 2014-10-15 12:03:00 +0200 | [diff] [blame] | 123 | SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
| 124 | SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
Bert Vermeulen | bc4a2a4 | 2014-09-08 12:44:16 +0200 | [diff] [blame] | 125 | }; |
| 126 | |
| 127 | struct channel_spec hp_6632b_ch[] = { |
| 128 | { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 } }, |
| 129 | }; |
| 130 | |
| 131 | struct channel_group_spec hp_6632b_cg[] = { |
| 132 | { "1", CH_IDX(0), 0 }, |
| 133 | }; |
| 134 | |
| 135 | struct scpi_command hp_6632b_cmd[] = { |
| 136 | { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" }, |
Bert Vermeulen | 53a8180 | 2014-10-10 16:00:33 +0200 | [diff] [blame] | 137 | { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" }, |
| 138 | { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" }, |
Bert Vermeulen | bc4a2a4 | 2014-09-08 12:44:16 +0200 | [diff] [blame] | 139 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, |
| 140 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, |
Bert Vermeulen | ca95e90 | 2014-10-15 12:03:00 +0200 | [diff] [blame] | 141 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, |
| 142 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, |
| 143 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, |
| 144 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, |
Bert Vermeulen | bc4a2a4 | 2014-09-08 12:44:16 +0200 | [diff] [blame] | 145 | }; |
| 146 | |
| 147 | |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 148 | SR_PRIV const struct scpi_pps pps_profiles[] = { |
Bert Vermeulen | bc4a2a4 | 2014-09-08 12:44:16 +0200 | [diff] [blame] | 149 | /* HP 6632B */ |
| 150 | { "HP", "6632B", 0, |
| 151 | ARRAY_AND_SIZE(hp_6632b_devopts), |
Bert Vermeulen | bfc8679 | 2014-09-09 13:22:24 +0200 | [diff] [blame] | 152 | ARRAY_AND_SIZE(devopts_none), |
Bert Vermeulen | bc4a2a4 | 2014-09-08 12:44:16 +0200 | [diff] [blame] | 153 | ARRAY_AND_SIZE(hp_6632b_ch), |
| 154 | ARRAY_AND_SIZE(hp_6632b_cg), |
| 155 | ARRAY_AND_SIZE(hp_6632b_cmd), |
| 156 | }, |
| 157 | |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 158 | /* Rigol DP800 series */ |
Bert Vermeulen | 3222ee1 | 2014-09-05 12:52:57 +0200 | [diff] [blame] | 159 | { "Rigol", "^DP831A$", PPS_OTP, |
| 160 | ARRAY_AND_SIZE(rigol_dp800_devopts), |
| 161 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), |
| 162 | ARRAY_AND_SIZE(rigol_dp831_ch), |
| 163 | ARRAY_AND_SIZE(rigol_dp800_cg), |
| 164 | ARRAY_AND_SIZE(rigol_dp800_cmd), |
| 165 | }, |
| 166 | { "Rigol", "^(DP832|DP832A)$", PPS_OTP, |
| 167 | ARRAY_AND_SIZE(rigol_dp800_devopts), |
| 168 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), |
| 169 | ARRAY_AND_SIZE(rigol_dp832_ch), |
| 170 | ARRAY_AND_SIZE(rigol_dp800_cg), |
| 171 | ARRAY_AND_SIZE(rigol_dp800_cmd), |
Bert Vermeulen | d4eabea | 2014-09-05 03:23:32 +0200 | [diff] [blame] | 172 | }, |
| 173 | }; |
| 174 | SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles); |
| 175 | |