blob: e975290c433eff805cc34fff42ef22e7a3136150 [file] [log] [blame]
Edward O'Callaghan97dd9262020-03-26 00:00:41 +11001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2020 The Chromium OS Authors
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <stdlib.h>
18#include <stdint.h>
19#include <stdio.h>
20#include <string.h>
21#include <time.h>
22#include <errno.h>
23
24#include "programmer.h"
25#include "spi.h"
26#include "i2c_helper.h"
27
28
29#define MCU_I2C_SLAVE_ADDR 0x94
30#define REGISTER_ADDRESS (0x94 >> 1)
31#define PAGE_SIZE 256
32#define MAX_SPI_WAIT_RETRIES 1000
33
Edward O'Callaghan33653fd2020-05-04 13:01:54 +100034#define MCU_MODE 0x6F
35#define ENTER_ISP_MODE 0x80
Edward O'Callaghan387632a2020-05-06 16:16:47 +100036#define START_WRITE_XFER 0xA0
37#define WRITE_XFER_STATUS_MASK 0x20
Edward O'Callaghan33653fd2020-05-04 13:01:54 +100038
39#define MCU_DATA_PORT 0x70
40
41#define MAP_PAGE_BYTE2 0x64
42#define MAP_PAGE_BYTE1 0x65
43#define MAP_PAGE_BYTE0 0x66
44
Edward O'Callaghan97dd9262020-03-26 00:00:41 +110045//opcodes
46#define OPCODE_READ 3
47#define OPCODE_WRITE 2
48
49
50struct realtek_mst_i2c_spi_data {
51 int fd;
Edward O'Callaghane14374b2020-09-24 15:50:21 +100052 int reset;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +110053};
54
55static int realtek_mst_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t len)
56{
57 i2c_buffer_t data;
58 if (i2c_buffer_t_fill(&data, buf, len))
59 return SPI_GENERIC_ERROR;
60
61 return i2c_write(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
62}
63
64static int realtek_mst_i2c_spi_read_data(int fd, uint16_t addr, void *buf, uint16_t len)
65{
66 i2c_buffer_t data;
67 if (i2c_buffer_t_fill(&data, buf, len))
68 return SPI_GENERIC_ERROR;
69
70 return i2c_read(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
71}
72
73static int get_fd_from_context(const struct flashctx *flash)
74{
75 if (!flash || !flash->mst || !flash->mst->spi.data) {
76 msg_perr("Unable to extract fd from flash context.\n");
77 return SPI_GENERIC_ERROR;
78 }
79 const struct realtek_mst_i2c_spi_data *data =
80 (const struct realtek_mst_i2c_spi_data *)flash->mst->spi.data;
81
82 return data->fd;
83}
84
85static int realtek_mst_i2c_spi_write_register(int fd, uint8_t reg, uint8_t value)
86{
87 uint8_t command[] = { reg, value };
88 return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 2);
89}
90
91static int realtek_mst_i2c_spi_read_register(int fd, uint8_t reg, uint8_t *value)
92{
93 uint8_t command[] = { reg };
94 int ret = realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 1);
95 ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS, value, 1);
96
97 return ret ? SPI_GENERIC_ERROR : 0;
98}
99
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000100static int realtek_mst_i2c_spi_wait_command_done(int fd, unsigned int offset, int mask,
101 int target, int multiplier)
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100102{
103 uint8_t val;
104 int tried = 0;
105 int ret = 0;
106 do {
107 ret |= realtek_mst_i2c_spi_read_register(fd, offset, &val);
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000108 } while (!ret && ((val & mask) != target) && ++tried < (MAX_SPI_WAIT_RETRIES*multiplier));
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100109
110 if (tried == MAX_SPI_WAIT_RETRIES) {
111 msg_perr("%s: Time out on sending command.\n", __func__);
112 return -MAX_SPI_WAIT_RETRIES;
113 }
114
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000115 return (val & mask) != target ? SPI_GENERIC_ERROR : ret;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100116}
117
118static int realtek_mst_i2c_spi_enter_isp_mode(int fd)
119{
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000120 int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, ENTER_ISP_MODE);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100121
122 // set internal osc divider register to default to speed up MCU
123 // 0x06A0 = 0x74
124 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
125 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x06);
126 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xA0);
127 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x74);
128
129 return ret;
130}
131
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000132static int realtek_mst_i2c_execute_write(int fd)
133{
134 int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, START_WRITE_XFER);
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000135 ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, WRITE_XFER_STATUS_MASK, 0, 1);
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000136 return ret;
137}
138
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100139static int realtek_mst_i2c_spi_reset_mpu(int fd)
140{
141 int ret = 0;
142 // 0xFFEE[1] = 1;
143 uint8_t val = 0;
144 ret |= realtek_mst_i2c_spi_read_register(fd, 0xEE, &val);
145 ret |= realtek_mst_i2c_spi_write_register(fd, 0xEE, (val & 0xFD) | 0x02);
146 return ret;
147}
148
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100149static int realtek_mst_i2c_spi_disable_protection(int fd)
150{
151 int ret = 0;
152 uint8_t val = 0;
153 // 0xAB[2:0] = b001
154
155 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
156 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x10);
157 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xAB);
158
159 ret |= realtek_mst_i2c_spi_read_register(fd, 0xF5, &val);
160
161 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
162 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x10);
163 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xAB);
164
165 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, (val & 0xF8) | 0x01);
166
167 /* Set pin value to high, 0xFFD7[0] = 1. */
168 ret |= realtek_mst_i2c_spi_read_register(fd, 0xD7, &val);
169 ret |= realtek_mst_i2c_spi_write_register(fd, 0xD7, (val & 0xFE) | 0x01);
170
171 return ret;
172}
173
174static int realtek_mst_i2c_spi_send_command(const struct flashctx *flash,
175 unsigned int writecnt, unsigned int readcnt,
176 const unsigned char *writearr,
177 unsigned char *readarr)
178{
179 unsigned i;
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000180 int max_timeout_mul = 1;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100181 int ret = 0;
182
183 if (writecnt > 4 || readcnt > 3 || writecnt == 0) {
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100184 return SPI_GENERIC_ERROR;
185 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100186
187 int fd = get_fd_from_context(flash);
188 if (fd < 0)
189 return SPI_GENERIC_ERROR;
190
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000191 /* First byte of writearr should be the spi opcode value, followed by the value to write. */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100192 writecnt--;
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000193
194 /**
195 * Before dispatching a SPI opcode the MCU register 0x60 requires
196 * the following configuration byte set:
197 *
198 * BIT0 - start [0] , end [1].
199 * BITS[1-4] - counts.
200 * BITS[5-7] - opcode type.
201 *
202 * | bit7 | bit6 | bit5 |
203 * +------+------+------+
204 * | 0 | 1 | 0 | ~ JEDEC_RDID,REMS,READ
205 * | 0 | 1 | 1 | ~ JEDEC_WRSR
206 * | 1 | 0 | 1 | ~ JEDEC_.. erasures.
207 */
208 uint8_t ctrl_reg_val = (writecnt << 3) | (readcnt << 1);
209 switch (writearr[0]) {
210 /* WREN isn't a supported somehow? ignore it. */
211 case JEDEC_WREN: return 0;
212 /* WRSR requires BIT6 && BIT5 set. */
213 case JEDEC_WRSR:
214 ctrl_reg_val |= (1 << 5);
215 ctrl_reg_val |= (2 << 5);
216 break;
217 /* Erasures require BIT7 && BIT5 set. */
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000218 case JEDEC_CE_C7:
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000219 max_timeout_mul *= 20; /* chip erasures take much longer! */
220 /* FALLTHRU */
221 case JEDEC_CE_60:
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000222 case JEDEC_BE_52:
223 case JEDEC_BE_D8:
224 case JEDEC_BE_D7:
225 case JEDEC_SE:
226 ctrl_reg_val |= (1 << 5);
227 ctrl_reg_val |= (4 << 5);
228 break;
229 default:
230 /* Otherwise things like RDID,REMS,READ require BIT6 */
231 ctrl_reg_val |= (2 << 5);
232 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100233 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val);
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000234 ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, writearr[0]); /* opcode */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100235
236 for (i = 0; i < writecnt; ++i)
237 ret |= realtek_mst_i2c_spi_write_register(fd, 0x64 + i, writearr[i + 1]);
238 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val | 0x1);
239 if (ret)
240 return ret;
241
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000242 ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01, 0, max_timeout_mul);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100243 if (ret)
244 return ret;
245
246 for (i = 0; i < readcnt; ++i)
247 ret |= realtek_mst_i2c_spi_read_register(fd, 0x67 + i, &readarr[i]);
248
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100249 return ret;
250}
251
252static int realtek_mst_i2c_spi_map_page(int fd, uint8_t block_idx, uint8_t page_idx, uint8_t byte_idx)
253{
254 int ret = 0;
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000255 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE2, block_idx);
256 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE1, page_idx);
257 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE0, byte_idx);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100258
259 return ret ? SPI_GENERIC_ERROR : 0;
260}
261
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000262static int realtek_mst_i2c_spi_write_page(int fd, uint8_t reg, const uint8_t *buf, unsigned int len)
263{
264 /**
265 * Using static buffer with maximum possible size,
266 * extra byte is needed for prefixing the data port register at index 0.
267 */
268 uint8_t wbuf[PAGE_SIZE + 1] = { MCU_DATA_PORT };
269 if (len > PAGE_SIZE)
270 return SPI_GENERIC_ERROR;
271
272 memcpy(&wbuf[1], buf, len);
273
274 return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, wbuf, len + 1);
275}
276
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100277static int realtek_mst_i2c_spi_read(struct flashctx *flash, uint8_t *buf,
278 unsigned int start, unsigned int len)
279{
280 unsigned i;
281 int ret = 0;
282
283 if (start & 0xff)
284 return default_spi_read(flash, buf, start, len);
285
286 int fd = get_fd_from_context(flash);
287 if (fd < 0)
288 return SPI_GENERIC_ERROR;
289
290 start--;
291 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x46); // **
292 ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, OPCODE_READ);
293 uint8_t block_idx = start >> 16;
294 uint8_t page_idx = start >> 8;
295 uint8_t byte_idx = start;
296 ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx);
297 ret |= realtek_mst_i2c_spi_write_register(fd, 0x6a, 0x03);
298 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x47); // **
299 if (ret)
300 return ret;
301
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000302 ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01, 0, 1);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100303 if (ret)
304 return ret;
305
306 /**
307 * The first byte is just a null, probably a status code?
308 * Advance the read by a offset of one byte and continue.
309 */
310 uint8_t dummy;
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000311 realtek_mst_i2c_spi_read_register(fd, MCU_DATA_PORT, &dummy);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100312
313 for (i = 0; i < len; i += PAGE_SIZE) {
314 ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS,
315 buf + i, min(len - i, PAGE_SIZE));
316 if (ret)
317 return ret;
318 }
319
320 return ret;
321}
322
323static int realtek_mst_i2c_spi_write_256(struct flashctx *flash, const uint8_t *buf,
324 unsigned int start, unsigned int len)
325{
326 unsigned i;
327 int ret = 0;
328
329 if (start & 0xff)
330 return default_spi_write_256(flash, buf, start, len);
331
332 int fd = get_fd_from_context(flash);
333 if (fd < 0)
334 return SPI_GENERIC_ERROR;
335
336 ret = realtek_mst_i2c_spi_disable_protection(fd);
337 if (ret)
338 return ret;
339
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000340 ret |= realtek_mst_i2c_spi_write_register(fd, 0x6D, 0x02); /* write opcode */
341 ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, (PAGE_SIZE - 1)); /* fit len=256 */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100342
343 for (i = 0; i < len; i += PAGE_SIZE) {
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000344 uint16_t page_len = min(len - i, PAGE_SIZE);
345 if (len - i < PAGE_SIZE)
346 ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, page_len-1);
347 uint8_t block_idx = (start + i) >> 16;
348 uint8_t page_idx = (start + i) >> 8;
349 ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, 0);
350 if (ret)
351 break;
352
353 /* Wait for empty buffer. */
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000354 ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, 0x10, 0x10, 1);
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000355 if (ret)
356 break;
357
358 ret |= realtek_mst_i2c_spi_write_page(fd, MCU_DATA_PORT,
359 buf + i, page_len);
360 if (ret)
361 break;
362 ret |= realtek_mst_i2c_execute_write(fd);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100363 if (ret)
364 break;
365 }
366
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000367
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100368 /* TODO: re-enable the write protection? */
369
370 return ret;
371}
372
373static int realtek_mst_i2c_spi_write_aai(struct flashctx *flash, const uint8_t *buf,
374 unsigned int start, unsigned int len)
375{
376 msg_perr("%s: AAI write function is not supported.\n", __func__);
377 return SPI_GENERIC_ERROR;
378}
379
380static struct spi_master spi_master_i2c_realtek_mst = {
381 .max_data_read = 16,
382 .max_data_write = 8,
383 .command = realtek_mst_i2c_spi_send_command,
384 .multicommand = default_spi_send_multicommand,
385 .read = realtek_mst_i2c_spi_read,
386 .write_256 = realtek_mst_i2c_spi_write_256,
387 .write_aai = realtek_mst_i2c_spi_write_aai,
388};
389
390static int realtek_mst_i2c_spi_shutdown(void *data)
391{
392 int ret = 0;
393 struct realtek_mst_i2c_spi_data *realtek_mst_data =
394 (struct realtek_mst_i2c_spi_data *)data;
395 int fd = realtek_mst_data->fd;
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000396 if (realtek_mst_data->reset) {
397 ret |= realtek_mst_i2c_spi_reset_mpu(fd);
398 if (ret != 0)
399 msg_perr("%s: MCU failed to reset on tear-down.\n", __func__);
400 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100401 i2c_close(fd);
402 free(data);
403
404 return ret;
405}
406
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000407static int get_params(int *i2c_bus, int *reset)
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100408{
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000409 char *bus_str = NULL, *reset_str = NULL;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100410 int ret = SPI_GENERIC_ERROR;
411
412 bus_str = extract_programmer_param("bus");
413 if (bus_str) {
414 char *bus_suffix;
415 errno = 0;
416 int bus = (int)strtol(bus_str, &bus_suffix, 10);
417 if (errno != 0 || bus_str == bus_suffix) {
418 msg_perr("%s: Could not convert 'bus'.\n", __func__);
419 goto get_params_done;
420 }
421
422 if (bus < 0 || bus > 255) {
423 msg_perr("%s: Value for 'bus' is out of range(0-255).\n", __func__);
424 goto get_params_done;
425 }
426
427 if (strlen(bus_suffix) > 0) {
428 msg_perr("%s: Garbage following 'bus' value.\n", __func__);
429 goto get_params_done;
430 }
431
432 msg_pinfo("Using i2c bus %i.\n", bus);
433 *i2c_bus = bus;
434 ret = 0;
435 goto get_params_done;
436 } else {
437 msg_perr("%s: Bus number not specified.\n", __func__);
438 }
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000439
440 reset_str = extract_programmer_param("reset-mcu");
441 if (reset_str) {
442 if (reset_str[0] == '1')
443 *reset = 1;
444 else if (reset_str[0] == '0')
445 *reset = 0;
446 else {
447 msg_perr("%s: Incorrect param format, reset-mcu=1 or 0.\n", __func__);
448 ret = SPI_GENERIC_ERROR;
449 }
450 } else
451 *reset = 0; /* Default behaviour is no MCU reset on tear-down. */
452 free(reset_str);
453
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100454get_params_done:
455 if (bus_str)
456 free(bus_str);
457
458 return ret;
459}
460
461int realtek_mst_i2c_spi_init(void)
462{
463 int ret = 0;
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000464 int i2c_bus = 0, reset = 0;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100465
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000466 if (get_params(&i2c_bus, &reset))
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100467 return SPI_GENERIC_ERROR;
468
469 int fd = i2c_open(i2c_bus, REGISTER_ADDRESS, 0);
470 if (fd < 0)
471 return fd;
472
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100473 ret |= realtek_mst_i2c_spi_enter_isp_mode(fd);
474 if (ret)
475 return ret;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100476
477 struct realtek_mst_i2c_spi_data *data = calloc(1, sizeof(struct realtek_mst_i2c_spi_data));
478 if (!data) {
479 msg_perr("Unable to allocate space for extra SPI master data.\n");
480 return SPI_GENERIC_ERROR;
481 }
482
483 data->fd = fd;
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000484 data->reset = reset;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100485 ret |= register_shutdown(realtek_mst_i2c_spi_shutdown, data);
486
487 spi_master_i2c_realtek_mst.data = data;
488 ret |= register_spi_master(&spi_master_i2c_realtek_mst);
489
490 return ret;
491}