blob: 8ba7b06a94d574efa45f29edd4e4a5e82d32015b [file] [log] [blame]
rminnich8d3ff912003-10-25 17:01:29 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
rminnich8d3ff912003-10-25 17:01:29 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
6 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
hailfinger428f2012007-12-31 01:49:00 +00007 * Copyright (C) 2007 Carl-Daniel Hailfinger
rminnich8d3ff912003-10-25 17:01:29 +00008 *
uweb25f1ea2007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
rminnich8d3ff912003-10-25 17:01:29 +000013 *
uweb25f1ea2007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
rminnich8d3ff912003-10-25 17:01:29 +000018 *
uweb25f1ea2007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
rminnich8d3ff912003-10-25 17:01:29 +000022 */
23
rminnich8d3ff912003-10-25 17:01:29 +000024#include "flash.h"
rminnich8d3ff912003-10-25 17:01:29 +000025
stepan7abc6322006-11-22 00:29:51 +000026#define MAX_REFLASH_TRIES 0x10
27
hailfinger79cf3672008-05-14 12:03:06 +000028/* Check one byte for odd parity */
29uint8_t oddparity(uint8_t val)
30{
31 val = (val ^ (val >> 4)) & 0xf;
32 val = (val ^ (val >> 2)) & 0x3;
33 return (val ^ (val >> 1)) & 0x1;
34}
35
hailfinger82719632009-05-16 21:22:56 +000036void toggle_ready_jedec(chipaddr dst)
uwedf467892007-08-23 10:20:40 +000037{
38 unsigned int i = 0;
39 uint8_t tmp1, tmp2;
40
hailfinger1ff6e362009-03-06 22:26:00 +000041 tmp1 = chip_readb(dst) & 0x40;
uwedf467892007-08-23 10:20:40 +000042
43 while (i++ < 0xFFFFFFF) {
hailfinger1ff6e362009-03-06 22:26:00 +000044 tmp2 = chip_readb(dst) & 0x40;
uwedf467892007-08-23 10:20:40 +000045 if (tmp1 == tmp2) {
46 break;
47 }
48 tmp1 = tmp2;
49 }
50}
51
hailfinger82719632009-05-16 21:22:56 +000052void data_polling_jedec(chipaddr dst, uint8_t data)
uwedf467892007-08-23 10:20:40 +000053{
54 unsigned int i = 0;
55 uint8_t tmp;
56
57 data &= 0x80;
58
59 while (i++ < 0xFFFFFFF) {
hailfinger1ff6e362009-03-06 22:26:00 +000060 tmp = chip_readb(dst) & 0x80;
uwedf467892007-08-23 10:20:40 +000061 if (tmp == data) {
62 break;
63 }
64 }
65}
66
hailfinger0429b5a2009-11-26 14:50:52 +000067void start_program_jedec(chipaddr bios)
uwedf467892007-08-23 10:20:40 +000068{
hailfinger1ff6e362009-03-06 22:26:00 +000069 chip_writeb(0xAA, bios + 0x5555);
70 chip_writeb(0x55, bios + 0x2AAA);
71 chip_writeb(0xA0, bios + 0x5555);
uwedf467892007-08-23 10:20:40 +000072}
73
ollie5b621572004-03-20 16:46:10 +000074int probe_jedec(struct flashchip *flash)
rminnich8d3ff912003-10-25 17:01:29 +000075{
hailfinger82719632009-05-16 21:22:56 +000076 chipaddr bios = flash->virtual_memory;
ollie6a600992005-11-26 21:55:36 +000077 uint8_t id1, id2;
hailfinger428f2012007-12-31 01:49:00 +000078 uint32_t largeid1, largeid2;
hailfinger027d7d92009-05-11 14:40:31 +000079 uint32_t flashcontent1, flashcontent2;
hailfingerd5b35922009-06-03 14:46:22 +000080 int probe_timing_enter, probe_timing_exit;
81
82 if (flash->probe_timing > 0)
83 probe_timing_enter = probe_timing_exit = flash->probe_timing;
84 else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */
85 probe_timing_enter = probe_timing_exit = 0;
86 } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */
87 printf_debug("Chip lacks correct probe timing information, "
hailfinger0cb68252009-07-23 01:33:43 +000088 "using default 10mS/40uS. ");
hailfingerd5b35922009-06-03 14:46:22 +000089 probe_timing_enter = 10000;
90 probe_timing_exit = 40;
91 } else {
92 printf("Chip has negative value in probe_timing, failing "
93 "without chip access\n");
94 return 0;
95 }
rminnich8d3ff912003-10-25 17:01:29 +000096
ollie5b621572004-03-20 16:46:10 +000097 /* Issue JEDEC Product ID Entry command */
hailfinger1ff6e362009-03-06 22:26:00 +000098 chip_writeb(0xAA, bios + 0x5555);
hailfingerc7568d52009-12-17 04:22:40 +000099 if (probe_timing_enter)
100 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000101 chip_writeb(0x55, bios + 0x2AAA);
hailfingerc7568d52009-12-17 04:22:40 +0000102 if (probe_timing_enter)
103 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000104 chip_writeb(0x90, bios + 0x5555);
hailfingerc7568d52009-12-17 04:22:40 +0000105 if (probe_timing_enter)
106 programmer_delay(probe_timing_enter);
rminnich8d3ff912003-10-25 17:01:29 +0000107
ollie5b621572004-03-20 16:46:10 +0000108 /* Read product ID */
hailfinger1ff6e362009-03-06 22:26:00 +0000109 id1 = chip_readb(bios);
110 id2 = chip_readb(bios + 0x01);
hailfinger428f2012007-12-31 01:49:00 +0000111 largeid1 = id1;
112 largeid2 = id2;
113
114 /* Check if it is a continuation ID, this should be a while loop. */
115 if (id1 == 0x7F) {
116 largeid1 <<= 8;
hailfinger1ff6e362009-03-06 22:26:00 +0000117 id1 = chip_readb(bios + 0x100);
hailfinger428f2012007-12-31 01:49:00 +0000118 largeid1 |= id1;
119 }
120 if (id2 == 0x7F) {
121 largeid2 <<= 8;
hailfinger1ff6e362009-03-06 22:26:00 +0000122 id2 = chip_readb(bios + 0x101);
hailfinger428f2012007-12-31 01:49:00 +0000123 largeid2 |= id2;
124 }
rminnich8d3ff912003-10-25 17:01:29 +0000125
ollie5b621572004-03-20 16:46:10 +0000126 /* Issue JEDEC Product ID Exit command */
hailfinger1ff6e362009-03-06 22:26:00 +0000127 chip_writeb(0xAA, bios + 0x5555);
hailfingerc7568d52009-12-17 04:22:40 +0000128 if (probe_timing_exit)
129 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000130 chip_writeb(0x55, bios + 0x2AAA);
hailfingerc7568d52009-12-17 04:22:40 +0000131 if (probe_timing_exit)
132 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000133 chip_writeb(0xF0, bios + 0x5555);
hailfingerc7568d52009-12-17 04:22:40 +0000134 if (probe_timing_exit)
135 programmer_delay(probe_timing_exit);
rminnich8d3ff912003-10-25 17:01:29 +0000136
uwe2a414342009-09-02 22:09:00 +0000137 printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2);
hailfinger79cf3672008-05-14 12:03:06 +0000138 if (!oddparity(id1))
139 printf_debug(", id1 parity violation");
hailfinger027d7d92009-05-11 14:40:31 +0000140
141 /* Read the product ID location again. We should now see normal flash contents. */
142 flashcontent1 = chip_readb(bios);
143 flashcontent2 = chip_readb(bios + 0x01);
144
145 /* Check if it is a continuation ID, this should be a while loop. */
146 if (flashcontent1 == 0x7F) {
147 flashcontent1 <<= 8;
148 flashcontent1 |= chip_readb(bios + 0x100);
149 }
150 if (flashcontent2 == 0x7F) {
151 flashcontent2 <<= 8;
152 flashcontent2 |= chip_readb(bios + 0x101);
153 }
154
155 if (largeid1 == flashcontent1)
156 printf_debug(", id1 is normal flash content");
157 if (largeid2 == flashcontent2)
158 printf_debug(", id2 is normal flash content");
159
hailfinger79cf3672008-05-14 12:03:06 +0000160 printf_debug("\n");
hailfinger428f2012007-12-31 01:49:00 +0000161 if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id)
ollie5b621572004-03-20 16:46:10 +0000162 return 1;
rminnich8d3ff912003-10-25 17:01:29 +0000163
ollie5b621572004-03-20 16:46:10 +0000164 return 0;
olliea3def632004-03-19 22:10:07 +0000165}
166
hailfinger80f48682009-09-23 22:01:33 +0000167int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize)
olliea3def632004-03-19 22:10:07 +0000168{
hailfinger7af83692009-06-15 17:23:36 +0000169 chipaddr bios = flash->virtual_memory;
170
ollie5b621572004-03-20 16:46:10 +0000171 /* Issue the Sector Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000172 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000173 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000174 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000175 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000176 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000177 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000178
hailfinger1ff6e362009-03-06 22:26:00 +0000179 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000180 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000181 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000182 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000183 chip_writeb(0x30, bios + page);
hailfingere5829f62009-06-05 17:48:08 +0000184 programmer_delay(10);
ollie5b621572004-03-20 16:46:10 +0000185
olliea3def632004-03-19 22:10:07 +0000186 /* wait for Toggle bit ready */
187 toggle_ready_jedec(bios);
188
hailfinger7af83692009-06-15 17:23:36 +0000189 if (check_erased_range(flash, page, pagesize)) {
190 fprintf(stderr,"ERASE FAILED!\n");
191 return -1;
192 }
uwebe4477b2007-08-23 16:08:21 +0000193 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000194}
olliea4302802004-12-07 03:15:51 +0000195
hailfinger80f48682009-09-23 22:01:33 +0000196int erase_block_jedec(struct flashchip *flash, unsigned int block, unsigned int blocksize)
rminnichdfcbaa72004-09-30 16:37:01 +0000197{
hailfinger7af83692009-06-15 17:23:36 +0000198 chipaddr bios = flash->virtual_memory;
199
rminnichdfcbaa72004-09-30 16:37:01 +0000200 /* Issue the Sector Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000201 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000202 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000203 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000204 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000205 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000206 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000207
hailfinger1ff6e362009-03-06 22:26:00 +0000208 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000209 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000210 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000211 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000212 chip_writeb(0x50, bios + block);
hailfingere5829f62009-06-05 17:48:08 +0000213 programmer_delay(10);
rminnichdfcbaa72004-09-30 16:37:01 +0000214
215 /* wait for Toggle bit ready */
216 toggle_ready_jedec(bios);
217
hailfinger7af83692009-06-15 17:23:36 +0000218 if (check_erased_range(flash, block, blocksize)) {
219 fprintf(stderr,"ERASE FAILED!\n");
220 return -1;
221 }
uwebe4477b2007-08-23 16:08:21 +0000222 return 0;
rminnichdfcbaa72004-09-30 16:37:01 +0000223}
rminnich8d3ff912003-10-25 17:01:29 +0000224
ollie5b621572004-03-20 16:46:10 +0000225int erase_chip_jedec(struct flashchip *flash)
rminnich8d3ff912003-10-25 17:01:29 +0000226{
hailfinger7af83692009-06-15 17:23:36 +0000227 int total_size = flash->total_size * 1024;
hailfinger82719632009-05-16 21:22:56 +0000228 chipaddr bios = flash->virtual_memory;
rminnich8d3ff912003-10-25 17:01:29 +0000229
ollie5b621572004-03-20 16:46:10 +0000230 /* Issue the JEDEC Chip Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000231 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000232 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000233 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000234 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000235 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000236 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000237
hailfinger1ff6e362009-03-06 22:26:00 +0000238 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000239 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000240 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000241 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000242 chip_writeb(0x10, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000243 programmer_delay(10);
olliea3def632004-03-19 22:10:07 +0000244
rminnich8d3ff912003-10-25 17:01:29 +0000245 toggle_ready_jedec(bios);
246
hailfinger7af83692009-06-15 17:23:36 +0000247 if (check_erased_range(flash, 0, total_size)) {
248 fprintf(stderr,"ERASE FAILED!\n");
249 return -1;
250 }
uwebe4477b2007-08-23 16:08:21 +0000251 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000252}
253
hailfingerc2cfc592009-06-25 13:57:31 +0000254int write_page_write_jedec(struct flashchip *flash, uint8_t *src,
255 int start, int page_size)
rminnich8d3ff912003-10-25 17:01:29 +0000256{
hailfingerf2ac27e2009-11-25 16:41:50 +0000257 int i, tried = 0, failed;
stepan7abc6322006-11-22 00:29:51 +0000258 uint8_t *s = src;
hailfingerc2cfc592009-06-25 13:57:31 +0000259 chipaddr bios = flash->virtual_memory;
260 chipaddr dst = bios + start;
261 chipaddr d = dst;
rminnich8d3ff912003-10-25 17:01:29 +0000262
stepan7abc6322006-11-22 00:29:51 +0000263retry:
ollie5b621572004-03-20 16:46:10 +0000264 /* Issue JEDEC Data Unprotect comand */
hailfinger0429b5a2009-11-26 14:50:52 +0000265 start_program_jedec(bios);
ollie5b621572004-03-20 16:46:10 +0000266
olliea4302802004-12-07 03:15:51 +0000267 /* transfer data from source to destination */
hailfingerfe072472009-11-14 03:48:33 +0000268 for (i = 0; i < page_size; i++) {
olliea4302802004-12-07 03:15:51 +0000269 /* If the data is 0xFF, don't program it */
uwef6641642007-05-09 10:17:44 +0000270 if (*src != 0xFF)
hailfinger1ff6e362009-03-06 22:26:00 +0000271 chip_writeb(*src, dst);
stepan7abc6322006-11-22 00:29:51 +0000272 dst++;
273 src++;
ollie5b621572004-03-20 16:46:10 +0000274 }
275
ollie5b621572004-03-20 16:46:10 +0000276 toggle_ready_jedec(dst - 1);
olliea4302802004-12-07 03:15:51 +0000277
stepan7abc6322006-11-22 00:29:51 +0000278 dst = d;
279 src = s;
hailfingerf2ac27e2009-11-25 16:41:50 +0000280 failed = verify_range(flash, src, start, page_size, NULL);
uwef6641642007-05-09 10:17:44 +0000281
hailfingerf2ac27e2009-11-25 16:41:50 +0000282 if (failed && tried++ < MAX_REFLASH_TRIES) {
hailfingerfe072472009-11-14 03:48:33 +0000283 fprintf(stderr, "retrying.\n");
uwef6641642007-05-09 10:17:44 +0000284 goto retry;
285 }
hailfingerf2ac27e2009-11-25 16:41:50 +0000286 if (failed) {
hailfinger82719632009-05-16 21:22:56 +0000287 fprintf(stderr, " page 0x%lx failed!\n",
288 (d - bios) / page_size);
stepan7abc6322006-11-22 00:29:51 +0000289 }
hailfingerf2ac27e2009-11-25 16:41:50 +0000290 return failed;
ollie5b621572004-03-20 16:46:10 +0000291}
292
hailfinger82719632009-05-16 21:22:56 +0000293int write_byte_program_jedec(chipaddr bios, uint8_t *src,
294 chipaddr dst)
olliebb5917a2004-03-22 22:19:17 +0000295{
hailfingerf2ac27e2009-11-25 16:41:50 +0000296 int tried = 0, failed = 0;
olliedd68ded2004-12-08 02:10:33 +0000297
hailfingerf2ac27e2009-11-25 16:41:50 +0000298 /* If the data is 0xFF, don't program it and don't complain. */
olliebb5917a2004-03-22 22:19:17 +0000299 if (*src == 0xFF) {
hailfingerf2ac27e2009-11-25 16:41:50 +0000300 return 0;
olliebb5917a2004-03-22 22:19:17 +0000301 }
olliea4302802004-12-07 03:15:51 +0000302
olliedd68ded2004-12-08 02:10:33 +0000303retry:
olliebb5917a2004-03-22 22:19:17 +0000304 /* Issue JEDEC Byte Program command */
hailfinger0429b5a2009-11-26 14:50:52 +0000305 start_program_jedec(bios);
olliea4302802004-12-07 03:15:51 +0000306
307 /* transfer data from source to destination */
hailfinger1ff6e362009-03-06 22:26:00 +0000308 chip_writeb(*src, dst);
olliebb5917a2004-03-22 22:19:17 +0000309 toggle_ready_jedec(bios);
ollief1845bd2004-03-27 00:18:15 +0000310
hailfinger1ff6e362009-03-06 22:26:00 +0000311 if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) {
uwef6641642007-05-09 10:17:44 +0000312 goto retry;
313 }
olliedd68ded2004-12-08 02:10:33 +0000314
stepan7abc6322006-11-22 00:29:51 +0000315 if (tried >= MAX_REFLASH_TRIES)
hailfingerf2ac27e2009-11-25 16:41:50 +0000316 failed = 1;
stepan7abc6322006-11-22 00:29:51 +0000317
hailfingerf2ac27e2009-11-25 16:41:50 +0000318 return failed;
olliebb5917a2004-03-22 22:19:17 +0000319}
320
hailfinger82719632009-05-16 21:22:56 +0000321int write_sector_jedec(chipaddr bios, uint8_t *src,
322 chipaddr dst, unsigned int page_size)
ollie5b621572004-03-20 16:46:10 +0000323{
hailfingerf2ac27e2009-11-25 16:41:50 +0000324 int i, failed = 0;
325 chipaddr olddst;
ollie5b621572004-03-20 16:46:10 +0000326
hailfingerf2ac27e2009-11-25 16:41:50 +0000327 olddst = dst;
ollie5b621572004-03-20 16:46:10 +0000328 for (i = 0; i < page_size; i++) {
hailfingerf2ac27e2009-11-25 16:41:50 +0000329 if (write_byte_program_jedec(bios, src, dst))
330 failed = 1;
ollief1845bd2004-03-27 00:18:15 +0000331 dst++, src++;
ollie5b621572004-03-20 16:46:10 +0000332 }
hailfingerf2ac27e2009-11-25 16:41:50 +0000333 if (failed)
334 fprintf(stderr, " writing sector at 0x%lx failed!\n", olddst);
ollie5b621572004-03-20 16:46:10 +0000335
hailfingerf2ac27e2009-11-25 16:41:50 +0000336 return failed;
ollie5b621572004-03-20 16:46:10 +0000337}
338
ollie6a600992005-11-26 21:55:36 +0000339int write_jedec(struct flashchip *flash, uint8_t *buf)
ollie5b621572004-03-20 16:46:10 +0000340{
hailfingerf2ac27e2009-11-25 16:41:50 +0000341 int i, failed = 0;
olliebb5917a2004-03-22 22:19:17 +0000342 int total_size = flash->total_size * 1024;
343 int page_size = flash->page_size;
ollie5b621572004-03-20 16:46:10 +0000344
hailfinger7af83692009-06-15 17:23:36 +0000345 if (erase_chip_jedec(flash)) {
346 fprintf(stderr,"ERASE FAILED!\n");
347 return -1;
uwef6641642007-05-09 10:17:44 +0000348 }
hailfinger7af83692009-06-15 17:23:36 +0000349
uwefd2d0fe2007-10-17 23:55:15 +0000350 printf("Programming page: ");
ollie5b621572004-03-20 16:46:10 +0000351 for (i = 0; i < total_size / page_size; i++) {
352 printf("%04d at address: 0x%08x", i, i * page_size);
hailfingerf2ac27e2009-11-25 16:41:50 +0000353 if (write_page_write_jedec(flash, buf + i * page_size,
354 i * page_size, page_size))
355 failed = 1;
olliebb5917a2004-03-22 22:19:17 +0000356 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
rminnich8d3ff912003-10-25 17:01:29 +0000357 }
358 printf("\n");
rminnich8d3ff912003-10-25 17:01:29 +0000359
hailfingerf2ac27e2009-11-25 16:41:50 +0000360 return failed;
rminnich8d3ff912003-10-25 17:01:29 +0000361}
hailfingerfff99532009-11-27 17:49:42 +0000362
363int write_jedec_1(struct flashchip *flash, uint8_t * buf)
364{
365 int i;
366 chipaddr bios = flash->virtual_memory;
367 chipaddr dst = bios;
368
369 programmer_delay(10);
370 if (erase_flash(flash)) {
371 fprintf(stderr, "ERASE FAILED!\n");
372 return -1;
373 }
374
375 printf("Programming page: ");
376 for (i = 0; i < flash->total_size; i++) {
377 if ((i & 0x3) == 0)
378 printf("address: 0x%08lx", (unsigned long)i * 1024);
379
380 write_sector_jedec(bios, buf + i * 1024, dst + i * 1024, 1024);
381
382 if ((i & 0x3) == 0)
383 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
384 }
385
386 printf("\n");
387 return 0;
388}