blob: 83a0b83807cb0d8682db2623fcf3c6465f976431 [file] [log] [blame]
rminnich8d3ff912003-10-25 17:01:29 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
rminnich8d3ff912003-10-25 17:01:29 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
6 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
hailfinger428f2012007-12-31 01:49:00 +00007 * Copyright (C) 2007 Carl-Daniel Hailfinger
rminnich8d3ff912003-10-25 17:01:29 +00008 *
uweb25f1ea2007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
rminnich8d3ff912003-10-25 17:01:29 +000013 *
uweb25f1ea2007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
rminnich8d3ff912003-10-25 17:01:29 +000018 *
uweb25f1ea2007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
rminnich8d3ff912003-10-25 17:01:29 +000022 */
23
rminnich8d3ff912003-10-25 17:01:29 +000024#include "flash.h"
rminnich8d3ff912003-10-25 17:01:29 +000025
stepan7abc6322006-11-22 00:29:51 +000026#define MAX_REFLASH_TRIES 0x10
27
hailfinger79cf3672008-05-14 12:03:06 +000028/* Check one byte for odd parity */
29uint8_t oddparity(uint8_t val)
30{
31 val = (val ^ (val >> 4)) & 0xf;
32 val = (val ^ (val >> 2)) & 0x3;
33 return (val ^ (val >> 1)) & 0x1;
34}
35
hailfinger82719632009-05-16 21:22:56 +000036void toggle_ready_jedec(chipaddr dst)
uwedf467892007-08-23 10:20:40 +000037{
38 unsigned int i = 0;
39 uint8_t tmp1, tmp2;
40
hailfinger1ff6e362009-03-06 22:26:00 +000041 tmp1 = chip_readb(dst) & 0x40;
uwedf467892007-08-23 10:20:40 +000042
43 while (i++ < 0xFFFFFFF) {
hailfinger1ff6e362009-03-06 22:26:00 +000044 tmp2 = chip_readb(dst) & 0x40;
uwedf467892007-08-23 10:20:40 +000045 if (tmp1 == tmp2) {
46 break;
47 }
48 tmp1 = tmp2;
49 }
50}
51
hailfinger82719632009-05-16 21:22:56 +000052void data_polling_jedec(chipaddr dst, uint8_t data)
uwedf467892007-08-23 10:20:40 +000053{
54 unsigned int i = 0;
55 uint8_t tmp;
56
57 data &= 0x80;
58
59 while (i++ < 0xFFFFFFF) {
hailfinger1ff6e362009-03-06 22:26:00 +000060 tmp = chip_readb(dst) & 0x80;
uwedf467892007-08-23 10:20:40 +000061 if (tmp == data) {
62 break;
63 }
64 }
65}
66
hailfinger0429b5a2009-11-26 14:50:52 +000067void start_program_jedec(chipaddr bios)
uwedf467892007-08-23 10:20:40 +000068{
hailfinger1ff6e362009-03-06 22:26:00 +000069 chip_writeb(0xAA, bios + 0x5555);
70 chip_writeb(0x55, bios + 0x2AAA);
71 chip_writeb(0xA0, bios + 0x5555);
uwedf467892007-08-23 10:20:40 +000072}
73
ollie5b621572004-03-20 16:46:10 +000074int probe_jedec(struct flashchip *flash)
rminnich8d3ff912003-10-25 17:01:29 +000075{
hailfinger82719632009-05-16 21:22:56 +000076 chipaddr bios = flash->virtual_memory;
ollie6a600992005-11-26 21:55:36 +000077 uint8_t id1, id2;
hailfinger428f2012007-12-31 01:49:00 +000078 uint32_t largeid1, largeid2;
hailfinger027d7d92009-05-11 14:40:31 +000079 uint32_t flashcontent1, flashcontent2;
hailfingerd5b35922009-06-03 14:46:22 +000080 int probe_timing_enter, probe_timing_exit;
81
82 if (flash->probe_timing > 0)
83 probe_timing_enter = probe_timing_exit = flash->probe_timing;
84 else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */
85 probe_timing_enter = probe_timing_exit = 0;
86 } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */
87 printf_debug("Chip lacks correct probe timing information, "
hailfinger0cb68252009-07-23 01:33:43 +000088 "using default 10mS/40uS. ");
hailfingerd5b35922009-06-03 14:46:22 +000089 probe_timing_enter = 10000;
90 probe_timing_exit = 40;
91 } else {
92 printf("Chip has negative value in probe_timing, failing "
93 "without chip access\n");
94 return 0;
95 }
rminnich8d3ff912003-10-25 17:01:29 +000096
ollie5b621572004-03-20 16:46:10 +000097 /* Issue JEDEC Product ID Entry command */
hailfinger1ff6e362009-03-06 22:26:00 +000098 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +000099 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000100 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000101 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000102 chip_writeb(0x90, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000103 programmer_delay(probe_timing_enter);
rminnich8d3ff912003-10-25 17:01:29 +0000104
ollie5b621572004-03-20 16:46:10 +0000105 /* Read product ID */
hailfinger1ff6e362009-03-06 22:26:00 +0000106 id1 = chip_readb(bios);
107 id2 = chip_readb(bios + 0x01);
hailfinger428f2012007-12-31 01:49:00 +0000108 largeid1 = id1;
109 largeid2 = id2;
110
111 /* Check if it is a continuation ID, this should be a while loop. */
112 if (id1 == 0x7F) {
113 largeid1 <<= 8;
hailfinger1ff6e362009-03-06 22:26:00 +0000114 id1 = chip_readb(bios + 0x100);
hailfinger428f2012007-12-31 01:49:00 +0000115 largeid1 |= id1;
116 }
117 if (id2 == 0x7F) {
118 largeid2 <<= 8;
hailfinger1ff6e362009-03-06 22:26:00 +0000119 id2 = chip_readb(bios + 0x101);
hailfinger428f2012007-12-31 01:49:00 +0000120 largeid2 |= id2;
121 }
rminnich8d3ff912003-10-25 17:01:29 +0000122
ollie5b621572004-03-20 16:46:10 +0000123 /* Issue JEDEC Product ID Exit command */
hailfinger1ff6e362009-03-06 22:26:00 +0000124 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000125 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000126 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000127 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000128 chip_writeb(0xF0, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000129 programmer_delay(probe_timing_exit);
rminnich8d3ff912003-10-25 17:01:29 +0000130
uwe2a414342009-09-02 22:09:00 +0000131 printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2);
hailfinger79cf3672008-05-14 12:03:06 +0000132 if (!oddparity(id1))
133 printf_debug(", id1 parity violation");
hailfinger027d7d92009-05-11 14:40:31 +0000134
135 /* Read the product ID location again. We should now see normal flash contents. */
136 flashcontent1 = chip_readb(bios);
137 flashcontent2 = chip_readb(bios + 0x01);
138
139 /* Check if it is a continuation ID, this should be a while loop. */
140 if (flashcontent1 == 0x7F) {
141 flashcontent1 <<= 8;
142 flashcontent1 |= chip_readb(bios + 0x100);
143 }
144 if (flashcontent2 == 0x7F) {
145 flashcontent2 <<= 8;
146 flashcontent2 |= chip_readb(bios + 0x101);
147 }
148
149 if (largeid1 == flashcontent1)
150 printf_debug(", id1 is normal flash content");
151 if (largeid2 == flashcontent2)
152 printf_debug(", id2 is normal flash content");
153
hailfinger79cf3672008-05-14 12:03:06 +0000154 printf_debug("\n");
hailfinger428f2012007-12-31 01:49:00 +0000155 if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id)
ollie5b621572004-03-20 16:46:10 +0000156 return 1;
rminnich8d3ff912003-10-25 17:01:29 +0000157
ollie5b621572004-03-20 16:46:10 +0000158 return 0;
olliea3def632004-03-19 22:10:07 +0000159}
160
hailfinger80f48682009-09-23 22:01:33 +0000161int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize)
olliea3def632004-03-19 22:10:07 +0000162{
hailfinger7af83692009-06-15 17:23:36 +0000163 chipaddr bios = flash->virtual_memory;
164
ollie5b621572004-03-20 16:46:10 +0000165 /* Issue the Sector Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000166 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000167 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000168 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000169 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000170 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000171 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000172
hailfinger1ff6e362009-03-06 22:26:00 +0000173 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000174 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000175 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000176 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000177 chip_writeb(0x30, bios + page);
hailfingere5829f62009-06-05 17:48:08 +0000178 programmer_delay(10);
ollie5b621572004-03-20 16:46:10 +0000179
olliea3def632004-03-19 22:10:07 +0000180 /* wait for Toggle bit ready */
181 toggle_ready_jedec(bios);
182
hailfinger7af83692009-06-15 17:23:36 +0000183 if (check_erased_range(flash, page, pagesize)) {
184 fprintf(stderr,"ERASE FAILED!\n");
185 return -1;
186 }
uwebe4477b2007-08-23 16:08:21 +0000187 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000188}
olliea4302802004-12-07 03:15:51 +0000189
hailfinger80f48682009-09-23 22:01:33 +0000190int erase_block_jedec(struct flashchip *flash, unsigned int block, unsigned int blocksize)
rminnichdfcbaa72004-09-30 16:37:01 +0000191{
hailfinger7af83692009-06-15 17:23:36 +0000192 chipaddr bios = flash->virtual_memory;
193
rminnichdfcbaa72004-09-30 16:37:01 +0000194 /* Issue the Sector Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000195 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000196 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000197 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000198 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000199 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000200 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000201
hailfinger1ff6e362009-03-06 22:26:00 +0000202 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000203 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000204 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000205 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000206 chip_writeb(0x50, bios + block);
hailfingere5829f62009-06-05 17:48:08 +0000207 programmer_delay(10);
rminnichdfcbaa72004-09-30 16:37:01 +0000208
209 /* wait for Toggle bit ready */
210 toggle_ready_jedec(bios);
211
hailfinger7af83692009-06-15 17:23:36 +0000212 if (check_erased_range(flash, block, blocksize)) {
213 fprintf(stderr,"ERASE FAILED!\n");
214 return -1;
215 }
uwebe4477b2007-08-23 16:08:21 +0000216 return 0;
rminnichdfcbaa72004-09-30 16:37:01 +0000217}
rminnich8d3ff912003-10-25 17:01:29 +0000218
ollie5b621572004-03-20 16:46:10 +0000219int erase_chip_jedec(struct flashchip *flash)
rminnich8d3ff912003-10-25 17:01:29 +0000220{
hailfinger7af83692009-06-15 17:23:36 +0000221 int total_size = flash->total_size * 1024;
hailfinger82719632009-05-16 21:22:56 +0000222 chipaddr bios = flash->virtual_memory;
rminnich8d3ff912003-10-25 17:01:29 +0000223
ollie5b621572004-03-20 16:46:10 +0000224 /* Issue the JEDEC Chip Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000225 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000226 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000227 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000228 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000229 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000230 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000231
hailfinger1ff6e362009-03-06 22:26:00 +0000232 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000233 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000234 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000235 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000236 chip_writeb(0x10, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000237 programmer_delay(10);
olliea3def632004-03-19 22:10:07 +0000238
rminnich8d3ff912003-10-25 17:01:29 +0000239 toggle_ready_jedec(bios);
240
hailfinger7af83692009-06-15 17:23:36 +0000241 if (check_erased_range(flash, 0, total_size)) {
242 fprintf(stderr,"ERASE FAILED!\n");
243 return -1;
244 }
uwebe4477b2007-08-23 16:08:21 +0000245 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000246}
247
hailfingerc2cfc592009-06-25 13:57:31 +0000248int write_page_write_jedec(struct flashchip *flash, uint8_t *src,
249 int start, int page_size)
rminnich8d3ff912003-10-25 17:01:29 +0000250{
hailfingerf2ac27e2009-11-25 16:41:50 +0000251 int i, tried = 0, failed;
stepan7abc6322006-11-22 00:29:51 +0000252 uint8_t *s = src;
hailfingerc2cfc592009-06-25 13:57:31 +0000253 chipaddr bios = flash->virtual_memory;
254 chipaddr dst = bios + start;
255 chipaddr d = dst;
rminnich8d3ff912003-10-25 17:01:29 +0000256
stepan7abc6322006-11-22 00:29:51 +0000257retry:
ollie5b621572004-03-20 16:46:10 +0000258 /* Issue JEDEC Data Unprotect comand */
hailfinger0429b5a2009-11-26 14:50:52 +0000259 start_program_jedec(bios);
ollie5b621572004-03-20 16:46:10 +0000260
olliea4302802004-12-07 03:15:51 +0000261 /* transfer data from source to destination */
hailfingerfe072472009-11-14 03:48:33 +0000262 for (i = 0; i < page_size; i++) {
olliea4302802004-12-07 03:15:51 +0000263 /* If the data is 0xFF, don't program it */
uwef6641642007-05-09 10:17:44 +0000264 if (*src != 0xFF)
hailfinger1ff6e362009-03-06 22:26:00 +0000265 chip_writeb(*src, dst);
stepan7abc6322006-11-22 00:29:51 +0000266 dst++;
267 src++;
ollie5b621572004-03-20 16:46:10 +0000268 }
269
ollie5b621572004-03-20 16:46:10 +0000270 toggle_ready_jedec(dst - 1);
olliea4302802004-12-07 03:15:51 +0000271
stepan7abc6322006-11-22 00:29:51 +0000272 dst = d;
273 src = s;
hailfingerf2ac27e2009-11-25 16:41:50 +0000274 failed = verify_range(flash, src, start, page_size, NULL);
uwef6641642007-05-09 10:17:44 +0000275
hailfingerf2ac27e2009-11-25 16:41:50 +0000276 if (failed && tried++ < MAX_REFLASH_TRIES) {
hailfingerfe072472009-11-14 03:48:33 +0000277 fprintf(stderr, "retrying.\n");
uwef6641642007-05-09 10:17:44 +0000278 goto retry;
279 }
hailfingerf2ac27e2009-11-25 16:41:50 +0000280 if (failed) {
hailfinger82719632009-05-16 21:22:56 +0000281 fprintf(stderr, " page 0x%lx failed!\n",
282 (d - bios) / page_size);
stepan7abc6322006-11-22 00:29:51 +0000283 }
hailfingerf2ac27e2009-11-25 16:41:50 +0000284 return failed;
ollie5b621572004-03-20 16:46:10 +0000285}
286
hailfinger82719632009-05-16 21:22:56 +0000287int write_byte_program_jedec(chipaddr bios, uint8_t *src,
288 chipaddr dst)
olliebb5917a2004-03-22 22:19:17 +0000289{
hailfingerf2ac27e2009-11-25 16:41:50 +0000290 int tried = 0, failed = 0;
olliedd68ded2004-12-08 02:10:33 +0000291
hailfingerf2ac27e2009-11-25 16:41:50 +0000292 /* If the data is 0xFF, don't program it and don't complain. */
olliebb5917a2004-03-22 22:19:17 +0000293 if (*src == 0xFF) {
hailfingerf2ac27e2009-11-25 16:41:50 +0000294 return 0;
olliebb5917a2004-03-22 22:19:17 +0000295 }
olliea4302802004-12-07 03:15:51 +0000296
olliedd68ded2004-12-08 02:10:33 +0000297retry:
olliebb5917a2004-03-22 22:19:17 +0000298 /* Issue JEDEC Byte Program command */
hailfinger0429b5a2009-11-26 14:50:52 +0000299 start_program_jedec(bios);
olliea4302802004-12-07 03:15:51 +0000300
301 /* transfer data from source to destination */
hailfinger1ff6e362009-03-06 22:26:00 +0000302 chip_writeb(*src, dst);
olliebb5917a2004-03-22 22:19:17 +0000303 toggle_ready_jedec(bios);
ollief1845bd2004-03-27 00:18:15 +0000304
hailfinger1ff6e362009-03-06 22:26:00 +0000305 if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) {
uwef6641642007-05-09 10:17:44 +0000306 goto retry;
307 }
olliedd68ded2004-12-08 02:10:33 +0000308
stepan7abc6322006-11-22 00:29:51 +0000309 if (tried >= MAX_REFLASH_TRIES)
hailfingerf2ac27e2009-11-25 16:41:50 +0000310 failed = 1;
stepan7abc6322006-11-22 00:29:51 +0000311
hailfingerf2ac27e2009-11-25 16:41:50 +0000312 return failed;
olliebb5917a2004-03-22 22:19:17 +0000313}
314
hailfinger82719632009-05-16 21:22:56 +0000315int write_sector_jedec(chipaddr bios, uint8_t *src,
316 chipaddr dst, unsigned int page_size)
ollie5b621572004-03-20 16:46:10 +0000317{
hailfingerf2ac27e2009-11-25 16:41:50 +0000318 int i, failed = 0;
319 chipaddr olddst;
ollie5b621572004-03-20 16:46:10 +0000320
hailfingerf2ac27e2009-11-25 16:41:50 +0000321 olddst = dst;
ollie5b621572004-03-20 16:46:10 +0000322 for (i = 0; i < page_size; i++) {
hailfingerf2ac27e2009-11-25 16:41:50 +0000323 if (write_byte_program_jedec(bios, src, dst))
324 failed = 1;
ollief1845bd2004-03-27 00:18:15 +0000325 dst++, src++;
ollie5b621572004-03-20 16:46:10 +0000326 }
hailfingerf2ac27e2009-11-25 16:41:50 +0000327 if (failed)
328 fprintf(stderr, " writing sector at 0x%lx failed!\n", olddst);
ollie5b621572004-03-20 16:46:10 +0000329
hailfingerf2ac27e2009-11-25 16:41:50 +0000330 return failed;
ollie5b621572004-03-20 16:46:10 +0000331}
332
ollie6a600992005-11-26 21:55:36 +0000333int write_jedec(struct flashchip *flash, uint8_t *buf)
ollie5b621572004-03-20 16:46:10 +0000334{
hailfingerf2ac27e2009-11-25 16:41:50 +0000335 int i, failed = 0;
olliebb5917a2004-03-22 22:19:17 +0000336 int total_size = flash->total_size * 1024;
337 int page_size = flash->page_size;
ollie5b621572004-03-20 16:46:10 +0000338
hailfinger7af83692009-06-15 17:23:36 +0000339 if (erase_chip_jedec(flash)) {
340 fprintf(stderr,"ERASE FAILED!\n");
341 return -1;
uwef6641642007-05-09 10:17:44 +0000342 }
hailfinger7af83692009-06-15 17:23:36 +0000343
uwefd2d0fe2007-10-17 23:55:15 +0000344 printf("Programming page: ");
ollie5b621572004-03-20 16:46:10 +0000345 for (i = 0; i < total_size / page_size; i++) {
346 printf("%04d at address: 0x%08x", i, i * page_size);
hailfingerf2ac27e2009-11-25 16:41:50 +0000347 if (write_page_write_jedec(flash, buf + i * page_size,
348 i * page_size, page_size))
349 failed = 1;
olliebb5917a2004-03-22 22:19:17 +0000350 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
rminnich8d3ff912003-10-25 17:01:29 +0000351 }
352 printf("\n");
rminnich8d3ff912003-10-25 17:01:29 +0000353
hailfingerf2ac27e2009-11-25 16:41:50 +0000354 return failed;
rminnich8d3ff912003-10-25 17:01:29 +0000355}
hailfingerfff99532009-11-27 17:49:42 +0000356
357int write_jedec_1(struct flashchip *flash, uint8_t * buf)
358{
359 int i;
360 chipaddr bios = flash->virtual_memory;
361 chipaddr dst = bios;
362
363 programmer_delay(10);
364 if (erase_flash(flash)) {
365 fprintf(stderr, "ERASE FAILED!\n");
366 return -1;
367 }
368
369 printf("Programming page: ");
370 for (i = 0; i < flash->total_size; i++) {
371 if ((i & 0x3) == 0)
372 printf("address: 0x%08lx", (unsigned long)i * 1024);
373
374 write_sector_jedec(bios, buf + i * 1024, dst + i * 1024, 1024);
375
376 if ((i & 0x3) == 0)
377 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
378 }
379
380 printf("\n");
381 return 0;
382}