hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 4 | * Copyright (C) 2009,2010 Carl-Daniel Hailfinger |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 8 | * the Free Software Foundation; version 2 of the License. |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 16 | #include <string.h> |
| 17 | #include <stdlib.h> |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 18 | #include <stdio.h> |
| 19 | #include <ctype.h> |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 20 | #include <errno.h> |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 21 | #include "flash.h" |
hailfinger | a872771 | 2010-06-20 10:58:32 +0000 | [diff] [blame] | 22 | #include "chipdrivers.h" |
hailfinger | 428f685 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 23 | #include "programmer.h" |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 24 | #include "flashchips.h" |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 25 | |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 26 | /* Remove the #define below if you don't want SPI flash chip emulation. */ |
| 27 | #define EMULATE_SPI_CHIP 1 |
| 28 | |
| 29 | #if EMULATE_SPI_CHIP |
| 30 | #define EMULATE_CHIP 1 |
| 31 | #include "spi.h" |
| 32 | #endif |
| 33 | |
| 34 | #if EMULATE_CHIP |
| 35 | #include <sys/types.h> |
| 36 | #include <sys/stat.h> |
| 37 | #endif |
| 38 | |
| 39 | #if EMULATE_CHIP |
| 40 | static uint8_t *flashchip_contents = NULL; |
| 41 | enum emu_chip { |
| 42 | EMULATE_NONE, |
| 43 | EMULATE_ST_M25P10_RES, |
| 44 | EMULATE_SST_SST25VF040_REMS, |
| 45 | EMULATE_SST_SST25VF032B, |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 46 | EMULATE_MACRONIX_MX25L6436, |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 47 | EMULATE_WINBOND_W25Q128FV, |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 48 | EMULATE_VARIABLE_SIZE, |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 49 | }; |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 50 | |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 51 | struct emu_data { |
| 52 | enum emu_chip emu_chip; |
| 53 | char *emu_persistent_image; |
| 54 | unsigned int emu_chip_size; |
| 55 | int erase_to_zero; |
| 56 | int emu_modified; /* is the image modified since reading it? */ |
| 57 | uint8_t emu_status; |
Edward O'Callaghan | 0037f45 | 2020-09-17 13:32:00 +1000 | [diff] [blame] | 58 | /* If "freq" parameter is passed in from command line, commands will delay |
| 59 | * for this period before returning. */ |
| 60 | unsigned long int delay_us; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 61 | unsigned int emu_max_byteprogram_size; |
| 62 | unsigned int emu_max_aai_size; |
| 63 | unsigned int emu_jedec_se_size; |
| 64 | unsigned int emu_jedec_be_52_size; |
| 65 | unsigned int emu_jedec_be_d8_size; |
| 66 | unsigned int emu_jedec_ce_60_size; |
| 67 | unsigned int emu_jedec_ce_c7_size; |
| 68 | unsigned char spi_blacklist[256]; |
| 69 | unsigned char spi_ignorelist[256]; |
| 70 | unsigned int spi_blacklist_size; |
| 71 | unsigned int spi_ignorelist_size; |
| 72 | }; |
| 73 | |
| 74 | #if EMULATE_SPI_CHIP |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 75 | /* A legit complete SFDP table based on the MX25L6436E (rev. 1.8) datasheet. */ |
| 76 | static const uint8_t sfdp_table[] = { |
| 77 | 0x53, 0x46, 0x44, 0x50, // @0x00: SFDP signature |
| 78 | 0x00, 0x01, 0x01, 0xFF, // @0x04: revision 1.0, 2 headers |
| 79 | 0x00, 0x00, 0x01, 0x09, // @0x08: JEDEC SFDP header rev. 1.0, 9 DW long |
| 80 | 0x1C, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x1C (instead of 0x30) |
| 81 | 0xC2, 0x00, 0x01, 0x04, // @0x10: Macronix header rev. 1.0, 4 DW long |
| 82 | 0x48, 0x00, 0x00, 0xFF, // @0x14: PTP1 = 0x48 (instead of 0x60) |
| 83 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x18: hole. |
| 84 | 0xE5, 0x20, 0xC9, 0xFF, // @0x1C: SFDP parameter table start |
| 85 | 0xFF, 0xFF, 0xFF, 0x03, // @0x20 |
| 86 | 0x00, 0xFF, 0x08, 0x6B, // @0x24 |
| 87 | 0x08, 0x3B, 0x00, 0xFF, // @0x28 |
| 88 | 0xEE, 0xFF, 0xFF, 0xFF, // @0x2C |
| 89 | 0xFF, 0xFF, 0x00, 0x00, // @0x30 |
| 90 | 0xFF, 0xFF, 0x00, 0xFF, // @0x34 |
| 91 | 0x0C, 0x20, 0x0F, 0x52, // @0x38 |
| 92 | 0x10, 0xD8, 0x00, 0xFF, // @0x3C: SFDP parameter table end |
| 93 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x40: hole. |
| 94 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x44: hole. |
| 95 | 0x00, 0x36, 0x00, 0x27, // @0x48: Macronix parameter table start |
| 96 | 0xF4, 0x4F, 0xFF, 0xFF, // @0x4C |
| 97 | 0xD9, 0xC8, 0xFF, 0xFF, // @0x50 |
| 98 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x54: Macronix parameter table end |
| 99 | }; |
| 100 | |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 101 | #endif |
| 102 | #endif |
| 103 | |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 104 | static unsigned int spi_write_256_chunksize = 256; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 105 | |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 106 | static int dummy_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 107 | const unsigned char *writearr, unsigned char *readarr); |
Patrick Georgi | ab8353e | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 108 | static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf, |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 109 | unsigned int start, unsigned int len); |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 110 | static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); |
| 111 | static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); |
| 112 | static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); |
| 113 | static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len); |
| 114 | static uint8_t dummy_chip_readb(const struct flashctx *flash, const chipaddr addr); |
| 115 | static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr addr); |
| 116 | static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr); |
| 117 | static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); |
mkarcher | d264e9e | 2011-05-11 17:07:07 +0000 | [diff] [blame] | 118 | |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 119 | static struct spi_master spi_master_dummyflasher = { |
Edward O'Callaghan | a6673bd | 2019-06-24 15:22:28 +1000 | [diff] [blame] | 120 | .features = SPI_MASTER_4BA, |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 121 | .max_data_read = MAX_DATA_READ_UNLIMITED, |
| 122 | .max_data_write = MAX_DATA_UNSPECIFIED, |
| 123 | .command = dummy_spi_send_command, |
| 124 | .multicommand = default_spi_send_multicommand, |
| 125 | .read = default_spi_read, |
| 126 | .write_256 = dummy_spi_write_256, |
Edward O'Callaghan | eeaac6b | 2020-10-12 19:51:56 +1100 | [diff] [blame] | 127 | .write_aai = default_spi_write_aai, |
mkarcher | d264e9e | 2011-05-11 17:07:07 +0000 | [diff] [blame] | 128 | }; |
dhendrix | 0ffc2eb | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 129 | |
Namyoon Woo | c429efb | 2020-10-17 20:25:15 -0700 | [diff] [blame^] | 130 | static struct par_master par_master_dummy = { |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 131 | .chip_readb = dummy_chip_readb, |
| 132 | .chip_readw = dummy_chip_readw, |
| 133 | .chip_readl = dummy_chip_readl, |
| 134 | .chip_readn = dummy_chip_readn, |
| 135 | .chip_writeb = dummy_chip_writeb, |
| 136 | .chip_writew = dummy_chip_writew, |
| 137 | .chip_writel = dummy_chip_writel, |
| 138 | .chip_writen = dummy_chip_writen, |
| 139 | }; |
| 140 | |
Edward O'Callaghan | ef4e28b | 2019-06-28 13:18:41 +1000 | [diff] [blame] | 141 | static enum chipbustype dummy_buses_supported = BUS_NONE; |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 142 | |
David Hendricks | 93784b4 | 2016-08-09 17:00:38 -0700 | [diff] [blame] | 143 | static int dummy_shutdown(void *data) |
dhendrix | 0ffc2eb | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 144 | { |
| 145 | msg_pspew("%s\n", __func__); |
| 146 | #if EMULATE_CHIP |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 147 | struct emu_data *emu_data = (struct emu_data *)data; |
| 148 | if (emu_data->emu_chip != EMULATE_NONE) { |
| 149 | if (emu_data->emu_persistent_image && emu_data->emu_modified) { |
| 150 | msg_pdbg("Writing %s\n", emu_data->emu_persistent_image); |
| 151 | write_buf_to_file(flashchip_contents, |
| 152 | emu_data->emu_chip_size, |
| 153 | emu_data->emu_persistent_image); |
| 154 | free(emu_data->emu_persistent_image); |
| 155 | emu_data->emu_persistent_image = NULL; |
dhendrix | 0ffc2eb | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 156 | } |
| 157 | free(flashchip_contents); |
| 158 | } |
| 159 | #endif |
| 160 | return 0; |
| 161 | } |
| 162 | |
Simon Glass | d2c64a2 | 2013-07-03 22:05:21 +0900 | [diff] [blame] | 163 | /* Values for the 'size' parameter */ |
| 164 | enum { |
| 165 | SIZE_UNKNOWN = -1, |
| 166 | SIZE_AUTO = -2, |
| 167 | }; |
| 168 | |
David Hendricks | ac1d25c | 2016-08-09 17:00:58 -0700 | [diff] [blame] | 169 | int dummy_init(void) |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 170 | { |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 171 | char *bustext = NULL; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 172 | char *tmp = NULL; |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 173 | unsigned int i; |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 174 | #if EMULATE_SPI_CHIP |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 175 | char *status = NULL; |
Simon Glass | d2c64a2 | 2013-07-03 22:05:21 +0900 | [diff] [blame] | 176 | int size = SIZE_UNKNOWN; /* size for generic chip */ |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 177 | #endif |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 178 | #if EMULATE_CHIP |
| 179 | struct stat image_stat; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 180 | #endif |
Simon Glass | d2c64a2 | 2013-07-03 22:05:21 +0900 | [diff] [blame] | 181 | int image_size = SIZE_UNKNOWN; |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 182 | |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 183 | struct emu_data *data = calloc(1, sizeof(struct emu_data)); |
| 184 | if (!data) { |
| 185 | msg_perr("Out of memory!\n"); |
| 186 | return 1; |
| 187 | } |
| 188 | data->emu_chip = EMULATE_NONE; |
Edward O'Callaghan | 0037f45 | 2020-09-17 13:32:00 +1000 | [diff] [blame] | 189 | data->delay_us = 0; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 190 | spi_master_dummyflasher.data = data; |
Namyoon Woo | c429efb | 2020-10-17 20:25:15 -0700 | [diff] [blame^] | 191 | par_master_dummy.data = data; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 192 | |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 193 | msg_pspew("%s\n", __func__); |
hailfinger | 668f350 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 194 | |
hailfinger | ddeb4ac | 2010-07-08 10:13:37 +0000 | [diff] [blame] | 195 | bustext = extract_programmer_param("bus"); |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 196 | msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default"); |
| 197 | if (!bustext) |
| 198 | bustext = strdup("parallel+lpc+fwh+spi"); |
hailfinger | 668f350 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 199 | /* Convert the parameters to lowercase. */ |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 200 | tolower_string(bustext); |
hailfinger | 668f350 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 201 | |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 202 | dummy_buses_supported = BUS_NONE; |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 203 | if (strstr(bustext, "parallel")) { |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 204 | dummy_buses_supported |= BUS_PARALLEL; |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 205 | msg_pdbg("Enabling support for %s flash.\n", "parallel"); |
hailfinger | 668f350 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 206 | } |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 207 | if (strstr(bustext, "lpc")) { |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 208 | dummy_buses_supported |= BUS_LPC; |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 209 | msg_pdbg("Enabling support for %s flash.\n", "LPC"); |
hailfinger | 668f350 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 210 | } |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 211 | if (strstr(bustext, "fwh")) { |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 212 | dummy_buses_supported |= BUS_FWH; |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 213 | msg_pdbg("Enabling support for %s flash.\n", "FWH"); |
hailfinger | 668f350 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 214 | } |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 215 | if (strstr(bustext, "spi")) { |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 216 | dummy_buses_supported |= BUS_SPI; |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 217 | msg_pdbg("Enabling support for %s flash.\n", "SPI"); |
hailfinger | 668f350 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 218 | } |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 219 | if (dummy_buses_supported == BUS_NONE) |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 220 | msg_pdbg("Support for all flash bus types disabled.\n"); |
hailfinger | 1ef766d | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 221 | free(bustext); |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 222 | |
| 223 | tmp = extract_programmer_param("spi_write_256_chunksize"); |
| 224 | if (tmp) { |
| 225 | spi_write_256_chunksize = atoi(tmp); |
| 226 | free(tmp); |
| 227 | if (spi_write_256_chunksize < 1) { |
| 228 | msg_perr("invalid spi_write_256_chunksize\n"); |
| 229 | return 1; |
| 230 | } |
| 231 | } |
| 232 | |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 233 | tmp = extract_programmer_param("spi_blacklist"); |
| 234 | if (tmp) { |
| 235 | i = strlen(tmp); |
| 236 | if (!strncmp(tmp, "0x", 2)) { |
| 237 | i -= 2; |
| 238 | memmove(tmp, tmp + 2, i + 1); |
| 239 | } |
| 240 | if ((i > 512) || (i % 2)) { |
| 241 | msg_perr("Invalid SPI command blacklist length\n"); |
| 242 | free(tmp); |
| 243 | return 1; |
| 244 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 245 | data->spi_blacklist_size = i / 2; |
| 246 | for (i = 0; i < data->spi_blacklist_size * 2; i++) { |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 247 | if (!isxdigit((unsigned char)tmp[i])) { |
| 248 | msg_perr("Invalid char \"%c\" in SPI command " |
| 249 | "blacklist\n", tmp[i]); |
| 250 | free(tmp); |
| 251 | return 1; |
| 252 | } |
| 253 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 254 | for (i = 0; i < data->spi_blacklist_size; i++) { |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 255 | unsigned int tmp2; |
| 256 | /* SCNx8 is apparently not supported by MSVC (and thus |
| 257 | * MinGW), so work around it with an extra variable |
| 258 | */ |
| 259 | sscanf(tmp + i * 2, "%2x", &tmp2); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 260 | data->spi_blacklist[i] = (uint8_t)tmp2; |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 261 | } |
| 262 | msg_pdbg("SPI blacklist is "); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 263 | for (i = 0; i < data->spi_blacklist_size; i++) |
| 264 | msg_pdbg("%02x ", data->spi_blacklist[i]); |
| 265 | msg_pdbg(", size %u\n", data->spi_blacklist_size); |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 266 | } |
| 267 | free(tmp); |
| 268 | |
| 269 | tmp = extract_programmer_param("spi_ignorelist"); |
| 270 | if (tmp) { |
| 271 | i = strlen(tmp); |
| 272 | if (!strncmp(tmp, "0x", 2)) { |
| 273 | i -= 2; |
| 274 | memmove(tmp, tmp + 2, i + 1); |
| 275 | } |
| 276 | if ((i > 512) || (i % 2)) { |
| 277 | msg_perr("Invalid SPI command ignorelist length\n"); |
| 278 | free(tmp); |
| 279 | return 1; |
| 280 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 281 | data->spi_ignorelist_size = i / 2; |
| 282 | for (i = 0; i < data->spi_ignorelist_size * 2; i++) { |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 283 | if (!isxdigit((unsigned char)tmp[i])) { |
| 284 | msg_perr("Invalid char \"%c\" in SPI command " |
| 285 | "ignorelist\n", tmp[i]); |
| 286 | free(tmp); |
| 287 | return 1; |
| 288 | } |
| 289 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 290 | for (i = 0; i < data->spi_ignorelist_size; i++) { |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 291 | unsigned int tmp2; |
| 292 | /* SCNx8 is apparently not supported by MSVC (and thus |
| 293 | * MinGW), so work around it with an extra variable |
| 294 | */ |
| 295 | sscanf(tmp + i * 2, "%2x", &tmp2); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 296 | data->spi_ignorelist[i] = (uint8_t)tmp2; |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 297 | } |
| 298 | msg_pdbg("SPI ignorelist is "); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 299 | for (i = 0; i < data->spi_ignorelist_size; i++) |
| 300 | msg_pdbg("%02x ", data->spi_ignorelist[i]); |
| 301 | msg_pdbg(", size %u\n", data->spi_ignorelist_size); |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 302 | } |
| 303 | free(tmp); |
| 304 | |
David Hendricks | 8437700 | 2014-09-09 16:09:31 -0700 | [diff] [blame] | 305 | /* frequency to emulate in Hz (default), KHz, or MHz */ |
| 306 | tmp = extract_programmer_param("freq"); |
| 307 | if (tmp) { |
| 308 | unsigned long int freq; |
| 309 | char *units = tmp; |
| 310 | char *end = tmp + strlen(tmp); |
| 311 | |
| 312 | errno = 0; |
| 313 | freq = strtoul(tmp, &units, 0); |
| 314 | if (errno) { |
| 315 | msg_perr("Invalid frequency \"%s\", %s\n", |
| 316 | tmp, strerror(errno)); |
Edward O'Callaghan | 0037f45 | 2020-09-17 13:32:00 +1000 | [diff] [blame] | 317 | free(tmp); |
| 318 | return 1; |
David Hendricks | 8437700 | 2014-09-09 16:09:31 -0700 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | if ((units > tmp) && (units < end)) { |
| 322 | int units_valid = 0; |
| 323 | |
| 324 | if (units < end - 3) { |
| 325 | ; |
| 326 | } else if (units == end - 2) { |
| 327 | if (!strcasecmp(units, "hz")) |
| 328 | units_valid = 1; |
| 329 | } else if (units == end - 3) { |
| 330 | if (!strcasecmp(units, "khz")) { |
| 331 | freq *= 1000; |
| 332 | units_valid = 1; |
| 333 | } else if (!strcasecmp(units, "mhz")) { |
| 334 | freq *= 1000000; |
| 335 | units_valid = 1; |
| 336 | } |
| 337 | } |
| 338 | |
| 339 | if (!units_valid) { |
| 340 | msg_perr("Invalid units: %s\n", units); |
Edward O'Callaghan | 0037f45 | 2020-09-17 13:32:00 +1000 | [diff] [blame] | 341 | free(tmp); |
David Hendricks | 8437700 | 2014-09-09 16:09:31 -0700 | [diff] [blame] | 342 | return 1; |
| 343 | } |
| 344 | } |
| 345 | |
| 346 | /* Assume we only work with bytes and transfer at 1 bit/Hz */ |
Edward O'Callaghan | 0037f45 | 2020-09-17 13:32:00 +1000 | [diff] [blame] | 347 | data->delay_us = (1000000 * 8) / freq; |
David Hendricks | 8437700 | 2014-09-09 16:09:31 -0700 | [diff] [blame] | 348 | } |
Edward O'Callaghan | 0037f45 | 2020-09-17 13:32:00 +1000 | [diff] [blame] | 349 | free(tmp); |
David Hendricks | 8437700 | 2014-09-09 16:09:31 -0700 | [diff] [blame] | 350 | |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 351 | #if EMULATE_CHIP |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 352 | #if EMULATE_SPI_CHIP |
| 353 | tmp = extract_programmer_param("size"); |
| 354 | if (tmp) { |
Simon Glass | d2c64a2 | 2013-07-03 22:05:21 +0900 | [diff] [blame] | 355 | if (!strcmp(tmp, "auto")) |
| 356 | size = SIZE_AUTO; |
Namyoon Woo | c429efb | 2020-10-17 20:25:15 -0700 | [diff] [blame^] | 357 | else { |
| 358 | size = strtol(tmp, NULL, 10); |
| 359 | if (size <= 0 || (size % 1024 != 0)) { |
| 360 | msg_perr("%s: Chip size is not a multipler of 1024: %s\n", |
| 361 | __func__, tmp); |
| 362 | free(tmp); |
| 363 | return 1; |
| 364 | } |
| 365 | } |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 366 | free(tmp); |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 367 | } |
| 368 | #endif |
| 369 | |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 370 | tmp = extract_programmer_param("emulate"); |
| 371 | if (!tmp) { |
| 372 | msg_pdbg("Not emulating any flash chip.\n"); |
| 373 | /* Nothing else to do. */ |
dhendrix | 0ffc2eb | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 374 | goto dummy_init_out; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 375 | } |
| 376 | #if EMULATE_SPI_CHIP |
| 377 | if (!strcmp(tmp, "M25P10.RES")) { |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 378 | data->emu_chip = EMULATE_ST_M25P10_RES; |
| 379 | data->emu_chip_size = 128 * 1024; |
| 380 | data->emu_max_byteprogram_size = 128; |
| 381 | data->emu_max_aai_size = 0; |
| 382 | data->emu_jedec_se_size = 0; |
| 383 | data->emu_jedec_be_52_size = 0; |
| 384 | data->emu_jedec_be_d8_size = 32 * 1024; |
| 385 | data->emu_jedec_ce_60_size = 0; |
| 386 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 387 | msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page " |
| 388 | "write)\n"); |
| 389 | } |
| 390 | if (!strcmp(tmp, "SST25VF040.REMS")) { |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 391 | data->emu_chip = EMULATE_SST_SST25VF040_REMS; |
| 392 | data->emu_chip_size = 512 * 1024; |
| 393 | data->emu_max_byteprogram_size = 1; |
| 394 | data->emu_max_aai_size = 0; |
| 395 | data->emu_jedec_se_size = 4 * 1024; |
| 396 | data->emu_jedec_be_52_size = 32 * 1024; |
| 397 | data->emu_jedec_be_d8_size = 0; |
| 398 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 399 | data->emu_jedec_ce_c7_size = 0; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 400 | msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, " |
| 401 | "byte write)\n"); |
| 402 | } |
| 403 | if (!strcmp(tmp, "SST25VF032B")) { |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 404 | data->emu_chip = EMULATE_SST_SST25VF032B; |
| 405 | data->emu_chip_size = 4 * 1024 * 1024; |
| 406 | data->emu_max_byteprogram_size = 1; |
| 407 | data->emu_max_aai_size = 2; |
| 408 | data->emu_jedec_se_size = 4 * 1024; |
| 409 | data->emu_jedec_be_52_size = 32 * 1024; |
| 410 | data->emu_jedec_be_d8_size = 64 * 1024; |
| 411 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 412 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 413 | msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI " |
| 414 | "write)\n"); |
| 415 | } |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 416 | if (!strcmp(tmp, "MX25L6436")) { |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 417 | data->emu_chip = EMULATE_MACRONIX_MX25L6436; |
| 418 | data->emu_chip_size = 8 * 1024 * 1024; |
| 419 | data->emu_max_byteprogram_size = 256; |
| 420 | data->emu_max_aai_size = 0; |
| 421 | data->emu_jedec_se_size = 4 * 1024; |
| 422 | data->emu_jedec_be_52_size = 32 * 1024; |
| 423 | data->emu_jedec_be_d8_size = 64 * 1024; |
| 424 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 425 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 426 | msg_pdbg("Emulating Macronix MX25L6436 SPI flash chip (RDID, " |
| 427 | "SFDP)\n"); |
| 428 | } |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 429 | if (!strcmp(tmp, "W25Q128FV")) { |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 430 | data->emu_chip = EMULATE_WINBOND_W25Q128FV; |
| 431 | data->emu_chip_size = 16 * 1024 * 1024; |
| 432 | data->emu_max_byteprogram_size = 256; |
| 433 | data->emu_max_aai_size = 0; |
| 434 | data->emu_jedec_se_size = 4 * 1024; |
| 435 | data->emu_jedec_be_52_size = 32 * 1024; |
| 436 | data->emu_jedec_be_d8_size = 64 * 1024; |
| 437 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 438 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 439 | msg_pdbg("Emulating Winbond W25Q128FV SPI flash chip (RDID)\n"); |
| 440 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 441 | data->emu_persistent_image = extract_programmer_param("image"); |
| 442 | if (!stat(data->emu_persistent_image, &image_stat)) |
Simon Glass | d2c64a2 | 2013-07-03 22:05:21 +0900 | [diff] [blame] | 443 | image_size = image_stat.st_size; |
| 444 | |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 445 | /* The name of variable-size virtual chip. A 4 MiB flash example: |
| 446 | * flashrom -p dummy:emulate=VARIABLE_SIZE,size=4194304 |
| 447 | */ |
| 448 | if (!strcmp(tmp, "VARIABLE_SIZE")) { |
Simon Glass | d2c64a2 | 2013-07-03 22:05:21 +0900 | [diff] [blame] | 449 | if (size == SIZE_UNKNOWN) { |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 450 | msg_perr("%s: the size parameter is not given.\n", __func__); |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 451 | free(tmp); |
| 452 | return 1; |
Simon Glass | d2c64a2 | 2013-07-03 22:05:21 +0900 | [diff] [blame] | 453 | } else if (size == SIZE_AUTO) { |
| 454 | if (image_size == SIZE_UNKNOWN) { |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 455 | msg_perr("%s: no image so cannot use automatic size.\n", __func__); |
Simon Glass | d2c64a2 | 2013-07-03 22:05:21 +0900 | [diff] [blame] | 456 | free(tmp); |
| 457 | return 1; |
| 458 | } |
| 459 | size = image_size; |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 460 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 461 | data->emu_chip = EMULATE_VARIABLE_SIZE; |
| 462 | data->emu_chip_size = size; |
| 463 | data->emu_max_byteprogram_size = 256; |
| 464 | data->emu_max_aai_size = 0; |
| 465 | data->emu_jedec_se_size = 4 * 1024; |
| 466 | data->emu_jedec_be_52_size = 32 * 1024; |
| 467 | data->emu_jedec_be_d8_size = 64 * 1024; |
| 468 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 469 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 470 | msg_pdbg("Emulating generic SPI flash chip (size=%d bytes)\n", |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 471 | data->emu_chip_size); |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 472 | } |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 473 | #endif |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 474 | if (data->emu_chip == EMULATE_NONE) { |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 475 | msg_perr("Invalid chip specified for emulation: %s\n", tmp); |
| 476 | free(tmp); |
| 477 | return 1; |
| 478 | } |
David Hendricks | 0eda2a8 | 2014-09-12 16:32:05 -0700 | [diff] [blame] | 479 | |
| 480 | /* Should emulated flash erase to zero (yes/no)? */ |
| 481 | tmp = extract_programmer_param("erase_to_zero"); |
| 482 | if (tmp) { |
| 483 | if (!strcmp(tmp, "yes")) { |
| 484 | msg_pdbg("Emulated chip will erase to 0x00\n"); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 485 | data->erase_to_zero = 1; |
David Hendricks | 0eda2a8 | 2014-09-12 16:32:05 -0700 | [diff] [blame] | 486 | } else if (!strcmp(tmp, "no")) { |
| 487 | msg_pdbg("Emulated chip will erase to 0xff\n"); |
| 488 | } else { |
| 489 | msg_perr("erase_to_zero can be \"yes\" or \"no\"\n"); |
| 490 | return 1; |
| 491 | } |
| 492 | } |
| 493 | |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 494 | free(tmp); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 495 | flashchip_contents = malloc(data->emu_chip_size); |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 496 | if (!flashchip_contents) { |
| 497 | msg_perr("Out of memory!\n"); |
| 498 | return 1; |
| 499 | } |
dhendrix | 0ffc2eb | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 500 | |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 501 | #ifdef EMULATE_SPI_CHIP |
| 502 | status = extract_programmer_param("spi_status"); |
| 503 | if (status) { |
| 504 | char *endptr; |
| 505 | errno = 0; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 506 | data->emu_status = strtoul(status, &endptr, 0); |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 507 | free(status); |
| 508 | if (errno != 0 || status == endptr) { |
| 509 | msg_perr("Error: initial status register specified, " |
| 510 | "but the value could not be converted.\n"); |
| 511 | return 1; |
| 512 | } |
| 513 | msg_pdbg("Initial status register is set to 0x%02x.\n", |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 514 | data->emu_status); |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 515 | } |
| 516 | #endif |
| 517 | |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 518 | msg_pdbg("Filling fake flash chip with 0x%02x, size %i\n", |
| 519 | data->erase_to_zero ? 0x00 : 0xff, data->emu_chip_size); |
| 520 | memset(flashchip_contents, data->erase_to_zero ? 0x00 : 0xff, data->emu_chip_size); |
| 521 | |
| 522 | /* Will be freed by shutdown function if necessary. */ |
| 523 | if (!data->emu_persistent_image) { |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 524 | /* Nothing else to do. */ |
dhendrix | 0ffc2eb | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 525 | goto dummy_init_out; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 526 | } |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 527 | |
| 528 | /* We will silently (in default verbosity) ignore the file if it does not exist (yet) or the size does |
| 529 | * not match the emulated chip. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 530 | if (!stat(data->emu_persistent_image, &image_stat)) { |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 531 | msg_pdbg("Found persistent image %s, %jd B ", |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 532 | data->emu_persistent_image, (intmax_t)image_stat.st_size); |
| 533 | if ((uintmax_t)image_stat.st_size == data->emu_chip_size) { |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 534 | msg_pdbg("matches.\n"); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 535 | msg_pdbg("Reading %s\n", data->emu_persistent_image); |
| 536 | if (read_buf_from_file(flashchip_contents, data->emu_chip_size, |
| 537 | data->emu_persistent_image)) { |
| 538 | msg_perr("Unable to read %s\n", data->emu_persistent_image); |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 539 | free(flashchip_contents); |
| 540 | return 1; |
| 541 | } |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 542 | } else { |
| 543 | msg_pdbg("doesn't match.\n"); |
| 544 | } |
| 545 | } |
| 546 | #endif |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 547 | |
dhendrix | 0ffc2eb | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 548 | dummy_init_out: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 549 | if (register_shutdown(dummy_shutdown, data)) { |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 550 | free(flashchip_contents); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 551 | free(data); |
dhendrix | 0ffc2eb | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 552 | return 1; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 553 | } |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 554 | if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH)) |
Patrick Georgi | 0a9533a | 2017-02-03 19:28:38 +0100 | [diff] [blame] | 555 | register_par_master(&par_master_dummy, |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 556 | dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH)); |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 557 | if (dummy_buses_supported & BUS_SPI) |
Patrick Georgi | f4f1e2f | 2017-03-10 17:38:40 +0100 | [diff] [blame] | 558 | register_spi_master(&spi_master_dummyflasher); |
hailfinger | 76bb7e9 | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 559 | |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 560 | return 0; |
| 561 | } |
| 562 | |
Patrick Georgi | 4befc16 | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 563 | void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len) |
hailfinger | 11ae3c4 | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 564 | { |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 565 | msg_pspew("%s: Mapping %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n", |
| 566 | __func__, descr, len, PRIxPTR_WIDTH, phys_addr); |
hailfinger | 11ae3c4 | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 567 | return (void *)phys_addr; |
| 568 | } |
| 569 | |
| 570 | void dummy_unmap(void *virt_addr, size_t len) |
| 571 | { |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 572 | msg_pspew("%s: Unmapping 0x%zx bytes at %p\n", __func__, len, virt_addr); |
hailfinger | 11ae3c4 | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 573 | } |
| 574 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 575 | static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 576 | { |
Kangheui Won | 4974cc1 | 2019-10-18 12:59:01 +1100 | [diff] [blame] | 577 | msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%02x\n", __func__, addr, val); |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 578 | } |
| 579 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 580 | static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr) |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 581 | { |
Kangheui Won | 4974cc1 | 2019-10-18 12:59:01 +1100 | [diff] [blame] | 582 | msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%04x\n", __func__, addr, val); |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 583 | } |
| 584 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 585 | static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr) |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 586 | { |
Kangheui Won | 4974cc1 | 2019-10-18 12:59:01 +1100 | [diff] [blame] | 587 | msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%08x\n", __func__, addr, val); |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 588 | } |
| 589 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 590 | static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len) |
hailfinger | 9d987ef | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 591 | { |
| 592 | size_t i; |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 593 | msg_pspew("%s: addr=0x%" PRIxPTR ", len=0x%zx, writing data (hex):", __func__, addr, len); |
hailfinger | 9d987ef | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 594 | for (i = 0; i < len; i++) { |
| 595 | if ((i % 16) == 0) |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 596 | msg_pspew("\n"); |
| 597 | msg_pspew("%02x ", buf[i]); |
hailfinger | 9d987ef | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 598 | } |
| 599 | } |
| 600 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 601 | static uint8_t dummy_chip_readb(const struct flashctx *flash, const chipaddr addr) |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 602 | { |
Kangheui Won | 4974cc1 | 2019-10-18 12:59:01 +1100 | [diff] [blame] | 603 | msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xff\n", __func__, addr); |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 604 | return 0xff; |
| 605 | } |
| 606 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 607 | static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr addr) |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 608 | { |
Kangheui Won | 4974cc1 | 2019-10-18 12:59:01 +1100 | [diff] [blame] | 609 | msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xffff\n", __func__, addr); |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 610 | return 0xffff; |
| 611 | } |
| 612 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 613 | static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr) |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 614 | { |
Kangheui Won | 4974cc1 | 2019-10-18 12:59:01 +1100 | [diff] [blame] | 615 | msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xffffffff\n", __func__, addr); |
hailfinger | a9df33c | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 616 | return 0xffffffff; |
| 617 | } |
| 618 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 619 | static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len) |
hailfinger | 9d987ef | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 620 | { |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 621 | msg_pspew("%s: addr=0x%" PRIxPTR ", len=0x%zx, returning array of 0xff\n", __func__, addr, len); |
hailfinger | 9d987ef | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 622 | memset(buf, 0xff, len); |
| 623 | return; |
| 624 | } |
| 625 | |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 626 | #if EMULATE_SPI_CHIP |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 627 | static int emulate_spi_chip_response(unsigned int writecnt, |
| 628 | unsigned int readcnt, |
| 629 | const unsigned char *writearr, |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 630 | unsigned char *readarr, |
| 631 | struct emu_data *data) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 632 | { |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 633 | unsigned int offs, i, toread; |
stefanct | c5eb8a9 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 634 | static int unsigned aai_offs; |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 635 | const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44}; |
| 636 | const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a}; |
| 637 | const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16}; |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 638 | const unsigned char w25q128fv_rems_response[2] = {0xef, 0x17}; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 639 | |
| 640 | if (writecnt == 0) { |
| 641 | msg_perr("No command sent to the chip!\n"); |
| 642 | return 1; |
| 643 | } |
Stefan Tauner | 718d1eb | 2016-08-18 18:00:53 -0700 | [diff] [blame] | 644 | /* spi_blacklist has precedence over spi_ignorelist. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 645 | for (i = 0; i < data->spi_blacklist_size; i++) { |
| 646 | if (writearr[0] == data->spi_blacklist[i]) { |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 647 | msg_pdbg("Refusing blacklisted SPI command 0x%02x\n", |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 648 | data->spi_blacklist[i]); |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 649 | return SPI_INVALID_OPCODE; |
| 650 | } |
| 651 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 652 | for (i = 0; i < data->spi_ignorelist_size; i++) { |
| 653 | if (writearr[0] == data->spi_ignorelist[i]) { |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 654 | msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n", |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 655 | data->spi_ignorelist[i]); |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 656 | /* Return success because the command does not fail, |
| 657 | * it is simply ignored. |
| 658 | */ |
| 659 | return 0; |
| 660 | } |
| 661 | } |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 662 | |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 663 | if (data->emu_max_aai_size && (data->emu_status & SPI_SR_AAI)) { |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 664 | if (writearr[0] != JEDEC_AAI_WORD_PROGRAM && |
| 665 | writearr[0] != JEDEC_WRDI && |
| 666 | writearr[0] != JEDEC_RDSR) { |
| 667 | msg_perr("Forbidden opcode (0x%02x) attempted during " |
| 668 | "AAI sequence!\n", writearr[0]); |
| 669 | return 0; |
| 670 | } |
| 671 | } |
| 672 | |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 673 | switch (writearr[0]) { |
| 674 | case JEDEC_RES: |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 675 | if (writecnt < JEDEC_RES_OUTSIZE) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 676 | break; |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 677 | /* offs calculation is only needed for SST chips which treat RES like REMS. */ |
| 678 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 679 | offs += writecnt - JEDEC_REMS_OUTSIZE; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 680 | switch (data->emu_chip) { |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 681 | case EMULATE_ST_M25P10_RES: |
| 682 | if (readcnt > 0) |
| 683 | memset(readarr, 0x10, readcnt); |
| 684 | break; |
| 685 | case EMULATE_SST_SST25VF040_REMS: |
| 686 | for (i = 0; i < readcnt; i++) |
| 687 | readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; |
| 688 | break; |
| 689 | case EMULATE_SST_SST25VF032B: |
| 690 | for (i = 0; i < readcnt; i++) |
| 691 | readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; |
| 692 | break; |
| 693 | case EMULATE_MACRONIX_MX25L6436: |
| 694 | if (readcnt > 0) |
| 695 | memset(readarr, 0x16, readcnt); |
| 696 | break; |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 697 | case EMULATE_WINBOND_W25Q128FV: |
| 698 | if (readcnt > 0) |
| 699 | memset(readarr, 0x17, readcnt); |
| 700 | break; |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 701 | default: /* ignore */ |
| 702 | break; |
| 703 | } |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 704 | break; |
| 705 | case JEDEC_REMS: |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 706 | /* REMS response has wraparound and uses an address parameter. */ |
| 707 | if (writecnt < JEDEC_REMS_OUTSIZE) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 708 | break; |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 709 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 710 | offs += writecnt - JEDEC_REMS_OUTSIZE; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 711 | switch (data->emu_chip) { |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 712 | case EMULATE_SST_SST25VF040_REMS: |
| 713 | for (i = 0; i < readcnt; i++) |
| 714 | readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; |
| 715 | break; |
| 716 | case EMULATE_SST_SST25VF032B: |
| 717 | for (i = 0; i < readcnt; i++) |
| 718 | readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; |
| 719 | break; |
| 720 | case EMULATE_MACRONIX_MX25L6436: |
| 721 | for (i = 0; i < readcnt; i++) |
| 722 | readarr[i] = mx25l6436_rems_response[(offs + i) % 2]; |
| 723 | break; |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 724 | case EMULATE_WINBOND_W25Q128FV: |
| 725 | for (i = 0; i < readcnt; i++) |
| 726 | readarr[i] = w25q128fv_rems_response[(offs + i) % 2]; |
| 727 | break; |
Carl-Daniel Hailfinger | 7a4c047 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 728 | default: /* ignore */ |
| 729 | break; |
| 730 | } |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 731 | break; |
| 732 | case JEDEC_RDID: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 733 | switch (data->emu_chip) { |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 734 | case EMULATE_SST_SST25VF032B: |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 735 | if (readcnt > 0) |
| 736 | readarr[0] = 0xbf; |
| 737 | if (readcnt > 1) |
| 738 | readarr[1] = 0x25; |
| 739 | if (readcnt > 2) |
| 740 | readarr[2] = 0x4a; |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 741 | break; |
| 742 | case EMULATE_MACRONIX_MX25L6436: |
| 743 | if (readcnt > 0) |
| 744 | readarr[0] = 0xc2; |
| 745 | if (readcnt > 1) |
| 746 | readarr[1] = 0x20; |
| 747 | if (readcnt > 2) |
| 748 | readarr[2] = 0x17; |
| 749 | break; |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 750 | case EMULATE_WINBOND_W25Q128FV: |
| 751 | if (readcnt > 0) |
| 752 | readarr[0] = 0xef; |
| 753 | if (readcnt > 1) |
| 754 | readarr[1] = 0x40; |
| 755 | if (readcnt > 2) |
| 756 | readarr[2] = 0x18; |
| 757 | break; |
Edward O'Callaghan | e077231 | 2020-09-16 17:57:19 +1000 | [diff] [blame] | 758 | case EMULATE_VARIABLE_SIZE: |
| 759 | if (readcnt > 0) |
| 760 | readarr[0] = (PROGMANUF_ID >> 8) & 0xff; |
| 761 | if (readcnt > 1) |
| 762 | readarr[1] = PROGMANUF_ID & 0xff; |
| 763 | if (readcnt > 2) |
| 764 | readarr[2] = (PROGDEV_ID >> 8) & 0xff; |
| 765 | if (readcnt > 3) |
| 766 | readarr[3] = PROGDEV_ID & 0xff; |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 767 | break; |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 768 | default: /* ignore */ |
| 769 | break; |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 770 | } |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 771 | break; |
| 772 | case JEDEC_RDSR: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 773 | memset(readarr, data->emu_status, readcnt); |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 774 | break; |
| 775 | /* FIXME: this should be chip-specific. */ |
| 776 | case JEDEC_EWSR: |
| 777 | case JEDEC_WREN: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 778 | data->emu_status |= SPI_SR_WEL; |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 779 | break; |
| 780 | case JEDEC_WRSR: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 781 | if (!(data->emu_status & SPI_SR_WEL)) { |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 782 | msg_perr("WRSR attempted, but WEL is 0!\n"); |
| 783 | break; |
| 784 | } |
| 785 | /* FIXME: add some reasonable simulation of the busy flag */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 786 | data->emu_status = writearr[1] & ~SPI_SR_WIP; |
| 787 | msg_pdbg2("WRSR wrote 0x%02x.\n", data->emu_status); |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 788 | break; |
| 789 | case JEDEC_READ: |
| 790 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 791 | /* Truncate to emu_chip_size. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 792 | offs %= data->emu_chip_size; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 793 | if (readcnt > 0) |
| 794 | memcpy(readarr, flashchip_contents + offs, readcnt); |
| 795 | break; |
Namyoon Woo | b71a296 | 2020-08-27 16:27:49 -0700 | [diff] [blame] | 796 | case JEDEC_READ_4BA: |
| 797 | offs = writearr[1] << 24 | writearr[2] << 16 | writearr[3] << 8 | writearr[4]; |
| 798 | /* Truncate to emu_chip_size. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 799 | offs %= data->emu_chip_size; |
Namyoon Woo | b71a296 | 2020-08-27 16:27:49 -0700 | [diff] [blame] | 800 | if (readcnt > 0) |
| 801 | memcpy(readarr, flashchip_contents + offs, readcnt); |
| 802 | break; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 803 | case JEDEC_BYTE_PROGRAM: |
| 804 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 805 | /* Truncate to emu_chip_size. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 806 | offs %= data->emu_chip_size; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 807 | if (writecnt < 5) { |
| 808 | msg_perr("BYTE PROGRAM size too short!\n"); |
| 809 | return 1; |
| 810 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 811 | if (writecnt - 4 > data->emu_max_byteprogram_size) { |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 812 | msg_perr("Max BYTE PROGRAM size exceeded!\n"); |
| 813 | return 1; |
| 814 | } |
| 815 | memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 816 | data->emu_modified = 1; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 817 | break; |
Namyoon Woo | b71a296 | 2020-08-27 16:27:49 -0700 | [diff] [blame] | 818 | case JEDEC_BYTE_PROGRAM_4BA: |
| 819 | offs = writearr[1] << 24 | writearr[2] << 16 | writearr[3] << 8 | writearr[4]; |
| 820 | /* Truncate to emu_chip_size. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 821 | offs %= data->emu_chip_size; |
Namyoon Woo | b71a296 | 2020-08-27 16:27:49 -0700 | [diff] [blame] | 822 | if (writecnt < 6) { |
| 823 | msg_perr("BYTE PROGRAM size too short!\n"); |
| 824 | return 1; |
| 825 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 826 | if (writecnt - 5 > data->emu_max_byteprogram_size) { |
Namyoon Woo | b71a296 | 2020-08-27 16:27:49 -0700 | [diff] [blame] | 827 | msg_perr("Max BYTE PROGRAM size exceeded!\n"); |
| 828 | return 1; |
| 829 | } |
| 830 | memcpy(flashchip_contents + offs, writearr + 5, writecnt - 5); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 831 | data->emu_modified = 1; |
Namyoon Woo | b71a296 | 2020-08-27 16:27:49 -0700 | [diff] [blame] | 832 | break; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 833 | case JEDEC_AAI_WORD_PROGRAM: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 834 | if (!data->emu_max_aai_size) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 835 | break; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 836 | if (!(data->emu_status & SPI_SR_AAI)) { |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 837 | if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { |
| 838 | msg_perr("Initial AAI WORD PROGRAM size too " |
| 839 | "short!\n"); |
| 840 | return 1; |
| 841 | } |
| 842 | if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { |
| 843 | msg_perr("Initial AAI WORD PROGRAM size too " |
| 844 | "long!\n"); |
| 845 | return 1; |
| 846 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 847 | data->emu_status |= SPI_SR_AAI; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 848 | aai_offs = writearr[1] << 16 | writearr[2] << 8 | |
| 849 | writearr[3]; |
| 850 | /* Truncate to emu_chip_size. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 851 | aai_offs %= data->emu_chip_size; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 852 | memcpy(flashchip_contents + aai_offs, writearr + 4, 2); |
| 853 | aai_offs += 2; |
| 854 | } else { |
| 855 | if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { |
| 856 | msg_perr("Continuation AAI WORD PROGRAM size " |
| 857 | "too short!\n"); |
| 858 | return 1; |
| 859 | } |
| 860 | if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { |
| 861 | msg_perr("Continuation AAI WORD PROGRAM size " |
| 862 | "too long!\n"); |
| 863 | return 1; |
| 864 | } |
| 865 | memcpy(flashchip_contents + aai_offs, writearr + 1, 2); |
| 866 | aai_offs += 2; |
| 867 | } |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 868 | data->emu_modified = 1; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 869 | break; |
| 870 | case JEDEC_WRDI: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 871 | if (data->emu_max_aai_size) |
| 872 | data->emu_status &= ~SPI_SR_AAI; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 873 | break; |
| 874 | case JEDEC_SE: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 875 | if (!data->emu_jedec_se_size) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 876 | break; |
| 877 | if (writecnt != JEDEC_SE_OUTSIZE) { |
| 878 | msg_perr("SECTOR ERASE 0x20 outsize invalid!\n"); |
| 879 | return 1; |
| 880 | } |
| 881 | if (readcnt != JEDEC_SE_INSIZE) { |
| 882 | msg_perr("SECTOR ERASE 0x20 insize invalid!\n"); |
| 883 | return 1; |
| 884 | } |
| 885 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 886 | if (offs & (data->emu_jedec_se_size - 1)) |
hailfinger | e53f5e4 | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 887 | msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 888 | offs &= ~(data->emu_jedec_se_size - 1); |
| 889 | memset(flashchip_contents + offs, 0xff, data->emu_jedec_se_size); |
| 890 | data->emu_modified = 1; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 891 | break; |
| 892 | case JEDEC_BE_52: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 893 | if (!data->emu_jedec_be_52_size) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 894 | break; |
| 895 | if (writecnt != JEDEC_BE_52_OUTSIZE) { |
| 896 | msg_perr("BLOCK ERASE 0x52 outsize invalid!\n"); |
| 897 | return 1; |
| 898 | } |
| 899 | if (readcnt != JEDEC_BE_52_INSIZE) { |
| 900 | msg_perr("BLOCK ERASE 0x52 insize invalid!\n"); |
| 901 | return 1; |
| 902 | } |
| 903 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 904 | if (offs & (data->emu_jedec_be_52_size - 1)) |
hailfinger | e53f5e4 | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 905 | msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 906 | offs &= ~(data->emu_jedec_be_52_size - 1); |
| 907 | memset(flashchip_contents + offs, 0xff, data->emu_jedec_be_52_size); |
| 908 | data->emu_modified = 1; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 909 | break; |
| 910 | case JEDEC_BE_D8: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 911 | if (!data->emu_jedec_be_d8_size) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 912 | break; |
| 913 | if (writecnt != JEDEC_BE_D8_OUTSIZE) { |
| 914 | msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n"); |
| 915 | return 1; |
| 916 | } |
| 917 | if (readcnt != JEDEC_BE_D8_INSIZE) { |
| 918 | msg_perr("BLOCK ERASE 0xd8 insize invalid!\n"); |
| 919 | return 1; |
| 920 | } |
| 921 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 922 | if (offs & (data->emu_jedec_be_d8_size - 1)) |
hailfinger | e53f5e4 | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 923 | msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs); |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 924 | offs &= ~(data->emu_jedec_be_d8_size - 1); |
| 925 | memset(flashchip_contents + offs, 0xff, data->emu_jedec_be_d8_size); |
| 926 | data->emu_modified = 1; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 927 | break; |
| 928 | case JEDEC_CE_60: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 929 | if (!data->emu_jedec_ce_60_size) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 930 | break; |
| 931 | if (writecnt != JEDEC_CE_60_OUTSIZE) { |
| 932 | msg_perr("CHIP ERASE 0x60 outsize invalid!\n"); |
| 933 | return 1; |
| 934 | } |
| 935 | if (readcnt != JEDEC_CE_60_INSIZE) { |
| 936 | msg_perr("CHIP ERASE 0x60 insize invalid!\n"); |
| 937 | return 1; |
| 938 | } |
hailfinger | e53f5e4 | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 939 | /* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */ |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 940 | /* emu_jedec_ce_60_size is emu_chip_size. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 941 | memset(flashchip_contents, 0xff, data->emu_jedec_ce_60_size); |
| 942 | data->emu_modified = 1; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 943 | break; |
| 944 | case JEDEC_CE_C7: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 945 | if (!data->emu_jedec_ce_c7_size) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 946 | break; |
| 947 | if (writecnt != JEDEC_CE_C7_OUTSIZE) { |
| 948 | msg_perr("CHIP ERASE 0xc7 outsize invalid!\n"); |
| 949 | return 1; |
| 950 | } |
| 951 | if (readcnt != JEDEC_CE_C7_INSIZE) { |
| 952 | msg_perr("CHIP ERASE 0xc7 insize invalid!\n"); |
| 953 | return 1; |
| 954 | } |
hailfinger | e53f5e4 | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 955 | /* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */ |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 956 | /* emu_jedec_ce_c7_size is emu_chip_size. */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 957 | memset(flashchip_contents, 0xff, data->emu_jedec_ce_c7_size); |
| 958 | data->emu_modified = 1; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 959 | break; |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 960 | case JEDEC_SFDP: |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 961 | if (data->emu_chip != EMULATE_MACRONIX_MX25L6436) |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 962 | break; |
| 963 | if (writecnt < 4) |
| 964 | break; |
| 965 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 966 | |
| 967 | /* SFDP expects one dummy byte after the address. */ |
| 968 | if (writecnt == 4) { |
| 969 | /* The dummy byte was not written, make sure it is read instead. |
| 970 | * Shifting and shortening the read array does achieve this goal. |
| 971 | */ |
| 972 | readarr++; |
| 973 | readcnt--; |
| 974 | } else { |
| 975 | /* The response is shifted if more than 5 bytes are written, because SFDP data is |
| 976 | * already shifted out by the chip while those superfluous bytes are written. */ |
| 977 | offs += writecnt - 5; |
| 978 | } |
| 979 | |
| 980 | /* The SFDP spec implies that the start address of an SFDP read may be truncated to fit in the |
| 981 | * SFDP table address space, i.e. the start address may be wrapped around at SFDP table size. |
| 982 | * This is a reasonable implementation choice in hardware because it saves a few gates. */ |
| 983 | if (offs >= sizeof(sfdp_table)) { |
| 984 | msg_pdbg("Wrapping the start address around the SFDP table boundary (using 0x%x " |
| 985 | "instead of 0x%x).\n", (unsigned int)(offs % sizeof(sfdp_table)), offs); |
| 986 | offs %= sizeof(sfdp_table); |
| 987 | } |
| 988 | toread = min(sizeof(sfdp_table) - offs, readcnt); |
| 989 | memcpy(readarr, sfdp_table + offs, toread); |
| 990 | if (toread < readcnt) |
| 991 | msg_pdbg("Crossing the SFDP table boundary in a single " |
| 992 | "continuous chunk produces undefined results " |
| 993 | "after that point.\n"); |
| 994 | break; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 995 | default: |
| 996 | /* No special response. */ |
| 997 | break; |
| 998 | } |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 999 | if (writearr[0] != JEDEC_WREN && writearr[0] != JEDEC_EWSR) |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1000 | data->emu_status &= ~SPI_SR_WEL; |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1001 | return 0; |
| 1002 | } |
| 1003 | #endif |
| 1004 | |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1005 | static struct emu_data* get_data_from_context(const struct flashctx *flash) |
| 1006 | { |
| 1007 | if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH)) |
| 1008 | return (struct emu_data *)flash->mst->par.data; |
| 1009 | else if (dummy_buses_supported & BUS_SPI) |
| 1010 | return (struct emu_data *)flash->mst->spi.data; |
| 1011 | |
| 1012 | return NULL; /* buses was set to BUS_NONE. */ |
| 1013 | } |
| 1014 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 1015 | static int dummy_spi_send_command(const struct flashctx *flash, unsigned int writecnt, |
| 1016 | unsigned int readcnt, |
| 1017 | const unsigned char *writearr, |
| 1018 | unsigned char *readarr) |
hailfinger | f91e3b5 | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1019 | { |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 1020 | unsigned int i; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1021 | struct emu_data *emu_data = get_data_from_context(flash); |
| 1022 | if (!emu_data) { |
| 1023 | msg_perr("No data in flash context!\n"); |
| 1024 | return 1; |
| 1025 | } |
hailfinger | f91e3b5 | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1026 | |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1027 | msg_pspew("%s:", __func__); |
hailfinger | f91e3b5 | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1028 | |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1029 | msg_pspew(" writing %u bytes:", writecnt); |
hailfinger | f91e3b5 | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1030 | for (i = 0; i < writecnt; i++) |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1031 | msg_pspew(" 0x%02x", writearr[i]); |
hailfinger | f91e3b5 | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1032 | |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1033 | /* Response for unknown commands and missing chip is 0xff. */ |
| 1034 | memset(readarr, 0xff, readcnt); |
| 1035 | #if EMULATE_SPI_CHIP |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1036 | switch (emu_data->emu_chip) { |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1037 | case EMULATE_ST_M25P10_RES: |
| 1038 | case EMULATE_SST_SST25VF040_REMS: |
| 1039 | case EMULATE_SST_SST25VF032B: |
Stuart Langley | 78cacf7 | 2020-04-23 11:48:01 +1000 | [diff] [blame] | 1040 | case EMULATE_MACRONIX_MX25L6436: |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 1041 | case EMULATE_WINBOND_W25Q128FV: |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1042 | case EMULATE_VARIABLE_SIZE: |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 1043 | if (emulate_spi_chip_response(writecnt, readcnt, writearr, |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1044 | readarr, emu_data)) { |
Carl-Daniel Hailfinger | c49783d | 2016-08-05 10:52:06 -0700 | [diff] [blame] | 1045 | msg_pdbg("Invalid command sent to flash chip!\n"); |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1046 | return 1; |
| 1047 | } |
| 1048 | break; |
| 1049 | default: |
| 1050 | break; |
| 1051 | } |
| 1052 | #endif |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1053 | msg_pspew(" reading %u bytes:", readcnt); |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 1054 | for (i = 0; i < readcnt; i++) |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1055 | msg_pspew(" 0x%02x", readarr[i]); |
hailfinger | 50c335f | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1056 | msg_pspew("\n"); |
David Hendricks | 8437700 | 2014-09-09 16:09:31 -0700 | [diff] [blame] | 1057 | |
Edward O'Callaghan | 0037f45 | 2020-09-17 13:32:00 +1000 | [diff] [blame] | 1058 | programmer_delay((writecnt + readcnt) * emu_data->delay_us); |
hailfinger | f91e3b5 | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1059 | return 0; |
| 1060 | } |
hailfinger | a872771 | 2010-06-20 10:58:32 +0000 | [diff] [blame] | 1061 | |
Stuart langley | c98e43f | 2020-03-26 20:27:36 +1100 | [diff] [blame] | 1062 | static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) |
hailfinger | c7d06c6 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 1063 | { |
hailfinger | 6ead722 | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1064 | return spi_write_chunked(flash, buf, start, len, |
| 1065 | spi_write_256_chunksize); |
hailfinger | c7d06c6 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 1066 | } |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1067 | |
| 1068 | #if EMULATE_CHIP && EMULATE_SPI_CHIP |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 1069 | int probe_variable_size(struct flashctx *flash) |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1070 | { |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 1071 | unsigned int i; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1072 | const struct emu_data *emu_data = get_data_from_context(flash); |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1073 | |
| 1074 | /* Skip the probing if we don't emulate this chip. */ |
Angel Pons | 7971a73 | 2020-10-17 15:20:27 +0200 | [diff] [blame] | 1075 | if (!emu_data || emu_data->emu_chip != EMULATE_VARIABLE_SIZE) |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1076 | return 0; |
| 1077 | |
| 1078 | /* |
Souvik Ghosh | d75cd67 | 2016-06-17 14:21:39 -0700 | [diff] [blame] | 1079 | * This will break if one day flashctx becomes read-only. |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1080 | * Once that happens, we need to have special hacks in functions: |
| 1081 | * |
| 1082 | * erase_and_write_flash() in flashrom.c |
| 1083 | * read_flash_to_file() |
| 1084 | * handle_romentries() |
| 1085 | * ... |
| 1086 | * |
| 1087 | * Search "total_size * 1024" in code. |
| 1088 | */ |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1089 | flash->chip->total_size = emu_data->emu_chip_size / 1024; |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1090 | msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__, |
Patrick Georgi | f3fa299 | 2017-02-02 16:24:44 +0100 | [diff] [blame] | 1091 | flash->chip->total_size); |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1092 | |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1093 | if (emu_data->erase_to_zero) |
Alan Green | dbeec2b | 2019-09-16 14:36:52 +1000 | [diff] [blame] | 1094 | flash->chip->feature_bits |= FEATURE_ERASED_ZERO; |
David Hendricks | 0eda2a8 | 2014-09-12 16:32:05 -0700 | [diff] [blame] | 1095 | |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 1096 | /* Update the first count of each of the block_erasers. */ |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1097 | for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { |
Patrick Georgi | f3fa299 | 2017-02-02 16:24:44 +0100 | [diff] [blame] | 1098 | struct block_eraser *eraser = &flash->chip->block_erasers[i]; |
Edward O'Callaghan | ec8b0d9 | 2020-09-17 17:27:45 +1000 | [diff] [blame] | 1099 | if (!eraser->block_erase) |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1100 | break; |
| 1101 | |
Namyoon Woo | b71a296 | 2020-08-27 16:27:49 -0700 | [diff] [blame] | 1102 | eraser->eraseblocks[0].count = 1; |
Lachlan Bishop | bf1476e | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1103 | eraser->eraseblocks[0].size = emu_data->emu_chip_size; |
Louis Yung-Chieh Lo | e53fa0f | 2011-04-11 17:18:41 +0800 | [diff] [blame] | 1104 | msg_cdbg("%s: eraser.size=%d, .count=%d\n", |
| 1105 | __func__, eraser->eraseblocks[0].size, |
| 1106 | eraser->eraseblocks[0].count); |
| 1107 | } |
| 1108 | |
| 1109 | return 1; |
| 1110 | } |
| 1111 | #endif |