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hailfingera9df33c2009-05-09 00:54:55 +00001/*
2 * This file is part of the flashrom project.
3 *
hailfinger6ead7222010-11-01 22:07:04 +00004 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
hailfingera9df33c2009-05-09 00:54:55 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
hailfinger6ead7222010-11-01 22:07:04 +00008 * the Free Software Foundation; version 2 of the License.
hailfingera9df33c2009-05-09 00:54:55 +00009 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
hailfingera9df33c2009-05-09 00:54:55 +000014 */
15
hailfingera9df33c2009-05-09 00:54:55 +000016#include <string.h>
17#include <stdlib.h>
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -070018#include <stdio.h>
19#include <ctype.h>
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +100020#include <errno.h>
hailfingera9df33c2009-05-09 00:54:55 +000021#include "flash.h"
hailfingera8727712010-06-20 10:58:32 +000022#include "chipdrivers.h"
hailfinger428f6852010-07-27 22:41:39 +000023#include "programmer.h"
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +080024#include "flashchips.h"
hailfingera9df33c2009-05-09 00:54:55 +000025
hailfinger6ead7222010-11-01 22:07:04 +000026/* Remove the #define below if you don't want SPI flash chip emulation. */
27#define EMULATE_SPI_CHIP 1
28
29#if EMULATE_SPI_CHIP
30#define EMULATE_CHIP 1
31#include "spi.h"
32#endif
33
34#if EMULATE_CHIP
35#include <sys/types.h>
36#include <sys/stat.h>
37#endif
38
39#if EMULATE_CHIP
40static uint8_t *flashchip_contents = NULL;
41enum emu_chip {
42 EMULATE_NONE,
43 EMULATE_ST_M25P10_RES,
44 EMULATE_SST_SST25VF040_REMS,
45 EMULATE_SST_SST25VF032B,
Stuart Langley78cacf72020-04-23 11:48:01 +100046 EMULATE_MACRONIX_MX25L6436,
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +100047 EMULATE_WINBOND_W25Q128FV,
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +080048 EMULATE_VARIABLE_SIZE,
hailfinger6ead7222010-11-01 22:07:04 +000049};
Stuart Langley78cacf72020-04-23 11:48:01 +100050
Lachlan Bishopbf1476e2020-09-10 14:57:05 +100051struct emu_data {
52 enum emu_chip emu_chip;
53 char *emu_persistent_image;
54 unsigned int emu_chip_size;
55 int erase_to_zero;
56 int emu_modified; /* is the image modified since reading it? */
57 uint8_t emu_status;
Edward O'Callaghan0037f452020-09-17 13:32:00 +100058 /* If "freq" parameter is passed in from command line, commands will delay
59 * for this period before returning. */
60 unsigned long int delay_us;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +100061 unsigned int emu_max_byteprogram_size;
62 unsigned int emu_max_aai_size;
63 unsigned int emu_jedec_se_size;
64 unsigned int emu_jedec_be_52_size;
65 unsigned int emu_jedec_be_d8_size;
66 unsigned int emu_jedec_ce_60_size;
67 unsigned int emu_jedec_ce_c7_size;
68 unsigned char spi_blacklist[256];
69 unsigned char spi_ignorelist[256];
70 unsigned int spi_blacklist_size;
71 unsigned int spi_ignorelist_size;
72};
73
74#if EMULATE_SPI_CHIP
Stuart Langley78cacf72020-04-23 11:48:01 +100075/* A legit complete SFDP table based on the MX25L6436E (rev. 1.8) datasheet. */
76static const uint8_t sfdp_table[] = {
77 0x53, 0x46, 0x44, 0x50, // @0x00: SFDP signature
78 0x00, 0x01, 0x01, 0xFF, // @0x04: revision 1.0, 2 headers
79 0x00, 0x00, 0x01, 0x09, // @0x08: JEDEC SFDP header rev. 1.0, 9 DW long
80 0x1C, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x1C (instead of 0x30)
81 0xC2, 0x00, 0x01, 0x04, // @0x10: Macronix header rev. 1.0, 4 DW long
82 0x48, 0x00, 0x00, 0xFF, // @0x14: PTP1 = 0x48 (instead of 0x60)
83 0xFF, 0xFF, 0xFF, 0xFF, // @0x18: hole.
84 0xE5, 0x20, 0xC9, 0xFF, // @0x1C: SFDP parameter table start
85 0xFF, 0xFF, 0xFF, 0x03, // @0x20
86 0x00, 0xFF, 0x08, 0x6B, // @0x24
87 0x08, 0x3B, 0x00, 0xFF, // @0x28
88 0xEE, 0xFF, 0xFF, 0xFF, // @0x2C
89 0xFF, 0xFF, 0x00, 0x00, // @0x30
90 0xFF, 0xFF, 0x00, 0xFF, // @0x34
91 0x0C, 0x20, 0x0F, 0x52, // @0x38
92 0x10, 0xD8, 0x00, 0xFF, // @0x3C: SFDP parameter table end
93 0xFF, 0xFF, 0xFF, 0xFF, // @0x40: hole.
94 0xFF, 0xFF, 0xFF, 0xFF, // @0x44: hole.
95 0x00, 0x36, 0x00, 0x27, // @0x48: Macronix parameter table start
96 0xF4, 0x4F, 0xFF, 0xFF, // @0x4C
97 0xD9, 0xC8, 0xFF, 0xFF, // @0x50
98 0xFF, 0xFF, 0xFF, 0xFF, // @0x54: Macronix parameter table end
99};
100
hailfinger6ead7222010-11-01 22:07:04 +0000101#endif
102#endif
103
stefanctc5eb8a92011-11-23 09:13:48 +0000104static unsigned int spi_write_256_chunksize = 256;
hailfinger6ead7222010-11-01 22:07:04 +0000105
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700106static int dummy_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Stuart langleyc98e43f2020-03-26 20:27:36 +1100107 const unsigned char *writearr, unsigned char *readarr);
Patrick Georgiab8353e2017-02-03 18:32:01 +0100108static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf,
stefanctc5eb8a92011-11-23 09:13:48 +0000109 unsigned int start, unsigned int len);
Stuart langleyc98e43f2020-03-26 20:27:36 +1100110static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
111static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
112static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
113static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
114static uint8_t dummy_chip_readb(const struct flashctx *flash, const chipaddr addr);
115static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr addr);
116static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr);
117static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
mkarcherd264e9e2011-05-11 17:07:07 +0000118
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000119static struct spi_master spi_master_dummyflasher = {
Edward O'Callaghana6673bd2019-06-24 15:22:28 +1000120 .features = SPI_MASTER_4BA,
uwe8d342eb2011-07-28 08:13:25 +0000121 .max_data_read = MAX_DATA_READ_UNLIMITED,
122 .max_data_write = MAX_DATA_UNSPECIFIED,
123 .command = dummy_spi_send_command,
124 .multicommand = default_spi_send_multicommand,
125 .read = default_spi_read,
126 .write_256 = dummy_spi_write_256,
Edward O'Callaghaneeaac6b2020-10-12 19:51:56 +1100127 .write_aai = default_spi_write_aai,
mkarcherd264e9e2011-05-11 17:07:07 +0000128};
dhendrix0ffc2eb2011-06-14 01:35:36 +0000129
Namyoon Wooc429efb2020-10-17 20:25:15 -0700130static struct par_master par_master_dummy = {
hailfinger76bb7e92011-11-09 23:40:00 +0000131 .chip_readb = dummy_chip_readb,
132 .chip_readw = dummy_chip_readw,
133 .chip_readl = dummy_chip_readl,
134 .chip_readn = dummy_chip_readn,
135 .chip_writeb = dummy_chip_writeb,
136 .chip_writew = dummy_chip_writew,
137 .chip_writel = dummy_chip_writel,
138 .chip_writen = dummy_chip_writen,
139};
140
Edward O'Callaghanef4e28b2019-06-28 13:18:41 +1000141static enum chipbustype dummy_buses_supported = BUS_NONE;
hailfinger76bb7e92011-11-09 23:40:00 +0000142
David Hendricks93784b42016-08-09 17:00:38 -0700143static int dummy_shutdown(void *data)
dhendrix0ffc2eb2011-06-14 01:35:36 +0000144{
145 msg_pspew("%s\n", __func__);
146#if EMULATE_CHIP
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000147 struct emu_data *emu_data = (struct emu_data *)data;
148 if (emu_data->emu_chip != EMULATE_NONE) {
149 if (emu_data->emu_persistent_image && emu_data->emu_modified) {
150 msg_pdbg("Writing %s\n", emu_data->emu_persistent_image);
151 write_buf_to_file(flashchip_contents,
152 emu_data->emu_chip_size,
153 emu_data->emu_persistent_image);
154 free(emu_data->emu_persistent_image);
155 emu_data->emu_persistent_image = NULL;
dhendrix0ffc2eb2011-06-14 01:35:36 +0000156 }
157 free(flashchip_contents);
158 }
159#endif
160 return 0;
161}
162
Simon Glassd2c64a22013-07-03 22:05:21 +0900163/* Values for the 'size' parameter */
164enum {
165 SIZE_UNKNOWN = -1,
166 SIZE_AUTO = -2,
167};
168
David Hendricksac1d25c2016-08-09 17:00:58 -0700169int dummy_init(void)
hailfingera9df33c2009-05-09 00:54:55 +0000170{
hailfinger1ef766d2010-07-06 09:55:48 +0000171 char *bustext = NULL;
hailfinger6ead7222010-11-01 22:07:04 +0000172 char *tmp = NULL;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000173 unsigned int i;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800174#if EMULATE_SPI_CHIP
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000175 char *status = NULL;
Simon Glassd2c64a22013-07-03 22:05:21 +0900176 int size = SIZE_UNKNOWN; /* size for generic chip */
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800177#endif
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000178#if EMULATE_CHIP
179 struct stat image_stat;
hailfinger6ead7222010-11-01 22:07:04 +0000180#endif
Simon Glassd2c64a22013-07-03 22:05:21 +0900181 int image_size = SIZE_UNKNOWN;
hailfinger1ef766d2010-07-06 09:55:48 +0000182
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000183 struct emu_data *data = calloc(1, sizeof(struct emu_data));
184 if (!data) {
185 msg_perr("Out of memory!\n");
186 return 1;
187 }
188 data->emu_chip = EMULATE_NONE;
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000189 data->delay_us = 0;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000190 spi_master_dummyflasher.data = data;
Namyoon Wooc429efb2020-10-17 20:25:15 -0700191 par_master_dummy.data = data;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000192
hailfinger50c335f2010-01-09 04:32:23 +0000193 msg_pspew("%s\n", __func__);
hailfinger668f3502009-06-01 00:02:11 +0000194
hailfingerddeb4ac2010-07-08 10:13:37 +0000195 bustext = extract_programmer_param("bus");
hailfinger1ef766d2010-07-06 09:55:48 +0000196 msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default");
197 if (!bustext)
198 bustext = strdup("parallel+lpc+fwh+spi");
hailfinger668f3502009-06-01 00:02:11 +0000199 /* Convert the parameters to lowercase. */
hailfinger1ef766d2010-07-06 09:55:48 +0000200 tolower_string(bustext);
hailfinger668f3502009-06-01 00:02:11 +0000201
hailfinger76bb7e92011-11-09 23:40:00 +0000202 dummy_buses_supported = BUS_NONE;
hailfinger1ef766d2010-07-06 09:55:48 +0000203 if (strstr(bustext, "parallel")) {
hailfinger76bb7e92011-11-09 23:40:00 +0000204 dummy_buses_supported |= BUS_PARALLEL;
hailfinger50c335f2010-01-09 04:32:23 +0000205 msg_pdbg("Enabling support for %s flash.\n", "parallel");
hailfinger668f3502009-06-01 00:02:11 +0000206 }
hailfinger1ef766d2010-07-06 09:55:48 +0000207 if (strstr(bustext, "lpc")) {
hailfinger76bb7e92011-11-09 23:40:00 +0000208 dummy_buses_supported |= BUS_LPC;
hailfinger50c335f2010-01-09 04:32:23 +0000209 msg_pdbg("Enabling support for %s flash.\n", "LPC");
hailfinger668f3502009-06-01 00:02:11 +0000210 }
hailfinger1ef766d2010-07-06 09:55:48 +0000211 if (strstr(bustext, "fwh")) {
hailfinger76bb7e92011-11-09 23:40:00 +0000212 dummy_buses_supported |= BUS_FWH;
hailfinger50c335f2010-01-09 04:32:23 +0000213 msg_pdbg("Enabling support for %s flash.\n", "FWH");
hailfinger668f3502009-06-01 00:02:11 +0000214 }
hailfinger1ef766d2010-07-06 09:55:48 +0000215 if (strstr(bustext, "spi")) {
hailfinger76bb7e92011-11-09 23:40:00 +0000216 dummy_buses_supported |= BUS_SPI;
hailfinger50c335f2010-01-09 04:32:23 +0000217 msg_pdbg("Enabling support for %s flash.\n", "SPI");
hailfinger668f3502009-06-01 00:02:11 +0000218 }
hailfinger76bb7e92011-11-09 23:40:00 +0000219 if (dummy_buses_supported == BUS_NONE)
hailfinger50c335f2010-01-09 04:32:23 +0000220 msg_pdbg("Support for all flash bus types disabled.\n");
hailfinger1ef766d2010-07-06 09:55:48 +0000221 free(bustext);
hailfinger6ead7222010-11-01 22:07:04 +0000222
223 tmp = extract_programmer_param("spi_write_256_chunksize");
224 if (tmp) {
225 spi_write_256_chunksize = atoi(tmp);
226 free(tmp);
227 if (spi_write_256_chunksize < 1) {
228 msg_perr("invalid spi_write_256_chunksize\n");
229 return 1;
230 }
231 }
232
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700233 tmp = extract_programmer_param("spi_blacklist");
234 if (tmp) {
235 i = strlen(tmp);
236 if (!strncmp(tmp, "0x", 2)) {
237 i -= 2;
238 memmove(tmp, tmp + 2, i + 1);
239 }
240 if ((i > 512) || (i % 2)) {
241 msg_perr("Invalid SPI command blacklist length\n");
242 free(tmp);
243 return 1;
244 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000245 data->spi_blacklist_size = i / 2;
246 for (i = 0; i < data->spi_blacklist_size * 2; i++) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700247 if (!isxdigit((unsigned char)tmp[i])) {
248 msg_perr("Invalid char \"%c\" in SPI command "
249 "blacklist\n", tmp[i]);
250 free(tmp);
251 return 1;
252 }
253 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000254 for (i = 0; i < data->spi_blacklist_size; i++) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700255 unsigned int tmp2;
256 /* SCNx8 is apparently not supported by MSVC (and thus
257 * MinGW), so work around it with an extra variable
258 */
259 sscanf(tmp + i * 2, "%2x", &tmp2);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000260 data->spi_blacklist[i] = (uint8_t)tmp2;
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700261 }
262 msg_pdbg("SPI blacklist is ");
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000263 for (i = 0; i < data->spi_blacklist_size; i++)
264 msg_pdbg("%02x ", data->spi_blacklist[i]);
265 msg_pdbg(", size %u\n", data->spi_blacklist_size);
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700266 }
267 free(tmp);
268
269 tmp = extract_programmer_param("spi_ignorelist");
270 if (tmp) {
271 i = strlen(tmp);
272 if (!strncmp(tmp, "0x", 2)) {
273 i -= 2;
274 memmove(tmp, tmp + 2, i + 1);
275 }
276 if ((i > 512) || (i % 2)) {
277 msg_perr("Invalid SPI command ignorelist length\n");
278 free(tmp);
279 return 1;
280 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000281 data->spi_ignorelist_size = i / 2;
282 for (i = 0; i < data->spi_ignorelist_size * 2; i++) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700283 if (!isxdigit((unsigned char)tmp[i])) {
284 msg_perr("Invalid char \"%c\" in SPI command "
285 "ignorelist\n", tmp[i]);
286 free(tmp);
287 return 1;
288 }
289 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000290 for (i = 0; i < data->spi_ignorelist_size; i++) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700291 unsigned int tmp2;
292 /* SCNx8 is apparently not supported by MSVC (and thus
293 * MinGW), so work around it with an extra variable
294 */
295 sscanf(tmp + i * 2, "%2x", &tmp2);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000296 data->spi_ignorelist[i] = (uint8_t)tmp2;
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700297 }
298 msg_pdbg("SPI ignorelist is ");
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000299 for (i = 0; i < data->spi_ignorelist_size; i++)
300 msg_pdbg("%02x ", data->spi_ignorelist[i]);
301 msg_pdbg(", size %u\n", data->spi_ignorelist_size);
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700302 }
303 free(tmp);
304
David Hendricks84377002014-09-09 16:09:31 -0700305 /* frequency to emulate in Hz (default), KHz, or MHz */
306 tmp = extract_programmer_param("freq");
307 if (tmp) {
308 unsigned long int freq;
309 char *units = tmp;
310 char *end = tmp + strlen(tmp);
311
312 errno = 0;
313 freq = strtoul(tmp, &units, 0);
314 if (errno) {
315 msg_perr("Invalid frequency \"%s\", %s\n",
316 tmp, strerror(errno));
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000317 free(tmp);
318 return 1;
David Hendricks84377002014-09-09 16:09:31 -0700319 }
320
321 if ((units > tmp) && (units < end)) {
322 int units_valid = 0;
323
324 if (units < end - 3) {
325 ;
326 } else if (units == end - 2) {
327 if (!strcasecmp(units, "hz"))
328 units_valid = 1;
329 } else if (units == end - 3) {
330 if (!strcasecmp(units, "khz")) {
331 freq *= 1000;
332 units_valid = 1;
333 } else if (!strcasecmp(units, "mhz")) {
334 freq *= 1000000;
335 units_valid = 1;
336 }
337 }
338
339 if (!units_valid) {
340 msg_perr("Invalid units: %s\n", units);
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000341 free(tmp);
David Hendricks84377002014-09-09 16:09:31 -0700342 return 1;
343 }
344 }
345
346 /* Assume we only work with bytes and transfer at 1 bit/Hz */
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000347 data->delay_us = (1000000 * 8) / freq;
David Hendricks84377002014-09-09 16:09:31 -0700348 }
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000349 free(tmp);
David Hendricks84377002014-09-09 16:09:31 -0700350
hailfinger6ead7222010-11-01 22:07:04 +0000351#if EMULATE_CHIP
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800352#if EMULATE_SPI_CHIP
353 tmp = extract_programmer_param("size");
354 if (tmp) {
Simon Glassd2c64a22013-07-03 22:05:21 +0900355 if (!strcmp(tmp, "auto"))
356 size = SIZE_AUTO;
Namyoon Wooc429efb2020-10-17 20:25:15 -0700357 else {
358 size = strtol(tmp, NULL, 10);
359 if (size <= 0 || (size % 1024 != 0)) {
360 msg_perr("%s: Chip size is not a multipler of 1024: %s\n",
361 __func__, tmp);
362 free(tmp);
363 return 1;
364 }
365 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000366 free(tmp);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800367 }
368#endif
369
hailfinger6ead7222010-11-01 22:07:04 +0000370 tmp = extract_programmer_param("emulate");
371 if (!tmp) {
372 msg_pdbg("Not emulating any flash chip.\n");
373 /* Nothing else to do. */
dhendrix0ffc2eb2011-06-14 01:35:36 +0000374 goto dummy_init_out;
hailfinger6ead7222010-11-01 22:07:04 +0000375 }
376#if EMULATE_SPI_CHIP
377 if (!strcmp(tmp, "M25P10.RES")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000378 data->emu_chip = EMULATE_ST_M25P10_RES;
379 data->emu_chip_size = 128 * 1024;
380 data->emu_max_byteprogram_size = 128;
381 data->emu_max_aai_size = 0;
382 data->emu_jedec_se_size = 0;
383 data->emu_jedec_be_52_size = 0;
384 data->emu_jedec_be_d8_size = 32 * 1024;
385 data->emu_jedec_ce_60_size = 0;
386 data->emu_jedec_ce_c7_size = data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000387 msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page "
388 "write)\n");
389 }
390 if (!strcmp(tmp, "SST25VF040.REMS")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000391 data->emu_chip = EMULATE_SST_SST25VF040_REMS;
392 data->emu_chip_size = 512 * 1024;
393 data->emu_max_byteprogram_size = 1;
394 data->emu_max_aai_size = 0;
395 data->emu_jedec_se_size = 4 * 1024;
396 data->emu_jedec_be_52_size = 32 * 1024;
397 data->emu_jedec_be_d8_size = 0;
398 data->emu_jedec_ce_60_size = data->emu_chip_size;
399 data->emu_jedec_ce_c7_size = 0;
hailfinger6ead7222010-11-01 22:07:04 +0000400 msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, "
401 "byte write)\n");
402 }
403 if (!strcmp(tmp, "SST25VF032B")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000404 data->emu_chip = EMULATE_SST_SST25VF032B;
405 data->emu_chip_size = 4 * 1024 * 1024;
406 data->emu_max_byteprogram_size = 1;
407 data->emu_max_aai_size = 2;
408 data->emu_jedec_se_size = 4 * 1024;
409 data->emu_jedec_be_52_size = 32 * 1024;
410 data->emu_jedec_be_d8_size = 64 * 1024;
411 data->emu_jedec_ce_60_size = data->emu_chip_size;
412 data->emu_jedec_ce_c7_size = data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000413 msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI "
414 "write)\n");
415 }
Stuart Langley78cacf72020-04-23 11:48:01 +1000416 if (!strcmp(tmp, "MX25L6436")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000417 data->emu_chip = EMULATE_MACRONIX_MX25L6436;
418 data->emu_chip_size = 8 * 1024 * 1024;
419 data->emu_max_byteprogram_size = 256;
420 data->emu_max_aai_size = 0;
421 data->emu_jedec_se_size = 4 * 1024;
422 data->emu_jedec_be_52_size = 32 * 1024;
423 data->emu_jedec_be_d8_size = 64 * 1024;
424 data->emu_jedec_ce_60_size = data->emu_chip_size;
425 data->emu_jedec_ce_c7_size = data->emu_chip_size;
Stuart Langley78cacf72020-04-23 11:48:01 +1000426 msg_pdbg("Emulating Macronix MX25L6436 SPI flash chip (RDID, "
427 "SFDP)\n");
428 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000429 if (!strcmp(tmp, "W25Q128FV")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000430 data->emu_chip = EMULATE_WINBOND_W25Q128FV;
431 data->emu_chip_size = 16 * 1024 * 1024;
432 data->emu_max_byteprogram_size = 256;
433 data->emu_max_aai_size = 0;
434 data->emu_jedec_se_size = 4 * 1024;
435 data->emu_jedec_be_52_size = 32 * 1024;
436 data->emu_jedec_be_d8_size = 64 * 1024;
437 data->emu_jedec_ce_60_size = data->emu_chip_size;
438 data->emu_jedec_ce_c7_size = data->emu_chip_size;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000439 msg_pdbg("Emulating Winbond W25Q128FV SPI flash chip (RDID)\n");
440 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000441 data->emu_persistent_image = extract_programmer_param("image");
442 if (!stat(data->emu_persistent_image, &image_stat))
Simon Glassd2c64a22013-07-03 22:05:21 +0900443 image_size = image_stat.st_size;
444
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000445 /* The name of variable-size virtual chip. A 4 MiB flash example:
446 * flashrom -p dummy:emulate=VARIABLE_SIZE,size=4194304
447 */
448 if (!strcmp(tmp, "VARIABLE_SIZE")) {
Simon Glassd2c64a22013-07-03 22:05:21 +0900449 if (size == SIZE_UNKNOWN) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000450 msg_perr("%s: the size parameter is not given.\n", __func__);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800451 free(tmp);
452 return 1;
Simon Glassd2c64a22013-07-03 22:05:21 +0900453 } else if (size == SIZE_AUTO) {
454 if (image_size == SIZE_UNKNOWN) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000455 msg_perr("%s: no image so cannot use automatic size.\n", __func__);
Simon Glassd2c64a22013-07-03 22:05:21 +0900456 free(tmp);
457 return 1;
458 }
459 size = image_size;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800460 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000461 data->emu_chip = EMULATE_VARIABLE_SIZE;
462 data->emu_chip_size = size;
463 data->emu_max_byteprogram_size = 256;
464 data->emu_max_aai_size = 0;
465 data->emu_jedec_se_size = 4 * 1024;
466 data->emu_jedec_be_52_size = 32 * 1024;
467 data->emu_jedec_be_d8_size = 64 * 1024;
468 data->emu_jedec_ce_60_size = data->emu_chip_size;
469 data->emu_jedec_ce_c7_size = data->emu_chip_size;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800470 msg_pdbg("Emulating generic SPI flash chip (size=%d bytes)\n",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000471 data->emu_chip_size);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800472 }
hailfinger6ead7222010-11-01 22:07:04 +0000473#endif
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000474 if (data->emu_chip == EMULATE_NONE) {
hailfinger6ead7222010-11-01 22:07:04 +0000475 msg_perr("Invalid chip specified for emulation: %s\n", tmp);
476 free(tmp);
477 return 1;
478 }
David Hendricks0eda2a82014-09-12 16:32:05 -0700479
480 /* Should emulated flash erase to zero (yes/no)? */
481 tmp = extract_programmer_param("erase_to_zero");
482 if (tmp) {
483 if (!strcmp(tmp, "yes")) {
484 msg_pdbg("Emulated chip will erase to 0x00\n");
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000485 data->erase_to_zero = 1;
David Hendricks0eda2a82014-09-12 16:32:05 -0700486 } else if (!strcmp(tmp, "no")) {
487 msg_pdbg("Emulated chip will erase to 0xff\n");
488 } else {
489 msg_perr("erase_to_zero can be \"yes\" or \"no\"\n");
490 return 1;
491 }
492 }
493
hailfinger6ead7222010-11-01 22:07:04 +0000494 free(tmp);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000495 flashchip_contents = malloc(data->emu_chip_size);
hailfinger6ead7222010-11-01 22:07:04 +0000496 if (!flashchip_contents) {
497 msg_perr("Out of memory!\n");
498 return 1;
499 }
dhendrix0ffc2eb2011-06-14 01:35:36 +0000500
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000501#ifdef EMULATE_SPI_CHIP
502 status = extract_programmer_param("spi_status");
503 if (status) {
504 char *endptr;
505 errno = 0;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000506 data->emu_status = strtoul(status, &endptr, 0);
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000507 free(status);
508 if (errno != 0 || status == endptr) {
509 msg_perr("Error: initial status register specified, "
510 "but the value could not be converted.\n");
511 return 1;
512 }
513 msg_pdbg("Initial status register is set to 0x%02x.\n",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000514 data->emu_status);
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000515 }
516#endif
517
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000518 msg_pdbg("Filling fake flash chip with 0x%02x, size %i\n",
519 data->erase_to_zero ? 0x00 : 0xff, data->emu_chip_size);
520 memset(flashchip_contents, data->erase_to_zero ? 0x00 : 0xff, data->emu_chip_size);
521
522 /* Will be freed by shutdown function if necessary. */
523 if (!data->emu_persistent_image) {
hailfinger6ead7222010-11-01 22:07:04 +0000524 /* Nothing else to do. */
dhendrix0ffc2eb2011-06-14 01:35:36 +0000525 goto dummy_init_out;
hailfinger6ead7222010-11-01 22:07:04 +0000526 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000527
528 /* We will silently (in default verbosity) ignore the file if it does not exist (yet) or the size does
529 * not match the emulated chip. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000530 if (!stat(data->emu_persistent_image, &image_stat)) {
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000531 msg_pdbg("Found persistent image %s, %jd B ",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000532 data->emu_persistent_image, (intmax_t)image_stat.st_size);
533 if ((uintmax_t)image_stat.st_size == data->emu_chip_size) {
hailfinger6ead7222010-11-01 22:07:04 +0000534 msg_pdbg("matches.\n");
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000535 msg_pdbg("Reading %s\n", data->emu_persistent_image);
536 if (read_buf_from_file(flashchip_contents, data->emu_chip_size,
537 data->emu_persistent_image)) {
538 msg_perr("Unable to read %s\n", data->emu_persistent_image);
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000539 free(flashchip_contents);
540 return 1;
541 }
hailfinger6ead7222010-11-01 22:07:04 +0000542 } else {
543 msg_pdbg("doesn't match.\n");
544 }
545 }
546#endif
hailfingera9df33c2009-05-09 00:54:55 +0000547
dhendrix0ffc2eb2011-06-14 01:35:36 +0000548dummy_init_out:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000549 if (register_shutdown(dummy_shutdown, data)) {
hailfinger6ead7222010-11-01 22:07:04 +0000550 free(flashchip_contents);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000551 free(data);
dhendrix0ffc2eb2011-06-14 01:35:36 +0000552 return 1;
hailfinger6ead7222010-11-01 22:07:04 +0000553 }
hailfinger76bb7e92011-11-09 23:40:00 +0000554 if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))
Patrick Georgi0a9533a2017-02-03 19:28:38 +0100555 register_par_master(&par_master_dummy,
Stuart langleyc98e43f2020-03-26 20:27:36 +1100556 dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH));
hailfinger76bb7e92011-11-09 23:40:00 +0000557 if (dummy_buses_supported & BUS_SPI)
Patrick Georgif4f1e2f2017-03-10 17:38:40 +0100558 register_spi_master(&spi_master_dummyflasher);
hailfinger76bb7e92011-11-09 23:40:00 +0000559
hailfingera9df33c2009-05-09 00:54:55 +0000560 return 0;
561}
562
Patrick Georgi4befc162017-02-03 18:32:01 +0100563void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len)
hailfinger11ae3c42009-05-11 14:13:25 +0000564{
Stuart langleyc98e43f2020-03-26 20:27:36 +1100565 msg_pspew("%s: Mapping %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n",
566 __func__, descr, len, PRIxPTR_WIDTH, phys_addr);
hailfinger11ae3c42009-05-11 14:13:25 +0000567 return (void *)phys_addr;
568}
569
570void dummy_unmap(void *virt_addr, size_t len)
571{
Stuart langleyc98e43f2020-03-26 20:27:36 +1100572 msg_pspew("%s: Unmapping 0x%zx bytes at %p\n", __func__, len, virt_addr);
hailfinger11ae3c42009-05-11 14:13:25 +0000573}
574
Stuart langleyc98e43f2020-03-26 20:27:36 +1100575static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000576{
Kangheui Won4974cc12019-10-18 12:59:01 +1100577 msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%02x\n", __func__, addr, val);
hailfingera9df33c2009-05-09 00:54:55 +0000578}
579
Stuart langleyc98e43f2020-03-26 20:27:36 +1100580static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000581{
Kangheui Won4974cc12019-10-18 12:59:01 +1100582 msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%04x\n", __func__, addr, val);
hailfingera9df33c2009-05-09 00:54:55 +0000583}
584
Stuart langleyc98e43f2020-03-26 20:27:36 +1100585static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000586{
Kangheui Won4974cc12019-10-18 12:59:01 +1100587 msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%08x\n", __func__, addr, val);
hailfingera9df33c2009-05-09 00:54:55 +0000588}
589
Stuart langleyc98e43f2020-03-26 20:27:36 +1100590static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len)
hailfinger9d987ef2009-06-05 18:32:07 +0000591{
592 size_t i;
Stuart langleyc98e43f2020-03-26 20:27:36 +1100593 msg_pspew("%s: addr=0x%" PRIxPTR ", len=0x%zx, writing data (hex):", __func__, addr, len);
hailfinger9d987ef2009-06-05 18:32:07 +0000594 for (i = 0; i < len; i++) {
595 if ((i % 16) == 0)
hailfinger50c335f2010-01-09 04:32:23 +0000596 msg_pspew("\n");
597 msg_pspew("%02x ", buf[i]);
hailfinger9d987ef2009-06-05 18:32:07 +0000598 }
599}
600
Stuart langleyc98e43f2020-03-26 20:27:36 +1100601static uint8_t dummy_chip_readb(const struct flashctx *flash, const chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000602{
Kangheui Won4974cc12019-10-18 12:59:01 +1100603 msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xff\n", __func__, addr);
hailfingera9df33c2009-05-09 00:54:55 +0000604 return 0xff;
605}
606
Stuart langleyc98e43f2020-03-26 20:27:36 +1100607static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000608{
Kangheui Won4974cc12019-10-18 12:59:01 +1100609 msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xffff\n", __func__, addr);
hailfingera9df33c2009-05-09 00:54:55 +0000610 return 0xffff;
611}
612
Stuart langleyc98e43f2020-03-26 20:27:36 +1100613static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000614{
Kangheui Won4974cc12019-10-18 12:59:01 +1100615 msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xffffffff\n", __func__, addr);
hailfingera9df33c2009-05-09 00:54:55 +0000616 return 0xffffffff;
617}
618
Stuart langleyc98e43f2020-03-26 20:27:36 +1100619static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len)
hailfinger9d987ef2009-06-05 18:32:07 +0000620{
Stuart langleyc98e43f2020-03-26 20:27:36 +1100621 msg_pspew("%s: addr=0x%" PRIxPTR ", len=0x%zx, returning array of 0xff\n", __func__, addr, len);
hailfinger9d987ef2009-06-05 18:32:07 +0000622 memset(buf, 0xff, len);
623 return;
624}
625
hailfinger6ead7222010-11-01 22:07:04 +0000626#if EMULATE_SPI_CHIP
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000627static int emulate_spi_chip_response(unsigned int writecnt,
628 unsigned int readcnt,
629 const unsigned char *writearr,
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000630 unsigned char *readarr,
631 struct emu_data *data)
hailfinger6ead7222010-11-01 22:07:04 +0000632{
Stuart Langley78cacf72020-04-23 11:48:01 +1000633 unsigned int offs, i, toread;
stefanctc5eb8a92011-11-23 09:13:48 +0000634 static int unsigned aai_offs;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000635 const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44};
636 const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a};
637 const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16};
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000638 const unsigned char w25q128fv_rems_response[2] = {0xef, 0x17};
hailfinger6ead7222010-11-01 22:07:04 +0000639
640 if (writecnt == 0) {
641 msg_perr("No command sent to the chip!\n");
642 return 1;
643 }
Stefan Tauner718d1eb2016-08-18 18:00:53 -0700644 /* spi_blacklist has precedence over spi_ignorelist. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000645 for (i = 0; i < data->spi_blacklist_size; i++) {
646 if (writearr[0] == data->spi_blacklist[i]) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700647 msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000648 data->spi_blacklist[i]);
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700649 return SPI_INVALID_OPCODE;
650 }
651 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000652 for (i = 0; i < data->spi_ignorelist_size; i++) {
653 if (writearr[0] == data->spi_ignorelist[i]) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700654 msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000655 data->spi_ignorelist[i]);
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700656 /* Return success because the command does not fail,
657 * it is simply ignored.
658 */
659 return 0;
660 }
661 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000662
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000663 if (data->emu_max_aai_size && (data->emu_status & SPI_SR_AAI)) {
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000664 if (writearr[0] != JEDEC_AAI_WORD_PROGRAM &&
665 writearr[0] != JEDEC_WRDI &&
666 writearr[0] != JEDEC_RDSR) {
667 msg_perr("Forbidden opcode (0x%02x) attempted during "
668 "AAI sequence!\n", writearr[0]);
669 return 0;
670 }
671 }
672
hailfinger6ead7222010-11-01 22:07:04 +0000673 switch (writearr[0]) {
674 case JEDEC_RES:
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000675 if (writecnt < JEDEC_RES_OUTSIZE)
hailfinger6ead7222010-11-01 22:07:04 +0000676 break;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000677 /* offs calculation is only needed for SST chips which treat RES like REMS. */
678 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
679 offs += writecnt - JEDEC_REMS_OUTSIZE;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000680 switch (data->emu_chip) {
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000681 case EMULATE_ST_M25P10_RES:
682 if (readcnt > 0)
683 memset(readarr, 0x10, readcnt);
684 break;
685 case EMULATE_SST_SST25VF040_REMS:
686 for (i = 0; i < readcnt; i++)
687 readarr[i] = sst25vf040_rems_response[(offs + i) % 2];
688 break;
689 case EMULATE_SST_SST25VF032B:
690 for (i = 0; i < readcnt; i++)
691 readarr[i] = sst25vf032b_rems_response[(offs + i) % 2];
692 break;
693 case EMULATE_MACRONIX_MX25L6436:
694 if (readcnt > 0)
695 memset(readarr, 0x16, readcnt);
696 break;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000697 case EMULATE_WINBOND_W25Q128FV:
698 if (readcnt > 0)
699 memset(readarr, 0x17, readcnt);
700 break;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000701 default: /* ignore */
702 break;
703 }
hailfinger6ead7222010-11-01 22:07:04 +0000704 break;
705 case JEDEC_REMS:
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000706 /* REMS response has wraparound and uses an address parameter. */
707 if (writecnt < JEDEC_REMS_OUTSIZE)
hailfinger6ead7222010-11-01 22:07:04 +0000708 break;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000709 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
710 offs += writecnt - JEDEC_REMS_OUTSIZE;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000711 switch (data->emu_chip) {
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000712 case EMULATE_SST_SST25VF040_REMS:
713 for (i = 0; i < readcnt; i++)
714 readarr[i] = sst25vf040_rems_response[(offs + i) % 2];
715 break;
716 case EMULATE_SST_SST25VF032B:
717 for (i = 0; i < readcnt; i++)
718 readarr[i] = sst25vf032b_rems_response[(offs + i) % 2];
719 break;
720 case EMULATE_MACRONIX_MX25L6436:
721 for (i = 0; i < readcnt; i++)
722 readarr[i] = mx25l6436_rems_response[(offs + i) % 2];
723 break;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000724 case EMULATE_WINBOND_W25Q128FV:
725 for (i = 0; i < readcnt; i++)
726 readarr[i] = w25q128fv_rems_response[(offs + i) % 2];
727 break;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000728 default: /* ignore */
729 break;
730 }
hailfinger6ead7222010-11-01 22:07:04 +0000731 break;
732 case JEDEC_RDID:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000733 switch (data->emu_chip) {
Stuart Langley78cacf72020-04-23 11:48:01 +1000734 case EMULATE_SST_SST25VF032B:
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800735 if (readcnt > 0)
736 readarr[0] = 0xbf;
737 if (readcnt > 1)
738 readarr[1] = 0x25;
739 if (readcnt > 2)
740 readarr[2] = 0x4a;
Stuart Langley78cacf72020-04-23 11:48:01 +1000741 break;
742 case EMULATE_MACRONIX_MX25L6436:
743 if (readcnt > 0)
744 readarr[0] = 0xc2;
745 if (readcnt > 1)
746 readarr[1] = 0x20;
747 if (readcnt > 2)
748 readarr[2] = 0x17;
749 break;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000750 case EMULATE_WINBOND_W25Q128FV:
751 if (readcnt > 0)
752 readarr[0] = 0xef;
753 if (readcnt > 1)
754 readarr[1] = 0x40;
755 if (readcnt > 2)
756 readarr[2] = 0x18;
757 break;
Edward O'Callaghane0772312020-09-16 17:57:19 +1000758 case EMULATE_VARIABLE_SIZE:
759 if (readcnt > 0)
760 readarr[0] = (PROGMANUF_ID >> 8) & 0xff;
761 if (readcnt > 1)
762 readarr[1] = PROGMANUF_ID & 0xff;
763 if (readcnt > 2)
764 readarr[2] = (PROGDEV_ID >> 8) & 0xff;
765 if (readcnt > 3)
766 readarr[3] = PROGDEV_ID & 0xff;
Stuart Langley78cacf72020-04-23 11:48:01 +1000767 break;
Stuart Langley78cacf72020-04-23 11:48:01 +1000768 default: /* ignore */
769 break;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800770 }
hailfinger6ead7222010-11-01 22:07:04 +0000771 break;
772 case JEDEC_RDSR:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000773 memset(readarr, data->emu_status, readcnt);
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000774 break;
775 /* FIXME: this should be chip-specific. */
776 case JEDEC_EWSR:
777 case JEDEC_WREN:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000778 data->emu_status |= SPI_SR_WEL;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000779 break;
780 case JEDEC_WRSR:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000781 if (!(data->emu_status & SPI_SR_WEL)) {
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000782 msg_perr("WRSR attempted, but WEL is 0!\n");
783 break;
784 }
785 /* FIXME: add some reasonable simulation of the busy flag */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000786 data->emu_status = writearr[1] & ~SPI_SR_WIP;
787 msg_pdbg2("WRSR wrote 0x%02x.\n", data->emu_status);
hailfinger6ead7222010-11-01 22:07:04 +0000788 break;
789 case JEDEC_READ:
790 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
791 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000792 offs %= data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000793 if (readcnt > 0)
794 memcpy(readarr, flashchip_contents + offs, readcnt);
795 break;
Namyoon Woob71a2962020-08-27 16:27:49 -0700796 case JEDEC_READ_4BA:
797 offs = writearr[1] << 24 | writearr[2] << 16 | writearr[3] << 8 | writearr[4];
798 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000799 offs %= data->emu_chip_size;
Namyoon Woob71a2962020-08-27 16:27:49 -0700800 if (readcnt > 0)
801 memcpy(readarr, flashchip_contents + offs, readcnt);
802 break;
hailfinger6ead7222010-11-01 22:07:04 +0000803 case JEDEC_BYTE_PROGRAM:
804 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
805 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000806 offs %= data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000807 if (writecnt < 5) {
808 msg_perr("BYTE PROGRAM size too short!\n");
809 return 1;
810 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000811 if (writecnt - 4 > data->emu_max_byteprogram_size) {
hailfinger6ead7222010-11-01 22:07:04 +0000812 msg_perr("Max BYTE PROGRAM size exceeded!\n");
813 return 1;
814 }
815 memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000816 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000817 break;
Namyoon Woob71a2962020-08-27 16:27:49 -0700818 case JEDEC_BYTE_PROGRAM_4BA:
819 offs = writearr[1] << 24 | writearr[2] << 16 | writearr[3] << 8 | writearr[4];
820 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000821 offs %= data->emu_chip_size;
Namyoon Woob71a2962020-08-27 16:27:49 -0700822 if (writecnt < 6) {
823 msg_perr("BYTE PROGRAM size too short!\n");
824 return 1;
825 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000826 if (writecnt - 5 > data->emu_max_byteprogram_size) {
Namyoon Woob71a2962020-08-27 16:27:49 -0700827 msg_perr("Max BYTE PROGRAM size exceeded!\n");
828 return 1;
829 }
830 memcpy(flashchip_contents + offs, writearr + 5, writecnt - 5);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000831 data->emu_modified = 1;
Namyoon Woob71a2962020-08-27 16:27:49 -0700832 break;
hailfinger6ead7222010-11-01 22:07:04 +0000833 case JEDEC_AAI_WORD_PROGRAM:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000834 if (!data->emu_max_aai_size)
hailfinger6ead7222010-11-01 22:07:04 +0000835 break;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000836 if (!(data->emu_status & SPI_SR_AAI)) {
hailfinger6ead7222010-11-01 22:07:04 +0000837 if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
838 msg_perr("Initial AAI WORD PROGRAM size too "
839 "short!\n");
840 return 1;
841 }
842 if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
843 msg_perr("Initial AAI WORD PROGRAM size too "
844 "long!\n");
845 return 1;
846 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000847 data->emu_status |= SPI_SR_AAI;
hailfinger6ead7222010-11-01 22:07:04 +0000848 aai_offs = writearr[1] << 16 | writearr[2] << 8 |
849 writearr[3];
850 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000851 aai_offs %= data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000852 memcpy(flashchip_contents + aai_offs, writearr + 4, 2);
853 aai_offs += 2;
854 } else {
855 if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {
856 msg_perr("Continuation AAI WORD PROGRAM size "
857 "too short!\n");
858 return 1;
859 }
860 if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {
861 msg_perr("Continuation AAI WORD PROGRAM size "
862 "too long!\n");
863 return 1;
864 }
865 memcpy(flashchip_contents + aai_offs, writearr + 1, 2);
866 aai_offs += 2;
867 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000868 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000869 break;
870 case JEDEC_WRDI:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000871 if (data->emu_max_aai_size)
872 data->emu_status &= ~SPI_SR_AAI;
hailfinger6ead7222010-11-01 22:07:04 +0000873 break;
874 case JEDEC_SE:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000875 if (!data->emu_jedec_se_size)
hailfinger6ead7222010-11-01 22:07:04 +0000876 break;
877 if (writecnt != JEDEC_SE_OUTSIZE) {
878 msg_perr("SECTOR ERASE 0x20 outsize invalid!\n");
879 return 1;
880 }
881 if (readcnt != JEDEC_SE_INSIZE) {
882 msg_perr("SECTOR ERASE 0x20 insize invalid!\n");
883 return 1;
884 }
885 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000886 if (offs & (data->emu_jedec_se_size - 1))
hailfingere53f5e42011-02-04 22:52:04 +0000887 msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000888 offs &= ~(data->emu_jedec_se_size - 1);
889 memset(flashchip_contents + offs, 0xff, data->emu_jedec_se_size);
890 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000891 break;
892 case JEDEC_BE_52:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000893 if (!data->emu_jedec_be_52_size)
hailfinger6ead7222010-11-01 22:07:04 +0000894 break;
895 if (writecnt != JEDEC_BE_52_OUTSIZE) {
896 msg_perr("BLOCK ERASE 0x52 outsize invalid!\n");
897 return 1;
898 }
899 if (readcnt != JEDEC_BE_52_INSIZE) {
900 msg_perr("BLOCK ERASE 0x52 insize invalid!\n");
901 return 1;
902 }
903 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000904 if (offs & (data->emu_jedec_be_52_size - 1))
hailfingere53f5e42011-02-04 22:52:04 +0000905 msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000906 offs &= ~(data->emu_jedec_be_52_size - 1);
907 memset(flashchip_contents + offs, 0xff, data->emu_jedec_be_52_size);
908 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000909 break;
910 case JEDEC_BE_D8:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000911 if (!data->emu_jedec_be_d8_size)
hailfinger6ead7222010-11-01 22:07:04 +0000912 break;
913 if (writecnt != JEDEC_BE_D8_OUTSIZE) {
914 msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n");
915 return 1;
916 }
917 if (readcnt != JEDEC_BE_D8_INSIZE) {
918 msg_perr("BLOCK ERASE 0xd8 insize invalid!\n");
919 return 1;
920 }
921 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000922 if (offs & (data->emu_jedec_be_d8_size - 1))
hailfingere53f5e42011-02-04 22:52:04 +0000923 msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000924 offs &= ~(data->emu_jedec_be_d8_size - 1);
925 memset(flashchip_contents + offs, 0xff, data->emu_jedec_be_d8_size);
926 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000927 break;
928 case JEDEC_CE_60:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000929 if (!data->emu_jedec_ce_60_size)
hailfinger6ead7222010-11-01 22:07:04 +0000930 break;
931 if (writecnt != JEDEC_CE_60_OUTSIZE) {
932 msg_perr("CHIP ERASE 0x60 outsize invalid!\n");
933 return 1;
934 }
935 if (readcnt != JEDEC_CE_60_INSIZE) {
936 msg_perr("CHIP ERASE 0x60 insize invalid!\n");
937 return 1;
938 }
hailfingere53f5e42011-02-04 22:52:04 +0000939 /* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */
hailfinger6ead7222010-11-01 22:07:04 +0000940 /* emu_jedec_ce_60_size is emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000941 memset(flashchip_contents, 0xff, data->emu_jedec_ce_60_size);
942 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000943 break;
944 case JEDEC_CE_C7:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000945 if (!data->emu_jedec_ce_c7_size)
hailfinger6ead7222010-11-01 22:07:04 +0000946 break;
947 if (writecnt != JEDEC_CE_C7_OUTSIZE) {
948 msg_perr("CHIP ERASE 0xc7 outsize invalid!\n");
949 return 1;
950 }
951 if (readcnt != JEDEC_CE_C7_INSIZE) {
952 msg_perr("CHIP ERASE 0xc7 insize invalid!\n");
953 return 1;
954 }
hailfingere53f5e42011-02-04 22:52:04 +0000955 /* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */
hailfinger6ead7222010-11-01 22:07:04 +0000956 /* emu_jedec_ce_c7_size is emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000957 memset(flashchip_contents, 0xff, data->emu_jedec_ce_c7_size);
958 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000959 break;
Stuart Langley78cacf72020-04-23 11:48:01 +1000960 case JEDEC_SFDP:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000961 if (data->emu_chip != EMULATE_MACRONIX_MX25L6436)
Stuart Langley78cacf72020-04-23 11:48:01 +1000962 break;
963 if (writecnt < 4)
964 break;
965 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
966
967 /* SFDP expects one dummy byte after the address. */
968 if (writecnt == 4) {
969 /* The dummy byte was not written, make sure it is read instead.
970 * Shifting and shortening the read array does achieve this goal.
971 */
972 readarr++;
973 readcnt--;
974 } else {
975 /* The response is shifted if more than 5 bytes are written, because SFDP data is
976 * already shifted out by the chip while those superfluous bytes are written. */
977 offs += writecnt - 5;
978 }
979
980 /* The SFDP spec implies that the start address of an SFDP read may be truncated to fit in the
981 * SFDP table address space, i.e. the start address may be wrapped around at SFDP table size.
982 * This is a reasonable implementation choice in hardware because it saves a few gates. */
983 if (offs >= sizeof(sfdp_table)) {
984 msg_pdbg("Wrapping the start address around the SFDP table boundary (using 0x%x "
985 "instead of 0x%x).\n", (unsigned int)(offs % sizeof(sfdp_table)), offs);
986 offs %= sizeof(sfdp_table);
987 }
988 toread = min(sizeof(sfdp_table) - offs, readcnt);
989 memcpy(readarr, sfdp_table + offs, toread);
990 if (toread < readcnt)
991 msg_pdbg("Crossing the SFDP table boundary in a single "
992 "continuous chunk produces undefined results "
993 "after that point.\n");
994 break;
hailfinger6ead7222010-11-01 22:07:04 +0000995 default:
996 /* No special response. */
997 break;
998 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000999 if (writearr[0] != JEDEC_WREN && writearr[0] != JEDEC_EWSR)
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001000 data->emu_status &= ~SPI_SR_WEL;
hailfinger6ead7222010-11-01 22:07:04 +00001001 return 0;
1002}
1003#endif
1004
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001005static struct emu_data* get_data_from_context(const struct flashctx *flash)
1006{
1007 if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))
1008 return (struct emu_data *)flash->mst->par.data;
1009 else if (dummy_buses_supported & BUS_SPI)
1010 return (struct emu_data *)flash->mst->spi.data;
1011
1012 return NULL; /* buses was set to BUS_NONE. */
1013}
1014
Stuart langleyc98e43f2020-03-26 20:27:36 +11001015static int dummy_spi_send_command(const struct flashctx *flash, unsigned int writecnt,
1016 unsigned int readcnt,
1017 const unsigned char *writearr,
1018 unsigned char *readarr)
hailfingerf91e3b52009-05-14 12:59:36 +00001019{
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001020 unsigned int i;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001021 struct emu_data *emu_data = get_data_from_context(flash);
1022 if (!emu_data) {
1023 msg_perr("No data in flash context!\n");
1024 return 1;
1025 }
hailfingerf91e3b52009-05-14 12:59:36 +00001026
hailfinger50c335f2010-01-09 04:32:23 +00001027 msg_pspew("%s:", __func__);
hailfingerf91e3b52009-05-14 12:59:36 +00001028
hailfinger50c335f2010-01-09 04:32:23 +00001029 msg_pspew(" writing %u bytes:", writecnt);
hailfingerf91e3b52009-05-14 12:59:36 +00001030 for (i = 0; i < writecnt; i++)
hailfinger50c335f2010-01-09 04:32:23 +00001031 msg_pspew(" 0x%02x", writearr[i]);
hailfingerf91e3b52009-05-14 12:59:36 +00001032
hailfinger6ead7222010-11-01 22:07:04 +00001033 /* Response for unknown commands and missing chip is 0xff. */
1034 memset(readarr, 0xff, readcnt);
1035#if EMULATE_SPI_CHIP
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001036 switch (emu_data->emu_chip) {
hailfinger6ead7222010-11-01 22:07:04 +00001037 case EMULATE_ST_M25P10_RES:
1038 case EMULATE_SST_SST25VF040_REMS:
1039 case EMULATE_SST_SST25VF032B:
Stuart Langley78cacf72020-04-23 11:48:01 +10001040 case EMULATE_MACRONIX_MX25L6436:
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001041 case EMULATE_WINBOND_W25Q128FV:
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001042 case EMULATE_VARIABLE_SIZE:
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001043 if (emulate_spi_chip_response(writecnt, readcnt, writearr,
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001044 readarr, emu_data)) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -07001045 msg_pdbg("Invalid command sent to flash chip!\n");
hailfinger6ead7222010-11-01 22:07:04 +00001046 return 1;
1047 }
1048 break;
1049 default:
1050 break;
1051 }
1052#endif
hailfinger50c335f2010-01-09 04:32:23 +00001053 msg_pspew(" reading %u bytes:", readcnt);
uwe8d342eb2011-07-28 08:13:25 +00001054 for (i = 0; i < readcnt; i++)
hailfinger6ead7222010-11-01 22:07:04 +00001055 msg_pspew(" 0x%02x", readarr[i]);
hailfinger50c335f2010-01-09 04:32:23 +00001056 msg_pspew("\n");
David Hendricks84377002014-09-09 16:09:31 -07001057
Edward O'Callaghan0037f452020-09-17 13:32:00 +10001058 programmer_delay((writecnt + readcnt) * emu_data->delay_us);
hailfingerf91e3b52009-05-14 12:59:36 +00001059 return 0;
1060}
hailfingera8727712010-06-20 10:58:32 +00001061
Stuart langleyc98e43f2020-03-26 20:27:36 +11001062static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
hailfingerc7d06c62010-07-14 16:19:05 +00001063{
hailfinger6ead7222010-11-01 22:07:04 +00001064 return spi_write_chunked(flash, buf, start, len,
1065 spi_write_256_chunksize);
hailfingerc7d06c62010-07-14 16:19:05 +00001066}
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001067
1068#if EMULATE_CHIP && EMULATE_SPI_CHIP
Souvik Ghoshd75cd672016-06-17 14:21:39 -07001069int probe_variable_size(struct flashctx *flash)
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001070{
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001071 unsigned int i;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001072 const struct emu_data *emu_data = get_data_from_context(flash);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001073
1074 /* Skip the probing if we don't emulate this chip. */
Angel Pons7971a732020-10-17 15:20:27 +02001075 if (!emu_data || emu_data->emu_chip != EMULATE_VARIABLE_SIZE)
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001076 return 0;
1077
1078 /*
Souvik Ghoshd75cd672016-06-17 14:21:39 -07001079 * This will break if one day flashctx becomes read-only.
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001080 * Once that happens, we need to have special hacks in functions:
1081 *
1082 * erase_and_write_flash() in flashrom.c
1083 * read_flash_to_file()
1084 * handle_romentries()
1085 * ...
1086 *
1087 * Search "total_size * 1024" in code.
1088 */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001089 flash->chip->total_size = emu_data->emu_chip_size / 1024;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001090 msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
Patrick Georgif3fa2992017-02-02 16:24:44 +01001091 flash->chip->total_size);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001092
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001093 if (emu_data->erase_to_zero)
Alan Greendbeec2b2019-09-16 14:36:52 +10001094 flash->chip->feature_bits |= FEATURE_ERASED_ZERO;
David Hendricks0eda2a82014-09-12 16:32:05 -07001095
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001096 /* Update the first count of each of the block_erasers. */
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001097 for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
Patrick Georgif3fa2992017-02-02 16:24:44 +01001098 struct block_eraser *eraser = &flash->chip->block_erasers[i];
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001099 if (!eraser->block_erase)
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001100 break;
1101
Namyoon Woob71a2962020-08-27 16:27:49 -07001102 eraser->eraseblocks[0].count = 1;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001103 eraser->eraseblocks[0].size = emu_data->emu_chip_size;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001104 msg_cdbg("%s: eraser.size=%d, .count=%d\n",
1105 __func__, eraser->eraseblocks[0].size,
1106 eraser->eraseblocks[0].count);
1107 }
1108
1109 return 1;
1110}
1111#endif