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hailfingera9df33c2009-05-09 00:54:55 +00001/*
2 * This file is part of the flashrom project.
3 *
hailfinger6ead7222010-11-01 22:07:04 +00004 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
hailfingera9df33c2009-05-09 00:54:55 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
hailfinger6ead7222010-11-01 22:07:04 +00008 * the Free Software Foundation; version 2 of the License.
hailfingera9df33c2009-05-09 00:54:55 +00009 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
hailfingera9df33c2009-05-09 00:54:55 +000014 */
15
hailfingera9df33c2009-05-09 00:54:55 +000016#include <string.h>
17#include <stdlib.h>
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -070018#include <stdio.h>
19#include <ctype.h>
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +100020#include <errno.h>
hailfingera9df33c2009-05-09 00:54:55 +000021#include "flash.h"
hailfingera8727712010-06-20 10:58:32 +000022#include "chipdrivers.h"
hailfinger428f6852010-07-27 22:41:39 +000023#include "programmer.h"
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +080024#include "flashchips.h"
hailfingera9df33c2009-05-09 00:54:55 +000025
hailfinger6ead7222010-11-01 22:07:04 +000026/* Remove the #define below if you don't want SPI flash chip emulation. */
27#define EMULATE_SPI_CHIP 1
28
29#if EMULATE_SPI_CHIP
30#define EMULATE_CHIP 1
31#include "spi.h"
32#endif
33
34#if EMULATE_CHIP
35#include <sys/types.h>
36#include <sys/stat.h>
37#endif
38
39#if EMULATE_CHIP
40static uint8_t *flashchip_contents = NULL;
41enum emu_chip {
42 EMULATE_NONE,
43 EMULATE_ST_M25P10_RES,
44 EMULATE_SST_SST25VF040_REMS,
45 EMULATE_SST_SST25VF032B,
Stuart Langley78cacf72020-04-23 11:48:01 +100046 EMULATE_MACRONIX_MX25L6436,
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +100047 EMULATE_WINBOND_W25Q128FV,
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +080048 EMULATE_VARIABLE_SIZE,
hailfinger6ead7222010-11-01 22:07:04 +000049};
Stuart Langley78cacf72020-04-23 11:48:01 +100050
Lachlan Bishopbf1476e2020-09-10 14:57:05 +100051struct emu_data {
52 enum emu_chip emu_chip;
53 char *emu_persistent_image;
54 unsigned int emu_chip_size;
55 int erase_to_zero;
56 int emu_modified; /* is the image modified since reading it? */
57 uint8_t emu_status;
Edward O'Callaghan0037f452020-09-17 13:32:00 +100058 /* If "freq" parameter is passed in from command line, commands will delay
59 * for this period before returning. */
60 unsigned long int delay_us;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +100061 unsigned int emu_max_byteprogram_size;
62 unsigned int emu_max_aai_size;
63 unsigned int emu_jedec_se_size;
64 unsigned int emu_jedec_be_52_size;
65 unsigned int emu_jedec_be_d8_size;
66 unsigned int emu_jedec_ce_60_size;
67 unsigned int emu_jedec_ce_c7_size;
68 unsigned char spi_blacklist[256];
69 unsigned char spi_ignorelist[256];
70 unsigned int spi_blacklist_size;
71 unsigned int spi_ignorelist_size;
72};
73
74#if EMULATE_SPI_CHIP
Stuart Langley78cacf72020-04-23 11:48:01 +100075/* A legit complete SFDP table based on the MX25L6436E (rev. 1.8) datasheet. */
76static const uint8_t sfdp_table[] = {
77 0x53, 0x46, 0x44, 0x50, // @0x00: SFDP signature
78 0x00, 0x01, 0x01, 0xFF, // @0x04: revision 1.0, 2 headers
79 0x00, 0x00, 0x01, 0x09, // @0x08: JEDEC SFDP header rev. 1.0, 9 DW long
80 0x1C, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x1C (instead of 0x30)
81 0xC2, 0x00, 0x01, 0x04, // @0x10: Macronix header rev. 1.0, 4 DW long
82 0x48, 0x00, 0x00, 0xFF, // @0x14: PTP1 = 0x48 (instead of 0x60)
83 0xFF, 0xFF, 0xFF, 0xFF, // @0x18: hole.
84 0xE5, 0x20, 0xC9, 0xFF, // @0x1C: SFDP parameter table start
85 0xFF, 0xFF, 0xFF, 0x03, // @0x20
86 0x00, 0xFF, 0x08, 0x6B, // @0x24
87 0x08, 0x3B, 0x00, 0xFF, // @0x28
88 0xEE, 0xFF, 0xFF, 0xFF, // @0x2C
89 0xFF, 0xFF, 0x00, 0x00, // @0x30
90 0xFF, 0xFF, 0x00, 0xFF, // @0x34
91 0x0C, 0x20, 0x0F, 0x52, // @0x38
92 0x10, 0xD8, 0x00, 0xFF, // @0x3C: SFDP parameter table end
93 0xFF, 0xFF, 0xFF, 0xFF, // @0x40: hole.
94 0xFF, 0xFF, 0xFF, 0xFF, // @0x44: hole.
95 0x00, 0x36, 0x00, 0x27, // @0x48: Macronix parameter table start
96 0xF4, 0x4F, 0xFF, 0xFF, // @0x4C
97 0xD9, 0xC8, 0xFF, 0xFF, // @0x50
98 0xFF, 0xFF, 0xFF, 0xFF, // @0x54: Macronix parameter table end
99};
100
hailfinger6ead7222010-11-01 22:07:04 +0000101#endif
102#endif
103
stefanctc5eb8a92011-11-23 09:13:48 +0000104static unsigned int spi_write_256_chunksize = 256;
hailfinger6ead7222010-11-01 22:07:04 +0000105
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700106static int dummy_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
Stuart langleyc98e43f2020-03-26 20:27:36 +1100107 const unsigned char *writearr, unsigned char *readarr);
Patrick Georgiab8353e2017-02-03 18:32:01 +0100108static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf,
stefanctc5eb8a92011-11-23 09:13:48 +0000109 unsigned int start, unsigned int len);
Stuart langleyc98e43f2020-03-26 20:27:36 +1100110static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
111static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
112static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
113static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len);
114static uint8_t dummy_chip_readb(const struct flashctx *flash, const chipaddr addr);
115static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr addr);
116static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr);
117static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
mkarcherd264e9e2011-05-11 17:07:07 +0000118
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000119static struct spi_master spi_master_dummyflasher = {
Edward O'Callaghana6673bd2019-06-24 15:22:28 +1000120 .features = SPI_MASTER_4BA,
uwe8d342eb2011-07-28 08:13:25 +0000121 .max_data_read = MAX_DATA_READ_UNLIMITED,
122 .max_data_write = MAX_DATA_UNSPECIFIED,
123 .command = dummy_spi_send_command,
124 .multicommand = default_spi_send_multicommand,
125 .read = default_spi_read,
126 .write_256 = dummy_spi_write_256,
Edward O'Callaghaneeaac6b2020-10-12 19:51:56 +1100127 .write_aai = default_spi_write_aai,
mkarcherd264e9e2011-05-11 17:07:07 +0000128};
dhendrix0ffc2eb2011-06-14 01:35:36 +0000129
Patrick Georgi0a9533a2017-02-03 19:28:38 +0100130static const struct par_master par_master_dummy = {
hailfinger76bb7e92011-11-09 23:40:00 +0000131 .chip_readb = dummy_chip_readb,
132 .chip_readw = dummy_chip_readw,
133 .chip_readl = dummy_chip_readl,
134 .chip_readn = dummy_chip_readn,
135 .chip_writeb = dummy_chip_writeb,
136 .chip_writew = dummy_chip_writew,
137 .chip_writel = dummy_chip_writel,
138 .chip_writen = dummy_chip_writen,
139};
140
Edward O'Callaghanef4e28b2019-06-28 13:18:41 +1000141static enum chipbustype dummy_buses_supported = BUS_NONE;
hailfinger76bb7e92011-11-09 23:40:00 +0000142
David Hendricks93784b42016-08-09 17:00:38 -0700143static int dummy_shutdown(void *data)
dhendrix0ffc2eb2011-06-14 01:35:36 +0000144{
145 msg_pspew("%s\n", __func__);
146#if EMULATE_CHIP
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000147 struct emu_data *emu_data = (struct emu_data *)data;
148 if (emu_data->emu_chip != EMULATE_NONE) {
149 if (emu_data->emu_persistent_image && emu_data->emu_modified) {
150 msg_pdbg("Writing %s\n", emu_data->emu_persistent_image);
151 write_buf_to_file(flashchip_contents,
152 emu_data->emu_chip_size,
153 emu_data->emu_persistent_image);
154 free(emu_data->emu_persistent_image);
155 emu_data->emu_persistent_image = NULL;
dhendrix0ffc2eb2011-06-14 01:35:36 +0000156 }
157 free(flashchip_contents);
158 }
159#endif
160 return 0;
161}
162
Simon Glassd2c64a22013-07-03 22:05:21 +0900163/* Values for the 'size' parameter */
164enum {
165 SIZE_UNKNOWN = -1,
166 SIZE_AUTO = -2,
167};
168
David Hendricksac1d25c2016-08-09 17:00:58 -0700169int dummy_init(void)
hailfingera9df33c2009-05-09 00:54:55 +0000170{
hailfinger1ef766d2010-07-06 09:55:48 +0000171 char *bustext = NULL;
hailfinger6ead7222010-11-01 22:07:04 +0000172 char *tmp = NULL;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000173 unsigned int i;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800174#if EMULATE_SPI_CHIP
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000175 char *status = NULL;
Simon Glassd2c64a22013-07-03 22:05:21 +0900176 int size = SIZE_UNKNOWN; /* size for generic chip */
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800177#endif
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000178#if EMULATE_CHIP
179 struct stat image_stat;
hailfinger6ead7222010-11-01 22:07:04 +0000180#endif
Simon Glassd2c64a22013-07-03 22:05:21 +0900181 int image_size = SIZE_UNKNOWN;
hailfinger1ef766d2010-07-06 09:55:48 +0000182
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000183 struct emu_data *data = calloc(1, sizeof(struct emu_data));
184 if (!data) {
185 msg_perr("Out of memory!\n");
186 return 1;
187 }
188 data->emu_chip = EMULATE_NONE;
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000189 data->delay_us = 0;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000190 spi_master_dummyflasher.data = data;
191
hailfinger50c335f2010-01-09 04:32:23 +0000192 msg_pspew("%s\n", __func__);
hailfinger668f3502009-06-01 00:02:11 +0000193
hailfingerddeb4ac2010-07-08 10:13:37 +0000194 bustext = extract_programmer_param("bus");
hailfinger1ef766d2010-07-06 09:55:48 +0000195 msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default");
196 if (!bustext)
197 bustext = strdup("parallel+lpc+fwh+spi");
hailfinger668f3502009-06-01 00:02:11 +0000198 /* Convert the parameters to lowercase. */
hailfinger1ef766d2010-07-06 09:55:48 +0000199 tolower_string(bustext);
hailfinger668f3502009-06-01 00:02:11 +0000200
hailfinger76bb7e92011-11-09 23:40:00 +0000201 dummy_buses_supported = BUS_NONE;
hailfinger1ef766d2010-07-06 09:55:48 +0000202 if (strstr(bustext, "parallel")) {
hailfinger76bb7e92011-11-09 23:40:00 +0000203 dummy_buses_supported |= BUS_PARALLEL;
hailfinger50c335f2010-01-09 04:32:23 +0000204 msg_pdbg("Enabling support for %s flash.\n", "parallel");
hailfinger668f3502009-06-01 00:02:11 +0000205 }
hailfinger1ef766d2010-07-06 09:55:48 +0000206 if (strstr(bustext, "lpc")) {
hailfinger76bb7e92011-11-09 23:40:00 +0000207 dummy_buses_supported |= BUS_LPC;
hailfinger50c335f2010-01-09 04:32:23 +0000208 msg_pdbg("Enabling support for %s flash.\n", "LPC");
hailfinger668f3502009-06-01 00:02:11 +0000209 }
hailfinger1ef766d2010-07-06 09:55:48 +0000210 if (strstr(bustext, "fwh")) {
hailfinger76bb7e92011-11-09 23:40:00 +0000211 dummy_buses_supported |= BUS_FWH;
hailfinger50c335f2010-01-09 04:32:23 +0000212 msg_pdbg("Enabling support for %s flash.\n", "FWH");
hailfinger668f3502009-06-01 00:02:11 +0000213 }
hailfinger1ef766d2010-07-06 09:55:48 +0000214 if (strstr(bustext, "spi")) {
hailfinger76bb7e92011-11-09 23:40:00 +0000215 dummy_buses_supported |= BUS_SPI;
hailfinger50c335f2010-01-09 04:32:23 +0000216 msg_pdbg("Enabling support for %s flash.\n", "SPI");
hailfinger668f3502009-06-01 00:02:11 +0000217 }
hailfinger76bb7e92011-11-09 23:40:00 +0000218 if (dummy_buses_supported == BUS_NONE)
hailfinger50c335f2010-01-09 04:32:23 +0000219 msg_pdbg("Support for all flash bus types disabled.\n");
hailfinger1ef766d2010-07-06 09:55:48 +0000220 free(bustext);
hailfinger6ead7222010-11-01 22:07:04 +0000221
222 tmp = extract_programmer_param("spi_write_256_chunksize");
223 if (tmp) {
224 spi_write_256_chunksize = atoi(tmp);
225 free(tmp);
226 if (spi_write_256_chunksize < 1) {
227 msg_perr("invalid spi_write_256_chunksize\n");
228 return 1;
229 }
230 }
231
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700232 tmp = extract_programmer_param("spi_blacklist");
233 if (tmp) {
234 i = strlen(tmp);
235 if (!strncmp(tmp, "0x", 2)) {
236 i -= 2;
237 memmove(tmp, tmp + 2, i + 1);
238 }
239 if ((i > 512) || (i % 2)) {
240 msg_perr("Invalid SPI command blacklist length\n");
241 free(tmp);
242 return 1;
243 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000244 data->spi_blacklist_size = i / 2;
245 for (i = 0; i < data->spi_blacklist_size * 2; i++) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700246 if (!isxdigit((unsigned char)tmp[i])) {
247 msg_perr("Invalid char \"%c\" in SPI command "
248 "blacklist\n", tmp[i]);
249 free(tmp);
250 return 1;
251 }
252 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000253 for (i = 0; i < data->spi_blacklist_size; i++) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700254 unsigned int tmp2;
255 /* SCNx8 is apparently not supported by MSVC (and thus
256 * MinGW), so work around it with an extra variable
257 */
258 sscanf(tmp + i * 2, "%2x", &tmp2);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000259 data->spi_blacklist[i] = (uint8_t)tmp2;
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700260 }
261 msg_pdbg("SPI blacklist is ");
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000262 for (i = 0; i < data->spi_blacklist_size; i++)
263 msg_pdbg("%02x ", data->spi_blacklist[i]);
264 msg_pdbg(", size %u\n", data->spi_blacklist_size);
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700265 }
266 free(tmp);
267
268 tmp = extract_programmer_param("spi_ignorelist");
269 if (tmp) {
270 i = strlen(tmp);
271 if (!strncmp(tmp, "0x", 2)) {
272 i -= 2;
273 memmove(tmp, tmp + 2, i + 1);
274 }
275 if ((i > 512) || (i % 2)) {
276 msg_perr("Invalid SPI command ignorelist length\n");
277 free(tmp);
278 return 1;
279 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000280 data->spi_ignorelist_size = i / 2;
281 for (i = 0; i < data->spi_ignorelist_size * 2; i++) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700282 if (!isxdigit((unsigned char)tmp[i])) {
283 msg_perr("Invalid char \"%c\" in SPI command "
284 "ignorelist\n", tmp[i]);
285 free(tmp);
286 return 1;
287 }
288 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000289 for (i = 0; i < data->spi_ignorelist_size; i++) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700290 unsigned int tmp2;
291 /* SCNx8 is apparently not supported by MSVC (and thus
292 * MinGW), so work around it with an extra variable
293 */
294 sscanf(tmp + i * 2, "%2x", &tmp2);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000295 data->spi_ignorelist[i] = (uint8_t)tmp2;
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700296 }
297 msg_pdbg("SPI ignorelist is ");
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000298 for (i = 0; i < data->spi_ignorelist_size; i++)
299 msg_pdbg("%02x ", data->spi_ignorelist[i]);
300 msg_pdbg(", size %u\n", data->spi_ignorelist_size);
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700301 }
302 free(tmp);
303
David Hendricks84377002014-09-09 16:09:31 -0700304 /* frequency to emulate in Hz (default), KHz, or MHz */
305 tmp = extract_programmer_param("freq");
306 if (tmp) {
307 unsigned long int freq;
308 char *units = tmp;
309 char *end = tmp + strlen(tmp);
310
311 errno = 0;
312 freq = strtoul(tmp, &units, 0);
313 if (errno) {
314 msg_perr("Invalid frequency \"%s\", %s\n",
315 tmp, strerror(errno));
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000316 free(tmp);
317 return 1;
David Hendricks84377002014-09-09 16:09:31 -0700318 }
319
320 if ((units > tmp) && (units < end)) {
321 int units_valid = 0;
322
323 if (units < end - 3) {
324 ;
325 } else if (units == end - 2) {
326 if (!strcasecmp(units, "hz"))
327 units_valid = 1;
328 } else if (units == end - 3) {
329 if (!strcasecmp(units, "khz")) {
330 freq *= 1000;
331 units_valid = 1;
332 } else if (!strcasecmp(units, "mhz")) {
333 freq *= 1000000;
334 units_valid = 1;
335 }
336 }
337
338 if (!units_valid) {
339 msg_perr("Invalid units: %s\n", units);
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000340 free(tmp);
David Hendricks84377002014-09-09 16:09:31 -0700341 return 1;
342 }
343 }
344
345 /* Assume we only work with bytes and transfer at 1 bit/Hz */
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000346 data->delay_us = (1000000 * 8) / freq;
David Hendricks84377002014-09-09 16:09:31 -0700347 }
Edward O'Callaghan0037f452020-09-17 13:32:00 +1000348 free(tmp);
David Hendricks84377002014-09-09 16:09:31 -0700349
hailfinger6ead7222010-11-01 22:07:04 +0000350#if EMULATE_CHIP
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800351#if EMULATE_SPI_CHIP
352 tmp = extract_programmer_param("size");
353 if (tmp) {
354 int multiplier = 1;
Simon Glassd2c64a22013-07-03 22:05:21 +0900355 if (!strcmp(tmp, "auto"))
356 size = SIZE_AUTO;
357 else if (strlen(tmp)) {
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800358 int remove_last_char = 1;
359 switch (tmp[strlen(tmp) - 1]) {
360 case 'k': case 'K':
361 multiplier = 1024;
362 break;
363 case 'm': case 'M':
364 multiplier = 1024 * 1024;
365 break;
366 default:
367 remove_last_char = 0;
368 break;
369 }
370 if (remove_last_char) tmp[strlen(tmp) - 1] = '\0';
Simon Glassd2c64a22013-07-03 22:05:21 +0900371 size = atoi(tmp) * multiplier;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800372 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000373 free(tmp);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800374 }
375#endif
376
hailfinger6ead7222010-11-01 22:07:04 +0000377 tmp = extract_programmer_param("emulate");
378 if (!tmp) {
379 msg_pdbg("Not emulating any flash chip.\n");
380 /* Nothing else to do. */
dhendrix0ffc2eb2011-06-14 01:35:36 +0000381 goto dummy_init_out;
hailfinger6ead7222010-11-01 22:07:04 +0000382 }
383#if EMULATE_SPI_CHIP
384 if (!strcmp(tmp, "M25P10.RES")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000385 data->emu_chip = EMULATE_ST_M25P10_RES;
386 data->emu_chip_size = 128 * 1024;
387 data->emu_max_byteprogram_size = 128;
388 data->emu_max_aai_size = 0;
389 data->emu_jedec_se_size = 0;
390 data->emu_jedec_be_52_size = 0;
391 data->emu_jedec_be_d8_size = 32 * 1024;
392 data->emu_jedec_ce_60_size = 0;
393 data->emu_jedec_ce_c7_size = data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000394 msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page "
395 "write)\n");
396 }
397 if (!strcmp(tmp, "SST25VF040.REMS")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000398 data->emu_chip = EMULATE_SST_SST25VF040_REMS;
399 data->emu_chip_size = 512 * 1024;
400 data->emu_max_byteprogram_size = 1;
401 data->emu_max_aai_size = 0;
402 data->emu_jedec_se_size = 4 * 1024;
403 data->emu_jedec_be_52_size = 32 * 1024;
404 data->emu_jedec_be_d8_size = 0;
405 data->emu_jedec_ce_60_size = data->emu_chip_size;
406 data->emu_jedec_ce_c7_size = 0;
hailfinger6ead7222010-11-01 22:07:04 +0000407 msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, "
408 "byte write)\n");
409 }
410 if (!strcmp(tmp, "SST25VF032B")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000411 data->emu_chip = EMULATE_SST_SST25VF032B;
412 data->emu_chip_size = 4 * 1024 * 1024;
413 data->emu_max_byteprogram_size = 1;
414 data->emu_max_aai_size = 2;
415 data->emu_jedec_se_size = 4 * 1024;
416 data->emu_jedec_be_52_size = 32 * 1024;
417 data->emu_jedec_be_d8_size = 64 * 1024;
418 data->emu_jedec_ce_60_size = data->emu_chip_size;
419 data->emu_jedec_ce_c7_size = data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000420 msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI "
421 "write)\n");
422 }
Stuart Langley78cacf72020-04-23 11:48:01 +1000423 if (!strcmp(tmp, "MX25L6436")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000424 data->emu_chip = EMULATE_MACRONIX_MX25L6436;
425 data->emu_chip_size = 8 * 1024 * 1024;
426 data->emu_max_byteprogram_size = 256;
427 data->emu_max_aai_size = 0;
428 data->emu_jedec_se_size = 4 * 1024;
429 data->emu_jedec_be_52_size = 32 * 1024;
430 data->emu_jedec_be_d8_size = 64 * 1024;
431 data->emu_jedec_ce_60_size = data->emu_chip_size;
432 data->emu_jedec_ce_c7_size = data->emu_chip_size;
Stuart Langley78cacf72020-04-23 11:48:01 +1000433 msg_pdbg("Emulating Macronix MX25L6436 SPI flash chip (RDID, "
434 "SFDP)\n");
435 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000436 if (!strcmp(tmp, "W25Q128FV")) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000437 data->emu_chip = EMULATE_WINBOND_W25Q128FV;
438 data->emu_chip_size = 16 * 1024 * 1024;
439 data->emu_max_byteprogram_size = 256;
440 data->emu_max_aai_size = 0;
441 data->emu_jedec_se_size = 4 * 1024;
442 data->emu_jedec_be_52_size = 32 * 1024;
443 data->emu_jedec_be_d8_size = 64 * 1024;
444 data->emu_jedec_ce_60_size = data->emu_chip_size;
445 data->emu_jedec_ce_c7_size = data->emu_chip_size;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000446 msg_pdbg("Emulating Winbond W25Q128FV SPI flash chip (RDID)\n");
447 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000448 data->emu_persistent_image = extract_programmer_param("image");
449 if (!stat(data->emu_persistent_image, &image_stat))
Simon Glassd2c64a22013-07-03 22:05:21 +0900450 image_size = image_stat.st_size;
451
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000452 /* The name of variable-size virtual chip. A 4 MiB flash example:
453 * flashrom -p dummy:emulate=VARIABLE_SIZE,size=4194304
454 */
455 if (!strcmp(tmp, "VARIABLE_SIZE")) {
Simon Glassd2c64a22013-07-03 22:05:21 +0900456 if (size == SIZE_UNKNOWN) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000457 msg_perr("%s: the size parameter is not given.\n", __func__);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800458 free(tmp);
459 return 1;
Simon Glassd2c64a22013-07-03 22:05:21 +0900460 } else if (size == SIZE_AUTO) {
461 if (image_size == SIZE_UNKNOWN) {
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000462 msg_perr("%s: no image so cannot use automatic size.\n", __func__);
Simon Glassd2c64a22013-07-03 22:05:21 +0900463 free(tmp);
464 return 1;
465 }
466 size = image_size;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800467 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000468 data->emu_chip = EMULATE_VARIABLE_SIZE;
469 data->emu_chip_size = size;
470 data->emu_max_byteprogram_size = 256;
471 data->emu_max_aai_size = 0;
472 data->emu_jedec_se_size = 4 * 1024;
473 data->emu_jedec_be_52_size = 32 * 1024;
474 data->emu_jedec_be_d8_size = 64 * 1024;
475 data->emu_jedec_ce_60_size = data->emu_chip_size;
476 data->emu_jedec_ce_c7_size = data->emu_chip_size;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800477 msg_pdbg("Emulating generic SPI flash chip (size=%d bytes)\n",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000478 data->emu_chip_size);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800479 }
hailfinger6ead7222010-11-01 22:07:04 +0000480#endif
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000481 if (data->emu_chip == EMULATE_NONE) {
hailfinger6ead7222010-11-01 22:07:04 +0000482 msg_perr("Invalid chip specified for emulation: %s\n", tmp);
483 free(tmp);
484 return 1;
485 }
David Hendricks0eda2a82014-09-12 16:32:05 -0700486
487 /* Should emulated flash erase to zero (yes/no)? */
488 tmp = extract_programmer_param("erase_to_zero");
489 if (tmp) {
490 if (!strcmp(tmp, "yes")) {
491 msg_pdbg("Emulated chip will erase to 0x00\n");
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000492 data->erase_to_zero = 1;
David Hendricks0eda2a82014-09-12 16:32:05 -0700493 } else if (!strcmp(tmp, "no")) {
494 msg_pdbg("Emulated chip will erase to 0xff\n");
495 } else {
496 msg_perr("erase_to_zero can be \"yes\" or \"no\"\n");
497 return 1;
498 }
499 }
500
hailfinger6ead7222010-11-01 22:07:04 +0000501 free(tmp);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000502 flashchip_contents = malloc(data->emu_chip_size);
hailfinger6ead7222010-11-01 22:07:04 +0000503 if (!flashchip_contents) {
504 msg_perr("Out of memory!\n");
505 return 1;
506 }
dhendrix0ffc2eb2011-06-14 01:35:36 +0000507
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000508#ifdef EMULATE_SPI_CHIP
509 status = extract_programmer_param("spi_status");
510 if (status) {
511 char *endptr;
512 errno = 0;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000513 data->emu_status = strtoul(status, &endptr, 0);
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000514 free(status);
515 if (errno != 0 || status == endptr) {
516 msg_perr("Error: initial status register specified, "
517 "but the value could not be converted.\n");
518 return 1;
519 }
520 msg_pdbg("Initial status register is set to 0x%02x.\n",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000521 data->emu_status);
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000522 }
523#endif
524
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000525 msg_pdbg("Filling fake flash chip with 0x%02x, size %i\n",
526 data->erase_to_zero ? 0x00 : 0xff, data->emu_chip_size);
527 memset(flashchip_contents, data->erase_to_zero ? 0x00 : 0xff, data->emu_chip_size);
528
529 /* Will be freed by shutdown function if necessary. */
530 if (!data->emu_persistent_image) {
hailfinger6ead7222010-11-01 22:07:04 +0000531 /* Nothing else to do. */
dhendrix0ffc2eb2011-06-14 01:35:36 +0000532 goto dummy_init_out;
hailfinger6ead7222010-11-01 22:07:04 +0000533 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000534
535 /* We will silently (in default verbosity) ignore the file if it does not exist (yet) or the size does
536 * not match the emulated chip. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000537 if (!stat(data->emu_persistent_image, &image_stat)) {
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000538 msg_pdbg("Found persistent image %s, %jd B ",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000539 data->emu_persistent_image, (intmax_t)image_stat.st_size);
540 if ((uintmax_t)image_stat.st_size == data->emu_chip_size) {
hailfinger6ead7222010-11-01 22:07:04 +0000541 msg_pdbg("matches.\n");
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000542 msg_pdbg("Reading %s\n", data->emu_persistent_image);
543 if (read_buf_from_file(flashchip_contents, data->emu_chip_size,
544 data->emu_persistent_image)) {
545 msg_perr("Unable to read %s\n", data->emu_persistent_image);
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000546 free(flashchip_contents);
547 return 1;
548 }
hailfinger6ead7222010-11-01 22:07:04 +0000549 } else {
550 msg_pdbg("doesn't match.\n");
551 }
552 }
553#endif
hailfingera9df33c2009-05-09 00:54:55 +0000554
dhendrix0ffc2eb2011-06-14 01:35:36 +0000555dummy_init_out:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000556 if (register_shutdown(dummy_shutdown, data)) {
hailfinger6ead7222010-11-01 22:07:04 +0000557 free(flashchip_contents);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000558 free(data);
dhendrix0ffc2eb2011-06-14 01:35:36 +0000559 return 1;
hailfinger6ead7222010-11-01 22:07:04 +0000560 }
hailfinger76bb7e92011-11-09 23:40:00 +0000561 if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))
Patrick Georgi0a9533a2017-02-03 19:28:38 +0100562 register_par_master(&par_master_dummy,
Stuart langleyc98e43f2020-03-26 20:27:36 +1100563 dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH));
hailfinger76bb7e92011-11-09 23:40:00 +0000564 if (dummy_buses_supported & BUS_SPI)
Patrick Georgif4f1e2f2017-03-10 17:38:40 +0100565 register_spi_master(&spi_master_dummyflasher);
hailfinger76bb7e92011-11-09 23:40:00 +0000566
hailfingera9df33c2009-05-09 00:54:55 +0000567 return 0;
568}
569
Patrick Georgi4befc162017-02-03 18:32:01 +0100570void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len)
hailfinger11ae3c42009-05-11 14:13:25 +0000571{
Stuart langleyc98e43f2020-03-26 20:27:36 +1100572 msg_pspew("%s: Mapping %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n",
573 __func__, descr, len, PRIxPTR_WIDTH, phys_addr);
hailfinger11ae3c42009-05-11 14:13:25 +0000574 return (void *)phys_addr;
575}
576
577void dummy_unmap(void *virt_addr, size_t len)
578{
Stuart langleyc98e43f2020-03-26 20:27:36 +1100579 msg_pspew("%s: Unmapping 0x%zx bytes at %p\n", __func__, len, virt_addr);
hailfinger11ae3c42009-05-11 14:13:25 +0000580}
581
Stuart langleyc98e43f2020-03-26 20:27:36 +1100582static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000583{
Kangheui Won4974cc12019-10-18 12:59:01 +1100584 msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%02x\n", __func__, addr, val);
hailfingera9df33c2009-05-09 00:54:55 +0000585}
586
Stuart langleyc98e43f2020-03-26 20:27:36 +1100587static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000588{
Kangheui Won4974cc12019-10-18 12:59:01 +1100589 msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%04x\n", __func__, addr, val);
hailfingera9df33c2009-05-09 00:54:55 +0000590}
591
Stuart langleyc98e43f2020-03-26 20:27:36 +1100592static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000593{
Kangheui Won4974cc12019-10-18 12:59:01 +1100594 msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%08x\n", __func__, addr, val);
hailfingera9df33c2009-05-09 00:54:55 +0000595}
596
Stuart langleyc98e43f2020-03-26 20:27:36 +1100597static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len)
hailfinger9d987ef2009-06-05 18:32:07 +0000598{
599 size_t i;
Stuart langleyc98e43f2020-03-26 20:27:36 +1100600 msg_pspew("%s: addr=0x%" PRIxPTR ", len=0x%zx, writing data (hex):", __func__, addr, len);
hailfinger9d987ef2009-06-05 18:32:07 +0000601 for (i = 0; i < len; i++) {
602 if ((i % 16) == 0)
hailfinger50c335f2010-01-09 04:32:23 +0000603 msg_pspew("\n");
604 msg_pspew("%02x ", buf[i]);
hailfinger9d987ef2009-06-05 18:32:07 +0000605 }
606}
607
Stuart langleyc98e43f2020-03-26 20:27:36 +1100608static uint8_t dummy_chip_readb(const struct flashctx *flash, const chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000609{
Kangheui Won4974cc12019-10-18 12:59:01 +1100610 msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xff\n", __func__, addr);
hailfingera9df33c2009-05-09 00:54:55 +0000611 return 0xff;
612}
613
Stuart langleyc98e43f2020-03-26 20:27:36 +1100614static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000615{
Kangheui Won4974cc12019-10-18 12:59:01 +1100616 msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xffff\n", __func__, addr);
hailfingera9df33c2009-05-09 00:54:55 +0000617 return 0xffff;
618}
619
Stuart langleyc98e43f2020-03-26 20:27:36 +1100620static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr)
hailfingera9df33c2009-05-09 00:54:55 +0000621{
Kangheui Won4974cc12019-10-18 12:59:01 +1100622 msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xffffffff\n", __func__, addr);
hailfingera9df33c2009-05-09 00:54:55 +0000623 return 0xffffffff;
624}
625
Stuart langleyc98e43f2020-03-26 20:27:36 +1100626static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len)
hailfinger9d987ef2009-06-05 18:32:07 +0000627{
Stuart langleyc98e43f2020-03-26 20:27:36 +1100628 msg_pspew("%s: addr=0x%" PRIxPTR ", len=0x%zx, returning array of 0xff\n", __func__, addr, len);
hailfinger9d987ef2009-06-05 18:32:07 +0000629 memset(buf, 0xff, len);
630 return;
631}
632
hailfinger6ead7222010-11-01 22:07:04 +0000633#if EMULATE_SPI_CHIP
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000634static int emulate_spi_chip_response(unsigned int writecnt,
635 unsigned int readcnt,
636 const unsigned char *writearr,
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000637 unsigned char *readarr,
638 struct emu_data *data)
hailfinger6ead7222010-11-01 22:07:04 +0000639{
Stuart Langley78cacf72020-04-23 11:48:01 +1000640 unsigned int offs, i, toread;
stefanctc5eb8a92011-11-23 09:13:48 +0000641 static int unsigned aai_offs;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000642 const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44};
643 const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a};
644 const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16};
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000645 const unsigned char w25q128fv_rems_response[2] = {0xef, 0x17};
hailfinger6ead7222010-11-01 22:07:04 +0000646
647 if (writecnt == 0) {
648 msg_perr("No command sent to the chip!\n");
649 return 1;
650 }
Stefan Tauner718d1eb2016-08-18 18:00:53 -0700651 /* spi_blacklist has precedence over spi_ignorelist. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000652 for (i = 0; i < data->spi_blacklist_size; i++) {
653 if (writearr[0] == data->spi_blacklist[i]) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700654 msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000655 data->spi_blacklist[i]);
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700656 return SPI_INVALID_OPCODE;
657 }
658 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000659 for (i = 0; i < data->spi_ignorelist_size; i++) {
660 if (writearr[0] == data->spi_ignorelist[i]) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700661 msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000662 data->spi_ignorelist[i]);
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -0700663 /* Return success because the command does not fail,
664 * it is simply ignored.
665 */
666 return 0;
667 }
668 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000669
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000670 if (data->emu_max_aai_size && (data->emu_status & SPI_SR_AAI)) {
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000671 if (writearr[0] != JEDEC_AAI_WORD_PROGRAM &&
672 writearr[0] != JEDEC_WRDI &&
673 writearr[0] != JEDEC_RDSR) {
674 msg_perr("Forbidden opcode (0x%02x) attempted during "
675 "AAI sequence!\n", writearr[0]);
676 return 0;
677 }
678 }
679
hailfinger6ead7222010-11-01 22:07:04 +0000680 switch (writearr[0]) {
681 case JEDEC_RES:
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000682 if (writecnt < JEDEC_RES_OUTSIZE)
hailfinger6ead7222010-11-01 22:07:04 +0000683 break;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000684 /* offs calculation is only needed for SST chips which treat RES like REMS. */
685 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
686 offs += writecnt - JEDEC_REMS_OUTSIZE;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000687 switch (data->emu_chip) {
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000688 case EMULATE_ST_M25P10_RES:
689 if (readcnt > 0)
690 memset(readarr, 0x10, readcnt);
691 break;
692 case EMULATE_SST_SST25VF040_REMS:
693 for (i = 0; i < readcnt; i++)
694 readarr[i] = sst25vf040_rems_response[(offs + i) % 2];
695 break;
696 case EMULATE_SST_SST25VF032B:
697 for (i = 0; i < readcnt; i++)
698 readarr[i] = sst25vf032b_rems_response[(offs + i) % 2];
699 break;
700 case EMULATE_MACRONIX_MX25L6436:
701 if (readcnt > 0)
702 memset(readarr, 0x16, readcnt);
703 break;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000704 case EMULATE_WINBOND_W25Q128FV:
705 if (readcnt > 0)
706 memset(readarr, 0x17, readcnt);
707 break;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000708 default: /* ignore */
709 break;
710 }
hailfinger6ead7222010-11-01 22:07:04 +0000711 break;
712 case JEDEC_REMS:
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000713 /* REMS response has wraparound and uses an address parameter. */
714 if (writecnt < JEDEC_REMS_OUTSIZE)
hailfinger6ead7222010-11-01 22:07:04 +0000715 break;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000716 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
717 offs += writecnt - JEDEC_REMS_OUTSIZE;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000718 switch (data->emu_chip) {
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000719 case EMULATE_SST_SST25VF040_REMS:
720 for (i = 0; i < readcnt; i++)
721 readarr[i] = sst25vf040_rems_response[(offs + i) % 2];
722 break;
723 case EMULATE_SST_SST25VF032B:
724 for (i = 0; i < readcnt; i++)
725 readarr[i] = sst25vf032b_rems_response[(offs + i) % 2];
726 break;
727 case EMULATE_MACRONIX_MX25L6436:
728 for (i = 0; i < readcnt; i++)
729 readarr[i] = mx25l6436_rems_response[(offs + i) % 2];
730 break;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000731 case EMULATE_WINBOND_W25Q128FV:
732 for (i = 0; i < readcnt; i++)
733 readarr[i] = w25q128fv_rems_response[(offs + i) % 2];
734 break;
Carl-Daniel Hailfinger7a4c0472012-08-30 21:41:00 +0000735 default: /* ignore */
736 break;
737 }
hailfinger6ead7222010-11-01 22:07:04 +0000738 break;
739 case JEDEC_RDID:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000740 switch (data->emu_chip) {
Stuart Langley78cacf72020-04-23 11:48:01 +1000741 case EMULATE_SST_SST25VF032B:
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800742 if (readcnt > 0)
743 readarr[0] = 0xbf;
744 if (readcnt > 1)
745 readarr[1] = 0x25;
746 if (readcnt > 2)
747 readarr[2] = 0x4a;
Stuart Langley78cacf72020-04-23 11:48:01 +1000748 break;
749 case EMULATE_MACRONIX_MX25L6436:
750 if (readcnt > 0)
751 readarr[0] = 0xc2;
752 if (readcnt > 1)
753 readarr[1] = 0x20;
754 if (readcnt > 2)
755 readarr[2] = 0x17;
756 break;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000757 case EMULATE_WINBOND_W25Q128FV:
758 if (readcnt > 0)
759 readarr[0] = 0xef;
760 if (readcnt > 1)
761 readarr[1] = 0x40;
762 if (readcnt > 2)
763 readarr[2] = 0x18;
764 break;
Edward O'Callaghane0772312020-09-16 17:57:19 +1000765 case EMULATE_VARIABLE_SIZE:
766 if (readcnt > 0)
767 readarr[0] = (PROGMANUF_ID >> 8) & 0xff;
768 if (readcnt > 1)
769 readarr[1] = PROGMANUF_ID & 0xff;
770 if (readcnt > 2)
771 readarr[2] = (PROGDEV_ID >> 8) & 0xff;
772 if (readcnt > 3)
773 readarr[3] = PROGDEV_ID & 0xff;
Stuart Langley78cacf72020-04-23 11:48:01 +1000774 break;
Stuart Langley78cacf72020-04-23 11:48:01 +1000775 default: /* ignore */
776 break;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +0800777 }
hailfinger6ead7222010-11-01 22:07:04 +0000778 break;
779 case JEDEC_RDSR:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000780 memset(readarr, data->emu_status, readcnt);
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000781 break;
782 /* FIXME: this should be chip-specific. */
783 case JEDEC_EWSR:
784 case JEDEC_WREN:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000785 data->emu_status |= SPI_SR_WEL;
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000786 break;
787 case JEDEC_WRSR:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000788 if (!(data->emu_status & SPI_SR_WEL)) {
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +1000789 msg_perr("WRSR attempted, but WEL is 0!\n");
790 break;
791 }
792 /* FIXME: add some reasonable simulation of the busy flag */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000793 data->emu_status = writearr[1] & ~SPI_SR_WIP;
794 msg_pdbg2("WRSR wrote 0x%02x.\n", data->emu_status);
hailfinger6ead7222010-11-01 22:07:04 +0000795 break;
796 case JEDEC_READ:
797 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
798 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000799 offs %= data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000800 if (readcnt > 0)
801 memcpy(readarr, flashchip_contents + offs, readcnt);
802 break;
Namyoon Woob71a2962020-08-27 16:27:49 -0700803 case JEDEC_READ_4BA:
804 offs = writearr[1] << 24 | writearr[2] << 16 | writearr[3] << 8 | writearr[4];
805 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000806 offs %= data->emu_chip_size;
Namyoon Woob71a2962020-08-27 16:27:49 -0700807 if (readcnt > 0)
808 memcpy(readarr, flashchip_contents + offs, readcnt);
809 break;
hailfinger6ead7222010-11-01 22:07:04 +0000810 case JEDEC_BYTE_PROGRAM:
811 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
812 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000813 offs %= data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000814 if (writecnt < 5) {
815 msg_perr("BYTE PROGRAM size too short!\n");
816 return 1;
817 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000818 if (writecnt - 4 > data->emu_max_byteprogram_size) {
hailfinger6ead7222010-11-01 22:07:04 +0000819 msg_perr("Max BYTE PROGRAM size exceeded!\n");
820 return 1;
821 }
822 memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000823 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000824 break;
Namyoon Woob71a2962020-08-27 16:27:49 -0700825 case JEDEC_BYTE_PROGRAM_4BA:
826 offs = writearr[1] << 24 | writearr[2] << 16 | writearr[3] << 8 | writearr[4];
827 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000828 offs %= data->emu_chip_size;
Namyoon Woob71a2962020-08-27 16:27:49 -0700829 if (writecnt < 6) {
830 msg_perr("BYTE PROGRAM size too short!\n");
831 return 1;
832 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000833 if (writecnt - 5 > data->emu_max_byteprogram_size) {
Namyoon Woob71a2962020-08-27 16:27:49 -0700834 msg_perr("Max BYTE PROGRAM size exceeded!\n");
835 return 1;
836 }
837 memcpy(flashchip_contents + offs, writearr + 5, writecnt - 5);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000838 data->emu_modified = 1;
Namyoon Woob71a2962020-08-27 16:27:49 -0700839 break;
hailfinger6ead7222010-11-01 22:07:04 +0000840 case JEDEC_AAI_WORD_PROGRAM:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000841 if (!data->emu_max_aai_size)
hailfinger6ead7222010-11-01 22:07:04 +0000842 break;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000843 if (!(data->emu_status & SPI_SR_AAI)) {
hailfinger6ead7222010-11-01 22:07:04 +0000844 if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
845 msg_perr("Initial AAI WORD PROGRAM size too "
846 "short!\n");
847 return 1;
848 }
849 if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
850 msg_perr("Initial AAI WORD PROGRAM size too "
851 "long!\n");
852 return 1;
853 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000854 data->emu_status |= SPI_SR_AAI;
hailfinger6ead7222010-11-01 22:07:04 +0000855 aai_offs = writearr[1] << 16 | writearr[2] << 8 |
856 writearr[3];
857 /* Truncate to emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000858 aai_offs %= data->emu_chip_size;
hailfinger6ead7222010-11-01 22:07:04 +0000859 memcpy(flashchip_contents + aai_offs, writearr + 4, 2);
860 aai_offs += 2;
861 } else {
862 if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {
863 msg_perr("Continuation AAI WORD PROGRAM size "
864 "too short!\n");
865 return 1;
866 }
867 if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {
868 msg_perr("Continuation AAI WORD PROGRAM size "
869 "too long!\n");
870 return 1;
871 }
872 memcpy(flashchip_contents + aai_offs, writearr + 1, 2);
873 aai_offs += 2;
874 }
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000875 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000876 break;
877 case JEDEC_WRDI:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000878 if (data->emu_max_aai_size)
879 data->emu_status &= ~SPI_SR_AAI;
hailfinger6ead7222010-11-01 22:07:04 +0000880 break;
881 case JEDEC_SE:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000882 if (!data->emu_jedec_se_size)
hailfinger6ead7222010-11-01 22:07:04 +0000883 break;
884 if (writecnt != JEDEC_SE_OUTSIZE) {
885 msg_perr("SECTOR ERASE 0x20 outsize invalid!\n");
886 return 1;
887 }
888 if (readcnt != JEDEC_SE_INSIZE) {
889 msg_perr("SECTOR ERASE 0x20 insize invalid!\n");
890 return 1;
891 }
892 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000893 if (offs & (data->emu_jedec_se_size - 1))
hailfingere53f5e42011-02-04 22:52:04 +0000894 msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000895 offs &= ~(data->emu_jedec_se_size - 1);
896 memset(flashchip_contents + offs, 0xff, data->emu_jedec_se_size);
897 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000898 break;
899 case JEDEC_BE_52:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000900 if (!data->emu_jedec_be_52_size)
hailfinger6ead7222010-11-01 22:07:04 +0000901 break;
902 if (writecnt != JEDEC_BE_52_OUTSIZE) {
903 msg_perr("BLOCK ERASE 0x52 outsize invalid!\n");
904 return 1;
905 }
906 if (readcnt != JEDEC_BE_52_INSIZE) {
907 msg_perr("BLOCK ERASE 0x52 insize invalid!\n");
908 return 1;
909 }
910 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000911 if (offs & (data->emu_jedec_be_52_size - 1))
hailfingere53f5e42011-02-04 22:52:04 +0000912 msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000913 offs &= ~(data->emu_jedec_be_52_size - 1);
914 memset(flashchip_contents + offs, 0xff, data->emu_jedec_be_52_size);
915 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000916 break;
917 case JEDEC_BE_D8:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000918 if (!data->emu_jedec_be_d8_size)
hailfinger6ead7222010-11-01 22:07:04 +0000919 break;
920 if (writecnt != JEDEC_BE_D8_OUTSIZE) {
921 msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n");
922 return 1;
923 }
924 if (readcnt != JEDEC_BE_D8_INSIZE) {
925 msg_perr("BLOCK ERASE 0xd8 insize invalid!\n");
926 return 1;
927 }
928 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000929 if (offs & (data->emu_jedec_be_d8_size - 1))
hailfingere53f5e42011-02-04 22:52:04 +0000930 msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs);
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000931 offs &= ~(data->emu_jedec_be_d8_size - 1);
932 memset(flashchip_contents + offs, 0xff, data->emu_jedec_be_d8_size);
933 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000934 break;
935 case JEDEC_CE_60:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000936 if (!data->emu_jedec_ce_60_size)
hailfinger6ead7222010-11-01 22:07:04 +0000937 break;
938 if (writecnt != JEDEC_CE_60_OUTSIZE) {
939 msg_perr("CHIP ERASE 0x60 outsize invalid!\n");
940 return 1;
941 }
942 if (readcnt != JEDEC_CE_60_INSIZE) {
943 msg_perr("CHIP ERASE 0x60 insize invalid!\n");
944 return 1;
945 }
hailfingere53f5e42011-02-04 22:52:04 +0000946 /* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */
hailfinger6ead7222010-11-01 22:07:04 +0000947 /* emu_jedec_ce_60_size is emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000948 memset(flashchip_contents, 0xff, data->emu_jedec_ce_60_size);
949 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000950 break;
951 case JEDEC_CE_C7:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000952 if (!data->emu_jedec_ce_c7_size)
hailfinger6ead7222010-11-01 22:07:04 +0000953 break;
954 if (writecnt != JEDEC_CE_C7_OUTSIZE) {
955 msg_perr("CHIP ERASE 0xc7 outsize invalid!\n");
956 return 1;
957 }
958 if (readcnt != JEDEC_CE_C7_INSIZE) {
959 msg_perr("CHIP ERASE 0xc7 insize invalid!\n");
960 return 1;
961 }
hailfingere53f5e42011-02-04 22:52:04 +0000962 /* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */
hailfinger6ead7222010-11-01 22:07:04 +0000963 /* emu_jedec_ce_c7_size is emu_chip_size. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000964 memset(flashchip_contents, 0xff, data->emu_jedec_ce_c7_size);
965 data->emu_modified = 1;
hailfinger6ead7222010-11-01 22:07:04 +0000966 break;
Stuart Langley78cacf72020-04-23 11:48:01 +1000967 case JEDEC_SFDP:
Lachlan Bishopbf1476e2020-09-10 14:57:05 +1000968 if (data->emu_chip != EMULATE_MACRONIX_MX25L6436)
Stuart Langley78cacf72020-04-23 11:48:01 +1000969 break;
970 if (writecnt < 4)
971 break;
972 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
973
974 /* SFDP expects one dummy byte after the address. */
975 if (writecnt == 4) {
976 /* The dummy byte was not written, make sure it is read instead.
977 * Shifting and shortening the read array does achieve this goal.
978 */
979 readarr++;
980 readcnt--;
981 } else {
982 /* The response is shifted if more than 5 bytes are written, because SFDP data is
983 * already shifted out by the chip while those superfluous bytes are written. */
984 offs += writecnt - 5;
985 }
986
987 /* The SFDP spec implies that the start address of an SFDP read may be truncated to fit in the
988 * SFDP table address space, i.e. the start address may be wrapped around at SFDP table size.
989 * This is a reasonable implementation choice in hardware because it saves a few gates. */
990 if (offs >= sizeof(sfdp_table)) {
991 msg_pdbg("Wrapping the start address around the SFDP table boundary (using 0x%x "
992 "instead of 0x%x).\n", (unsigned int)(offs % sizeof(sfdp_table)), offs);
993 offs %= sizeof(sfdp_table);
994 }
995 toread = min(sizeof(sfdp_table) - offs, readcnt);
996 memcpy(readarr, sfdp_table + offs, toread);
997 if (toread < readcnt)
998 msg_pdbg("Crossing the SFDP table boundary in a single "
999 "continuous chunk produces undefined results "
1000 "after that point.\n");
1001 break;
hailfinger6ead7222010-11-01 22:07:04 +00001002 default:
1003 /* No special response. */
1004 break;
1005 }
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001006 if (writearr[0] != JEDEC_WREN && writearr[0] != JEDEC_EWSR)
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001007 data->emu_status &= ~SPI_SR_WEL;
hailfinger6ead7222010-11-01 22:07:04 +00001008 return 0;
1009}
1010#endif
1011
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001012static struct emu_data* get_data_from_context(const struct flashctx *flash)
1013{
1014 if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))
1015 return (struct emu_data *)flash->mst->par.data;
1016 else if (dummy_buses_supported & BUS_SPI)
1017 return (struct emu_data *)flash->mst->spi.data;
1018
1019 return NULL; /* buses was set to BUS_NONE. */
1020}
1021
Stuart langleyc98e43f2020-03-26 20:27:36 +11001022static int dummy_spi_send_command(const struct flashctx *flash, unsigned int writecnt,
1023 unsigned int readcnt,
1024 const unsigned char *writearr,
1025 unsigned char *readarr)
hailfingerf91e3b52009-05-14 12:59:36 +00001026{
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001027 unsigned int i;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001028 struct emu_data *emu_data = get_data_from_context(flash);
1029 if (!emu_data) {
1030 msg_perr("No data in flash context!\n");
1031 return 1;
1032 }
hailfingerf91e3b52009-05-14 12:59:36 +00001033
hailfinger50c335f2010-01-09 04:32:23 +00001034 msg_pspew("%s:", __func__);
hailfingerf91e3b52009-05-14 12:59:36 +00001035
hailfinger50c335f2010-01-09 04:32:23 +00001036 msg_pspew(" writing %u bytes:", writecnt);
hailfingerf91e3b52009-05-14 12:59:36 +00001037 for (i = 0; i < writecnt; i++)
hailfinger50c335f2010-01-09 04:32:23 +00001038 msg_pspew(" 0x%02x", writearr[i]);
hailfingerf91e3b52009-05-14 12:59:36 +00001039
hailfinger6ead7222010-11-01 22:07:04 +00001040 /* Response for unknown commands and missing chip is 0xff. */
1041 memset(readarr, 0xff, readcnt);
1042#if EMULATE_SPI_CHIP
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001043 switch (emu_data->emu_chip) {
hailfinger6ead7222010-11-01 22:07:04 +00001044 case EMULATE_ST_M25P10_RES:
1045 case EMULATE_SST_SST25VF040_REMS:
1046 case EMULATE_SST_SST25VF032B:
Stuart Langley78cacf72020-04-23 11:48:01 +10001047 case EMULATE_MACRONIX_MX25L6436:
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001048 case EMULATE_WINBOND_W25Q128FV:
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001049 case EMULATE_VARIABLE_SIZE:
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001050 if (emulate_spi_chip_response(writecnt, readcnt, writearr,
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001051 readarr, emu_data)) {
Carl-Daniel Hailfingerc49783d2016-08-05 10:52:06 -07001052 msg_pdbg("Invalid command sent to flash chip!\n");
hailfinger6ead7222010-11-01 22:07:04 +00001053 return 1;
1054 }
1055 break;
1056 default:
1057 break;
1058 }
1059#endif
hailfinger50c335f2010-01-09 04:32:23 +00001060 msg_pspew(" reading %u bytes:", readcnt);
uwe8d342eb2011-07-28 08:13:25 +00001061 for (i = 0; i < readcnt; i++)
hailfinger6ead7222010-11-01 22:07:04 +00001062 msg_pspew(" 0x%02x", readarr[i]);
hailfinger50c335f2010-01-09 04:32:23 +00001063 msg_pspew("\n");
David Hendricks84377002014-09-09 16:09:31 -07001064
Edward O'Callaghan0037f452020-09-17 13:32:00 +10001065 programmer_delay((writecnt + readcnt) * emu_data->delay_us);
hailfingerf91e3b52009-05-14 12:59:36 +00001066 return 0;
1067}
hailfingera8727712010-06-20 10:58:32 +00001068
Stuart langleyc98e43f2020-03-26 20:27:36 +11001069static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
hailfingerc7d06c62010-07-14 16:19:05 +00001070{
hailfinger6ead7222010-11-01 22:07:04 +00001071 return spi_write_chunked(flash, buf, start, len,
1072 spi_write_256_chunksize);
hailfingerc7d06c62010-07-14 16:19:05 +00001073}
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001074
1075#if EMULATE_CHIP && EMULATE_SPI_CHIP
Souvik Ghoshd75cd672016-06-17 14:21:39 -07001076int probe_variable_size(struct flashctx *flash)
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001077{
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001078 unsigned int i;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001079 const struct emu_data *emu_data = get_data_from_context(flash);
1080 if (!emu_data) {
1081 msg_perr("No data in flash context!\n");
1082 return 0;
1083 }
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001084
1085 /* Skip the probing if we don't emulate this chip. */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001086 if (emu_data->emu_chip != EMULATE_VARIABLE_SIZE)
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001087 return 0;
1088
1089 /*
Souvik Ghoshd75cd672016-06-17 14:21:39 -07001090 * This will break if one day flashctx becomes read-only.
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001091 * Once that happens, we need to have special hacks in functions:
1092 *
1093 * erase_and_write_flash() in flashrom.c
1094 * read_flash_to_file()
1095 * handle_romentries()
1096 * ...
1097 *
1098 * Search "total_size * 1024" in code.
1099 */
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001100 flash->chip->total_size = emu_data->emu_chip_size / 1024;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001101 msg_cdbg("%s: set flash->total_size to %dK bytes.\n", __func__,
Patrick Georgif3fa2992017-02-02 16:24:44 +01001102 flash->chip->total_size);
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001103
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001104 if (emu_data->erase_to_zero)
Alan Greendbeec2b2019-09-16 14:36:52 +10001105 flash->chip->feature_bits |= FEATURE_ERASED_ZERO;
David Hendricks0eda2a82014-09-12 16:32:05 -07001106
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001107 /* Update the first count of each of the block_erasers. */
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001108 for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
Patrick Georgif3fa2992017-02-02 16:24:44 +01001109 struct block_eraser *eraser = &flash->chip->block_erasers[i];
Edward O'Callaghanec8b0d92020-09-17 17:27:45 +10001110 if (!eraser->block_erase)
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001111 break;
1112
Namyoon Woob71a2962020-08-27 16:27:49 -07001113 eraser->eraseblocks[0].count = 1;
Lachlan Bishopbf1476e2020-09-10 14:57:05 +10001114 eraser->eraseblocks[0].size = emu_data->emu_chip_size;
Louis Yung-Chieh Loe53fa0f2011-04-11 17:18:41 +08001115 msg_cdbg("%s: eraser.size=%d, .count=%d\n",
1116 __func__, eraser->eraseblocks[0].size,
1117 eraser->eraseblocks[0].count);
1118 }
1119
1120 return 1;
1121}
1122#endif