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uwea3a82c92009-05-15 17:02:34 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
hailfingerbf923c32011-02-15 22:44:27 +00005 * Copyright (C) 2010, 2011 Carl-Daniel Hailfinger
uwea3a82c92009-05-15 17:02:34 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
uwea3a82c92009-05-15 17:02:34 +000016 */
17
18#include <stdlib.h>
19#include <string.h>
uwea3a82c92009-05-15 17:02:34 +000020#include "flash.h"
hailfinger428f6852010-07-27 22:41:39 +000021#include "programmer.h"
Mayur Panchalf4796862019-08-05 15:46:12 +100022#include "hwaccess.h"
uwea3a82c92009-05-15 17:02:34 +000023
uwea3a82c92009-05-15 17:02:34 +000024struct pci_access *pacc;
uwea3a82c92009-05-15 17:02:34 +000025
hailfingerbf923c32011-02-15 22:44:27 +000026enum pci_bartype {
27 TYPE_MEMBAR,
28 TYPE_IOBAR,
29 TYPE_ROMBAR,
30 TYPE_UNKNOWN
31};
32
Patrick Georgif776a442017-03-28 21:34:33 +020033uintptr_t pcidev_readbar(struct pci_dev *dev, int bar)
uwea3a82c92009-05-15 17:02:34 +000034{
hailfingerbf923c32011-02-15 22:44:27 +000035 uint64_t addr;
36 uint32_t upperaddr;
37 uint8_t headertype;
38 uint16_t supported_cycles;
39 enum pci_bartype bartype = TYPE_UNKNOWN;
uwea3a82c92009-05-15 17:02:34 +000040
Patrick Georgif776a442017-03-28 21:34:33 +020041
42 headertype = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f;
43 msg_pspew("PCI header type 0x%02x\n", headertype);
44
45 /* Don't use dev->base_addr[x] (as value for 'bar'), won't work on older libpci. */
46 addr = pci_read_long(dev, bar);
47
48 /* Sanity checks. */
49 switch (headertype) {
50 case PCI_HEADER_TYPE_NORMAL:
51 switch (bar) {
52 case PCI_BASE_ADDRESS_0:
53 case PCI_BASE_ADDRESS_1:
54 case PCI_BASE_ADDRESS_2:
55 case PCI_BASE_ADDRESS_3:
56 case PCI_BASE_ADDRESS_4:
57 case PCI_BASE_ADDRESS_5:
58 if ((addr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
59 bartype = TYPE_IOBAR;
60 else
61 bartype = TYPE_MEMBAR;
62 break;
63 case PCI_ROM_ADDRESS:
64 bartype = TYPE_ROMBAR;
65 break;
66 }
67 break;
68 case PCI_HEADER_TYPE_BRIDGE:
69 switch (bar) {
70 case PCI_BASE_ADDRESS_0:
71 case PCI_BASE_ADDRESS_1:
72 if ((addr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
73 bartype = TYPE_IOBAR;
74 else
75 bartype = TYPE_MEMBAR;
76 break;
77 case PCI_ROM_ADDRESS1:
78 bartype = TYPE_ROMBAR;
79 break;
80 }
81 break;
82 case PCI_HEADER_TYPE_CARDBUS:
83 break;
84 default:
85 msg_perr("Unknown PCI header type 0x%02x, BAR type cannot be determined reliably.\n",
86 headertype);
87 break;
88 }
89
90 supported_cycles = pci_read_word(dev, PCI_COMMAND);
91
92 msg_pdbg("Requested BAR is of type ");
93 switch (bartype) {
94 case TYPE_MEMBAR:
95 msg_pdbg("MEM");
96 if (!(supported_cycles & PCI_COMMAND_MEMORY)) {
97 msg_perr("MEM BAR access requested, but device has MEM space accesses disabled.\n");
98 /* TODO: Abort here? */
99 }
100 msg_pdbg(", %sbit, %sprefetchable\n",
101 ((addr & 0x6) == 0x0) ? "32" : (((addr & 0x6) == 0x4) ? "64" : "reserved"),
102 (addr & 0x8) ? "" : "not ");
103 if ((addr & 0x6) == 0x4) {
104 /* The spec says that a 64-bit register consumes
105 * two subsequent dword locations.
106 */
107 upperaddr = pci_read_long(dev, bar + 4);
108 if (upperaddr != 0x00000000) {
109 /* Fun! A real 64-bit resource. */
110 if (sizeof(uintptr_t) != sizeof(uint64_t)) {
111 msg_perr("BAR unreachable!");
112 /* TODO: Really abort here? If multiple PCI devices match,
113 * we might never tell the user about the other devices.
114 */
115 return 0;
116 }
117 addr |= (uint64_t)upperaddr << 32;
118 }
119 }
120 addr &= PCI_BASE_ADDRESS_MEM_MASK;
121 break;
122 case TYPE_IOBAR:
123 msg_pdbg("I/O\n");
124#if __FLASHROM_HAVE_OUTB__
125 if (!(supported_cycles & PCI_COMMAND_IO)) {
126 msg_perr("I/O BAR access requested, but device has I/O space accesses disabled.\n");
127 /* TODO: Abort here? */
128 }
129#else
130 msg_perr("I/O BAR access requested, but flashrom does not support I/O BAR access on this "
131 "platform (yet).\n");
132#endif
133 addr &= PCI_BASE_ADDRESS_IO_MASK;
134 break;
135 case TYPE_ROMBAR:
136 msg_pdbg("ROM\n");
137 /* Not sure if this check is needed. */
138 if (!(supported_cycles & PCI_COMMAND_MEMORY)) {
139 msg_perr("MEM BAR access requested, but device has MEM space accesses disabled.\n");
140 /* TODO: Abort here? */
141 }
142 addr &= PCI_ROM_ADDRESS_MASK;
143 break;
144 case TYPE_UNKNOWN:
145 msg_perr("BAR type unknown, please report a bug at flashrom@flashrom.org\n");
146 }
147
148 return (uintptr_t)addr;
149}
150
Patrick Georgifc8e5d92017-03-21 16:49:15 +0100151static int pcidev_shutdown(void *data)
152{
153 if (pacc == NULL) {
154 msg_perr("%s: Tried to cleanup an invalid PCI context!\n"
155 "Please report a bug at flashrom@flashrom.org\n", __func__);
156 return 1;
157 }
158 pci_cleanup(pacc);
Edward O'Callaghan80aedd02019-08-02 22:36:56 +1000159 pacc = NULL;
Patrick Georgifc8e5d92017-03-21 16:49:15 +0100160 return 0;
161}
162
163int pci_init_common(void)
164{
165 if (pacc != NULL) {
166 msg_perr("%s: Tried to allocate a new PCI context, but there is still an old one!\n"
167 "Please report a bug at flashrom@flashrom.org\n", __func__);
168 return 1;
169 }
170 pacc = pci_alloc(); /* Get the pci_access structure */
171 pci_init(pacc); /* Initialize the PCI library */
172 if (register_shutdown(pcidev_shutdown, NULL))
173 return 1;
174 pci_scan_bus(pacc); /* We want to get the list of devices */
175 return 0;
176}
177
Edward O'Callaghan71939322020-05-15 12:53:44 +1000178/* pcidev_init gets an array of allowed PCI device IDs and returns a pointer to struct pci_dev iff exactly one
179 * match was found. If the "pci=bb:dd.f" programmer parameter was specified, a match is only considered if it
180 * also matches the specified bus:device.function.
181 * For convenience, this function also registers its own undo handlers.
182 */
Patrick Georgi7c30fa92017-03-28 22:47:12 +0200183struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar)
uwea3a82c92009-05-15 17:02:34 +0000184{
185 struct pci_dev *dev;
Edward O'Callaghan71939322020-05-15 12:53:44 +1000186 struct pci_dev *found_dev = NULL;
hailfinger1ff33dc2010-07-03 11:02:10 +0000187 struct pci_filter filter;
hailfinger1ef766d2010-07-06 09:55:48 +0000188 char *pcidev_bdf;
uwea3a82c92009-05-15 17:02:34 +0000189 char *msg = NULL;
190 int found = 0;
Edward O'Callaghan71939322020-05-15 12:53:44 +1000191 int i;
uwea3a82c92009-05-15 17:02:34 +0000192
Patrick Georgifc8e5d92017-03-21 16:49:15 +0100193 if (pci_init_common() != 0)
Patrick Georgi7c30fa92017-03-28 22:47:12 +0200194 return NULL;
uwea3a82c92009-05-15 17:02:34 +0000195 pci_filter_init(pacc, &filter);
196
hailfinger0d703d42011-03-07 01:08:09 +0000197 /* Filter by bb:dd.f (if supplied by the user). */
hailfingerddeb4ac2010-07-08 10:13:37 +0000198 pcidev_bdf = extract_programmer_param("pci");
uwea3a82c92009-05-15 17:02:34 +0000199 if (pcidev_bdf != NULL) {
200 if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) {
snelsone42c3802010-05-07 20:09:04 +0000201 msg_perr("Error: %s\n", msg);
Edward O'Callaghand993f272019-06-14 15:33:17 +1000202 return NULL;
uwea3a82c92009-05-15 17:02:34 +0000203 }
204 }
hailfinger1ef766d2010-07-06 09:55:48 +0000205 free(pcidev_bdf);
uwea3a82c92009-05-15 17:02:34 +0000206
207 for (dev = pacc->devices; dev; dev = dev->next) {
208 if (pci_filter_match(&filter, dev)) {
Daniel Verkampd3e2a862020-10-12 12:55:56 -0700209 pci_fill_info(dev, PCI_FILL_IDENT);
Edward O'Callaghan71939322020-05-15 12:53:44 +1000210 /* Check against list of supported devices. */
211 for (i = 0; devs[i].device_name != NULL; i++)
212 if ((dev->vendor_id == devs[i].vendor_id) &&
213 (dev->device_id == devs[i].device_id))
214 break;
215 /* Not supported, try the next one. */
216 if (devs[i].device_name == NULL)
217 continue;
218
219 msg_pdbg("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n", devs[i].vendor_name,
220 devs[i].device_name, dev->vendor_id, dev->device_id, dev->bus, dev->dev,
221 dev->func);
222 if (devs[i].status == NT)
223 msg_pinfo("===\nThis PCI device is UNTESTED. Please report the 'flashrom -p "
224 "xxxx' output\n"
225 "to flashrom@flashrom.org if it works for you. Please add the name "
226 "of your\n"
227 "PCI device to the subject. Thank you for your help!\n===\n");
228
hailfinger0d703d42011-03-07 01:08:09 +0000229 /* FIXME: We should count all matching devices, not
230 * just those with a valid BAR.
231 */
Edward O'Callaghan71939322020-05-15 12:53:44 +1000232 if (pcidev_readbar(dev, bar) != 0) {
233 found_dev = dev;
uwea3a82c92009-05-15 17:02:34 +0000234 found++;
uweb3a82ef2009-05-16 21:39:19 +0000235 }
uwea3a82c92009-05-15 17:02:34 +0000236 }
237 }
238
239 /* Only continue if exactly one supported PCI dev has been found. */
240 if (found == 0) {
snelsone42c3802010-05-07 20:09:04 +0000241 msg_perr("Error: No supported PCI device found.\n");
Edward O'Callaghand993f272019-06-14 15:33:17 +1000242 return NULL;
uwea3a82c92009-05-15 17:02:34 +0000243 } else if (found > 1) {
Edward O'Callaghan80aedd02019-08-02 22:36:56 +1000244 msg_perr("Error: Multiple supported PCI devices found. Use 'flashrom -p xxxx:pci=bb:dd.f'\n"
Patrick Georgi2f83ace2017-03-22 21:23:35 +0100245 "to explicitly select the card with the given BDF (PCI bus, device, function).\n");
Edward O'Callaghand993f272019-06-14 15:33:17 +1000246 return NULL;
uwea3a82c92009-05-15 17:02:34 +0000247 }
248
Edward O'Callaghan71939322020-05-15 12:53:44 +1000249 return found_dev;
uwea3a82c92009-05-15 17:02:34 +0000250}
251
hailfingerf31cbdc2010-11-10 15:25:18 +0000252enum pci_write_type {
253 pci_write_type_byte,
254 pci_write_type_word,
255 pci_write_type_long,
256};
257
258struct undo_pci_write_data {
Edward O'Callaghan71939322020-05-15 12:53:44 +1000259 struct pci_dev *dev;
hailfingerf31cbdc2010-11-10 15:25:18 +0000260 int reg;
261 enum pci_write_type type;
262 union {
263 uint8_t bytedata;
264 uint16_t worddata;
265 uint32_t longdata;
266 };
267};
268
Edward O'Callaghan71939322020-05-15 12:53:44 +1000269static int undo_pci_write(void *p)
hailfingerf31cbdc2010-11-10 15:25:18 +0000270{
271 struct undo_pci_write_data *data = p;
Edward O'Callaghan71939322020-05-15 12:53:44 +1000272 if (pacc == NULL || data->dev == NULL) {
273 msg_perr("%s: Tried to undo PCI writes without a valid PCI %s!\n"
274 "Please report a bug at flashrom@flashrom.org\n",
275 __func__, data->dev == NULL ? "device" : "context");
Edward O'Callaghan80aedd02019-08-02 22:36:56 +1000276 return 1;
277 }
hailfingerf31cbdc2010-11-10 15:25:18 +0000278 msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n",
Edward O'Callaghan71939322020-05-15 12:53:44 +1000279 data->dev->bus, data->dev->dev, data->dev->func, data->reg);
hailfingerf31cbdc2010-11-10 15:25:18 +0000280 switch (data->type) {
281 case pci_write_type_byte:
Edward O'Callaghan71939322020-05-15 12:53:44 +1000282 pci_write_byte(data->dev, data->reg, data->bytedata);
hailfingerf31cbdc2010-11-10 15:25:18 +0000283 break;
284 case pci_write_type_word:
Edward O'Callaghan71939322020-05-15 12:53:44 +1000285 pci_write_word(data->dev, data->reg, data->worddata);
hailfingerf31cbdc2010-11-10 15:25:18 +0000286 break;
287 case pci_write_type_long:
Edward O'Callaghan71939322020-05-15 12:53:44 +1000288 pci_write_long(data->dev, data->reg, data->longdata);
hailfingerf31cbdc2010-11-10 15:25:18 +0000289 break;
290 }
291 /* p was allocated in register_undo_pci_write. */
292 free(p);
dhendrix0ffc2eb2011-06-14 01:35:36 +0000293 return 0;
hailfingerf31cbdc2010-11-10 15:25:18 +0000294}
295
Edward O'Callaghan71939322020-05-15 12:53:44 +1000296#define register_undo_pci_write(a, b, c) \
hailfingerf31cbdc2010-11-10 15:25:18 +0000297{ \
298 struct undo_pci_write_data *undo_pci_write_data; \
299 undo_pci_write_data = malloc(sizeof(struct undo_pci_write_data)); \
stefanctd611e8f2011-07-12 22:35:21 +0000300 if (!undo_pci_write_data) { \
301 msg_gerr("Out of memory!\n"); \
302 exit(1); \
303 } \
Edward O'Callaghan71939322020-05-15 12:53:44 +1000304 if (pacc) \
305 undo_pci_write_data->dev = pci_get_dev(pacc, \
306 a->domain, a->bus, a->dev, a->func); \
307 else \
308 undo_pci_write_data->dev = NULL; \
hailfingerf31cbdc2010-11-10 15:25:18 +0000309 undo_pci_write_data->reg = b; \
310 undo_pci_write_data->type = pci_write_type_##c; \
311 undo_pci_write_data->c##data = pci_read_##c(dev, reg); \
312 register_shutdown(undo_pci_write, undo_pci_write_data); \
313}
314
315#define register_undo_pci_write_byte(a, b) register_undo_pci_write(a, b, byte)
316#define register_undo_pci_write_word(a, b) register_undo_pci_write(a, b, word)
317#define register_undo_pci_write_long(a, b) register_undo_pci_write(a, b, long)
318
319int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data)
320{
321 register_undo_pci_write_byte(dev, reg);
322 return pci_write_byte(dev, reg, data);
323}
Edward O'Callaghand993f272019-06-14 15:33:17 +1000324
hailfingerf31cbdc2010-11-10 15:25:18 +0000325int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data)
326{
327 register_undo_pci_write_word(dev, reg);
328 return pci_write_word(dev, reg, data);
329}
Edward O'Callaghand993f272019-06-14 15:33:17 +1000330
hailfingerf31cbdc2010-11-10 15:25:18 +0000331int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data)
332{
333 register_undo_pci_write_long(dev, reg);
334 return pci_write_long(dev, reg, data);
335}