blob: 9fde1d96c10112952874344602793f4b16303673 [file] [log] [blame]
uwea3a82c92009-05-15 17:02:34 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
hailfingerbf923c32011-02-15 22:44:27 +00005 * Copyright (C) 2010, 2011 Carl-Daniel Hailfinger
uwea3a82c92009-05-15 17:02:34 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
uwea3a82c92009-05-15 17:02:34 +000016 */
17
18#include <stdlib.h>
19#include <string.h>
uwea3a82c92009-05-15 17:02:34 +000020#include "flash.h"
hailfinger428f6852010-07-27 22:41:39 +000021#include "programmer.h"
uwea3a82c92009-05-15 17:02:34 +000022
uwea3a82c92009-05-15 17:02:34 +000023struct pci_access *pacc;
uwea3a82c92009-05-15 17:02:34 +000024
hailfingerbf923c32011-02-15 22:44:27 +000025enum pci_bartype {
26 TYPE_MEMBAR,
27 TYPE_IOBAR,
28 TYPE_ROMBAR,
29 TYPE_UNKNOWN
30};
31
Patrick Georgif776a442017-03-28 21:34:33 +020032uintptr_t pcidev_readbar(struct pci_dev *dev, int bar)
uwea3a82c92009-05-15 17:02:34 +000033{
hailfingerbf923c32011-02-15 22:44:27 +000034 uint64_t addr;
35 uint32_t upperaddr;
36 uint8_t headertype;
37 uint16_t supported_cycles;
38 enum pci_bartype bartype = TYPE_UNKNOWN;
uwea3a82c92009-05-15 17:02:34 +000039
Patrick Georgif776a442017-03-28 21:34:33 +020040
41 headertype = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f;
42 msg_pspew("PCI header type 0x%02x\n", headertype);
43
44 /* Don't use dev->base_addr[x] (as value for 'bar'), won't work on older libpci. */
45 addr = pci_read_long(dev, bar);
46
47 /* Sanity checks. */
48 switch (headertype) {
49 case PCI_HEADER_TYPE_NORMAL:
50 switch (bar) {
51 case PCI_BASE_ADDRESS_0:
52 case PCI_BASE_ADDRESS_1:
53 case PCI_BASE_ADDRESS_2:
54 case PCI_BASE_ADDRESS_3:
55 case PCI_BASE_ADDRESS_4:
56 case PCI_BASE_ADDRESS_5:
57 if ((addr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
58 bartype = TYPE_IOBAR;
59 else
60 bartype = TYPE_MEMBAR;
61 break;
62 case PCI_ROM_ADDRESS:
63 bartype = TYPE_ROMBAR;
64 break;
65 }
66 break;
67 case PCI_HEADER_TYPE_BRIDGE:
68 switch (bar) {
69 case PCI_BASE_ADDRESS_0:
70 case PCI_BASE_ADDRESS_1:
71 if ((addr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
72 bartype = TYPE_IOBAR;
73 else
74 bartype = TYPE_MEMBAR;
75 break;
76 case PCI_ROM_ADDRESS1:
77 bartype = TYPE_ROMBAR;
78 break;
79 }
80 break;
81 case PCI_HEADER_TYPE_CARDBUS:
82 break;
83 default:
84 msg_perr("Unknown PCI header type 0x%02x, BAR type cannot be determined reliably.\n",
85 headertype);
86 break;
87 }
88
89 supported_cycles = pci_read_word(dev, PCI_COMMAND);
90
91 msg_pdbg("Requested BAR is of type ");
92 switch (bartype) {
93 case TYPE_MEMBAR:
94 msg_pdbg("MEM");
95 if (!(supported_cycles & PCI_COMMAND_MEMORY)) {
96 msg_perr("MEM BAR access requested, but device has MEM space accesses disabled.\n");
97 /* TODO: Abort here? */
98 }
99 msg_pdbg(", %sbit, %sprefetchable\n",
100 ((addr & 0x6) == 0x0) ? "32" : (((addr & 0x6) == 0x4) ? "64" : "reserved"),
101 (addr & 0x8) ? "" : "not ");
102 if ((addr & 0x6) == 0x4) {
103 /* The spec says that a 64-bit register consumes
104 * two subsequent dword locations.
105 */
106 upperaddr = pci_read_long(dev, bar + 4);
107 if (upperaddr != 0x00000000) {
108 /* Fun! A real 64-bit resource. */
109 if (sizeof(uintptr_t) != sizeof(uint64_t)) {
110 msg_perr("BAR unreachable!");
111 /* TODO: Really abort here? If multiple PCI devices match,
112 * we might never tell the user about the other devices.
113 */
114 return 0;
115 }
116 addr |= (uint64_t)upperaddr << 32;
117 }
118 }
119 addr &= PCI_BASE_ADDRESS_MEM_MASK;
120 break;
121 case TYPE_IOBAR:
122 msg_pdbg("I/O\n");
123#if __FLASHROM_HAVE_OUTB__
124 if (!(supported_cycles & PCI_COMMAND_IO)) {
125 msg_perr("I/O BAR access requested, but device has I/O space accesses disabled.\n");
126 /* TODO: Abort here? */
127 }
128#else
129 msg_perr("I/O BAR access requested, but flashrom does not support I/O BAR access on this "
130 "platform (yet).\n");
131#endif
132 addr &= PCI_BASE_ADDRESS_IO_MASK;
133 break;
134 case TYPE_ROMBAR:
135 msg_pdbg("ROM\n");
136 /* Not sure if this check is needed. */
137 if (!(supported_cycles & PCI_COMMAND_MEMORY)) {
138 msg_perr("MEM BAR access requested, but device has MEM space accesses disabled.\n");
139 /* TODO: Abort here? */
140 }
141 addr &= PCI_ROM_ADDRESS_MASK;
142 break;
143 case TYPE_UNKNOWN:
144 msg_perr("BAR type unknown, please report a bug at flashrom@flashrom.org\n");
145 }
146
147 return (uintptr_t)addr;
148}
149
150uintptr_t pcidev_validate(struct pci_dev *dev, int bar,
151 const struct dev_entry *devs)
152{
153 int i;
154
uwea3a82c92009-05-15 17:02:34 +0000155 for (i = 0; devs[i].device_name != NULL; i++) {
156 if (dev->device_id != devs[i].device_id)
157 continue;
158
hailfingerbf923c32011-02-15 22:44:27 +0000159 msg_pinfo("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n",
160 devs[i].vendor_name, devs[i].device_name,
161 dev->vendor_id, dev->device_id, dev->bus, dev->dev,
162 dev->func);
163
mkarcher6475d3f2010-02-24 00:04:40 +0000164 if (devs[i].status == NT) {
snelsone42c3802010-05-07 20:09:04 +0000165 msg_pinfo("===\nThis PCI device is UNTESTED. Please "
hailfinger5bae2332010-10-08 11:03:02 +0000166 "report the 'flashrom -p xxxx' output \n"
167 "to flashrom@flashrom.org if it works "
168 "for you. Please add the name of your\n"
169 "PCI device to the subject. Thank you for "
170 "your help!\n===\n");
uwea3a82c92009-05-15 17:02:34 +0000171 }
172
Patrick Georgif776a442017-03-28 21:34:33 +0200173 return pcidev_readbar(dev, bar);
uwea3a82c92009-05-15 17:02:34 +0000174 }
175
176 return 0;
177}
178
Patrick Georgifc8e5d92017-03-21 16:49:15 +0100179static int pcidev_shutdown(void *data)
180{
181 if (pacc == NULL) {
182 msg_perr("%s: Tried to cleanup an invalid PCI context!\n"
183 "Please report a bug at flashrom@flashrom.org\n", __func__);
184 return 1;
185 }
186 pci_cleanup(pacc);
Edward O'Callaghan80aedd02019-08-02 22:36:56 +1000187 pacc = NULL;
Patrick Georgifc8e5d92017-03-21 16:49:15 +0100188 return 0;
189}
190
191int pci_init_common(void)
192{
193 if (pacc != NULL) {
194 msg_perr("%s: Tried to allocate a new PCI context, but there is still an old one!\n"
195 "Please report a bug at flashrom@flashrom.org\n", __func__);
196 return 1;
197 }
198 pacc = pci_alloc(); /* Get the pci_access structure */
199 pci_init(pacc); /* Initialize the PCI library */
200 if (register_shutdown(pcidev_shutdown, NULL))
201 return 1;
202 pci_scan_bus(pacc); /* We want to get the list of devices */
203 return 0;
204}
205
Patrick Georgi7c30fa92017-03-28 22:47:12 +0200206struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar)
uwea3a82c92009-05-15 17:02:34 +0000207{
208 struct pci_dev *dev;
hailfinger1ff33dc2010-07-03 11:02:10 +0000209 struct pci_filter filter;
hailfinger1ef766d2010-07-06 09:55:48 +0000210 char *pcidev_bdf;
uwea3a82c92009-05-15 17:02:34 +0000211 char *msg = NULL;
212 int found = 0;
Patrick Georgi7c30fa92017-03-28 22:47:12 +0200213 uintptr_t addr = 0;
uwea3a82c92009-05-15 17:02:34 +0000214
Patrick Georgifc8e5d92017-03-21 16:49:15 +0100215 if (pci_init_common() != 0)
Patrick Georgi7c30fa92017-03-28 22:47:12 +0200216 return NULL;
uwea3a82c92009-05-15 17:02:34 +0000217 pci_filter_init(pacc, &filter);
218
hailfinger0d703d42011-03-07 01:08:09 +0000219 /* Filter by bb:dd.f (if supplied by the user). */
hailfingerddeb4ac2010-07-08 10:13:37 +0000220 pcidev_bdf = extract_programmer_param("pci");
uwea3a82c92009-05-15 17:02:34 +0000221 if (pcidev_bdf != NULL) {
222 if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) {
snelsone42c3802010-05-07 20:09:04 +0000223 msg_perr("Error: %s\n", msg);
Edward O'Callaghand993f272019-06-14 15:33:17 +1000224 return NULL;
uwea3a82c92009-05-15 17:02:34 +0000225 }
226 }
hailfinger1ef766d2010-07-06 09:55:48 +0000227 free(pcidev_bdf);
uwea3a82c92009-05-15 17:02:34 +0000228
229 for (dev = pacc->devices; dev; dev = dev->next) {
230 if (pci_filter_match(&filter, dev)) {
hailfinger0d703d42011-03-07 01:08:09 +0000231 /* FIXME: We should count all matching devices, not
232 * just those with a valid BAR.
233 */
uwee2f95ef2009-09-02 23:00:46 +0000234 if ((addr = pcidev_validate(dev, bar, devs)) != 0) {
uwea3a82c92009-05-15 17:02:34 +0000235 found++;
uweb3a82ef2009-05-16 21:39:19 +0000236 }
uwea3a82c92009-05-15 17:02:34 +0000237 }
238 }
239
240 /* Only continue if exactly one supported PCI dev has been found. */
241 if (found == 0) {
snelsone42c3802010-05-07 20:09:04 +0000242 msg_perr("Error: No supported PCI device found.\n");
Edward O'Callaghand993f272019-06-14 15:33:17 +1000243 return NULL;
uwea3a82c92009-05-15 17:02:34 +0000244 } else if (found > 1) {
Edward O'Callaghan80aedd02019-08-02 22:36:56 +1000245 msg_perr("Error: Multiple supported PCI devices found. Use 'flashrom -p xxxx:pci=bb:dd.f'\n"
Patrick Georgi2f83ace2017-03-22 21:23:35 +0100246 "to explicitly select the card with the given BDF (PCI bus, device, function).\n");
Edward O'Callaghand993f272019-06-14 15:33:17 +1000247 return NULL;
uwea3a82c92009-05-15 17:02:34 +0000248 }
249
Patrick Georgid490a172017-03-28 23:03:47 +0200250 return dev;
uwea3a82c92009-05-15 17:02:34 +0000251}
252
Patrick Georgi8ae16572017-03-09 15:59:25 +0100253void print_supported_pcidevs(const struct dev_entry *devs)
uwea3a82c92009-05-15 17:02:34 +0000254{
255 int i;
256
hailfingerf79d1712010-10-06 23:48:34 +0000257 msg_pinfo("PCI devices:\n");
uwea3a82c92009-05-15 17:02:34 +0000258 for (i = 0; devs[i].vendor_name != NULL; i++) {
hailfinger495bc2e2010-10-07 22:21:45 +0000259 msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
uwe8d342eb2011-07-28 08:13:25 +0000260 devs[i].device_name, devs[i].vendor_id,
261 devs[i].device_id,
262 (devs[i].status == NT) ? " (untested)" : "");
uwea3a82c92009-05-15 17:02:34 +0000263 }
264}
hailfingerf31cbdc2010-11-10 15:25:18 +0000265
266enum pci_write_type {
267 pci_write_type_byte,
268 pci_write_type_word,
269 pci_write_type_long,
270};
271
272struct undo_pci_write_data {
273 struct pci_dev dev;
274 int reg;
275 enum pci_write_type type;
276 union {
277 uint8_t bytedata;
278 uint16_t worddata;
279 uint32_t longdata;
280 };
281};
282
David Hendricks93784b42016-08-09 17:00:38 -0700283int undo_pci_write(void *p)
hailfingerf31cbdc2010-11-10 15:25:18 +0000284{
285 struct undo_pci_write_data *data = p;
Edward O'Callaghan80aedd02019-08-02 22:36:56 +1000286 if (pacc == NULL) {
287 msg_perr("%s: Tried to undo PCI writes without a valid PCI context!\n"
288 "Please report a bug at flashrom@flashrom.org\n", __func__);
289 return 1;
290 }
hailfingerf31cbdc2010-11-10 15:25:18 +0000291 msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n",
292 data->dev.bus, data->dev.dev, data->dev.func, data->reg);
293 switch (data->type) {
294 case pci_write_type_byte:
295 pci_write_byte(&data->dev, data->reg, data->bytedata);
296 break;
297 case pci_write_type_word:
298 pci_write_word(&data->dev, data->reg, data->worddata);
299 break;
300 case pci_write_type_long:
301 pci_write_long(&data->dev, data->reg, data->longdata);
302 break;
303 }
304 /* p was allocated in register_undo_pci_write. */
305 free(p);
dhendrix0ffc2eb2011-06-14 01:35:36 +0000306 return 0;
hailfingerf31cbdc2010-11-10 15:25:18 +0000307}
308
309#define register_undo_pci_write(a, b, c) \
310{ \
311 struct undo_pci_write_data *undo_pci_write_data; \
312 undo_pci_write_data = malloc(sizeof(struct undo_pci_write_data)); \
stefanctd611e8f2011-07-12 22:35:21 +0000313 if (!undo_pci_write_data) { \
314 msg_gerr("Out of memory!\n"); \
315 exit(1); \
316 } \
hailfingerf31cbdc2010-11-10 15:25:18 +0000317 undo_pci_write_data->dev = *a; \
318 undo_pci_write_data->reg = b; \
319 undo_pci_write_data->type = pci_write_type_##c; \
320 undo_pci_write_data->c##data = pci_read_##c(dev, reg); \
321 register_shutdown(undo_pci_write, undo_pci_write_data); \
322}
323
324#define register_undo_pci_write_byte(a, b) register_undo_pci_write(a, b, byte)
325#define register_undo_pci_write_word(a, b) register_undo_pci_write(a, b, word)
326#define register_undo_pci_write_long(a, b) register_undo_pci_write(a, b, long)
327
328int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data)
329{
330 register_undo_pci_write_byte(dev, reg);
331 return pci_write_byte(dev, reg, data);
332}
Edward O'Callaghand993f272019-06-14 15:33:17 +1000333
hailfingerf31cbdc2010-11-10 15:25:18 +0000334int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data)
335{
336 register_undo_pci_write_word(dev, reg);
337 return pci_write_word(dev, reg, data);
338}
Edward O'Callaghand993f272019-06-14 15:33:17 +1000339
hailfingerf31cbdc2010-11-10 15:25:18 +0000340int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data)
341{
342 register_undo_pci_write_long(dev, reg);
343 return pci_write_long(dev, reg, data);
344}