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H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001/* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
Beroset095e6a22007-12-29 09:44:23 -05005 * redistributable under the license given in the file "LICENSE"
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00006 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
H. Peter Anvinfe501952007-10-02 21:53:51 -070011#include "compiler.h"
12
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000013#include <stdio.h>
14#include <string.h>
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +000015#include <limits.h>
Keith Kaniosb7a89542007-04-12 02:40:54 +000016#include <inttypes.h>
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000017
18#include "nasm.h"
19#include "disasm.h"
20#include "sync.h"
21#include "insns.h"
H. Peter Anvina4835d42008-05-20 14:21:29 -070022#include "tables.h"
23#include "regdis.h"
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000024
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000025/*
26 * Flags that go into the `segment' field of `insn' structures
27 * during disassembly.
28 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +000029#define SEG_RELATIVE 1
30#define SEG_32BIT 2
31#define SEG_RMREG 4
32#define SEG_DISP8 8
33#define SEG_DISP16 16
34#define SEG_DISP32 32
35#define SEG_NODISP 64
36#define SEG_SIGNED 128
37#define SEG_64BIT 256
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000038
H. Peter Anvin62cb6062007-09-11 22:44:03 +000039/*
40 * Prefix information
41 */
42struct prefix_info {
43 uint8_t osize; /* Operand size */
44 uint8_t asize; /* Address size */
45 uint8_t osp; /* Operand size prefix present */
46 uint8_t asp; /* Address size prefix present */
47 uint8_t rep; /* Rep prefix present */
48 uint8_t seg; /* Segment override prefix present */
49 uint8_t lock; /* Lock prefix present */
H. Peter Anvin7334e3a2008-05-05 18:47:27 -070050 uint8_t vex[3]; /* VEX prefix present */
51 uint8_t vex_m; /* VEX.M field */
52 uint8_t vex_v;
53 uint8_t vex_lp; /* VEX.LP fields */
54 uint32_t rex; /* REX prefix present */
H. Peter Anvin62cb6062007-09-11 22:44:03 +000055};
56
H. Peter Anvin0ee01422007-04-16 01:18:30 +000057#define getu8(x) (*(uint8_t *)(x))
H. Peter Anvind1fb15c2007-11-13 09:37:59 -080058#if X86_MEMORY
H. Peter Anvin0ee01422007-04-16 01:18:30 +000059/* Littleendian CPU which can handle unaligned references */
60#define getu16(x) (*(uint16_t *)(x))
61#define getu32(x) (*(uint32_t *)(x))
62#define getu64(x) (*(uint64_t *)(x))
63#else
64static uint16_t getu16(uint8_t *data)
65{
66 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
67}
68static uint32_t getu32(uint8_t *data)
69{
70 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
71}
72static uint64_t getu64(uint8_t *data)
73{
74 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
75}
76#endif
77
78#define gets8(x) ((int8_t)getu8(x))
79#define gets16(x) ((int16_t)getu16(x))
80#define gets32(x) ((int32_t)getu32(x))
81#define gets64(x) ((int64_t)getu64(x))
82
83/* Important: regval must already have been adjusted for rex extensions */
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +000084static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
H. Peter Anvin0ee01422007-04-16 01:18:30 +000085{
H. Peter Anvin0da6b582007-09-12 20:32:39 -070086 if (!(regflags & (REGISTER|REGMEM)))
87 return 0; /* Registers not permissible?! */
88
89 regflags |= REGISTER;
90
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000091 if (!(REG_AL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +000092 return R_AL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000093 if (!(REG_AX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +000094 return R_AX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000095 if (!(REG_EAX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +000096 return R_EAX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +000097 if (!(REG_RAX & ~regflags))
98 return R_RAX;
H. Peter Anvin10101f22003-02-24 23:22:45 +000099 if (!(REG_DL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000100 return R_DL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000101 if (!(REG_DX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000102 return R_DX;
H. Peter Anvin10101f22003-02-24 23:22:45 +0000103 if (!(REG_EDX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000104 return R_EDX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000105 if (!(REG_RDX & ~regflags))
106 return R_RDX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000107 if (!(REG_CL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000108 return R_CL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000109 if (!(REG_CX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000110 return R_CX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000111 if (!(REG_ECX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000112 return R_ECX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000113 if (!(REG_RCX & ~regflags))
114 return R_RCX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000115 if (!(FPU0 & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000116 return R_ST0;
H. Peter Anvind7ed89e2002-04-30 20:52:08 +0000117 if (!(REG_CS & ~regflags))
H. Peter Anvin232badb2002-06-06 02:41:20 +0000118 return (regval == 1) ? R_CS : 0;
H. Peter Anvin76690a12002-04-30 20:52:49 +0000119 if (!(REG_DESS & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000120 return (regval == 0 || regval == 2
H. Peter Anvina4835d42008-05-20 14:21:29 -0700121 || regval == 3 ? nasm_rd_sreg[regval] : 0);
H. Peter Anvin76690a12002-04-30 20:52:49 +0000122 if (!(REG_FSGS & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700123 return (regval == 4 || regval == 5 ? nasm_rd_sreg[regval] : 0);
H. Peter Anvin232badb2002-06-06 02:41:20 +0000124 if (!(REG_SEG67 & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700125 return (regval == 6 || regval == 7 ? nasm_rd_sreg[regval] : 0);
H. Peter Anvin232badb2002-06-06 02:41:20 +0000126
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000127 /* All the entries below look up regval in an 16-entry array */
128 if (regval < 0 || regval > 15)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000129 return 0;
H. Peter Anvin232badb2002-06-06 02:41:20 +0000130
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700131 if (!(REG8 & ~regflags)) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000132 if (rex & REX_P)
H. Peter Anvina4835d42008-05-20 14:21:29 -0700133 return nasm_rd_reg8_rex[regval];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000134 else
H. Peter Anvina4835d42008-05-20 14:21:29 -0700135 return nasm_rd_reg8[regval];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000136 }
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700137 if (!(REG16 & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700138 return nasm_rd_reg16[regval];
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700139 if (!(REG32 & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700140 return nasm_rd_reg32[regval];
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700141 if (!(REG64 & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700142 return nasm_rd_reg64[regval];
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000143 if (!(REG_SREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700144 return nasm_rd_sreg[regval & 7]; /* Ignore REX */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000145 if (!(REG_CREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700146 return nasm_rd_creg[regval];
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000147 if (!(REG_DREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700148 return nasm_rd_dreg[regval];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000149 if (!(REG_TREG & ~regflags)) {
150 if (rex & REX_P)
151 return 0; /* TR registers are ill-defined with rex */
H. Peter Anvina4835d42008-05-20 14:21:29 -0700152 return nasm_rd_treg[regval];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000153 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000154 if (!(FPUREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700155 return nasm_rd_fpureg[regval & 7]; /* Ignore REX */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000156 if (!(MMXREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700157 return nasm_rd_mmxreg[regval & 7]; /* Ignore REX */
H. Peter Anvin4836e332002-04-30 20:56:43 +0000158 if (!(XMMREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700159 return nasm_rd_xmmreg[regval];
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700160 if (!(YMMREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700161 return nasm_rd_ymmreg[regval];
H. Peter Anvin232badb2002-06-06 02:41:20 +0000162
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000163 return 0;
164}
165
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000166/*
H. Peter Anvin7786c362007-09-17 18:45:44 -0700167 * Process a DREX suffix
168 */
169static uint8_t *do_drex(uint8_t *data, insn *ins)
170{
171 uint8_t drex = *data++;
172 operand *dst = &ins->oprs[ins->drexdst];
173
174 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
175 return NULL; /* OC0 mismatch */
176 ins->rex = (ins->rex & ~7) | (drex & 7);
H. Peter Anvin70653092007-10-19 14:42:29 -0700177
H. Peter Anvin7786c362007-09-17 18:45:44 -0700178 dst->segment = SEG_RMREG;
179 dst->basereg = drex >> 4;
180 return data;
181}
182
183
184/*
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000185 * Process an effective address (ModRM) specification.
186 */
Keith Kaniosb7a89542007-04-12 02:40:54 +0000187static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
H. Peter Anvin7786c362007-09-17 18:45:44 -0700188 int segsize, operand * op, insn *ins)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000189{
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000190 int mod, rm, scale, index, base;
H. Peter Anvin7786c362007-09-17 18:45:44 -0700191 int rex;
192 uint8_t sib = 0;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000193
194 mod = (modrm >> 6) & 03;
195 rm = modrm & 07;
196
H. Peter Anvin7786c362007-09-17 18:45:44 -0700197 if (mod != 3 && rm == 4 && asize != 16)
198 sib = *data++;
199
200 if (ins->rex & REX_D) {
201 data = do_drex(data, ins);
202 if (!data)
203 return NULL;
204 }
205 rex = ins->rex;
206
H. Peter Anvine2c80182005-01-15 22:15:51 +0000207 if (mod == 3) { /* pure register version */
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000208 op->basereg = rm+(rex & REX_B ? 8 : 0);
H. Peter Anvine2c80182005-01-15 22:15:51 +0000209 op->segment |= SEG_RMREG;
210 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000211 }
212
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700213 op->disp_size = 0;
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000214 op->eaflags = 0;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000215
216 if (asize == 16) {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000217 /*
218 * <mod> specifies the displacement size (none, byte or
219 * word), and <rm> specifies the register combination.
220 * Exception: mod=0,rm=6 does not specify [BP] as one might
221 * expect, but instead specifies [disp16].
222 */
223 op->indexreg = op->basereg = -1;
224 op->scale = 1; /* always, in 16 bits */
225 switch (rm) {
226 case 0:
227 op->basereg = R_BX;
228 op->indexreg = R_SI;
229 break;
230 case 1:
231 op->basereg = R_BX;
232 op->indexreg = R_DI;
233 break;
234 case 2:
235 op->basereg = R_BP;
236 op->indexreg = R_SI;
237 break;
238 case 3:
239 op->basereg = R_BP;
240 op->indexreg = R_DI;
241 break;
242 case 4:
243 op->basereg = R_SI;
244 break;
245 case 5:
246 op->basereg = R_DI;
247 break;
248 case 6:
249 op->basereg = R_BP;
250 break;
251 case 7:
252 op->basereg = R_BX;
253 break;
254 }
255 if (rm == 6 && mod == 0) { /* special case */
256 op->basereg = -1;
257 if (segsize != 16)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700258 op->disp_size = 16;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000259 mod = 2; /* fake disp16 */
260 }
261 switch (mod) {
262 case 0:
263 op->segment |= SEG_NODISP;
264 break;
265 case 1:
266 op->segment |= SEG_DISP8;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000267 op->offset = (int8_t)*data++;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000268 break;
269 case 2:
270 op->segment |= SEG_DISP16;
271 op->offset = *data++;
272 op->offset |= ((unsigned)*data++) << 8;
273 break;
274 }
275 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000276 } else {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000277 /*
278 * Once again, <mod> specifies displacement size (this time
279 * none, byte or *dword*), while <rm> specifies the base
280 * register. Again, [EBP] is missing, replaced by a pure
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000281 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
282 * and RIP-relative addressing in 64-bit mode.
283 *
284 * However, rm=4
H. Peter Anvine2c80182005-01-15 22:15:51 +0000285 * indicates not a single base register, but instead the
286 * presence of a SIB byte...
287 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000288 int a64 = asize == 64;
289
H. Peter Anvine2c80182005-01-15 22:15:51 +0000290 op->indexreg = -1;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000291
292 if (a64)
H. Peter Anvina4835d42008-05-20 14:21:29 -0700293 op->basereg = nasm_rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000294 else
H. Peter Anvina4835d42008-05-20 14:21:29 -0700295 op->basereg = nasm_rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000296
H. Peter Anvine2c80182005-01-15 22:15:51 +0000297 if (rm == 5 && mod == 0) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000298 if (segsize == 64) {
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000299 op->eaflags |= EAF_REL;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000300 op->segment |= SEG_RELATIVE;
301 mod = 2; /* fake disp32 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000302 }
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000303
304 if (asize != 64)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700305 op->disp_size = asize;
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000306
307 op->basereg = -1;
308 mod = 2; /* fake disp32 */
H. Peter Anvine2c80182005-01-15 22:15:51 +0000309 }
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000310
H. Peter Anvine2c80182005-01-15 22:15:51 +0000311 if (rm == 4) { /* process SIB */
H. Peter Anvin7786c362007-09-17 18:45:44 -0700312 scale = (sib >> 6) & 03;
313 index = (sib >> 3) & 07;
314 base = sib & 07;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000315
H. Peter Anvine2c80182005-01-15 22:15:51 +0000316 op->scale = 1 << scale;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000317
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000318 if (index == 4)
319 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
320 else if (a64)
H. Peter Anvina4835d42008-05-20 14:21:29 -0700321 op->indexreg = nasm_rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000322 else
H. Peter Anvina4835d42008-05-20 14:21:29 -0700323 op->indexreg = nasm_rd_reg32[index | ((rex & REX_X) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000324
325 if (base == 5 && mod == 0) {
326 op->basereg = -1;
327 mod = 2; /* Fake disp32 */
328 } else if (a64)
H. Peter Anvina4835d42008-05-20 14:21:29 -0700329 op->basereg = nasm_rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000330 else
H. Peter Anvina4835d42008-05-20 14:21:29 -0700331 op->basereg = nasm_rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000332
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800333 if (segsize == 16)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700334 op->disp_size = 32;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000335 }
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000336
H. Peter Anvine2c80182005-01-15 22:15:51 +0000337 switch (mod) {
338 case 0:
339 op->segment |= SEG_NODISP;
340 break;
341 case 1:
342 op->segment |= SEG_DISP8;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000343 op->offset = gets8(data);
344 data++;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000345 break;
346 case 2:
347 op->segment |= SEG_DISP32;
H. Peter Anvin08367e22008-01-02 12:19:41 -0800348 op->offset = gets32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000349 data += 4;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000350 break;
351 }
352 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000353 }
354}
355
356/*
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000357 * Determine whether the instruction template in t corresponds to the data
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000358 * stream in data. Return the number of bytes matched if so.
359 */
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800360#define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
361
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000362static int matches(const struct itemplate *t, uint8_t *data,
363 const struct prefix_info *prefix, int segsize, insn *ins)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000364{
Keith Kaniosb7a89542007-04-12 02:40:54 +0000365 uint8_t *r = (uint8_t *)(t->code);
366 uint8_t *origdata = data;
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700367 bool a_used = false, o_used = false;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000368 enum prefixes drep = 0;
369 uint8_t lock = prefix->lock;
370 int osize = prefix->osize;
371 int asize = prefix->asize;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800372 int i, c;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800373 struct operand *opx;
H. Peter Anvina30cc072007-11-18 21:55:26 -0800374 int s_field_for = -1; /* No 144/154 series code encountered */
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +0000375
H. Peter Anvin7eb4a382007-09-17 15:49:30 -0700376 for (i = 0; i < MAX_OPERANDS; i++) {
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700377 ins->oprs[i].segment = ins->oprs[i].disp_size =
H. Peter Anvin7eb4a382007-09-17 15:49:30 -0700378 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
379 }
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +0000380 ins->condition = -1;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000381 ins->rex = prefix->rex;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800382 memset(ins->prefixes, 0, sizeof ins->prefixes);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000383
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000384 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700385 return false;
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000386
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000387 if (prefix->rep == 0xF2)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000388 drep = P_REPNE;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000389 else if (prefix->rep == 0xF3)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000390 drep = P_REP;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000391
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800392 while ((c = *r++) != 0) {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800393 opx = &ins->oprs[c & 3];
394
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800395 switch (c) {
396 case 01:
397 case 02:
398 case 03:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000399 while (c--)
400 if (*r++ != *data++)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700401 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800402 break;
403
404 case 04:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000405 switch (*data++) {
406 case 0x07:
407 ins->oprs[0].basereg = 0;
408 break;
409 case 0x17:
410 ins->oprs[0].basereg = 2;
411 break;
412 case 0x1F:
413 ins->oprs[0].basereg = 3;
414 break;
415 default:
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700416 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000417 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800418 break;
419
420 case 05:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000421 switch (*data++) {
422 case 0xA1:
423 ins->oprs[0].basereg = 4;
424 break;
425 case 0xA9:
426 ins->oprs[0].basereg = 5;
427 break;
428 default:
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700429 return false;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000430 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800431 break;
432
433 case 06:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000434 switch (*data++) {
435 case 0x06:
436 ins->oprs[0].basereg = 0;
437 break;
438 case 0x0E:
439 ins->oprs[0].basereg = 1;
440 break;
441 case 0x16:
442 ins->oprs[0].basereg = 2;
443 break;
444 case 0x1E:
445 ins->oprs[0].basereg = 3;
446 break;
447 default:
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700448 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000449 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800450 break;
451
452 case 07:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000453 switch (*data++) {
454 case 0xA0:
455 ins->oprs[0].basereg = 4;
456 break;
457 case 0xA8:
458 ins->oprs[0].basereg = 5;
459 break;
460 default:
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700461 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000462 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800463 break;
464
465 case4(010):
466 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000467 int t = *r++, d = *data++;
468 if (d < t || d > t + 7)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700469 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000470 else {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800471 opx->basereg = (d-t)+
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000472 (ins->rex & REX_B ? 8 : 0);
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800473 opx->segment |= SEG_RMREG;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000474 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800475 break;
476 }
477
478 case4(014):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800479 opx->offset = (int8_t)*data++;
480 opx->segment |= SEG_SIGNED;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800481 break;
482
483 case4(020):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800484 opx->offset = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800485 break;
486
487 case4(024):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800488 opx->offset = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800489 break;
490
491 case4(030):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800492 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000493 data += 2;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800494 break;
495
496 case4(034):
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000497 if (osize == 32) {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800498 opx->offset = getu32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000499 data += 4;
500 } else {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800501 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000502 data += 2;
503 }
H. Peter Anvine2c80182005-01-15 22:15:51 +0000504 if (segsize != asize)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800505 opx->disp_size = asize;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800506 break;
507
508 case4(040):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800509 opx->offset = getu32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000510 data += 4;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800511 break;
512
513 case4(044):
H. Peter Anvinb061d592007-04-16 02:02:06 +0000514 switch (asize) {
515 case 16:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800516 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000517 data += 2;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800518 if (segsize != 16)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800519 opx->disp_size = 16;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000520 break;
521 case 32:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800522 opx->offset = getu32(data);
H. Peter Anvinb061d592007-04-16 02:02:06 +0000523 data += 4;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800524 if (segsize == 16)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800525 opx->disp_size = 32;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000526 break;
527 case 64:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800528 opx->offset = getu64(data);
529 opx->disp_size = 64;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000530 data += 8;
531 break;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000532 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800533 break;
534
535 case4(050):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800536 opx->offset = gets8(data++);
537 opx->segment |= SEG_RELATIVE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800538 break;
539
540 case4(054):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800541 opx->offset = getu64(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000542 data += 8;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800543 break;
544
545 case4(060):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800546 opx->offset = gets16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000547 data += 2;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800548 opx->segment |= SEG_RELATIVE;
549 opx->segment &= ~SEG_32BIT;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800550 break;
551
552 case4(064):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800553 opx->segment |= SEG_RELATIVE;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000554 if (osize == 16) {
H. Peter Anvin08367e22008-01-02 12:19:41 -0800555 opx->offset = gets16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000556 data += 2;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800557 opx->segment &= ~(SEG_32BIT|SEG_64BIT);
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000558 } else if (osize == 32) {
H. Peter Anvin08367e22008-01-02 12:19:41 -0800559 opx->offset = gets32(data);
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000560 data += 4;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800561 opx->segment &= ~SEG_64BIT;
562 opx->segment |= SEG_32BIT;
H. Peter Anvin70653092007-10-19 14:42:29 -0700563 }
H. Peter Anvine2c80182005-01-15 22:15:51 +0000564 if (segsize != osize) {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800565 opx->type =
566 (opx->type & ~SIZE_MASK)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000567 | ((osize == 16) ? BITS16 : BITS32);
568 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800569 break;
570
571 case4(070):
H. Peter Anvin08367e22008-01-02 12:19:41 -0800572 opx->offset = gets32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000573 data += 4;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800574 opx->segment |= SEG_32BIT | SEG_RELATIVE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800575 break;
576
577 case4(0100):
578 case4(0110):
579 case4(0120):
580 case4(0130):
581 {
582 int modrm = *data++;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800583 opx->segment |= SEG_RMREG;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000584 data = do_ea(data, modrm, asize, segsize,
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800585 &ins->oprs[(c >> 3) & 3], ins);
H. Peter Anvin7786c362007-09-17 18:45:44 -0700586 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700587 return false;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800588 opx->basereg = ((modrm >> 3)&7)+
H. Peter Anvin7786c362007-09-17 18:45:44 -0700589 (ins->rex & REX_R ? 8 : 0);
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800590 break;
591 }
592
593 case4(0140):
H. Peter Anvina30cc072007-11-18 21:55:26 -0800594 if (s_field_for == (c & 3)) {
595 opx->offset = gets8(data);
596 data++;
597 } else {
598 opx->offset = getu16(data);
599 data += 2;
600 }
601 break;
602
603 case4(0144):
604 case4(0154):
605 s_field_for = (*data & 0x02) ? c & 3 : -1;
606 if ((*data++ & ~0x02) != *r++)
607 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800608 break;
609
610 case4(0150):
H. Peter Anvina30cc072007-11-18 21:55:26 -0800611 if (s_field_for == (c & 3)) {
612 opx->offset = gets8(data);
613 data++;
614 } else {
615 opx->offset = getu32(data);
616 data += 4;
617 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800618 break;
619
620 case4(0160):
621 ins->rex |= REX_D;
H. Peter Anvin7786c362007-09-17 18:45:44 -0700622 ins->drexdst = c & 3;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800623 break;
624
625 case4(0164):
626 ins->rex |= REX_D|REX_OC;
627 ins->drexdst = c & 3;
628 break;
629
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800630 case 0171:
H. Peter Anvin7786c362007-09-17 18:45:44 -0700631 data = do_drex(data, ins);
632 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700633 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800634 break;
635
H. Peter Anvind85d2502008-05-04 17:53:31 -0700636 case 0172:
637 {
638 uint8_t ximm = *data++;
639 c = *r++;
640 ins->oprs[c >> 3].basereg = ximm >> 4;
641 ins->oprs[c >> 3].segment |= SEG_RMREG;
642 ins->oprs[c & 7].offset = ximm & 15;
643 }
644 break;
645
H. Peter Anvind58656f2008-05-06 20:11:14 -0700646 case 0173:
647 {
648 uint8_t ximm = *data++;
649 c = *r++;
650
651 if ((c ^ ximm) & 15)
652 return false;
653
654 ins->oprs[c >> 4].basereg = ximm >> 4;
655 ins->oprs[c >> 4].segment |= SEG_RMREG;
656 }
657 break;
658
H. Peter Anvin52dc3532008-05-20 19:29:04 -0700659 case 0174:
660 {
661 uint8_t ximm = *data++;
662 c = *r++;
663
664 ins->oprs[c].basereg = ximm >> 4;
665 ins->oprs[c].segment |= SEG_RMREG;
666 }
667 break;
668
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800669 case4(0200):
670 case4(0204):
671 case4(0210):
672 case4(0214):
673 case4(0220):
674 case4(0224):
675 case4(0230):
676 case4(0234):
677 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000678 int modrm = *data++;
679 if (((modrm >> 3) & 07) != (c & 07))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700680 return false; /* spare field doesn't match up */
H. Peter Anvine2c80182005-01-15 22:15:51 +0000681 data = do_ea(data, modrm, asize, segsize,
H. Peter Anvin7786c362007-09-17 18:45:44 -0700682 &ins->oprs[(c >> 3) & 07], ins);
683 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700684 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800685 break;
686 }
687
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700688 case4(0260):
689 {
690 int vexm = *r++;
691 int vexwlp = *r++;
692 ins->rex |= REX_V;
693 if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
694 return false;
695
696 if ((vexm & 0x1f) != prefix->vex_m)
697 return false;
698
699 switch (vexwlp & 030) {
700 case 000:
701 if (prefix->rex & REX_W)
702 return false;
703 break;
704 case 010:
705 if (!(prefix->rex & REX_W))
706 return false;
707 break;
708 default:
709 break; /* XXX: Need to do anything special here? */
710 }
711
712 if ((vexwlp & 007) != prefix->vex_lp)
713 return false;
714
715 opx->segment |= SEG_RMREG;
716 opx->basereg = prefix->vex_v;
717 break;
718 }
719
720 case 0270:
721 {
722 int vexm = *r++;
723 int vexwlp = *r++;
724 ins->rex |= REX_V;
725 if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
726 return false;
727
728 if ((vexm & 0x1f) != prefix->vex_m)
729 return false;
730
731 switch (vexwlp & 030) {
732 case 000:
733 if (ins->rex & REX_W)
734 return false;
735 break;
736 case 010:
737 if (!(ins->rex & REX_W))
738 return false;
739 break;
740 default:
741 break; /* Need to do anything special here? */
742 }
743
744 if ((vexwlp & 007) != prefix->vex_lp)
745 return false;
746
747 if (prefix->vex_v != 0)
748 return false;
749
750 break;
751 }
752
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800753 case 0310:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000754 if (asize != 16)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700755 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000756 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700757 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800758 break;
759
760 case 0311:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000761 if (asize == 16)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700762 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000763 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700764 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800765 break;
766
767 case 0312:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000768 if (asize != segsize)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700769 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000770 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700771 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800772 break;
773
774 case 0313:
H. Peter Anvince2b3972007-05-30 22:21:11 +0000775 if (asize != 64)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700776 return false;
H. Peter Anvince2b3972007-05-30 22:21:11 +0000777 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700778 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800779 break;
780
781 case 0314:
H. Peter Anvin23440102007-11-12 21:02:33 -0800782 if (prefix->rex & REX_B)
783 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800784 break;
785
786 case 0315:
H. Peter Anvin23440102007-11-12 21:02:33 -0800787 if (prefix->rex & REX_X)
788 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800789 break;
790
791 case 0316:
H. Peter Anvin23440102007-11-12 21:02:33 -0800792 if (prefix->rex & REX_R)
793 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800794 break;
795
796 case 0317:
H. Peter Anvin23440102007-11-12 21:02:33 -0800797 if (prefix->rex & REX_W)
798 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800799 break;
800
801 case 0320:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000802 if (osize != 16)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700803 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000804 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700805 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800806 break;
807
808 case 0321:
H. Peter Anvinb061d592007-04-16 02:02:06 +0000809 if (osize != 32)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700810 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000811 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700812 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800813 break;
814
815 case 0322:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000816 if (osize != (segsize == 16) ? 16 : 32)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700817 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000818 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700819 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800820 break;
821
822 case 0323:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000823 ins->rex |= REX_W; /* 64-bit only instruction */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000824 osize = 64;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800825 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800826 break;
827
828 case 0324:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000829 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700830 return false;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800831 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800832 break;
833
834 case 0330:
835 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000836 int t = *r++, d = *data++;
837 if (d < t || d > t + 15)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700838 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000839 else
840 ins->condition = d - t;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800841 break;
842 }
843
844 case 0331:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000845 if (prefix->rep)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700846 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800847 break;
848
849 case 0332:
H. Peter Anvincb9b6902007-09-12 21:58:51 -0700850 if (prefix->rep != 0xF2)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700851 return false;
H. Peter Anvina30cc072007-11-18 21:55:26 -0800852 drep = 0;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800853 break;
854
855 case 0333:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000856 if (prefix->rep != 0xF3)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700857 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000858 drep = 0;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800859 break;
860
861 case 0334:
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000862 if (lock) {
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000863 ins->rex |= REX_R;
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000864 lock = 0;
865 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800866 break;
867
868 case 0335:
H. Peter Anvincb9b6902007-09-12 21:58:51 -0700869 if (drep == P_REP)
870 drep = P_REPE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800871 break;
872
873 case 0340:
874 return false;
875
H. Peter Anvinfff5a472008-05-20 09:46:24 -0700876 case 0360:
877 if (prefix->osp || prefix->rep)
878 return false;
879 break;
880
881 case 0361:
882 if (!prefix->osp || prefix->rep)
883 return false;
884 break;
885
886 case 0362:
887 if (prefix->osp || prefix->rep != 0xf2)
888 return false;
889 break;
890
891 case 0363:
892 if (prefix->osp || prefix->rep != 0xf3)
893 return false;
894 break;
895
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800896 case 0364:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000897 if (prefix->osp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700898 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800899 break;
900
901 case 0365:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000902 if (prefix->asp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700903 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800904 break;
905
906 case 0366:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000907 if (!prefix->osp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700908 return false;
909 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800910 break;
911
912 case 0367:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000913 if (!prefix->asp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700914 return false;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800915 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800916 break;
917
918 default:
919 return false; /* Unknown code */
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000920 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000921 }
922
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700923 /* REX cannot be combined with DREX or VEX */
924 if ((ins->rex & (REX_D|REX_V)) && (prefix->rex & REX_P))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700925 return false;
H. Peter Anvin7786c362007-09-17 18:45:44 -0700926
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000927 /*
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000928 * Check for unused rep or a/o prefixes.
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000929 */
H. Peter Anvinc5b9ce02007-09-22 21:49:51 -0700930 for (i = 0; i < t->operands; i++) {
931 if (ins->oprs[i].segment != SEG_RMREG)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700932 a_used = true;
H. Peter Anvinc5b9ce02007-09-22 21:49:51 -0700933 }
934
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700935 if (lock) {
936 if (ins->prefixes[PPS_LREP])
937 return false;
938 ins->prefixes[PPS_LREP] = P_LOCK;
939 }
940 if (drep) {
941 if (ins->prefixes[PPS_LREP])
942 return false;
943 ins->prefixes[PPS_LREP] = drep;
944 }
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800945 if (!o_used) {
946 if (osize != ((segsize == 16) ? 16 : 32)) {
947 enum prefixes pfx = 0;
948
949 switch (osize) {
950 case 16:
951 pfx = P_O16;
952 break;
953 case 32:
954 pfx = P_O32;
955 break;
956 case 64:
957 pfx = P_O64;
958 break;
959 }
960
961 if (ins->prefixes[PPS_OSIZE])
962 return false;
963 ins->prefixes[PPS_OSIZE] = pfx;
964 }
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700965 }
966 if (!a_used && asize != segsize) {
967 if (ins->prefixes[PPS_ASIZE])
968 return false;
969 ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32;
970 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000971
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000972 /* Fix: check for redundant REX prefixes */
973
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000974 return data - origdata;
975}
976
H. Peter Anvina4835d42008-05-20 14:21:29 -0700977/* Condition names for disassembly, sorted by x86 code */
978static const char * const condition_name[16] = {
979 "o", "no", "c", "nc", "z", "nz", "na", "a",
980 "s", "ns", "pe", "po", "l", "nl", "ng", "g"
981};
982
Keith Kaniosa6dfa782007-04-13 16:47:53 +0000983int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
Keith Kaniosb7a89542007-04-12 02:40:54 +0000984 int32_t offset, int autosync, uint32_t prefer)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000985{
H. Peter Anvin3360d792007-09-11 04:16:57 +0000986 const struct itemplate * const *p, * const *best_p;
H. Peter Anvin19e20102007-09-18 15:08:20 -0700987 const struct disasm_index *ix;
988 uint8_t *dp;
H. Peter Anvin4836e332002-04-30 20:56:43 +0000989 int length, best_length = 0;
Keith Kaniosa6dfa782007-04-13 16:47:53 +0000990 char *segover;
H. Peter Anvin19e20102007-09-18 15:08:20 -0700991 int i, slen, colon, n;
Keith Kaniosb7a89542007-04-12 02:40:54 +0000992 uint8_t *origdata;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000993 int works;
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000994 insn tmp_ins, ins;
Keith Kaniosb7a89542007-04-12 02:40:54 +0000995 uint32_t goodness, best;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000996 int best_pref;
997 struct prefix_info prefix;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800998 bool end_prefix;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000999
H. Peter Anvinbfb888c2007-09-11 04:26:44 +00001000 memset(&ins, 0, sizeof ins);
1001
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001002 /*
1003 * Scan for prefixes.
1004 */
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001005 memset(&prefix, 0, sizeof prefix);
1006 prefix.asize = segsize;
1007 prefix.osize = (segsize == 64) ? 32 : segsize;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001008 segover = NULL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001009 origdata = data;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001010
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001011 end_prefix = false;
1012 while (!end_prefix) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001013 switch (*data) {
1014 case 0xF2:
1015 case 0xF3:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001016 prefix.rep = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001017 break;
1018 case 0xF0:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001019 prefix.lock = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001020 break;
1021 case 0x2E:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001022 segover = "cs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001023 break;
1024 case 0x36:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001025 segover = "ss", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001026 break;
1027 case 0x3E:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001028 segover = "ds", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001029 break;
1030 case 0x26:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001031 segover = "es", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001032 break;
1033 case 0x64:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001034 segover = "fs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001035 break;
1036 case 0x65:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001037 segover = "gs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001038 break;
1039 case 0x66:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001040 prefix.osize = (segsize == 16) ? 32 : 16;
1041 prefix.osp = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001042 break;
1043 case 0x67:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001044 prefix.asize = (segsize == 32) ? 16 : 32;
1045 prefix.asp = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001046 break;
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001047 case 0xC4:
1048 case 0xC5:
1049 if (segsize == 64 || (data[1] & 0xc0) == 0xc0) {
1050 prefix.vex[0] = *data++;
1051 prefix.vex[1] = *data++;
1052 if (prefix.vex[0] == 0xc4)
1053 prefix.vex[2] = *data++;
1054 }
1055 prefix.rex = REX_V;
1056 if (prefix.vex[0] == 0xc4) {
1057 prefix.rex |= (~prefix.vex[1] >> 5) & 7; /* REX_RXB */
1058 prefix.rex |= (prefix.vex[2] >> (7-3)) & REX_W;
1059 prefix.vex_m = prefix.vex[1] & 0x1f;
1060 prefix.vex_v = (~prefix.vex[2] >> 3) & 15;
1061 prefix.vex_lp = prefix.vex[2] & 7;
1062 } else {
1063 prefix.rex |= (~prefix.vex[1] >> (7-2)) & REX_R;
1064 prefix.vex_m = 1;
1065 prefix.vex_v = (~prefix.vex[1] >> 3) & 15;
1066 prefix.vex_lp = prefix.vex[1] & 7;
1067 }
1068 end_prefix = true;
1069 break;
1070 case REX_P + 0x0:
1071 case REX_P + 0x1:
1072 case REX_P + 0x2:
1073 case REX_P + 0x3:
1074 case REX_P + 0x4:
1075 case REX_P + 0x5:
1076 case REX_P + 0x6:
1077 case REX_P + 0x7:
1078 case REX_P + 0x8:
1079 case REX_P + 0x9:
1080 case REX_P + 0xA:
1081 case REX_P + 0xB:
1082 case REX_P + 0xC:
1083 case REX_P + 0xD:
1084 case REX_P + 0xE:
1085 case REX_P + 0xF:
1086 if (segsize == 64) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001087 prefix.rex = *data++;
1088 if (prefix.rex & REX_W)
1089 prefix.osize = 64;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001090 }
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001091 end_prefix = true;
1092 break;
1093 default:
1094 end_prefix = true;
1095 break;
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001096 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001097 }
1098
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001099 best = -1; /* Worst possible */
H. Peter Anvin4836e332002-04-30 20:56:43 +00001100 best_p = NULL;
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001101 best_pref = INT_MAX;
1102
H. Peter Anvin19e20102007-09-18 15:08:20 -07001103 dp = data;
1104 ix = itable + *dp++;
Charles Crayne46b31b02007-10-18 21:17:20 -07001105 while (ix->n == -1) {
H. Peter Anvin19e20102007-09-18 15:08:20 -07001106 ix = (const struct disasm_index *)ix->p + *dp++;
1107 }
1108
1109 p = (const struct itemplate * const *)ix->p;
1110 for (n = ix->n; n; n--, p++) {
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001111 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001112 works = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001113 /*
1114 * Final check to make sure the types of r/m match up.
H. Peter Anvindbf130e2007-05-30 00:18:26 +00001115 * XXX: Need to make sure this is actually correct.
H. Peter Anvine2c80182005-01-15 22:15:51 +00001116 */
1117 for (i = 0; i < (*p)->operands; i++) {
H. Peter Anvin7786c362007-09-17 18:45:44 -07001118 if (!((*p)->opd[i] & SAME_AS) &&
1119 (
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001120 /* If it's a mem-only EA but we have a
1121 register, die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001122 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
1123 !(MEMORY & ~(*p)->opd[i])) ||
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001124 /* If it's a reg-only EA but we have a memory
1125 ref, die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001126 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
1127 !(REG_EA & ~(*p)->opd[i]) &&
1128 !((*p)->opd[i] & REG_SMASK)) ||
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001129 /* Register type mismatch (eg FS vs REG_DESS):
1130 die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001131 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
1132 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
1133 !whichreg((*p)->opd[i],
1134 tmp_ins.oprs[i].basereg, tmp_ins.rex))
1135 )) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001136 works = false;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001137 break;
1138 }
1139 }
1140
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001141 /*
1142 * Note: we always prefer instructions which incorporate
1143 * prefixes in the instructions themselves. This is to allow
1144 * e.g. PAUSE to be preferred to REP NOP, and deal with
1145 * MMX/SSE instructions where prefixes are used to select
1146 * between MMX and SSE register sets or outright opcode
1147 * selection.
1148 */
H. Peter Anvine2c80182005-01-15 22:15:51 +00001149 if (works) {
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001150 int i, nprefix;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001151 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001152 nprefix = 0;
1153 for (i = 0; i < MAXPREFIX; i++)
1154 if (tmp_ins.prefixes[i])
1155 nprefix++;
1156 if (nprefix < best_pref ||
1157 (nprefix == best_pref && goodness < best)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001158 /* This is the best one found so far */
1159 best = goodness;
1160 best_p = p;
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001161 best_pref = nprefix;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001162 best_length = length;
1163 ins = tmp_ins;
1164 }
1165 }
1166 }
H. Peter Anvin4836e332002-04-30 20:56:43 +00001167 }
H. Peter Anvineba20a72002-04-30 20:53:55 +00001168
H. Peter Anvinef7468f2002-04-30 20:57:59 +00001169 if (!best_p)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001170 return 0; /* no instruction was matched */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001171
H. Peter Anvin4836e332002-04-30 20:56:43 +00001172 /* Pick the best match */
H. Peter Anvine2c80182005-01-15 22:15:51 +00001173 p = best_p;
H. Peter Anvin4836e332002-04-30 20:56:43 +00001174 length = best_length;
1175
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001176 slen = 0;
1177
Ed Beroset64ab5192004-12-15 23:32:57 +00001178 /* TODO: snprintf returns the value that the string would have if
H. Peter Anvin70653092007-10-19 14:42:29 -07001179 * the buffer were long enough, and not the actual length of
H. Peter Anvine2c80182005-01-15 22:15:51 +00001180 * the returned string, so each instance of using the return
1181 * value of snprintf should actually be checked to assure that
1182 * the return value is "sane." Maybe a macro wrapper could
1183 * be used for that purpose.
1184 */
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001185 for (i = 0; i < MAXPREFIX; i++)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001186 switch (ins.prefixes[i]) {
H. Peter Anvin0db11e22007-04-17 20:23:11 +00001187 case P_LOCK:
1188 slen += snprintf(output + slen, outbufsize - slen, "lock ");
1189 break;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001190 case P_REP:
1191 slen += snprintf(output + slen, outbufsize - slen, "rep ");
1192 break;
1193 case P_REPE:
1194 slen += snprintf(output + slen, outbufsize - slen, "repe ");
1195 break;
1196 case P_REPNE:
1197 slen += snprintf(output + slen, outbufsize - slen, "repne ");
1198 break;
1199 case P_A16:
1200 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
1201 break;
1202 case P_A32:
1203 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
1204 break;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -08001205 case P_A64:
1206 slen += snprintf(output + slen, outbufsize - slen, "a64 ");
1207 break;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001208 case P_O16:
1209 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
1210 break;
1211 case P_O32:
1212 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
1213 break;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -08001214 case P_O64:
1215 slen += snprintf(output + slen, outbufsize - slen, "o64 ");
1216 break;
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001217 default:
1218 break;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001219 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001220
H. Peter Anvin0ab96a12008-05-20 17:07:57 -07001221 i = (*p)->opcode;
1222 if (i >= FIRST_COND_OPCODE) {
1223 slen += snprintf(output + slen, outbufsize - slen, "%s%s",
1224 nasm_cond_insn_names[i-FIRST_COND_OPCODE],
1225 condition_name[ins.condition]);
1226 } else {
1227 slen += snprintf(output + slen, outbufsize - slen, "%s",
1228 nasm_insn_names[i]);
1229 }
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001230 colon = false;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001231 length += data - origdata; /* fix up for prefixes */
1232 for (i = 0; i < (*p)->operands; i++) {
H. Peter Anvin7786c362007-09-17 18:45:44 -07001233 opflags_t t = (*p)->opd[i];
1234 const operand *o = &ins.oprs[i];
1235 int64_t offs;
1236
1237 if (t & SAME_AS) {
1238 o = &ins.oprs[t & ~SAME_AS];
1239 t = (*p)->opd[t & ~SAME_AS];
1240 }
1241
H. Peter Anvine2c80182005-01-15 22:15:51 +00001242 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001243
H. Peter Anvin7786c362007-09-17 18:45:44 -07001244 offs = o->offset;
1245 if (o->segment & SEG_RELATIVE) {
1246 offs += offset + length;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001247 /*
1248 * sort out wraparound
1249 */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001250 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
1251 offs &= 0xffff;
H. Peter Anvin08367e22008-01-02 12:19:41 -08001252 else if (segsize != 64)
1253 offs &= 0xffffffff;
1254
H. Peter Anvine2c80182005-01-15 22:15:51 +00001255 /*
1256 * add sync marker, if autosync is on
1257 */
1258 if (autosync)
H. Peter Anvin7786c362007-09-17 18:45:44 -07001259 add_sync(offs, 0L);
H. Peter Anvine2c80182005-01-15 22:15:51 +00001260 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001261
H. Peter Anvin7786c362007-09-17 18:45:44 -07001262 if (t & COLON)
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001263 colon = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001264 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001265 colon = false;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001266
H. Peter Anvin7786c362007-09-17 18:45:44 -07001267 if ((t & (REGISTER | FPUREG)) ||
1268 (o->segment & SEG_RMREG)) {
1269 enum reg_enum reg;
1270 reg = whichreg(t, o->basereg, ins.rex);
1271 if (t & TO)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001272 slen += snprintf(output + slen, outbufsize - slen, "to ");
1273 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvina4835d42008-05-20 14:21:29 -07001274 nasm_reg_names[reg-EXPR_REG_START]);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001275 } else if (!(UNITY & ~t)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001276 output[slen++] = '1';
H. Peter Anvin7786c362007-09-17 18:45:44 -07001277 } else if (t & IMMEDIATE) {
1278 if (t & BITS8) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001279 slen +=
1280 snprintf(output + slen, outbufsize - slen, "byte ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001281 if (o->segment & SEG_SIGNED) {
1282 if (offs < 0) {
1283 offs *= -1;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001284 output[slen++] = '-';
1285 } else
1286 output[slen++] = '+';
1287 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001288 } else if (t & BITS16) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001289 slen +=
1290 snprintf(output + slen, outbufsize - slen, "word ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001291 } else if (t & BITS32) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001292 slen +=
1293 snprintf(output + slen, outbufsize - slen, "dword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001294 } else if (t & BITS64) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001295 slen +=
1296 snprintf(output + slen, outbufsize - slen, "qword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001297 } else if (t & NEAR) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001298 slen +=
1299 snprintf(output + slen, outbufsize - slen, "near ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001300 } else if (t & SHORT) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001301 slen +=
1302 snprintf(output + slen, outbufsize - slen, "short ");
1303 }
1304 slen +=
Keith Kanios93f2e9a2007-04-14 00:10:59 +00001305 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001306 offs);
1307 } else if (!(MEM_OFFS & ~t)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001308 slen +=
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001309 snprintf(output + slen, outbufsize - slen,
1310 "[%s%s%s0x%"PRIx64"]",
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001311 (segover ? segover : ""),
1312 (segover ? ":" : ""),
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001313 (o->disp_size == 64 ? "qword " :
1314 o->disp_size == 32 ? "dword " :
1315 o->disp_size == 16 ? "word " : ""), offs);
H. Peter Anvine2c80182005-01-15 22:15:51 +00001316 segover = NULL;
H. Peter Anvin7786c362007-09-17 18:45:44 -07001317 } else if (!(REGMEM & ~t)) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001318 int started = false;
H. Peter Anvin7786c362007-09-17 18:45:44 -07001319 if (t & BITS8)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001320 slen +=
1321 snprintf(output + slen, outbufsize - slen, "byte ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001322 if (t & BITS16)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001323 slen +=
1324 snprintf(output + slen, outbufsize - slen, "word ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001325 if (t & BITS32)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001326 slen +=
1327 snprintf(output + slen, outbufsize - slen, "dword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001328 if (t & BITS64)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001329 slen +=
1330 snprintf(output + slen, outbufsize - slen, "qword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001331 if (t & BITS80)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001332 slen +=
1333 snprintf(output + slen, outbufsize - slen, "tword ");
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001334 if (t & BITS128)
1335 slen +=
1336 snprintf(output + slen, outbufsize - slen, "oword ");
H. Peter Anvindfb91802008-05-20 11:43:53 -07001337 if (t & BITS256)
1338 slen +=
1339 snprintf(output + slen, outbufsize - slen, "yword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001340 if (t & FAR)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001341 slen += snprintf(output + slen, outbufsize - slen, "far ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001342 if (t & NEAR)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001343 slen +=
1344 snprintf(output + slen, outbufsize - slen, "near ");
1345 output[slen++] = '[';
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001346 if (o->disp_size)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001347 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001348 (o->disp_size == 64 ? "qword " :
1349 o->disp_size == 32 ? "dword " :
1350 o->disp_size == 16 ? "word " :
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001351 ""));
H. Peter Anvin7786c362007-09-17 18:45:44 -07001352 if (o->eaflags & EAF_REL)
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +00001353 slen += snprintf(output + slen, outbufsize - slen, "rel ");
H. Peter Anvine2c80182005-01-15 22:15:51 +00001354 if (segover) {
1355 slen +=
1356 snprintf(output + slen, outbufsize - slen, "%s:",
1357 segover);
1358 segover = NULL;
1359 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001360 if (o->basereg != -1) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001361 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvina4835d42008-05-20 14:21:29 -07001362 nasm_reg_names[(o->basereg-EXPR_REG_START)]);
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001363 started = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001364 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001365 if (o->indexreg != -1) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001366 if (started)
1367 output[slen++] = '+';
1368 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvina4835d42008-05-20 14:21:29 -07001369 nasm_reg_names[(o->indexreg-EXPR_REG_START)]);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001370 if (o->scale > 1)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001371 slen +=
1372 snprintf(output + slen, outbufsize - slen, "*%d",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001373 o->scale);
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001374 started = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001375 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001376
1377
H. Peter Anvin7786c362007-09-17 18:45:44 -07001378 if (o->segment & SEG_DISP8) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001379 const char *prefix;
1380 uint8_t offset = offs;
1381 if ((int8_t)offset < 0) {
1382 prefix = "-";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001383 offset = -offset;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001384 } else {
1385 prefix = "+";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001386 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001387 slen +=
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001388 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001389 prefix, offset);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001390 } else if (o->segment & SEG_DISP16) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001391 const char *prefix;
1392 uint16_t offset = offs;
1393 if ((int16_t)offset < 0 && started) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001394 offset = -offset;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001395 prefix = "-";
1396 } else {
1397 prefix = started ? "+" : "";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001398 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001399 slen +=
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001400 snprintf(output + slen, outbufsize - slen,
1401 "%s0x%"PRIx16"", prefix, offset);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001402 } else if (o->segment & SEG_DISP32) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001403 if (prefix.asize == 64) {
1404 const char *prefix;
1405 uint64_t offset = (int64_t)(int32_t)offs;
1406 if ((int32_t)offs < 0 && started) {
1407 offset = -offset;
1408 prefix = "-";
1409 } else {
1410 prefix = started ? "+" : "";
1411 }
1412 slen +=
1413 snprintf(output + slen, outbufsize - slen,
1414 "%s0x%"PRIx64"", prefix, offset);
1415 } else {
1416 const char *prefix;
1417 uint32_t offset = offs;
1418 if ((int32_t) offset < 0 && started) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001419 offset = -offset;
1420 prefix = "-";
1421 } else {
1422 prefix = started ? "+" : "";
1423 }
1424 slen +=
1425 snprintf(output + slen, outbufsize - slen,
1426 "%s0x%"PRIx32"", prefix, offset);
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001427 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001428 }
1429 output[slen++] = ']';
1430 } else {
1431 slen +=
1432 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1433 i);
1434 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001435 }
1436 output[slen] = '\0';
H. Peter Anvine2c80182005-01-15 22:15:51 +00001437 if (segover) { /* unused segment override */
Keith Kaniosa6dfa782007-04-13 16:47:53 +00001438 char *p = output;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001439 int count = slen + 1;
1440 while (count--)
1441 p[count + 3] = p[count];
1442 strncpy(output, segover, 2);
1443 output[2] = ' ';
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001444 }
1445 return length;
1446}
1447
Keith Kaniosa6dfa782007-04-13 16:47:53 +00001448int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
H. Peter Anvineba20a72002-04-30 20:53:55 +00001449{
Ed Beroset92348172004-12-15 18:27:50 +00001450 snprintf(output, outbufsize, "db 0x%02X", *data);
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001451 return 1;
1452}