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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/kernel/debug.S
3 *
4 * Copyright (C) 1994-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * 32-bit debugging code
11 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <linux/linkage.h>
Rob Herring6f6f6a72012-03-10 10:30:31 -060013#include <asm/assembler.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15 .text
16
17/*
18 * Some debugging routines (useful if you've got MM problems and
19 * printk isn't working). For DEBUGGING ONLY!!! Do not leave
20 * references to these in a production kernel!
21 */
22
Rob Herring91a9fec2012-08-31 00:03:46 -050023#if !defined(CONFIG_DEBUG_SEMIHOSTING)
24#include CONFIG_DEBUG_LL_INCLUDE
25#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
Jeremy Kerr0ea12932010-07-06 18:30:06 +080027#ifdef CONFIG_MMU
28 .macro addruart_current, rx, tmp1, tmp2
Nicolas Pitre639da5e2011-08-31 22:55:46 -040029 addruart \tmp1, \tmp2, \rx
Jeremy Kerr0ea12932010-07-06 18:30:06 +080030 mrc p15, 0, \rx, c1, c0
31 tst \rx, #1
32 moveq \rx, \tmp1
33 movne \rx, \tmp2
34 .endm
35
36#else /* !CONFIG_MMU */
37 .macro addruart_current, rx, tmp1, tmp2
Stefan Agner7505f042015-05-20 00:03:50 +020038 addruart \rx, \tmp1, \tmp2
Jeremy Kerr0ea12932010-07-06 18:30:06 +080039 .endm
40
41#endif /* CONFIG_MMU */
42
Linus Torvalds1da177e2005-04-16 15:20:36 -070043/*
44 * Useful debugging routines
45 */
46ENTRY(printhex8)
47 mov r1, #8
48 b printhex
Catalin Marinas93ed3972008-08-28 11:22:32 +010049ENDPROC(printhex8)
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
51ENTRY(printhex4)
52 mov r1, #4
53 b printhex
Catalin Marinas93ed3972008-08-28 11:22:32 +010054ENDPROC(printhex4)
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
56ENTRY(printhex2)
57 mov r1, #2
Nicolas Pitree11d1312017-10-06 19:36:58 +010058printhex: adr r2, hexbuf_rel
59 ldr r3, [r2]
60 add r2, r2, r3
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 add r3, r2, r1
62 mov r1, #0
63 strb r1, [r3]
641: and r1, r0, #15
65 mov r0, r0, lsr #4
66 cmp r1, #10
67 addlt r1, r1, #'0'
68 addge r1, r1, #'a' - 10
69 strb r1, [r3, #-1]!
70 teq r3, r2
71 bne 1b
72 mov r0, r2
73 b printascii
Catalin Marinas93ed3972008-08-28 11:22:32 +010074ENDPROC(printhex2)
Linus Torvalds1da177e2005-04-16 15:20:36 -070075
Nicolas Pitree11d1312017-10-06 19:36:58 +010076 .pushsection .bss
77hexbuf_addr: .space 16
78 .popsection
79 .align
80hexbuf_rel: .long hexbuf_addr - .
Afzal Mohammedb55fa182011-10-20 19:32:07 +010081
Linus Torvalds1da177e2005-04-16 15:20:36 -070082 .ltorg
83
Nicolas Pitre9b5a1462012-02-22 21:58:03 +010084#ifndef CONFIG_DEBUG_SEMIHOSTING
85
Linus Torvalds1da177e2005-04-16 15:20:36 -070086ENTRY(printascii)
Jeremy Kerr0ea12932010-07-06 18:30:06 +080087 addruart_current r3, r1, r2
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 b 2f
891: waituart r2, r3
90 senduart r1, r3
91 busyuart r2, r3
92 teq r1, #'\n'
93 moveq r1, #'\r'
94 beq 1b
952: teq r0, #0
96 ldrneb r1, [r0], #1
97 teqne r1, #0
98 bne 1b
Russell King6ebbf2c2014-06-30 16:29:12 +010099 ret lr
Catalin Marinas93ed3972008-08-28 11:22:32 +0100100ENDPROC(printascii)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
102ENTRY(printch)
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800103 addruart_current r3, r1, r2
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 mov r1, r0
105 mov r0, #0
106 b 1b
Catalin Marinas93ed3972008-08-28 11:22:32 +0100107ENDPROC(printch)
Nicolas Pitre9b5a1462012-02-22 21:58:03 +0100108
Uwe Kleine-Königa73b59c2013-01-16 15:32:06 +0100109#ifdef CONFIG_MMU
Rob Herringe5c5f2a2012-10-22 11:42:54 -0600110ENTRY(debug_ll_addr)
111 addruart r2, r3, ip
112 str r2, [r0]
113 str r3, [r1]
Russell King6ebbf2c2014-06-30 16:29:12 +0100114 ret lr
Rob Herringe5c5f2a2012-10-22 11:42:54 -0600115ENDPROC(debug_ll_addr)
Uwe Kleine-Königa73b59c2013-01-16 15:32:06 +0100116#endif
Rob Herringe5c5f2a2012-10-22 11:42:54 -0600117
Nicolas Pitre9b5a1462012-02-22 21:58:03 +0100118#else
119
120ENTRY(printascii)
121 mov r1, r0
122 mov r0, #0x04 @ SYS_WRITE0
123 ARM( svc #0x123456 )
124 THUMB( svc #0xab )
Russell King6ebbf2c2014-06-30 16:29:12 +0100125 ret lr
Nicolas Pitre9b5a1462012-02-22 21:58:03 +0100126ENDPROC(printascii)
127
128ENTRY(printch)
Nicolas Pitree11d1312017-10-06 19:36:58 +0100129 adr r1, hexbuf_rel
130 ldr r2, [r1]
131 add r1, r1, r2
Nicolas Pitre9b5a1462012-02-22 21:58:03 +0100132 strb r0, [r1]
133 mov r0, #0x03 @ SYS_WRITEC
134 ARM( svc #0x123456 )
135 THUMB( svc #0xab )
Russell King6ebbf2c2014-06-30 16:29:12 +0100136 ret lr
Nicolas Pitre9b5a1462012-02-22 21:58:03 +0100137ENDPROC(printch)
138
Rob Herringe5c5f2a2012-10-22 11:42:54 -0600139ENTRY(debug_ll_addr)
140 mov r2, #0
141 str r2, [r0]
142 str r2, [r1]
Russell King6ebbf2c2014-06-30 16:29:12 +0100143 ret lr
Rob Herringe5c5f2a2012-10-22 11:42:54 -0600144ENDPROC(debug_ll_addr)
145
Nicolas Pitre9b5a1462012-02-22 21:58:03 +0100146#endif