| Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | #ifndef __UM_CACHE_H |
| 3 | #define __UM_CACHE_H |
| 4 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | |
| Paolo 'Blaisorblade' Giarrusso | 96d55b8 | 2005-10-30 15:00:07 -0800 | [diff] [blame] | 6 | #if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT) |
| 7 | # define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) |
| 8 | #elif defined(CONFIG_UML_X86) /* 64-bit */ |
| 9 | # define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */ |
| 10 | #else |
| 11 | /* XXX: this was taken from x86, now it's completely random. Luckily only |
| 12 | * affects SMP padding. */ |
| 13 | # define L1_CACHE_SHIFT 5 |
| 14 | #endif |
| 15 | |
| Paolo 'Blaisorblade' Giarrusso | 96d55b8 | 2005-10-30 15:00:07 -0800 | [diff] [blame] | 16 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | |
| 18 | #endif |