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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Nicolas Pitrefadab092005-11-01 19:52:24 +00002/*
3 * linux/arch/arm/lib/copy_from_user.S
4 *
5 * Author: Nicolas Pitre
6 * Created: Sep 29, 2005
7 * Copyright: MontaVista Software, Inc.
Nicolas Pitrefadab092005-11-01 19:52:24 +00008 */
9
10#include <linux/linkage.h>
11#include <asm/assembler.h>
Lin Yongting279f4872014-11-26 14:38:33 +010012#include <asm/unwind.h>
Nicolas Pitrefadab092005-11-01 19:52:24 +000013
14/*
15 * Prototype:
16 *
Russell King3fba7e22015-08-19 11:02:28 +010017 * size_t arm_copy_from_user(void *to, const void *from, size_t n)
Nicolas Pitrefadab092005-11-01 19:52:24 +000018 *
19 * Purpose:
20 *
21 * copy a block to kernel memory from user memory
22 *
23 * Params:
24 *
25 * to = kernel memory
26 * from = user memory
27 * n = number of bytes to copy
28 *
29 * Return value:
30 *
31 * Number of bytes NOT copied.
32 */
33
Vincent Whitchurchf4418822018-11-09 10:09:48 +010034#ifdef CONFIG_CPU_USE_DOMAINS
35
Catalin Marinas8b592782009-07-24 12:32:57 +010036#ifndef CONFIG_THUMB2_KERNEL
37#define LDR1W_SHIFT 0
38#else
39#define LDR1W_SHIFT 1
40#endif
Catalin Marinas8b592782009-07-24 12:32:57 +010041
Nicolas Pitrefadab092005-11-01 19:52:24 +000042 .macro ldr1w ptr reg abort
Catalin Marinas8b592782009-07-24 12:32:57 +010043 ldrusr \reg, \ptr, 4, abort=\abort
Nicolas Pitrefadab092005-11-01 19:52:24 +000044 .endm
45
46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
47 ldr1w \ptr, \reg1, \abort
48 ldr1w \ptr, \reg2, \abort
49 ldr1w \ptr, \reg3, \abort
50 ldr1w \ptr, \reg4, \abort
51 .endm
52
53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
55 ldr4w \ptr, \reg5, \reg6, \reg7, \reg8, \abort
56 .endm
57
Vincent Whitchurchf4418822018-11-09 10:09:48 +010058#else
59
60#define LDR1W_SHIFT 0
61
62 .macro ldr1w ptr reg abort
63 USERL(\abort, W(ldr) \reg, [\ptr], #4)
64 .endm
65
66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4})
68 .endm
69
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
72 .endm
73
74#endif /* CONFIG_CPU_USE_DOMAINS */
75
Nicolas Pitrefadab092005-11-01 19:52:24 +000076 .macro ldr1b ptr reg cond=al abort
Catalin Marinas8b592782009-07-24 12:32:57 +010077 ldrusr \reg, \ptr, 1, \cond, abort=\abort
Nicolas Pitrefadab092005-11-01 19:52:24 +000078 .endm
79
Vincent Whitchurchf4418822018-11-09 10:09:48 +010080#define STR1W_SHIFT 0
81
Nicolas Pitrefadab092005-11-01 19:52:24 +000082 .macro str1w ptr reg abort
Catalin Marinas8b592782009-07-24 12:32:57 +010083 W(str) \reg, [\ptr], #4
Nicolas Pitrefadab092005-11-01 19:52:24 +000084 .endm
85
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
88 .endm
89
90 .macro str1b ptr reg cond=al abort
Stefan Agnera2163762019-02-18 00:54:36 +010091 strb\cond \reg, [\ptr], #1
Nicolas Pitrefadab092005-11-01 19:52:24 +000092 .endm
93
94 .macro enter reg1 reg2
95 mov r3, #0
96 stmdb sp!, {r0, r2, r3, \reg1, \reg2}
97 .endm
98
Lin Yongting279f4872014-11-26 14:38:33 +010099 .macro usave reg1 reg2
100 UNWIND( .save {r0, r2, r3, \reg1, \reg2} )
101 .endm
102
Nicolas Pitrefadab092005-11-01 19:52:24 +0000103 .macro exit reg1 reg2
104 add sp, sp, #8
105 ldmfd sp!, {r0, \reg1, \reg2}
106 .endm
107
108 .text
109
Russell King3fba7e22015-08-19 11:02:28 +0100110ENTRY(arm_copy_from_user)
Russell Kinga3c0f8472018-05-14 09:40:24 +0100111#ifdef CONFIG_CPU_SPECTRE
112 get_thread_info r3
113 ldr r3, [r3, #TI_ADDR_LIMIT]
Julien Thierryafaf6832018-09-11 10:14:50 +0100114 uaccess_mask_range_ptr r1, r2, r3, ip
Russell Kinga3c0f8472018-05-14 09:40:24 +0100115#endif
Nicolas Pitrefadab092005-11-01 19:52:24 +0000116
117#include "copy_template.S"
118
Russell King3fba7e22015-08-19 11:02:28 +0100119ENDPROC(arm_copy_from_user)
Catalin Marinas93ed3972008-08-28 11:22:32 +0100120
Russell King42604152010-04-19 10:15:03 +0100121 .pushsection .fixup,"ax"
Nicolas Pitrefadab092005-11-01 19:52:24 +0000122 .align 0
123 copy_abort_preamble
Al Viro91344492016-09-10 16:44:03 -0400124 ldmfd sp!, {r1, r2, r3}
125 sub r0, r0, r1
126 rsb r0, r0, r2
Nicolas Pitrefadab092005-11-01 19:52:24 +0000127 copy_abort_end
Russell King42604152010-04-19 10:15:03 +0100128 .popsection
Nicolas Pitrefadab092005-11-01 19:52:24 +0000129