Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1 | /* |
| 2 | * omap_hwmod implementation for OMAP2/3/4 |
| 3 | * |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 4 | * Copyright (C) 2009-2011 Nokia Corporation |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 5 | * Copyright (C) 2011-2012 Texas Instruments, Inc. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 6 | * |
Paul Walmsley | 4788da2 | 2010-05-18 20:24:05 -0600 | [diff] [blame] | 7 | * Paul Walmsley, BenoƮt Cousson, Kevin Hilman |
| 8 | * |
| 9 | * Created in collaboration with (alphabetical order): Thara Gopinath, |
| 10 | * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand |
| 11 | * Sawant, Santosh Shilimkar, Richard Woodruff |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License version 2 as |
| 15 | * published by the Free Software Foundation. |
| 16 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 17 | * Introduction |
| 18 | * ------------ |
| 19 | * One way to view an OMAP SoC is as a collection of largely unrelated |
| 20 | * IP blocks connected by interconnects. The IP blocks include |
| 21 | * devices such as ARM processors, audio serial interfaces, UARTs, |
| 22 | * etc. Some of these devices, like the DSP, are created by TI; |
| 23 | * others, like the SGX, largely originate from external vendors. In |
| 24 | * TI's documentation, on-chip devices are referred to as "OMAP |
| 25 | * modules." Some of these IP blocks are identical across several |
| 26 | * OMAP versions. Others are revised frequently. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 27 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 28 | * These OMAP modules are tied together by various interconnects. |
| 29 | * Most of the address and data flow between modules is via OCP-based |
| 30 | * interconnects such as the L3 and L4 buses; but there are other |
| 31 | * interconnects that distribute the hardware clock tree, handle idle |
| 32 | * and reset signaling, supply power, and connect the modules to |
| 33 | * various pads or balls on the OMAP package. |
| 34 | * |
| 35 | * OMAP hwmod provides a consistent way to describe the on-chip |
| 36 | * hardware blocks and their integration into the rest of the chip. |
| 37 | * This description can be automatically generated from the TI |
| 38 | * hardware database. OMAP hwmod provides a standard, consistent API |
| 39 | * to reset, enable, idle, and disable these hardware blocks. And |
| 40 | * hwmod provides a way for other core code, such as the Linux device |
| 41 | * code or the OMAP power management and address space mapping code, |
| 42 | * to query the hardware database. |
| 43 | * |
| 44 | * Using hwmod |
| 45 | * ----------- |
| 46 | * Drivers won't call hwmod functions directly. That is done by the |
| 47 | * omap_device code, and in rare occasions, by custom integration code |
| 48 | * in arch/arm/ *omap*. The omap_device code includes functions to |
| 49 | * build a struct platform_device using omap_hwmod data, and that is |
| 50 | * currently how hwmod data is communicated to drivers and to the |
| 51 | * Linux driver model. Most drivers will call omap_hwmod functions only |
| 52 | * indirectly, via pm_runtime*() functions. |
| 53 | * |
| 54 | * From a layering perspective, here is where the OMAP hwmod code |
| 55 | * fits into the kernel software stack: |
| 56 | * |
| 57 | * +-------------------------------+ |
| 58 | * | Device driver code | |
| 59 | * | (e.g., drivers/) | |
| 60 | * +-------------------------------+ |
| 61 | * | Linux driver model | |
| 62 | * | (platform_device / | |
| 63 | * | platform_driver data/code) | |
| 64 | * +-------------------------------+ |
| 65 | * | OMAP core-driver integration | |
| 66 | * |(arch/arm/mach-omap2/devices.c)| |
| 67 | * +-------------------------------+ |
| 68 | * | omap_device code | |
| 69 | * | (../plat-omap/omap_device.c) | |
| 70 | * +-------------------------------+ |
| 71 | * ----> | omap_hwmod code/data | <----- |
| 72 | * | (../mach-omap2/omap_hwmod*) | |
| 73 | * +-------------------------------+ |
| 74 | * | OMAP clock/PRCM/register fns | |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 75 | * | ({read,write}l_relaxed, clk*) | |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 76 | * +-------------------------------+ |
| 77 | * |
| 78 | * Device drivers should not contain any OMAP-specific code or data in |
| 79 | * them. They should only contain code to operate the IP block that |
| 80 | * the driver is responsible for. This is because these IP blocks can |
| 81 | * also appear in other SoCs, either from TI (such as DaVinci) or from |
| 82 | * other manufacturers; and drivers should be reusable across other |
| 83 | * platforms. |
| 84 | * |
| 85 | * The OMAP hwmod code also will attempt to reset and idle all on-chip |
| 86 | * devices upon boot. The goal here is for the kernel to be |
| 87 | * completely self-reliant and independent from bootloaders. This is |
| 88 | * to ensure a repeatable configuration, both to ensure consistent |
| 89 | * runtime behavior, and to make it easier for others to reproduce |
| 90 | * bugs. |
| 91 | * |
| 92 | * OMAP module activity states |
| 93 | * --------------------------- |
| 94 | * The hwmod code considers modules to be in one of several activity |
| 95 | * states. IP blocks start out in an UNKNOWN state, then once they |
| 96 | * are registered via the hwmod code, proceed to the REGISTERED state. |
| 97 | * Once their clock names are resolved to clock pointers, the module |
| 98 | * enters the CLKS_INITED state; and finally, once the module has been |
| 99 | * reset and the integration registers programmed, the INITIALIZED state |
| 100 | * is entered. The hwmod code will then place the module into either |
| 101 | * the IDLE state to save power, or in the case of a critical system |
| 102 | * module, the ENABLED state. |
| 103 | * |
| 104 | * OMAP core integration code can then call omap_hwmod*() functions |
| 105 | * directly to move the module between the IDLE, ENABLED, and DISABLED |
| 106 | * states, as needed. This is done during both the PM idle loop, and |
| 107 | * in the OMAP core integration code's implementation of the PM runtime |
| 108 | * functions. |
| 109 | * |
| 110 | * References |
| 111 | * ---------- |
| 112 | * This is a partial list. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 113 | * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) |
| 114 | * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) |
| 115 | * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) |
| 116 | * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) |
| 117 | * - Open Core Protocol Specification 2.2 |
| 118 | * |
| 119 | * To do: |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 120 | * - handle IO mapping |
| 121 | * - bus throughput & module latency measurement code |
| 122 | * |
| 123 | * XXX add tests at the beginning of each function to ensure the hwmod is |
| 124 | * in the appropriate state |
| 125 | * XXX error return values should be checked to ensure that they are |
| 126 | * appropriate |
| 127 | */ |
| 128 | #undef DEBUG |
| 129 | |
| 130 | #include <linux/kernel.h> |
| 131 | #include <linux/errno.h> |
| 132 | #include <linux/io.h> |
Stephen Boyd | f5b00f6 | 2015-06-22 17:05:21 -0700 | [diff] [blame] | 133 | #include <linux/clk.h> |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 134 | #include <linux/clk-provider.h> |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 135 | #include <linux/delay.h> |
| 136 | #include <linux/err.h> |
| 137 | #include <linux/list.h> |
| 138 | #include <linux/mutex.h> |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 139 | #include <linux/spinlock.h> |
Tero Kristo | abc2d54 | 2011-12-16 14:36:59 -0700 | [diff] [blame] | 140 | #include <linux/slab.h> |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 141 | #include <linux/cpu.h> |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 142 | #include <linux/of.h> |
| 143 | #include <linux/of_address.h> |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 144 | #include <linux/bootmem.h> |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 145 | |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 146 | #include <asm/system_misc.h> |
| 147 | |
Paul Walmsley | a135eaa | 2012-09-27 10:33:34 -0600 | [diff] [blame] | 148 | #include "clock.h" |
Tony Lindgren | 2a296c8 | 2012-10-02 17:41:35 -0700 | [diff] [blame] | 149 | #include "omap_hwmod.h" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 150 | |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 151 | #include "soc.h" |
| 152 | #include "common.h" |
| 153 | #include "clockdomain.h" |
| 154 | #include "powerdomain.h" |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 155 | #include "cm2xxx.h" |
| 156 | #include "cm3xxx.h" |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 157 | #include "cm33xx.h" |
Paul Walmsley | b13159a | 2012-10-29 20:57:44 -0600 | [diff] [blame] | 158 | #include "prm.h" |
Paul Walmsley | 139563a | 2012-10-21 01:01:10 -0600 | [diff] [blame] | 159 | #include "prm3xxx.h" |
Paul Walmsley | d198b51 | 2010-12-21 15:30:54 -0700 | [diff] [blame] | 160 | #include "prm44xx.h" |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 161 | #include "prm33xx.h" |
Benoit Cousson | eaac329 | 2011-07-10 05:56:31 -0600 | [diff] [blame] | 162 | #include "prminst44xx.h" |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 163 | #include "pm.h" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 164 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 165 | /* Name of the OMAP hwmod for the MPU */ |
Benoit Cousson | 5c2c029 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 166 | #define MPU_INITIATOR_NAME "mpu" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 167 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 168 | /* |
| 169 | * Number of struct omap_hwmod_link records per struct |
| 170 | * omap_hwmod_ocp_if record (master->slave and slave->master) |
| 171 | */ |
| 172 | #define LINKS_PER_OCP_IF 2 |
| 173 | |
Tero Kristo | 4ebf5b2 | 2015-05-05 16:33:04 +0300 | [diff] [blame] | 174 | /* |
| 175 | * Address offset (in bytes) between the reset control and the reset |
| 176 | * status registers: 4 bytes on OMAP4 |
| 177 | */ |
| 178 | #define OMAP4_RST_CTRL_ST_OFFSET 4 |
| 179 | |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 180 | /* |
| 181 | * Maximum length for module clock handle names |
| 182 | */ |
| 183 | #define MOD_CLK_MAX_NAME_LEN 32 |
| 184 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 185 | /** |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 186 | * struct clkctrl_provider - clkctrl provider mapping data |
| 187 | * @addr: base address for the provider |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 188 | * @size: size of the provider address space |
| 189 | * @offset: offset of the provider from PRCM instance base |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 190 | * @node: device node associated with the provider |
| 191 | * @link: list link |
| 192 | */ |
| 193 | struct clkctrl_provider { |
| 194 | u32 addr; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 195 | u32 size; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 196 | u16 offset; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 197 | struct device_node *node; |
| 198 | struct list_head link; |
| 199 | }; |
| 200 | |
| 201 | static LIST_HEAD(clkctrl_providers); |
| 202 | |
| 203 | /** |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 204 | * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations |
| 205 | * @enable_module: function to enable a module (via MODULEMODE) |
| 206 | * @disable_module: function to disable a module (via MODULEMODE) |
| 207 | * |
| 208 | * XXX Eventually this functionality will be hidden inside the PRM/CM |
| 209 | * device drivers. Until then, this should avoid huge blocks of cpu_is_*() |
| 210 | * conditionals in this code. |
| 211 | */ |
| 212 | struct omap_hwmod_soc_ops { |
| 213 | void (*enable_module)(struct omap_hwmod *oh); |
| 214 | int (*disable_module)(struct omap_hwmod *oh); |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 215 | int (*wait_target_ready)(struct omap_hwmod *oh); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 216 | int (*assert_hardreset)(struct omap_hwmod *oh, |
| 217 | struct omap_hwmod_rst_info *ohri); |
| 218 | int (*deassert_hardreset)(struct omap_hwmod *oh, |
| 219 | struct omap_hwmod_rst_info *ohri); |
| 220 | int (*is_hardreset_asserted)(struct omap_hwmod *oh, |
| 221 | struct omap_hwmod_rst_info *ohri); |
Kevin Hilman | 0a179ea | 2012-06-18 12:12:25 -0600 | [diff] [blame] | 222 | int (*init_clkdm)(struct omap_hwmod *oh); |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 223 | void (*update_context_lost)(struct omap_hwmod *oh); |
| 224 | int (*get_context_lost)(struct omap_hwmod *oh); |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 225 | int (*disable_direct_prcm)(struct omap_hwmod *oh); |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 226 | u32 (*xlate_clkctrl)(struct omap_hwmod *oh); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 227 | }; |
| 228 | |
| 229 | /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ |
| 230 | static struct omap_hwmod_soc_ops soc_ops; |
| 231 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 232 | /* omap_hwmod_list contains all registered struct omap_hwmods */ |
| 233 | static LIST_HEAD(omap_hwmod_list); |
| 234 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 235 | /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ |
| 236 | static struct omap_hwmod *mpu_oh; |
| 237 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 238 | /* inited: set to true once the hwmod code is initialized */ |
| 239 | static bool inited; |
| 240 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 241 | /* Private functions */ |
| 242 | |
| 243 | /** |
| 244 | * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy |
| 245 | * @oh: struct omap_hwmod * |
| 246 | * |
| 247 | * Load the current value of the hwmod OCP_SYSCONFIG register into the |
| 248 | * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no |
| 249 | * OCP_SYSCONFIG register or 0 upon success. |
| 250 | */ |
| 251 | static int _update_sysc_cache(struct omap_hwmod *oh) |
| 252 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 253 | if (!oh->class->sysc) { |
| 254 | WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 255 | return -EINVAL; |
| 256 | } |
| 257 | |
| 258 | /* XXX ensure module interface clock is up */ |
| 259 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 260 | oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 261 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 262 | if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) |
Thara Gopinath | 883edfd | 2010-01-19 17:30:51 -0700 | [diff] [blame] | 263 | oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 264 | |
| 265 | return 0; |
| 266 | } |
| 267 | |
| 268 | /** |
| 269 | * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register |
| 270 | * @v: OCP_SYSCONFIG value to write |
| 271 | * @oh: struct omap_hwmod * |
| 272 | * |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 273 | * Write @v into the module class' OCP_SYSCONFIG register, if it has |
| 274 | * one. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 275 | */ |
| 276 | static void _write_sysconfig(u32 v, struct omap_hwmod *oh) |
| 277 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 278 | if (!oh->class->sysc) { |
| 279 | WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 280 | return; |
| 281 | } |
| 282 | |
| 283 | /* XXX ensure module interface clock is up */ |
| 284 | |
Rajendra Nayak | 233cbe5 | 2010-12-14 12:42:36 -0700 | [diff] [blame] | 285 | /* Module might have lost context, always update cache and register */ |
| 286 | oh->_sysc_cache = v; |
Lokesh Vutla | aaf2c0f | 2015-06-10 14:56:24 +0530 | [diff] [blame] | 287 | |
| 288 | /* |
| 289 | * Some IP blocks (such as RTC) require unlocking of IP before |
| 290 | * accessing its registers. If a function pointer is present |
| 291 | * to unlock, then call it before accessing sysconfig and |
| 292 | * call lock after writing sysconfig. |
| 293 | */ |
| 294 | if (oh->class->unlock) |
| 295 | oh->class->unlock(oh); |
| 296 | |
Rajendra Nayak | 233cbe5 | 2010-12-14 12:42:36 -0700 | [diff] [blame] | 297 | omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); |
Lokesh Vutla | aaf2c0f | 2015-06-10 14:56:24 +0530 | [diff] [blame] | 298 | |
| 299 | if (oh->class->lock) |
| 300 | oh->class->lock(oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 301 | } |
| 302 | |
| 303 | /** |
| 304 | * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v |
| 305 | * @oh: struct omap_hwmod * |
| 306 | * @standbymode: MIDLEMODE field bits |
| 307 | * @v: pointer to register contents to modify |
| 308 | * |
| 309 | * Update the master standby mode bits in @v to be @standbymode for |
| 310 | * the @oh hwmod. Does not write to the hardware. Returns -EINVAL |
| 311 | * upon error or 0 upon success. |
| 312 | */ |
| 313 | static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, |
| 314 | u32 *v) |
| 315 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 316 | u32 mstandby_mask; |
| 317 | u8 mstandby_shift; |
| 318 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 319 | if (!oh->class->sysc || |
| 320 | !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 321 | return -EINVAL; |
| 322 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 323 | if (!oh->class->sysc->sysc_fields) { |
| 324 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 325 | return -EINVAL; |
| 326 | } |
| 327 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 328 | mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 329 | mstandby_mask = (0x3 << mstandby_shift); |
| 330 | |
| 331 | *v &= ~mstandby_mask; |
| 332 | *v |= __ffs(standbymode) << mstandby_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 333 | |
| 334 | return 0; |
| 335 | } |
| 336 | |
| 337 | /** |
| 338 | * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v |
| 339 | * @oh: struct omap_hwmod * |
| 340 | * @idlemode: SIDLEMODE field bits |
| 341 | * @v: pointer to register contents to modify |
| 342 | * |
| 343 | * Update the slave idle mode bits in @v to be @idlemode for the @oh |
| 344 | * hwmod. Does not write to the hardware. Returns -EINVAL upon error |
| 345 | * or 0 upon success. |
| 346 | */ |
| 347 | static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) |
| 348 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 349 | u32 sidle_mask; |
| 350 | u8 sidle_shift; |
| 351 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 352 | if (!oh->class->sysc || |
| 353 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 354 | return -EINVAL; |
| 355 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 356 | if (!oh->class->sysc->sysc_fields) { |
| 357 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 358 | return -EINVAL; |
| 359 | } |
| 360 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 361 | sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 362 | sidle_mask = (0x3 << sidle_shift); |
| 363 | |
| 364 | *v &= ~sidle_mask; |
| 365 | *v |= __ffs(idlemode) << sidle_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 366 | |
| 367 | return 0; |
| 368 | } |
| 369 | |
| 370 | /** |
| 371 | * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v |
| 372 | * @oh: struct omap_hwmod * |
| 373 | * @clockact: CLOCKACTIVITY field bits |
| 374 | * @v: pointer to register contents to modify |
| 375 | * |
| 376 | * Update the clockactivity mode bits in @v to be @clockact for the |
| 377 | * @oh hwmod. Used for additional powersaving on some modules. Does |
| 378 | * not write to the hardware. Returns -EINVAL upon error or 0 upon |
| 379 | * success. |
| 380 | */ |
| 381 | static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) |
| 382 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 383 | u32 clkact_mask; |
| 384 | u8 clkact_shift; |
| 385 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 386 | if (!oh->class->sysc || |
| 387 | !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 388 | return -EINVAL; |
| 389 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 390 | if (!oh->class->sysc->sysc_fields) { |
| 391 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 392 | return -EINVAL; |
| 393 | } |
| 394 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 395 | clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 396 | clkact_mask = (0x3 << clkact_shift); |
| 397 | |
| 398 | *v &= ~clkact_mask; |
| 399 | *v |= clockact << clkact_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 400 | |
| 401 | return 0; |
| 402 | } |
| 403 | |
| 404 | /** |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 405 | * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 406 | * @oh: struct omap_hwmod * |
| 407 | * @v: pointer to register contents to modify |
| 408 | * |
| 409 | * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon |
| 410 | * error or 0 upon success. |
| 411 | */ |
| 412 | static int _set_softreset(struct omap_hwmod *oh, u32 *v) |
| 413 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 414 | u32 softrst_mask; |
| 415 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 416 | if (!oh->class->sysc || |
| 417 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 418 | return -EINVAL; |
| 419 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 420 | if (!oh->class->sysc->sysc_fields) { |
| 421 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 422 | return -EINVAL; |
| 423 | } |
| 424 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 425 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 426 | |
| 427 | *v |= softrst_mask; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 428 | |
| 429 | return 0; |
| 430 | } |
| 431 | |
| 432 | /** |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 433 | * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v |
| 434 | * @oh: struct omap_hwmod * |
| 435 | * @v: pointer to register contents to modify |
| 436 | * |
| 437 | * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon |
| 438 | * error or 0 upon success. |
| 439 | */ |
| 440 | static int _clear_softreset(struct omap_hwmod *oh, u32 *v) |
| 441 | { |
| 442 | u32 softrst_mask; |
| 443 | |
| 444 | if (!oh->class->sysc || |
| 445 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) |
| 446 | return -EINVAL; |
| 447 | |
| 448 | if (!oh->class->sysc->sysc_fields) { |
| 449 | WARN(1, |
| 450 | "omap_hwmod: %s: sysc_fields absent for sysconfig class\n", |
| 451 | oh->name); |
| 452 | return -EINVAL; |
| 453 | } |
| 454 | |
| 455 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); |
| 456 | |
| 457 | *v &= ~softrst_mask; |
| 458 | |
| 459 | return 0; |
| 460 | } |
| 461 | |
| 462 | /** |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 463 | * _wait_softreset_complete - wait for an OCP softreset to complete |
| 464 | * @oh: struct omap_hwmod * to wait on |
| 465 | * |
| 466 | * Wait until the IP block represented by @oh reports that its OCP |
| 467 | * softreset is complete. This can be triggered by software (see |
| 468 | * _ocp_softreset()) or by hardware upon returning from off-mode (one |
| 469 | * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT |
| 470 | * microseconds. Returns the number of microseconds waited. |
| 471 | */ |
| 472 | static int _wait_softreset_complete(struct omap_hwmod *oh) |
| 473 | { |
| 474 | struct omap_hwmod_class_sysconfig *sysc; |
| 475 | u32 softrst_mask; |
| 476 | int c = 0; |
| 477 | |
| 478 | sysc = oh->class->sysc; |
| 479 | |
| 480 | if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS) |
| 481 | omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) |
| 482 | & SYSS_RESETDONE_MASK), |
| 483 | MAX_MODULE_SOFTRESET_WAIT, c); |
| 484 | else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { |
| 485 | softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); |
| 486 | omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) |
| 487 | & softrst_mask), |
| 488 | MAX_MODULE_SOFTRESET_WAIT, c); |
| 489 | } |
| 490 | |
| 491 | return c; |
| 492 | } |
| 493 | |
| 494 | /** |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 495 | * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v |
| 496 | * @oh: struct omap_hwmod * |
| 497 | * |
| 498 | * The DMADISABLE bit is a semi-automatic bit present in sysconfig register |
| 499 | * of some modules. When the DMA must perform read/write accesses, the |
| 500 | * DMADISABLE bit is cleared by the hardware. But when the DMA must stop |
| 501 | * for power management, software must set the DMADISABLE bit back to 1. |
| 502 | * |
| 503 | * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon |
| 504 | * error or 0 upon success. |
| 505 | */ |
| 506 | static int _set_dmadisable(struct omap_hwmod *oh) |
| 507 | { |
| 508 | u32 v; |
| 509 | u32 dmadisable_mask; |
| 510 | |
| 511 | if (!oh->class->sysc || |
| 512 | !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE)) |
| 513 | return -EINVAL; |
| 514 | |
| 515 | if (!oh->class->sysc->sysc_fields) { |
| 516 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
| 517 | return -EINVAL; |
| 518 | } |
| 519 | |
| 520 | /* clocks must be on for this operation */ |
| 521 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
| 522 | pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name); |
| 523 | return -EINVAL; |
| 524 | } |
| 525 | |
| 526 | pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name); |
| 527 | |
| 528 | v = oh->_sysc_cache; |
| 529 | dmadisable_mask = |
| 530 | (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift); |
| 531 | v |= dmadisable_mask; |
| 532 | _write_sysconfig(v, oh); |
| 533 | |
| 534 | return 0; |
| 535 | } |
| 536 | |
| 537 | /** |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 538 | * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v |
| 539 | * @oh: struct omap_hwmod * |
| 540 | * @autoidle: desired AUTOIDLE bitfield value (0 or 1) |
| 541 | * @v: pointer to register contents to modify |
| 542 | * |
| 543 | * Update the module autoidle bit in @v to be @autoidle for the @oh |
| 544 | * hwmod. The autoidle bit controls whether the module can gate |
| 545 | * internal clocks automatically when it isn't doing anything; the |
| 546 | * exact function of this bit varies on a per-module basis. This |
| 547 | * function does not write to the hardware. Returns -EINVAL upon |
| 548 | * error or 0 upon success. |
| 549 | */ |
| 550 | static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, |
| 551 | u32 *v) |
| 552 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 553 | u32 autoidle_mask; |
| 554 | u8 autoidle_shift; |
| 555 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 556 | if (!oh->class->sysc || |
| 557 | !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 558 | return -EINVAL; |
| 559 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 560 | if (!oh->class->sysc->sysc_fields) { |
| 561 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 562 | return -EINVAL; |
| 563 | } |
| 564 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 565 | autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; |
Tarun Kanti DebBarma | 8985b63 | 2011-03-03 14:22:46 -0700 | [diff] [blame] | 566 | autoidle_mask = (0x1 << autoidle_shift); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 567 | |
| 568 | *v &= ~autoidle_mask; |
| 569 | *v |= autoidle << autoidle_shift; |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 570 | |
| 571 | return 0; |
| 572 | } |
| 573 | |
| 574 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 575 | * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware |
| 576 | * @oh: struct omap_hwmod * |
| 577 | * |
| 578 | * Allow the hardware module @oh to send wakeups. Returns -EINVAL |
| 579 | * upon error or 0 upon success. |
| 580 | */ |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 581 | static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 582 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 583 | if (!oh->class->sysc || |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 584 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 585 | (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || |
| 586 | (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 587 | return -EINVAL; |
| 588 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 589 | if (!oh->class->sysc->sysc_fields) { |
| 590 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 591 | return -EINVAL; |
| 592 | } |
| 593 | |
Benoit Cousson | 1fe7411 | 2011-07-01 22:54:03 +0200 | [diff] [blame] | 594 | if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) |
| 595 | *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 596 | |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 597 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 598 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 599 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 600 | _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 601 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 602 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ |
| 603 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 604 | return 0; |
| 605 | } |
| 606 | |
| 607 | /** |
| 608 | * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware |
| 609 | * @oh: struct omap_hwmod * |
| 610 | * |
| 611 | * Prevent the hardware module @oh to send wakeups. Returns -EINVAL |
| 612 | * upon error or 0 upon success. |
| 613 | */ |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 614 | static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 615 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 616 | if (!oh->class->sysc || |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 617 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 618 | (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || |
| 619 | (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 620 | return -EINVAL; |
| 621 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 622 | if (!oh->class->sysc->sysc_fields) { |
| 623 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 624 | return -EINVAL; |
| 625 | } |
| 626 | |
Benoit Cousson | 1fe7411 | 2011-07-01 22:54:03 +0200 | [diff] [blame] | 627 | if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) |
| 628 | *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 629 | |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 630 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 631 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 632 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
Djamil Elaidi | 561038f | 2012-06-17 11:57:51 -0600 | [diff] [blame] | 633 | _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v); |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 634 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 635 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ |
| 636 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 637 | return 0; |
| 638 | } |
| 639 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 640 | static struct clockdomain *_get_clkdm(struct omap_hwmod *oh) |
| 641 | { |
Rajendra Nayak | c4a1ea2 | 2012-04-27 16:32:53 +0530 | [diff] [blame] | 642 | struct clk_hw_omap *clk; |
| 643 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 644 | if (oh->clkdm) { |
| 645 | return oh->clkdm; |
| 646 | } else if (oh->_clk) { |
Tero Kristo | 924f949 | 2013-07-12 12:26:41 +0300 | [diff] [blame] | 647 | if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC) |
| 648 | return NULL; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 649 | clk = to_clk_hw_omap(__clk_get_hw(oh->_clk)); |
| 650 | return clk->clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 651 | } |
| 652 | return NULL; |
| 653 | } |
| 654 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 655 | /** |
| 656 | * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active |
| 657 | * @oh: struct omap_hwmod * |
| 658 | * |
| 659 | * Prevent the hardware module @oh from entering idle while the |
| 660 | * hardare module initiator @init_oh is active. Useful when a module |
| 661 | * will be accessed by a particular initiator (e.g., if a module will |
| 662 | * be accessed by the IVA, there should be a sleepdep between the IVA |
| 663 | * initiator and the module). Only applies to modules in smart-idle |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 664 | * mode. If the clockdomain is marked as not needing autodeps, return |
| 665 | * 0 without doing anything. Otherwise, returns -EINVAL upon error or |
| 666 | * passes along clkdm_add_sleepdep() value upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 667 | */ |
| 668 | static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) |
| 669 | { |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 670 | struct clockdomain *clkdm, *init_clkdm; |
| 671 | |
| 672 | clkdm = _get_clkdm(oh); |
| 673 | init_clkdm = _get_clkdm(init_oh); |
| 674 | |
| 675 | if (!clkdm || !init_clkdm) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 676 | return -EINVAL; |
| 677 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 678 | if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 679 | return 0; |
| 680 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 681 | return clkdm_add_sleepdep(clkdm, init_clkdm); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 682 | } |
| 683 | |
| 684 | /** |
| 685 | * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active |
| 686 | * @oh: struct omap_hwmod * |
| 687 | * |
| 688 | * Allow the hardware module @oh to enter idle while the hardare |
| 689 | * module initiator @init_oh is active. Useful when a module will not |
| 690 | * be accessed by a particular initiator (e.g., if a module will not |
| 691 | * be accessed by the IVA, there should be no sleepdep between the IVA |
| 692 | * initiator and the module). Only applies to modules in smart-idle |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 693 | * mode. If the clockdomain is marked as not needing autodeps, return |
| 694 | * 0 without doing anything. Returns -EINVAL upon error or passes |
| 695 | * along clkdm_del_sleepdep() value upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 696 | */ |
| 697 | static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) |
| 698 | { |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 699 | struct clockdomain *clkdm, *init_clkdm; |
| 700 | |
| 701 | clkdm = _get_clkdm(oh); |
| 702 | init_clkdm = _get_clkdm(init_oh); |
| 703 | |
| 704 | if (!clkdm || !init_clkdm) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 705 | return -EINVAL; |
| 706 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 707 | if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 708 | return 0; |
| 709 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 710 | return clkdm_del_sleepdep(clkdm, init_clkdm); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 711 | } |
| 712 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 713 | static const struct of_device_id ti_clkctrl_match_table[] __initconst = { |
| 714 | { .compatible = "ti,clkctrl" }, |
| 715 | { } |
| 716 | }; |
| 717 | |
Arnd Bergmann | 0ca14cd | 2017-09-14 14:50:58 +0200 | [diff] [blame^] | 718 | static int __init _setup_clkctrl_provider(struct device_node *np) |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 719 | { |
| 720 | const __be32 *addrp; |
| 721 | struct clkctrl_provider *provider; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 722 | u64 size; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 723 | |
| 724 | provider = memblock_virt_alloc(sizeof(*provider), 0); |
| 725 | if (!provider) |
| 726 | return -ENOMEM; |
| 727 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 728 | addrp = of_get_address(np, 0, &size, NULL); |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 729 | provider->addr = (u32)of_translate_address(np, addrp); |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 730 | addrp = of_get_address(np->parent, 0, NULL, NULL); |
| 731 | provider->offset = provider->addr - |
| 732 | (u32)of_translate_address(np->parent, addrp); |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 733 | provider->addr &= ~0xff; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 734 | provider->size = size | 0xff; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 735 | provider->node = np; |
| 736 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 737 | pr_debug("%s: %s: %x...%x [+%x]\n", __func__, np->parent->name, |
| 738 | provider->addr, provider->addr + provider->size, |
| 739 | provider->offset); |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 740 | |
| 741 | list_add(&provider->link, &clkctrl_providers); |
| 742 | |
| 743 | return 0; |
| 744 | } |
| 745 | |
Arnd Bergmann | 0ca14cd | 2017-09-14 14:50:58 +0200 | [diff] [blame^] | 746 | static int __init _init_clkctrl_providers(void) |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 747 | { |
| 748 | struct device_node *np; |
| 749 | int ret = 0; |
| 750 | |
| 751 | for_each_matching_node(np, ti_clkctrl_match_table) { |
| 752 | ret = _setup_clkctrl_provider(np); |
| 753 | if (ret) |
| 754 | break; |
| 755 | } |
| 756 | |
| 757 | return ret; |
| 758 | } |
| 759 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 760 | static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh) |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 761 | { |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 762 | if (!oh->prcm.omap4.modulemode) |
| 763 | return 0; |
| 764 | |
| 765 | return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition, |
| 766 | oh->clkdm->cm_inst, |
| 767 | oh->prcm.omap4.clkctrl_offs); |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 768 | } |
| 769 | |
| 770 | static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh) |
| 771 | { |
| 772 | struct clkctrl_provider *provider; |
| 773 | struct clk *clk; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 774 | u32 addr; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 775 | |
| 776 | if (!soc_ops.xlate_clkctrl) |
| 777 | return NULL; |
| 778 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 779 | addr = soc_ops.xlate_clkctrl(oh); |
| 780 | if (!addr) |
| 781 | return NULL; |
| 782 | |
| 783 | pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr); |
| 784 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 785 | list_for_each_entry(provider, &clkctrl_providers, link) { |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 786 | if (provider->addr <= addr && |
| 787 | provider->addr + provider->size >= addr) { |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 788 | struct of_phandle_args clkspec; |
| 789 | |
| 790 | clkspec.np = provider->node; |
| 791 | clkspec.args_count = 2; |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 792 | clkspec.args[0] = addr - provider->addr - |
| 793 | provider->offset; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 794 | clkspec.args[1] = 0; |
| 795 | |
| 796 | clk = of_clk_get_from_provider(&clkspec); |
| 797 | |
Tero Kristo | 6e83eca | 2017-08-04 17:41:50 +0300 | [diff] [blame] | 798 | pr_debug("%s: %s got %p (offset=%x, provider=%s)\n", |
| 799 | __func__, oh->name, clk, clkspec.args[0], |
| 800 | provider->node->parent->name); |
| 801 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 802 | return clk; |
| 803 | } |
| 804 | } |
| 805 | |
| 806 | return NULL; |
| 807 | } |
| 808 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 809 | /** |
| 810 | * _init_main_clk - get a struct clk * for the the hwmod's main functional clk |
| 811 | * @oh: struct omap_hwmod * |
| 812 | * |
| 813 | * Called from _init_clocks(). Populates the @oh _clk (main |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 814 | * functional clock pointer) if a clock matching the hwmod name is found, |
| 815 | * or a main_clk is present. Returns 0 on success or -EINVAL on error. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 816 | */ |
| 817 | static int _init_main_clk(struct omap_hwmod *oh) |
| 818 | { |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 819 | int ret = 0; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 820 | struct clk *clk = NULL; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 821 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 822 | clk = _lookup_clkctrl_clk(oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 823 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 824 | if (!IS_ERR_OR_NULL(clk)) { |
| 825 | pr_debug("%s: mapped main_clk %s for %s\n", __func__, |
| 826 | __clk_get_name(clk), oh->name); |
| 827 | oh->main_clk = __clk_get_name(clk); |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 828 | oh->_clk = clk; |
| 829 | soc_ops.disable_direct_prcm(oh); |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 830 | } else { |
| 831 | if (!oh->main_clk) |
| 832 | return 0; |
| 833 | |
| 834 | oh->_clk = clk_get(NULL, oh->main_clk); |
| 835 | } |
| 836 | |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 837 | if (IS_ERR(oh->_clk)) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 838 | pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n", |
| 839 | oh->name, oh->main_clk); |
Benoit Cousson | 6340338 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 840 | return -EINVAL; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 841 | } |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 842 | /* |
| 843 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 844 | * to do something meaningful. Today its just a no-op. |
| 845 | * If clk_prepare() is used at some point to do things like |
| 846 | * voltage scaling etc, then this would have to be moved to |
| 847 | * some point where subsystems like i2c and pmic become |
| 848 | * available. |
| 849 | */ |
| 850 | clk_prepare(oh->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 851 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 852 | if (!_get_clkdm(oh)) |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 853 | pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n", |
Rajendra Nayak | 5dcc3b9 | 2012-09-22 02:24:17 -0600 | [diff] [blame] | 854 | oh->name, oh->main_clk); |
Kevin Hilman | 81d7c6f | 2009-12-08 16:34:24 -0700 | [diff] [blame] | 855 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 856 | return ret; |
| 857 | } |
| 858 | |
| 859 | /** |
Paul Walmsley | 887adea | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 860 | * _init_interface_clks - get a struct clk * for the the hwmod's interface clks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 861 | * @oh: struct omap_hwmod * |
| 862 | * |
| 863 | * Called from _init_clocks(). Populates the @oh OCP slave interface |
| 864 | * clock pointers. Returns 0 on success or -EINVAL on error. |
| 865 | */ |
| 866 | static int _init_interface_clks(struct omap_hwmod *oh) |
| 867 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 868 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 869 | struct clk *c; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 870 | int ret = 0; |
| 871 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 872 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 50ebdac | 2010-02-22 22:09:31 -0700 | [diff] [blame] | 873 | if (!os->clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 874 | continue; |
| 875 | |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 876 | c = clk_get(NULL, os->clk); |
| 877 | if (IS_ERR(c)) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 878 | pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n", |
| 879 | oh->name, os->clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 880 | ret = -EINVAL; |
Nishanth Menon | 0e7dc86 | 2013-12-08 18:39:03 -0700 | [diff] [blame] | 881 | continue; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 882 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 883 | os->_clk = c; |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 884 | /* |
| 885 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 886 | * to do something meaningful. Today its just a no-op. |
| 887 | * If clk_prepare() is used at some point to do things like |
| 888 | * voltage scaling etc, then this would have to be moved to |
| 889 | * some point where subsystems like i2c and pmic become |
| 890 | * available. |
| 891 | */ |
| 892 | clk_prepare(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 893 | } |
| 894 | |
| 895 | return ret; |
| 896 | } |
| 897 | |
| 898 | /** |
| 899 | * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks |
| 900 | * @oh: struct omap_hwmod * |
| 901 | * |
| 902 | * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk |
| 903 | * clock pointers. Returns 0 on success or -EINVAL on error. |
| 904 | */ |
| 905 | static int _init_opt_clks(struct omap_hwmod *oh) |
| 906 | { |
| 907 | struct omap_hwmod_opt_clk *oc; |
| 908 | struct clk *c; |
| 909 | int i; |
| 910 | int ret = 0; |
| 911 | |
| 912 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 913 | c = clk_get(NULL, oc->clk); |
| 914 | if (IS_ERR(c)) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 915 | pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n", |
| 916 | oh->name, oc->clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 917 | ret = -EINVAL; |
Nishanth Menon | 0e7dc86 | 2013-12-08 18:39:03 -0700 | [diff] [blame] | 918 | continue; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 919 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 920 | oc->_clk = c; |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 921 | /* |
| 922 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 923 | * to do something meaningful. Today its just a no-op. |
| 924 | * If clk_prepare() is used at some point to do things like |
| 925 | * voltage scaling etc, then this would have to be moved to |
| 926 | * some point where subsystems like i2c and pmic become |
| 927 | * available. |
| 928 | */ |
| 929 | clk_prepare(oc->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 930 | } |
| 931 | |
| 932 | return ret; |
| 933 | } |
| 934 | |
Peter Ujfalusi | c12ba8c | 2015-11-12 09:32:58 +0200 | [diff] [blame] | 935 | static void _enable_optional_clocks(struct omap_hwmod *oh) |
| 936 | { |
| 937 | struct omap_hwmod_opt_clk *oc; |
| 938 | int i; |
| 939 | |
| 940 | pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name); |
| 941 | |
| 942 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) |
| 943 | if (oc->_clk) { |
| 944 | pr_debug("omap_hwmod: enable %s:%s\n", oc->role, |
| 945 | __clk_get_name(oc->_clk)); |
| 946 | clk_enable(oc->_clk); |
| 947 | } |
| 948 | } |
| 949 | |
| 950 | static void _disable_optional_clocks(struct omap_hwmod *oh) |
| 951 | { |
| 952 | struct omap_hwmod_opt_clk *oc; |
| 953 | int i; |
| 954 | |
| 955 | pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name); |
| 956 | |
| 957 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) |
| 958 | if (oc->_clk) { |
| 959 | pr_debug("omap_hwmod: disable %s:%s\n", oc->role, |
| 960 | __clk_get_name(oc->_clk)); |
| 961 | clk_disable(oc->_clk); |
| 962 | } |
| 963 | } |
| 964 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 965 | /** |
| 966 | * _enable_clocks - enable hwmod main clock and interface clocks |
| 967 | * @oh: struct omap_hwmod * |
| 968 | * |
| 969 | * Enables all clocks necessary for register reads and writes to succeed |
| 970 | * on the hwmod @oh. Returns 0. |
| 971 | */ |
| 972 | static int _enable_clocks(struct omap_hwmod *oh) |
| 973 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 974 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 975 | |
| 976 | pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); |
| 977 | |
Benoit Cousson | 4d3ae5a | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 978 | if (oh->_clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 979 | clk_enable(oh->_clk); |
| 980 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 981 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 982 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) |
| 983 | clk_enable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 984 | } |
| 985 | |
Peter Ujfalusi | c12ba8c | 2015-11-12 09:32:58 +0200 | [diff] [blame] | 986 | if (oh->flags & HWMOD_OPT_CLKS_NEEDED) |
| 987 | _enable_optional_clocks(oh); |
| 988 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 989 | /* The opt clocks are controlled by the device driver. */ |
| 990 | |
| 991 | return 0; |
| 992 | } |
| 993 | |
| 994 | /** |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 995 | * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework |
| 996 | * @oh: struct omap_hwmod * |
| 997 | */ |
| 998 | static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh) |
| 999 | { |
| 1000 | if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK) |
| 1001 | return true; |
| 1002 | |
| 1003 | return false; |
| 1004 | } |
| 1005 | |
| 1006 | /** |
| 1007 | * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock |
| 1008 | * @oh: struct omap_hwmod * |
| 1009 | */ |
| 1010 | static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh) |
| 1011 | { |
| 1012 | if (oh->prcm.omap4.clkctrl_offs) |
| 1013 | return true; |
| 1014 | |
| 1015 | if (!oh->prcm.omap4.clkctrl_offs && |
| 1016 | oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET) |
| 1017 | return true; |
| 1018 | |
| 1019 | return false; |
| 1020 | } |
| 1021 | |
| 1022 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1023 | * _disable_clocks - disable hwmod main clock and interface clocks |
| 1024 | * @oh: struct omap_hwmod * |
| 1025 | * |
| 1026 | * Disables the hwmod @oh main functional and interface clocks. Returns 0. |
| 1027 | */ |
| 1028 | static int _disable_clocks(struct omap_hwmod *oh) |
| 1029 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1030 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1031 | |
| 1032 | pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); |
| 1033 | |
Benoit Cousson | 4d3ae5a | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 1034 | if (oh->_clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1035 | clk_disable(oh->_clk); |
| 1036 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 1037 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1038 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) |
| 1039 | clk_disable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1040 | } |
| 1041 | |
Peter Ujfalusi | c12ba8c | 2015-11-12 09:32:58 +0200 | [diff] [blame] | 1042 | if (oh->flags & HWMOD_OPT_CLKS_NEEDED) |
| 1043 | _disable_optional_clocks(oh); |
| 1044 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1045 | /* The opt clocks are controlled by the device driver. */ |
| 1046 | |
| 1047 | return 0; |
| 1048 | } |
| 1049 | |
| 1050 | /** |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 1051 | * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 1052 | * @oh: struct omap_hwmod * |
| 1053 | * |
| 1054 | * Enables the PRCM module mode related to the hwmod @oh. |
| 1055 | * No return value. |
| 1056 | */ |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 1057 | static void _omap4_enable_module(struct omap_hwmod *oh) |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 1058 | { |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 1059 | if (!oh->clkdm || !oh->prcm.omap4.modulemode || |
| 1060 | _omap4_clkctrl_managed_by_clkfwk(oh)) |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 1061 | return; |
| 1062 | |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 1063 | pr_debug("omap_hwmod: %s: %s: %d\n", |
| 1064 | oh->name, __func__, oh->prcm.omap4.modulemode); |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 1065 | |
Tero Kristo | 128603f | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 1066 | omap_cm_module_enable(oh->prcm.omap4.modulemode, |
| 1067 | oh->clkdm->prcm_partition, |
| 1068 | oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs); |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 1069 | } |
| 1070 | |
| 1071 | /** |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 1072 | * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 |
| 1073 | * @oh: struct omap_hwmod * |
| 1074 | * |
| 1075 | * Wait for a module @oh to enter slave idle. Returns 0 if the module |
| 1076 | * does not have an IDLEST bit or if the module successfully enters |
| 1077 | * slave idle; otherwise, pass along the return value of the |
| 1078 | * appropriate *_cm*_wait_module_idle() function. |
| 1079 | */ |
| 1080 | static int _omap4_wait_target_disable(struct omap_hwmod *oh) |
| 1081 | { |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1082 | if (!oh) |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 1083 | return -EINVAL; |
| 1084 | |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1085 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm) |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 1086 | return 0; |
| 1087 | |
| 1088 | if (oh->flags & HWMOD_NO_IDLEST) |
| 1089 | return 0; |
| 1090 | |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 1091 | if (_omap4_clkctrl_managed_by_clkfwk(oh)) |
| 1092 | return 0; |
| 1093 | |
| 1094 | if (!_omap4_has_clkctrl_clock(oh)) |
Dave Gerlach | 428929c | 2016-07-12 12:50:33 -0500 | [diff] [blame] | 1095 | return 0; |
| 1096 | |
Tero Kristo | a8ae5af | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 1097 | return omap_cm_wait_module_idle(oh->clkdm->prcm_partition, |
| 1098 | oh->clkdm->cm_inst, |
| 1099 | oh->prcm.omap4.clkctrl_offs, 0); |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 1100 | } |
| 1101 | |
| 1102 | /** |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1103 | * _save_mpu_port_index - find and save the index to @oh's MPU port |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1104 | * @oh: struct omap_hwmod * |
| 1105 | * |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1106 | * Determines the array index of the OCP slave port that the MPU uses |
| 1107 | * to address the device, and saves it into the struct omap_hwmod. |
| 1108 | * Intended to be called during hwmod registration only. No return |
| 1109 | * value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1110 | */ |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1111 | static void __init _save_mpu_port_index(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1112 | { |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1113 | struct omap_hwmod_ocp_if *os = NULL; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1114 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1115 | if (!oh) |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1116 | return; |
| 1117 | |
| 1118 | oh->_int_flags |= _HWMOD_NO_MPU_PORT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1119 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 1120 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1121 | if (os->user & OCP_USER_MPU) { |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 1122 | oh->_mpu_port = os; |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1123 | oh->_int_flags &= ~_HWMOD_NO_MPU_PORT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1124 | break; |
| 1125 | } |
| 1126 | } |
| 1127 | |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1128 | return; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1129 | } |
| 1130 | |
| 1131 | /** |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 1132 | * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU |
| 1133 | * @oh: struct omap_hwmod * |
| 1134 | * |
| 1135 | * Given a pointer to a struct omap_hwmod record @oh, return a pointer |
| 1136 | * to the struct omap_hwmod_ocp_if record that is used by the MPU to |
| 1137 | * communicate with the IP block. This interface need not be directly |
| 1138 | * connected to the MPU (and almost certainly is not), but is directly |
| 1139 | * connected to the IP block represented by @oh. Returns a pointer |
| 1140 | * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon |
| 1141 | * error or if there does not appear to be a path from the MPU to this |
| 1142 | * IP block. |
| 1143 | */ |
| 1144 | static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh) |
| 1145 | { |
| 1146 | if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0) |
| 1147 | return NULL; |
| 1148 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 1149 | return oh->_mpu_port; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 1150 | }; |
| 1151 | |
| 1152 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1153 | * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1154 | * @oh: struct omap_hwmod * |
| 1155 | * |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1156 | * Ensure that the OCP_SYSCONFIG register for the IP block represented |
| 1157 | * by @oh is set to indicate to the PRCM that the IP block is active. |
| 1158 | * Usually this means placing the module into smart-idle mode and |
| 1159 | * smart-standby, but if there is a bug in the automatic idle handling |
| 1160 | * for the IP block, it may need to be placed into the force-idle or |
| 1161 | * no-idle variants of these modes. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1162 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1163 | static void _enable_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1164 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1165 | u8 idlemode, sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1166 | u32 v; |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1167 | bool clkdm_act; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1168 | struct clockdomain *clkdm; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1169 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1170 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1171 | return; |
| 1172 | |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 1173 | /* |
| 1174 | * Wait until reset has completed, this is needed as the IP |
| 1175 | * block is reset automatically by hardware in some cases |
| 1176 | * (off-mode for example), and the drivers require the |
| 1177 | * IP to be ready when they access it |
| 1178 | */ |
| 1179 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1180 | _enable_optional_clocks(oh); |
| 1181 | _wait_softreset_complete(oh); |
| 1182 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1183 | _disable_optional_clocks(oh); |
| 1184 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1185 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1186 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1187 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1188 | clkdm = _get_clkdm(oh); |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1189 | if (sf & SYSC_HAS_SIDLEMODE) { |
Rajendra Nayak | ca43ea3 | 2013-05-15 20:18:38 +0530 | [diff] [blame] | 1190 | if (oh->flags & HWMOD_SWSUP_SIDLE || |
| 1191 | oh->flags & HWMOD_SWSUP_SIDLE_ACT) { |
Rajendra Nayak | 35513171 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1192 | idlemode = HWMOD_IDLEMODE_NO; |
| 1193 | } else { |
| 1194 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1195 | _enable_wakeup(oh, &v); |
| 1196 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 1197 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1198 | else |
| 1199 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1200 | } |
| 1201 | |
| 1202 | /* |
| 1203 | * This is special handling for some IPs like |
| 1204 | * 32k sync timer. Force them to idle! |
| 1205 | */ |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1206 | clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU); |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1207 | if (clkdm_act && !(oh->class->sysc->idlemodes & |
| 1208 | (SIDLE_SMART | SIDLE_SMART_WKUP))) |
| 1209 | idlemode = HWMOD_IDLEMODE_FORCE; |
Rajendra Nayak | 35513171 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1210 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1211 | _set_slave_idlemode(oh, idlemode, &v); |
| 1212 | } |
| 1213 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1214 | if (sf & SYSC_HAS_MIDLEMODE) { |
Grazvydas Ignotas | 092bc08 | 2013-03-11 21:49:00 +0200 | [diff] [blame] | 1215 | if (oh->flags & HWMOD_FORCE_MSTANDBY) { |
| 1216 | idlemode = HWMOD_IDLEMODE_FORCE; |
| 1217 | } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 1218 | idlemode = HWMOD_IDLEMODE_NO; |
| 1219 | } else { |
| 1220 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1221 | _enable_wakeup(oh, &v); |
| 1222 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 1223 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1224 | else |
| 1225 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1226 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1227 | _set_master_standbymode(oh, idlemode, &v); |
| 1228 | } |
| 1229 | |
Paul Walmsley | a16b1f7 | 2009-12-08 16:34:17 -0700 | [diff] [blame] | 1230 | /* |
| 1231 | * XXX The clock framework should handle this, by |
| 1232 | * calling into this code. But this must wait until the |
| 1233 | * clock structures are tagged with omap_hwmod entries |
| 1234 | */ |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1235 | if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && |
| 1236 | (sf & SYSC_HAS_CLOCKACTIVITY)) |
Tony Lindgren | ca5339b | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 1237 | _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1238 | |
Lokesh Vutla | 3ca4a23 | 2016-03-26 23:08:55 -0600 | [diff] [blame] | 1239 | _write_sysconfig(v, oh); |
Hema HK | 78f26e8 | 2010-09-24 10:23:19 -0600 | [diff] [blame] | 1240 | |
| 1241 | /* |
| 1242 | * Set the autoidle bit only after setting the smartidle bit |
| 1243 | * Setting this will not have any impact on the other modules. |
| 1244 | */ |
| 1245 | if (sf & SYSC_HAS_AUTOIDLE) { |
| 1246 | idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? |
| 1247 | 0 : 1; |
| 1248 | _set_module_autoidle(oh, idlemode, &v); |
| 1249 | _write_sysconfig(v, oh); |
| 1250 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1251 | } |
| 1252 | |
| 1253 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1254 | * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1255 | * @oh: struct omap_hwmod * |
| 1256 | * |
| 1257 | * If module is marked as SWSUP_SIDLE, force the module into slave |
| 1258 | * idle; otherwise, configure it for smart-idle. If module is marked |
| 1259 | * as SWSUP_MSUSPEND, force the module into master standby; otherwise, |
| 1260 | * configure it for smart-standby. No return value. |
| 1261 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1262 | static void _idle_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1263 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1264 | u8 idlemode, sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1265 | u32 v; |
| 1266 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1267 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1268 | return; |
| 1269 | |
| 1270 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1271 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1272 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1273 | if (sf & SYSC_HAS_SIDLEMODE) { |
Rajendra Nayak | 35513171 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1274 | if (oh->flags & HWMOD_SWSUP_SIDLE) { |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1275 | idlemode = HWMOD_IDLEMODE_FORCE; |
Rajendra Nayak | 35513171 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1276 | } else { |
| 1277 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1278 | _enable_wakeup(oh, &v); |
| 1279 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 1280 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1281 | else |
| 1282 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1283 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1284 | _set_slave_idlemode(oh, idlemode, &v); |
| 1285 | } |
| 1286 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1287 | if (sf & SYSC_HAS_MIDLEMODE) { |
Grazvydas Ignotas | 092bc08 | 2013-03-11 21:49:00 +0200 | [diff] [blame] | 1288 | if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || |
| 1289 | (oh->flags & HWMOD_FORCE_MSTANDBY)) { |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 1290 | idlemode = HWMOD_IDLEMODE_FORCE; |
| 1291 | } else { |
| 1292 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1293 | _enable_wakeup(oh, &v); |
| 1294 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 1295 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1296 | else |
| 1297 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1298 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1299 | _set_master_standbymode(oh, idlemode, &v); |
| 1300 | } |
| 1301 | |
Lokesh Vutla | 3ca4a23 | 2016-03-26 23:08:55 -0600 | [diff] [blame] | 1302 | /* If the cached value is the same as the new value, skip the write */ |
| 1303 | if (oh->_sysc_cache != v) |
| 1304 | _write_sysconfig(v, oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1305 | } |
| 1306 | |
| 1307 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1308 | * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1309 | * @oh: struct omap_hwmod * |
| 1310 | * |
| 1311 | * Force the module into slave idle and master suspend. No return |
| 1312 | * value. |
| 1313 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1314 | static void _shutdown_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1315 | { |
| 1316 | u32 v; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1317 | u8 sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1318 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1319 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1320 | return; |
| 1321 | |
| 1322 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1323 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1324 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1325 | if (sf & SYSC_HAS_SIDLEMODE) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1326 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); |
| 1327 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1328 | if (sf & SYSC_HAS_MIDLEMODE) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1329 | _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); |
| 1330 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1331 | if (sf & SYSC_HAS_AUTOIDLE) |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 1332 | _set_module_autoidle(oh, 1, &v); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1333 | |
| 1334 | _write_sysconfig(v, oh); |
| 1335 | } |
| 1336 | |
| 1337 | /** |
| 1338 | * _lookup - find an omap_hwmod by name |
| 1339 | * @name: find an omap_hwmod by name |
| 1340 | * |
| 1341 | * Return a pointer to an omap_hwmod by name, or NULL if not found. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1342 | */ |
| 1343 | static struct omap_hwmod *_lookup(const char *name) |
| 1344 | { |
| 1345 | struct omap_hwmod *oh, *temp_oh; |
| 1346 | |
| 1347 | oh = NULL; |
| 1348 | |
| 1349 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
| 1350 | if (!strcmp(name, temp_oh->name)) { |
| 1351 | oh = temp_oh; |
| 1352 | break; |
| 1353 | } |
| 1354 | } |
| 1355 | |
| 1356 | return oh; |
| 1357 | } |
Paul Walmsley | 868c157 | 2012-06-19 15:01:02 -0600 | [diff] [blame] | 1358 | |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1359 | /** |
| 1360 | * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod |
| 1361 | * @oh: struct omap_hwmod * |
| 1362 | * |
| 1363 | * Convert a clockdomain name stored in a struct omap_hwmod into a |
| 1364 | * clockdomain pointer, and save it into the struct omap_hwmod. |
Paul Walmsley | 868c157 | 2012-06-19 15:01:02 -0600 | [diff] [blame] | 1365 | * Return -EINVAL if the clkdm_name lookup failed. |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1366 | */ |
| 1367 | static int _init_clkdm(struct omap_hwmod *oh) |
| 1368 | { |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1369 | if (!oh->clkdm_name) { |
| 1370 | pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name); |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1371 | return 0; |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1372 | } |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1373 | |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1374 | oh->clkdm = clkdm_lookup(oh->clkdm_name); |
| 1375 | if (!oh->clkdm) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 1376 | pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n", |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1377 | oh->name, oh->clkdm_name); |
Tero Kristo | 0385c58 | 2013-07-17 18:03:25 +0300 | [diff] [blame] | 1378 | return 0; |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1379 | } |
| 1380 | |
| 1381 | pr_debug("omap_hwmod: %s: associated to clkdm %s\n", |
| 1382 | oh->name, oh->clkdm_name); |
| 1383 | |
| 1384 | return 0; |
| 1385 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1386 | |
| 1387 | /** |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1388 | * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as |
| 1389 | * well the clockdomain. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1390 | * @oh: struct omap_hwmod * |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 1391 | * @np: device_node mapped to this hwmod |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1392 | * |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1393 | * Called by omap_hwmod_setup_*() (after omap2_clk_init()). |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1394 | * Resolves all clock names embedded in the hwmod. Returns 0 on |
| 1395 | * success, or a negative error code on failure. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1396 | */ |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 1397 | static int _init_clocks(struct omap_hwmod *oh, struct device_node *np) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1398 | { |
| 1399 | int ret = 0; |
| 1400 | |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1401 | if (oh->_state != _HWMOD_STATE_REGISTERED) |
| 1402 | return 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1403 | |
| 1404 | pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); |
| 1405 | |
Vaibhav Hiremath | b797be1d | 2012-07-09 18:24:30 +0530 | [diff] [blame] | 1406 | if (soc_ops.init_clkdm) |
| 1407 | ret |= soc_ops.init_clkdm(oh); |
| 1408 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1409 | ret |= _init_main_clk(oh); |
| 1410 | ret |= _init_interface_clks(oh); |
| 1411 | ret |= _init_opt_clks(oh); |
| 1412 | |
Benoit Cousson | f5c1f84 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 1413 | if (!ret) |
| 1414 | oh->_state = _HWMOD_STATE_CLKS_INITED; |
Benoit Cousson | 6652271 | 2011-07-01 22:54:06 +0200 | [diff] [blame] | 1415 | else |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 1416 | pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1417 | |
Rajendra Nayak | 09c35f2 | 2011-02-16 12:11:24 +0000 | [diff] [blame] | 1418 | return ret; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1419 | } |
| 1420 | |
| 1421 | /** |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1422 | * _lookup_hardreset - fill register bit info for this hwmod/reset line |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1423 | * @oh: struct omap_hwmod * |
| 1424 | * @name: name of the reset line in the context of this hwmod |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1425 | * @ohri: struct omap_hwmod_rst_info * that this function will fill in |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1426 | * |
| 1427 | * Return the bit position of the reset line that match the |
| 1428 | * input name. Return -ENOENT if not found. |
| 1429 | */ |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1430 | static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, |
| 1431 | struct omap_hwmod_rst_info *ohri) |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1432 | { |
| 1433 | int i; |
| 1434 | |
| 1435 | for (i = 0; i < oh->rst_lines_cnt; i++) { |
| 1436 | const char *rst_line = oh->rst_lines[i].name; |
| 1437 | if (!strcmp(rst_line, name)) { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1438 | ohri->rst_shift = oh->rst_lines[i].rst_shift; |
| 1439 | ohri->st_shift = oh->rst_lines[i].st_shift; |
| 1440 | pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", |
| 1441 | oh->name, __func__, rst_line, ohri->rst_shift, |
| 1442 | ohri->st_shift); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1443 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1444 | return 0; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1445 | } |
| 1446 | } |
| 1447 | |
| 1448 | return -ENOENT; |
| 1449 | } |
| 1450 | |
| 1451 | /** |
| 1452 | * _assert_hardreset - assert the HW reset line of submodules |
| 1453 | * contained in the hwmod module. |
| 1454 | * @oh: struct omap_hwmod * |
| 1455 | * @name: name of the reset line to lookup and assert |
| 1456 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1457 | * Some IP like dsp, ipu or iva contain processor that require an HW |
| 1458 | * reset line to be assert / deassert in order to enable fully the IP. |
| 1459 | * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of |
| 1460 | * asserting the hardreset line on the currently-booted SoC, or passes |
| 1461 | * along the return value from _lookup_hardreset() or the SoC's |
| 1462 | * assert_hardreset code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1463 | */ |
| 1464 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) |
| 1465 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1466 | struct omap_hwmod_rst_info ohri; |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1467 | int ret = -EINVAL; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1468 | |
| 1469 | if (!oh) |
| 1470 | return -EINVAL; |
| 1471 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1472 | if (!soc_ops.assert_hardreset) |
| 1473 | return -ENOSYS; |
| 1474 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1475 | ret = _lookup_hardreset(oh, name, &ohri); |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1476 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1477 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1478 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1479 | ret = soc_ops.assert_hardreset(oh, &ohri); |
| 1480 | |
| 1481 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1482 | } |
| 1483 | |
| 1484 | /** |
| 1485 | * _deassert_hardreset - deassert the HW reset line of submodules contained |
| 1486 | * in the hwmod module. |
| 1487 | * @oh: struct omap_hwmod * |
| 1488 | * @name: name of the reset line to look up and deassert |
| 1489 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1490 | * Some IP like dsp, ipu or iva contain processor that require an HW |
| 1491 | * reset line to be assert / deassert in order to enable fully the IP. |
| 1492 | * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of |
| 1493 | * deasserting the hardreset line on the currently-booted SoC, or passes |
| 1494 | * along the return value from _lookup_hardreset() or the SoC's |
| 1495 | * deassert_hardreset code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1496 | */ |
| 1497 | static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) |
| 1498 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1499 | struct omap_hwmod_rst_info ohri; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1500 | int ret = -EINVAL; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1501 | |
| 1502 | if (!oh) |
| 1503 | return -EINVAL; |
| 1504 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1505 | if (!soc_ops.deassert_hardreset) |
| 1506 | return -ENOSYS; |
| 1507 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1508 | ret = _lookup_hardreset(oh, name, &ohri); |
Russell King | c48cd65 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 1509 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1510 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1511 | |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1512 | if (oh->clkdm) { |
| 1513 | /* |
| 1514 | * A clockdomain must be in SW_SUP otherwise reset |
| 1515 | * might not be completed. The clockdomain can be set |
| 1516 | * in HW_AUTO only when the module become ready. |
| 1517 | */ |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1518 | clkdm_deny_idle(oh->clkdm); |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1519 | ret = clkdm_hwmod_enable(oh->clkdm, oh); |
| 1520 | if (ret) { |
| 1521 | WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", |
| 1522 | oh->name, oh->clkdm->name, ret); |
| 1523 | return ret; |
| 1524 | } |
| 1525 | } |
| 1526 | |
| 1527 | _enable_clocks(oh); |
| 1528 | if (soc_ops.enable_module) |
| 1529 | soc_ops.enable_module(oh); |
| 1530 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1531 | ret = soc_ops.deassert_hardreset(oh, &ohri); |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1532 | |
| 1533 | if (soc_ops.disable_module) |
| 1534 | soc_ops.disable_module(oh); |
| 1535 | _disable_clocks(oh); |
| 1536 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1537 | if (ret == -EBUSY) |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 1538 | pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1539 | |
Tero Kristo | 80d2518 | 2015-02-26 18:06:00 +0200 | [diff] [blame] | 1540 | if (oh->clkdm) { |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1541 | /* |
| 1542 | * Set the clockdomain to HW_AUTO, assuming that the |
| 1543 | * previous state was HW_AUTO. |
| 1544 | */ |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1545 | clkdm_allow_idle(oh->clkdm); |
Tero Kristo | 80d2518 | 2015-02-26 18:06:00 +0200 | [diff] [blame] | 1546 | |
| 1547 | clkdm_hwmod_disable(oh->clkdm, oh); |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1548 | } |
| 1549 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1550 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1551 | } |
| 1552 | |
| 1553 | /** |
| 1554 | * _read_hardreset - read the HW reset line state of submodules |
| 1555 | * contained in the hwmod module |
| 1556 | * @oh: struct omap_hwmod * |
| 1557 | * @name: name of the reset line to look up and read |
| 1558 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1559 | * Return the state of the reset line. Returns -EINVAL if @oh is |
| 1560 | * null, -ENOSYS if we have no way of reading the hardreset line |
| 1561 | * status on the currently-booted SoC, or passes along the return |
| 1562 | * value from _lookup_hardreset() or the SoC's is_hardreset_asserted |
| 1563 | * code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1564 | */ |
| 1565 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) |
| 1566 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1567 | struct omap_hwmod_rst_info ohri; |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1568 | int ret = -EINVAL; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1569 | |
| 1570 | if (!oh) |
| 1571 | return -EINVAL; |
| 1572 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1573 | if (!soc_ops.is_hardreset_asserted) |
| 1574 | return -ENOSYS; |
| 1575 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1576 | ret = _lookup_hardreset(oh, name, &ohri); |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1577 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1578 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1579 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1580 | return soc_ops.is_hardreset_asserted(oh, &ohri); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1581 | } |
| 1582 | |
| 1583 | /** |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1584 | * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1585 | * @oh: struct omap_hwmod * |
| 1586 | * |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1587 | * If all hardreset lines associated with @oh are asserted, then return true. |
| 1588 | * Otherwise, if part of @oh is out hardreset or if no hardreset lines |
| 1589 | * associated with @oh are asserted, then return false. |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1590 | * This function is used to avoid executing some parts of the IP block |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1591 | * enable/disable sequence if its hardreset line is set. |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1592 | */ |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1593 | static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1594 | { |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1595 | int i, rst_cnt = 0; |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1596 | |
| 1597 | if (oh->rst_lines_cnt == 0) |
| 1598 | return false; |
| 1599 | |
| 1600 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 1601 | if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1602 | rst_cnt++; |
| 1603 | |
| 1604 | if (oh->rst_lines_cnt == rst_cnt) |
| 1605 | return true; |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1606 | |
| 1607 | return false; |
| 1608 | } |
| 1609 | |
| 1610 | /** |
Paul Walmsley | e9332b6 | 2012-10-08 23:08:15 -0600 | [diff] [blame] | 1611 | * _are_any_hardreset_lines_asserted - return true if any part of @oh is |
| 1612 | * hard-reset |
| 1613 | * @oh: struct omap_hwmod * |
| 1614 | * |
| 1615 | * If any hardreset lines associated with @oh are asserted, then |
| 1616 | * return true. Otherwise, if no hardreset lines associated with @oh |
| 1617 | * are asserted, or if @oh has no hardreset lines, then return false. |
| 1618 | * This function is used to avoid executing some parts of the IP block |
| 1619 | * enable/disable sequence if any hardreset line is set. |
| 1620 | */ |
| 1621 | static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh) |
| 1622 | { |
| 1623 | int rst_cnt = 0; |
| 1624 | int i; |
| 1625 | |
| 1626 | for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++) |
| 1627 | if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) |
| 1628 | rst_cnt++; |
| 1629 | |
| 1630 | return (rst_cnt) ? true : false; |
| 1631 | } |
| 1632 | |
| 1633 | /** |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1634 | * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 |
| 1635 | * @oh: struct omap_hwmod * |
| 1636 | * |
| 1637 | * Disable the PRCM module mode related to the hwmod @oh. |
| 1638 | * Return EINVAL if the modulemode is not supported and 0 in case of success. |
| 1639 | */ |
| 1640 | static int _omap4_disable_module(struct omap_hwmod *oh) |
| 1641 | { |
| 1642 | int v; |
| 1643 | |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 1644 | if (!oh->clkdm || !oh->prcm.omap4.modulemode || |
| 1645 | _omap4_clkctrl_managed_by_clkfwk(oh)) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1646 | return -EINVAL; |
| 1647 | |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1648 | /* |
| 1649 | * Since integration code might still be doing something, only |
| 1650 | * disable if all lines are under hardreset. |
| 1651 | */ |
Paul Walmsley | e9332b6 | 2012-10-08 23:08:15 -0600 | [diff] [blame] | 1652 | if (_are_any_hardreset_lines_asserted(oh)) |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1653 | return 0; |
| 1654 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1655 | pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); |
| 1656 | |
Tero Kristo | 128603f | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 1657 | omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst, |
| 1658 | oh->prcm.omap4.clkctrl_offs); |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1659 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1660 | v = _omap4_wait_target_disable(oh); |
| 1661 | if (v) |
| 1662 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", |
| 1663 | oh->name); |
| 1664 | |
| 1665 | return 0; |
| 1666 | } |
| 1667 | |
| 1668 | /** |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1669 | * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1670 | * @oh: struct omap_hwmod * |
| 1671 | * |
| 1672 | * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1673 | * enabled for this to work. Returns -ENOENT if the hwmod cannot be |
| 1674 | * reset this way, -EINVAL if the hwmod is in the wrong state, |
| 1675 | * -ETIMEDOUT if the module did not reset in time, or 0 upon success. |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1676 | * |
| 1677 | * In OMAP3 a specific SYSSTATUS register is used to get the reset status. |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1678 | * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1679 | * use the SYSCONFIG softreset bit to provide the status. |
| 1680 | * |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1681 | * Note that some IP like McBSP do have reset control but don't have |
| 1682 | * reset status. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1683 | */ |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1684 | static int _ocp_softreset(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1685 | { |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 1686 | u32 v; |
Paul Walmsley | 6f8b7ff | 2009-12-08 16:33:16 -0700 | [diff] [blame] | 1687 | int c = 0; |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1688 | int ret = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1689 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1690 | if (!oh->class->sysc || |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1691 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1692 | return -ENOENT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1693 | |
| 1694 | /* clocks must be on for this operation */ |
| 1695 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
Paul Walmsley | 7852ec0 | 2012-07-26 00:54:26 -0600 | [diff] [blame] | 1696 | pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n", |
| 1697 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1698 | return -EINVAL; |
| 1699 | } |
| 1700 | |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1701 | /* For some modules, all optionnal clocks need to be enabled as well */ |
| 1702 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1703 | _enable_optional_clocks(oh); |
| 1704 | |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1705 | pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1706 | |
| 1707 | v = oh->_sysc_cache; |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1708 | ret = _set_softreset(oh, &v); |
| 1709 | if (ret) |
| 1710 | goto dis_opt_clks; |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 1711 | |
| 1712 | _write_sysconfig(v, oh); |
Illia Smyrnov | 0114251 | 2014-02-05 17:06:09 +0200 | [diff] [blame] | 1713 | |
| 1714 | if (oh->class->sysc->srst_udelay) |
| 1715 | udelay(oh->class->sysc->srst_udelay); |
| 1716 | |
| 1717 | c = _wait_softreset_complete(oh); |
| 1718 | if (c == MAX_MODULE_SOFTRESET_WAIT) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 1719 | pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n", |
| 1720 | oh->name, MAX_MODULE_SOFTRESET_WAIT); |
Illia Smyrnov | 0114251 | 2014-02-05 17:06:09 +0200 | [diff] [blame] | 1721 | ret = -ETIMEDOUT; |
| 1722 | goto dis_opt_clks; |
| 1723 | } else { |
| 1724 | pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c); |
| 1725 | } |
| 1726 | |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 1727 | ret = _clear_softreset(oh, &v); |
| 1728 | if (ret) |
| 1729 | goto dis_opt_clks; |
| 1730 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1731 | _write_sysconfig(v, oh); |
| 1732 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1733 | /* |
| 1734 | * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from |
| 1735 | * _wait_target_ready() or _reset() |
| 1736 | */ |
| 1737 | |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1738 | dis_opt_clks: |
| 1739 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1740 | _disable_optional_clocks(oh); |
| 1741 | |
| 1742 | return ret; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1743 | } |
| 1744 | |
| 1745 | /** |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1746 | * _reset - reset an omap_hwmod |
| 1747 | * @oh: struct omap_hwmod * |
| 1748 | * |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1749 | * Resets an omap_hwmod @oh. If the module has a custom reset |
| 1750 | * function pointer defined, then call it to reset the IP block, and |
| 1751 | * pass along its return value to the caller. Otherwise, if the IP |
| 1752 | * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield |
| 1753 | * associated with it, call a function to reset the IP block via that |
| 1754 | * method, and pass along the return value to the caller. Finally, if |
| 1755 | * the IP block has some hardreset lines associated with it, assert |
| 1756 | * all of those, but do _not_ deassert them. (This is because driver |
| 1757 | * authors have expressed an apparent requirement to control the |
| 1758 | * deassertion of the hardreset lines themselves.) |
| 1759 | * |
| 1760 | * The default software reset mechanism for most OMAP IP blocks is |
| 1761 | * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some |
| 1762 | * hwmods cannot be reset via this method. Some are not targets and |
| 1763 | * therefore have no OCP header registers to access. Others (like the |
| 1764 | * IVA) have idiosyncratic reset sequences. So for these relatively |
| 1765 | * rare cases, custom reset code can be supplied in the struct |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 1766 | * omap_hwmod_class .reset function pointer. |
| 1767 | * |
| 1768 | * _set_dmadisable() is called to set the DMADISABLE bit so that it |
| 1769 | * does not prevent idling of the system. This is necessary for cases |
| 1770 | * where ROMCODE/BOOTLOADER uses dma and transfers control to the |
| 1771 | * kernel without disabling dma. |
| 1772 | * |
| 1773 | * Passes along the return value from either _ocp_softreset() or the |
| 1774 | * custom reset function - these must return -EINVAL if the hwmod |
| 1775 | * cannot be reset this way or if the hwmod is in the wrong state, |
| 1776 | * -ETIMEDOUT if the module did not reset in time, or 0 upon success. |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1777 | */ |
| 1778 | static int _reset(struct omap_hwmod *oh) |
| 1779 | { |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1780 | int i, r; |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1781 | |
| 1782 | pr_debug("omap_hwmod: %s: resetting\n", oh->name); |
| 1783 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1784 | if (oh->class->reset) { |
| 1785 | r = oh->class->reset(oh); |
| 1786 | } else { |
| 1787 | if (oh->rst_lines_cnt > 0) { |
| 1788 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 1789 | _assert_hardreset(oh, oh->rst_lines[i].name); |
| 1790 | return 0; |
| 1791 | } else { |
| 1792 | r = _ocp_softreset(oh); |
| 1793 | if (r == -ENOENT) |
| 1794 | r = 0; |
| 1795 | } |
| 1796 | } |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1797 | |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 1798 | _set_dmadisable(oh); |
| 1799 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1800 | /* |
| 1801 | * OCP_SYSCONFIG bits need to be reprogrammed after a |
| 1802 | * softreset. The _enable() function should be split to avoid |
| 1803 | * the rewrite of the OCP_SYSCONFIG register. |
| 1804 | */ |
Rajendra Nayak | 2800852 | 2012-03-13 22:55:23 +0530 | [diff] [blame] | 1805 | if (oh->class->sysc) { |
| 1806 | _update_sysc_cache(oh); |
| 1807 | _enable_sysc(oh); |
| 1808 | } |
| 1809 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1810 | return r; |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1811 | } |
| 1812 | |
| 1813 | /** |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 1814 | * _omap4_update_context_lost - increment hwmod context loss counter if |
| 1815 | * hwmod context was lost, and clear hardware context loss reg |
| 1816 | * @oh: hwmod to check for context loss |
| 1817 | * |
| 1818 | * If the PRCM indicates that the hwmod @oh lost context, increment |
| 1819 | * our in-memory context loss counter, and clear the RM_*_CONTEXT |
| 1820 | * bits. No return value. |
| 1821 | */ |
| 1822 | static void _omap4_update_context_lost(struct omap_hwmod *oh) |
| 1823 | { |
| 1824 | if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT) |
| 1825 | return; |
| 1826 | |
| 1827 | if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition, |
| 1828 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 1829 | oh->prcm.omap4.context_offs)) |
| 1830 | return; |
| 1831 | |
| 1832 | oh->prcm.omap4.context_lost_counter++; |
| 1833 | prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition, |
| 1834 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 1835 | oh->prcm.omap4.context_offs); |
| 1836 | } |
| 1837 | |
| 1838 | /** |
| 1839 | * _omap4_get_context_lost - get context loss counter for a hwmod |
| 1840 | * @oh: hwmod to get context loss counter for |
| 1841 | * |
| 1842 | * Returns the in-memory context loss counter for a hwmod. |
| 1843 | */ |
| 1844 | static int _omap4_get_context_lost(struct omap_hwmod *oh) |
| 1845 | { |
| 1846 | return oh->prcm.omap4.context_lost_counter; |
| 1847 | } |
| 1848 | |
| 1849 | /** |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 1850 | * _enable_preprogram - Pre-program an IP block during the _enable() process |
| 1851 | * @oh: struct omap_hwmod * |
| 1852 | * |
| 1853 | * Some IP blocks (such as AESS) require some additional programming |
| 1854 | * after enable before they can enter idle. If a function pointer to |
| 1855 | * do so is present in the hwmod data, then call it and pass along the |
| 1856 | * return value; otherwise, return 0. |
| 1857 | */ |
jean-philippe francois | 0f49703 | 2013-05-16 11:25:07 -0700 | [diff] [blame] | 1858 | static int _enable_preprogram(struct omap_hwmod *oh) |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 1859 | { |
| 1860 | if (!oh->class->enable_preprogram) |
| 1861 | return 0; |
| 1862 | |
| 1863 | return oh->class->enable_preprogram(oh); |
| 1864 | } |
| 1865 | |
| 1866 | /** |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1867 | * _enable - enable an omap_hwmod |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1868 | * @oh: struct omap_hwmod * |
| 1869 | * |
| 1870 | * Enables an omap_hwmod @oh such that the MPU can access the hwmod's |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1871 | * register target. Returns -EINVAL if the hwmod is in the wrong |
| 1872 | * state or passes along the return value of _wait_target_ready(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1873 | */ |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1874 | static int _enable(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1875 | { |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1876 | int r; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1877 | |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1878 | pr_debug("omap_hwmod: %s: enabling\n", oh->name); |
| 1879 | |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 1880 | /* |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 1881 | * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled |
Tony Lindgren | b428145 | 2016-10-20 06:35:21 -0700 | [diff] [blame] | 1882 | * state at init. |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 1883 | */ |
| 1884 | if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 1885 | oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; |
| 1886 | return 0; |
| 1887 | } |
| 1888 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1889 | if (oh->_state != _HWMOD_STATE_INITIALIZED && |
| 1890 | oh->_state != _HWMOD_STATE_IDLE && |
| 1891 | oh->_state != _HWMOD_STATE_DISABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 1892 | WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n", |
| 1893 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1894 | return -EINVAL; |
| 1895 | } |
| 1896 | |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 1897 | /* |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1898 | * If an IP block contains HW reset lines and all of them are |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1899 | * asserted, we let integration code associated with that |
| 1900 | * block handle the enable. We've received very little |
| 1901 | * information on what those driver authors need, and until |
| 1902 | * detailed information is provided and the driver code is |
| 1903 | * posted to the public lists, this is probably the best we |
| 1904 | * can do. |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 1905 | */ |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1906 | if (_are_all_hardreset_lines_asserted(oh)) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1907 | return 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1908 | |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1909 | _add_initiator_dep(oh, mpu_oh); |
| 1910 | |
| 1911 | if (oh->clkdm) { |
| 1912 | /* |
| 1913 | * A clockdomain must be in SW_SUP before enabling |
| 1914 | * completely the module. The clockdomain can be set |
| 1915 | * in HW_AUTO only when the module become ready. |
| 1916 | */ |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1917 | clkdm_deny_idle(oh->clkdm); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1918 | r = clkdm_hwmod_enable(oh->clkdm, oh); |
| 1919 | if (r) { |
| 1920 | WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", |
| 1921 | oh->name, oh->clkdm->name, r); |
| 1922 | return r; |
| 1923 | } |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1924 | } |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1925 | |
| 1926 | _enable_clocks(oh); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 1927 | if (soc_ops.enable_module) |
| 1928 | soc_ops.enable_module(oh); |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 1929 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 1930 | cpu_idle_poll_ctrl(true); |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1931 | |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 1932 | if (soc_ops.update_context_lost) |
| 1933 | soc_ops.update_context_lost(oh); |
| 1934 | |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1935 | r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : |
| 1936 | -EINVAL; |
Roger Quadros | 8ff42da | 2017-03-17 10:58:18 +0200 | [diff] [blame] | 1937 | if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1938 | clkdm_allow_idle(oh->clkdm); |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1939 | |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 1940 | if (!r) { |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1941 | oh->_state = _HWMOD_STATE_ENABLED; |
| 1942 | |
| 1943 | /* Access the sysconfig only if the target is ready */ |
| 1944 | if (oh->class->sysc) { |
| 1945 | if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) |
| 1946 | _update_sysc_cache(oh); |
| 1947 | _enable_sysc(oh); |
| 1948 | } |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 1949 | r = _enable_preprogram(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1950 | } else { |
Paul Walmsley | 2577a4a | 2012-10-29 20:57:55 -0600 | [diff] [blame] | 1951 | if (soc_ops.disable_module) |
| 1952 | soc_ops.disable_module(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1953 | _disable_clocks(oh); |
Lokesh Vutla | 812ce9d | 2014-12-19 18:04:50 +0530 | [diff] [blame] | 1954 | pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n", |
| 1955 | oh->name, r); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 1956 | |
| 1957 | if (oh->clkdm) |
| 1958 | clkdm_hwmod_disable(oh->clkdm, oh); |
Benoit Cousson | 9a23dfe | 2010-05-20 12:31:08 -0600 | [diff] [blame] | 1959 | } |
| 1960 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1961 | return r; |
| 1962 | } |
| 1963 | |
| 1964 | /** |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1965 | * _idle - idle an omap_hwmod |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1966 | * @oh: struct omap_hwmod * |
| 1967 | * |
| 1968 | * Idles an omap_hwmod @oh. This should be called once the hwmod has |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1969 | * no further work. Returns -EINVAL if the hwmod is in the wrong |
| 1970 | * state or returns 0. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1971 | */ |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1972 | static int _idle(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1973 | { |
Lokesh Vutla | 2e18f5a | 2016-03-07 01:41:21 -0700 | [diff] [blame] | 1974 | if (oh->flags & HWMOD_NO_IDLE) { |
| 1975 | oh->_int_flags |= _HWMOD_SKIP_ENABLE; |
| 1976 | return 0; |
| 1977 | } |
| 1978 | |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 1979 | pr_debug("omap_hwmod: %s: idling\n", oh->name); |
| 1980 | |
Suman Anna | c20c8f7 | 2016-04-10 13:20:11 -0600 | [diff] [blame] | 1981 | if (_are_all_hardreset_lines_asserted(oh)) |
| 1982 | return 0; |
| 1983 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1984 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 1985 | WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n", |
| 1986 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1987 | return -EINVAL; |
| 1988 | } |
| 1989 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1990 | if (oh->class->sysc) |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1991 | _idle_sysc(oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1992 | _del_initiator_dep(oh, mpu_oh); |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 1993 | |
Roger Quadros | 8ff42da | 2017-03-17 10:58:18 +0200 | [diff] [blame] | 1994 | /* |
| 1995 | * If HWMOD_CLKDM_NOAUTO is set then we don't |
| 1996 | * deny idle the clkdm again since idle was already denied |
| 1997 | * in _enable() |
| 1998 | */ |
| 1999 | if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 2000 | clkdm_deny_idle(oh->clkdm); |
| 2001 | |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 2002 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 2003 | cpu_idle_poll_ctrl(false); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2004 | if (soc_ops.disable_module) |
| 2005 | soc_ops.disable_module(oh); |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 2006 | |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 2007 | /* |
| 2008 | * The module must be in idle mode before disabling any parents |
| 2009 | * clocks. Otherwise, the parent clock might be disabled before |
| 2010 | * the module transition is done, and thus will prevent the |
| 2011 | * transition to complete properly. |
| 2012 | */ |
| 2013 | _disable_clocks(oh); |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 2014 | if (oh->clkdm) { |
| 2015 | clkdm_allow_idle(oh->clkdm); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2016 | clkdm_hwmod_disable(oh->clkdm, oh); |
Tero Kristo | 1d9a542 | 2016-06-30 16:15:02 +0300 | [diff] [blame] | 2017 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2018 | |
| 2019 | oh->_state = _HWMOD_STATE_IDLE; |
| 2020 | |
| 2021 | return 0; |
| 2022 | } |
| 2023 | |
| 2024 | /** |
| 2025 | * _shutdown - shutdown an omap_hwmod |
| 2026 | * @oh: struct omap_hwmod * |
| 2027 | * |
| 2028 | * Shut down an omap_hwmod @oh. This should be called when the driver |
| 2029 | * used for the hwmod is removed or unloaded or if the driver is not |
| 2030 | * used by the system. Returns -EINVAL if the hwmod is in the wrong |
| 2031 | * state or returns 0. |
| 2032 | */ |
| 2033 | static int _shutdown(struct omap_hwmod *oh) |
| 2034 | { |
Paul Walmsley | 9c8b0ec | 2012-04-18 19:10:02 -0600 | [diff] [blame] | 2035 | int ret, i; |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2036 | u8 prev_state; |
| 2037 | |
Suman Anna | c20c8f7 | 2016-04-10 13:20:11 -0600 | [diff] [blame] | 2038 | if (_are_all_hardreset_lines_asserted(oh)) |
| 2039 | return 0; |
| 2040 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2041 | if (oh->_state != _HWMOD_STATE_IDLE && |
| 2042 | oh->_state != _HWMOD_STATE_ENABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 2043 | WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n", |
| 2044 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2045 | return -EINVAL; |
| 2046 | } |
| 2047 | |
| 2048 | pr_debug("omap_hwmod: %s: disabling\n", oh->name); |
| 2049 | |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2050 | if (oh->class->pre_shutdown) { |
| 2051 | prev_state = oh->_state; |
| 2052 | if (oh->_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2053 | _enable(oh); |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2054 | ret = oh->class->pre_shutdown(oh); |
| 2055 | if (ret) { |
| 2056 | if (prev_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2057 | _idle(oh); |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2058 | return ret; |
| 2059 | } |
| 2060 | } |
| 2061 | |
Miguel Vadillo | 6481c73 | 2011-07-01 22:54:02 +0200 | [diff] [blame] | 2062 | if (oh->class->sysc) { |
| 2063 | if (oh->_state == _HWMOD_STATE_IDLE) |
| 2064 | _enable(oh); |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 2065 | _shutdown_sysc(oh); |
Miguel Vadillo | 6481c73 | 2011-07-01 22:54:02 +0200 | [diff] [blame] | 2066 | } |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 2067 | |
Benoit Cousson | 3827f94 | 2010-09-21 10:34:08 -0600 | [diff] [blame] | 2068 | /* clocks and deps are already disabled in idle */ |
| 2069 | if (oh->_state == _HWMOD_STATE_ENABLED) { |
| 2070 | _del_initiator_dep(oh, mpu_oh); |
| 2071 | /* XXX what about the other system initiators here? dma, dsp */ |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 2072 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 2073 | cpu_idle_poll_ctrl(false); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2074 | if (soc_ops.disable_module) |
| 2075 | soc_ops.disable_module(oh); |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 2076 | _disable_clocks(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2077 | if (oh->clkdm) |
| 2078 | clkdm_hwmod_disable(oh->clkdm, oh); |
Benoit Cousson | 3827f94 | 2010-09-21 10:34:08 -0600 | [diff] [blame] | 2079 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2080 | /* XXX Should this code also force-disable the optional clocks? */ |
| 2081 | |
Paul Walmsley | 9c8b0ec | 2012-04-18 19:10:02 -0600 | [diff] [blame] | 2082 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 2083 | _assert_hardreset(oh, oh->rst_lines[i].name); |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 2084 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2085 | oh->_state = _HWMOD_STATE_DISABLED; |
| 2086 | |
| 2087 | return 0; |
| 2088 | } |
| 2089 | |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2090 | static int of_dev_find_hwmod(struct device_node *np, |
| 2091 | struct omap_hwmod *oh) |
| 2092 | { |
| 2093 | int count, i, res; |
| 2094 | const char *p; |
| 2095 | |
| 2096 | count = of_property_count_strings(np, "ti,hwmods"); |
| 2097 | if (count < 1) |
| 2098 | return -ENODEV; |
| 2099 | |
| 2100 | for (i = 0; i < count; i++) { |
| 2101 | res = of_property_read_string_index(np, "ti,hwmods", |
| 2102 | i, &p); |
| 2103 | if (res) |
| 2104 | continue; |
| 2105 | if (!strcmp(p, oh->name)) { |
| 2106 | pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n", |
| 2107 | np->name, i, oh->name); |
| 2108 | return i; |
| 2109 | } |
| 2110 | } |
| 2111 | |
| 2112 | return -ENODEV; |
| 2113 | } |
| 2114 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2115 | /** |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2116 | * of_dev_hwmod_lookup - look up needed hwmod from dt blob |
| 2117 | * @np: struct device_node * |
| 2118 | * @oh: struct omap_hwmod * |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2119 | * @index: index of the entry found |
| 2120 | * @found: struct device_node * found or NULL |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2121 | * |
| 2122 | * Parse the dt blob and find out needed hwmod. Recursive function is |
| 2123 | * implemented to take care hierarchical dt blob parsing. |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2124 | * Return: Returns 0 on success, -ENODEV when not found. |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2125 | */ |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2126 | static int of_dev_hwmod_lookup(struct device_node *np, |
| 2127 | struct omap_hwmod *oh, |
| 2128 | int *index, |
| 2129 | struct device_node **found) |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2130 | { |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2131 | struct device_node *np0 = NULL; |
| 2132 | int res; |
| 2133 | |
| 2134 | res = of_dev_find_hwmod(np, oh); |
| 2135 | if (res >= 0) { |
| 2136 | *found = np; |
| 2137 | *index = res; |
| 2138 | return 0; |
| 2139 | } |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2140 | |
| 2141 | for_each_child_of_node(np, np0) { |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2142 | struct device_node *fc; |
| 2143 | int i; |
| 2144 | |
| 2145 | res = of_dev_hwmod_lookup(np0, oh, &i, &fc); |
| 2146 | if (res == 0) { |
| 2147 | *found = fc; |
| 2148 | *index = i; |
| 2149 | return 0; |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2150 | } |
| 2151 | } |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2152 | |
| 2153 | *found = NULL; |
| 2154 | *index = 0; |
| 2155 | |
| 2156 | return -ENODEV; |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2157 | } |
| 2158 | |
| 2159 | /** |
Tony Lindgren | 6c72b35 | 2017-10-10 14:23:27 -0700 | [diff] [blame] | 2160 | * omap_hwmod_parse_module_range - map module IO range from device tree |
| 2161 | * @oh: struct omap_hwmod * |
| 2162 | * @np: struct device_node * |
| 2163 | * |
| 2164 | * Parse the device tree range an interconnect target module provides |
| 2165 | * for it's child device IP blocks. This way we can support the old |
| 2166 | * "ti,hwmods" property with just dts data without a need for platform |
| 2167 | * data for IO resources. And we don't need all the child IP device |
| 2168 | * nodes available in the dts. |
| 2169 | */ |
| 2170 | int omap_hwmod_parse_module_range(struct omap_hwmod *oh, |
| 2171 | struct device_node *np, |
| 2172 | struct resource *res) |
| 2173 | { |
| 2174 | struct property *prop; |
| 2175 | const __be32 *ranges; |
| 2176 | const char *name; |
| 2177 | u32 nr_addr, nr_size; |
| 2178 | u64 base, size; |
| 2179 | int len, error; |
| 2180 | |
| 2181 | if (!res) |
| 2182 | return -EINVAL; |
| 2183 | |
| 2184 | ranges = of_get_property(np, "ranges", &len); |
| 2185 | if (!ranges) |
| 2186 | return -ENOENT; |
| 2187 | |
| 2188 | len /= sizeof(*ranges); |
| 2189 | |
| 2190 | if (len < 3) |
| 2191 | return -EINVAL; |
| 2192 | |
| 2193 | of_property_for_each_string(np, "compatible", prop, name) |
| 2194 | if (!strncmp("ti,sysc-", name, 8)) |
| 2195 | break; |
| 2196 | |
| 2197 | if (!name) |
| 2198 | return -ENOENT; |
| 2199 | |
| 2200 | error = of_property_read_u32(np, "#address-cells", &nr_addr); |
| 2201 | if (error) |
| 2202 | return -ENOENT; |
| 2203 | |
| 2204 | error = of_property_read_u32(np, "#size-cells", &nr_size); |
| 2205 | if (error) |
| 2206 | return -ENOENT; |
| 2207 | |
| 2208 | if (nr_addr != 1 || nr_size != 1) { |
| 2209 | pr_err("%s: invalid range for %s->%s\n", __func__, |
| 2210 | oh->name, np->name); |
| 2211 | return -EINVAL; |
| 2212 | } |
| 2213 | |
| 2214 | ranges++; |
| 2215 | base = of_translate_address(np, ranges++); |
| 2216 | size = be32_to_cpup(ranges); |
| 2217 | |
| 2218 | pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n", |
| 2219 | oh->name, np->name, base, size); |
| 2220 | |
| 2221 | res->start = base; |
| 2222 | res->end = base + size - 1; |
| 2223 | res->flags = IORESOURCE_MEM; |
| 2224 | |
| 2225 | return 0; |
| 2226 | } |
| 2227 | |
| 2228 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2229 | * _init_mpu_rt_base - populate the virtual address for a hwmod |
| 2230 | * @oh: struct omap_hwmod * to locate the virtual address |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2231 | * @data: (unused, caller should pass NULL) |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2232 | * @index: index of the reg entry iospace in device tree |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2233 | * @np: struct device_node * of the IP block's device node in the DT data |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2234 | * |
| 2235 | * Cache the virtual address used by the MPU to access this IP block's |
| 2236 | * registers. This address is needed early so the OCP registers that |
| 2237 | * are part of the device's address space can be ioremapped properly. |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2238 | * |
Roger Quadros | 9a258af | 2015-07-16 16:16:44 +0300 | [diff] [blame] | 2239 | * If SYSC access is not needed, the registers will not be remapped |
| 2240 | * and non-availability of MPU access is not treated as an error. |
| 2241 | * |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2242 | * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and |
| 2243 | * -ENXIO on absent or invalid register target address space. |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2244 | */ |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2245 | static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2246 | int index, struct device_node *np) |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2247 | { |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2248 | void __iomem *va_start = NULL; |
Tony Lindgren | 6c72b35 | 2017-10-10 14:23:27 -0700 | [diff] [blame] | 2249 | struct resource res; |
| 2250 | int error; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2251 | |
| 2252 | if (!oh) |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2253 | return -EINVAL; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2254 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2255 | _save_mpu_port_index(oh); |
| 2256 | |
Roger Quadros | 9a258af | 2015-07-16 16:16:44 +0300 | [diff] [blame] | 2257 | /* if we don't need sysc access we don't need to ioremap */ |
| 2258 | if (!oh->class->sysc) |
| 2259 | return 0; |
| 2260 | |
| 2261 | /* we can't continue without MPU PORT if we need sysc access */ |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2262 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2263 | return -ENXIO; |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2264 | |
Tony Lindgren | 9cffb1a | 2017-10-10 14:27:33 -0700 | [diff] [blame] | 2265 | if (!np) { |
| 2266 | pr_err("omap_hwmod: %s: no dt node\n", oh->name); |
| 2267 | return -ENXIO; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2268 | } |
| 2269 | |
Tony Lindgren | 9cffb1a | 2017-10-10 14:27:33 -0700 | [diff] [blame] | 2270 | /* Do we have a dts range for the interconnect target module? */ |
| 2271 | error = omap_hwmod_parse_module_range(oh, np, &res); |
| 2272 | if (!error) |
| 2273 | va_start = ioremap(res.start, resource_size(&res)); |
| 2274 | |
| 2275 | /* No ranges, rely on device reg entry */ |
| 2276 | if (!va_start) |
| 2277 | va_start = of_iomap(np, index + oh->mpu_rt_idx); |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2278 | if (!va_start) { |
Tony Lindgren | 9cffb1a | 2017-10-10 14:27:33 -0700 | [diff] [blame] | 2279 | pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n", |
| 2280 | oh->name, index, np); |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2281 | return -ENXIO; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2282 | } |
| 2283 | |
| 2284 | pr_debug("omap_hwmod: %s: MPU register target at va %p\n", |
| 2285 | oh->name, va_start); |
| 2286 | |
| 2287 | oh->_mpu_rt_va = va_start; |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2288 | return 0; |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2289 | } |
| 2290 | |
| 2291 | /** |
| 2292 | * _init - initialize internal data for the hwmod @oh |
| 2293 | * @oh: struct omap_hwmod * |
| 2294 | * @n: (unused) |
| 2295 | * |
| 2296 | * Look up the clocks and the address space used by the MPU to access |
| 2297 | * registers belonging to the hwmod @oh. @oh must already be |
| 2298 | * registered at this point. This is the first of two phases for |
| 2299 | * hwmod initialization. Code called here does not touch any hardware |
| 2300 | * registers, it simply prepares internal data structures. Returns 0 |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2301 | * upon success or if the hwmod isn't registered or if the hwmod's |
| 2302 | * address space is not defined, or -EINVAL upon failure. |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2303 | */ |
| 2304 | static int __init _init(struct omap_hwmod *oh, void *data) |
| 2305 | { |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2306 | int r, index; |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2307 | struct device_node *np = NULL; |
Tony Lindgren | 1aa8f0c | 2017-05-31 15:51:37 -0700 | [diff] [blame] | 2308 | struct device_node *bus; |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2309 | |
| 2310 | if (oh->_state != _HWMOD_STATE_REGISTERED) |
| 2311 | return 0; |
| 2312 | |
Tony Lindgren | 1aa8f0c | 2017-05-31 15:51:37 -0700 | [diff] [blame] | 2313 | bus = of_find_node_by_name(NULL, "ocp"); |
| 2314 | if (!bus) |
| 2315 | return -ENODEV; |
Tony Lindgren | 5e863c5 | 2013-12-06 14:20:16 -0800 | [diff] [blame] | 2316 | |
Tony Lindgren | 1aa8f0c | 2017-05-31 15:51:37 -0700 | [diff] [blame] | 2317 | r = of_dev_hwmod_lookup(bus, oh, &index, &np); |
| 2318 | if (r) |
| 2319 | pr_debug("omap_hwmod: %s missing dt data\n", oh->name); |
| 2320 | else if (np && index) |
| 2321 | pr_warn("omap_hwmod: %s using broken dt data from %s\n", |
| 2322 | oh->name, np->name); |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2323 | |
Roger Quadros | 9a258af | 2015-07-16 16:16:44 +0300 | [diff] [blame] | 2324 | r = _init_mpu_rt_base(oh, NULL, index, np); |
| 2325 | if (r < 0) { |
| 2326 | WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", |
| 2327 | oh->name); |
| 2328 | return 0; |
Suman Anna | 6423d6d | 2013-10-08 23:46:49 -0600 | [diff] [blame] | 2329 | } |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2330 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 2331 | r = _init_clocks(oh, np); |
Russell King | c48cd65 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 2332 | if (r < 0) { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2333 | WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name); |
| 2334 | return -EINVAL; |
| 2335 | } |
| 2336 | |
Suman Anna | 3d36ad7 | 2014-03-14 14:45:17 +0530 | [diff] [blame] | 2337 | if (np) { |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2338 | if (of_find_property(np, "ti,no-reset-on-init", NULL)) |
| 2339 | oh->flags |= HWMOD_INIT_NO_RESET; |
| 2340 | if (of_find_property(np, "ti,no-idle-on-init", NULL)) |
| 2341 | oh->flags |= HWMOD_INIT_NO_IDLE; |
Lokesh Vutla | 2e18f5a | 2016-03-07 01:41:21 -0700 | [diff] [blame] | 2342 | if (of_find_property(np, "ti,no-idle", NULL)) |
| 2343 | oh->flags |= HWMOD_NO_IDLE; |
Suman Anna | 3d36ad7 | 2014-03-14 14:45:17 +0530 | [diff] [blame] | 2344 | } |
Rajendra Nayak | f92d959 | 2013-10-09 01:26:55 -0600 | [diff] [blame] | 2345 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2346 | oh->_state = _HWMOD_STATE_INITIALIZED; |
| 2347 | |
| 2348 | return 0; |
| 2349 | } |
| 2350 | |
| 2351 | /** |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2352 | * _setup_iclk_autoidle - configure an IP block's interface clocks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2353 | * @oh: struct omap_hwmod * |
| 2354 | * |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2355 | * Set up the module's interface clocks. XXX This function is still mostly |
| 2356 | * a stub; implementing this properly requires iclk autoidle usecounting in |
| 2357 | * the clock code. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2358 | */ |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2359 | static void __init _setup_iclk_autoidle(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2360 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2361 | struct omap_hwmod_ocp_if *os; |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 2362 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2363 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2364 | return; |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 2365 | |
Tony Lindgren | b8e1bdd | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 2366 | list_for_each_entry(os, &oh->slave_ports, node) { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2367 | if (!os->_clk) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2368 | continue; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2369 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2370 | if (os->flags & OCPIF_SWSUP_IDLE) { |
| 2371 | /* XXX omap_iclk_deny_idle(c); */ |
| 2372 | } else { |
| 2373 | /* XXX omap_iclk_allow_idle(c); */ |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2374 | clk_enable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2375 | } |
| 2376 | } |
| 2377 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2378 | return; |
| 2379 | } |
| 2380 | |
| 2381 | /** |
| 2382 | * _setup_reset - reset an IP block during the setup process |
| 2383 | * @oh: struct omap_hwmod * |
| 2384 | * |
| 2385 | * Reset the IP block corresponding to the hwmod @oh during the setup |
| 2386 | * process. The IP block is first enabled so it can be successfully |
| 2387 | * reset. Returns 0 upon success or a negative error code upon |
| 2388 | * failure. |
| 2389 | */ |
| 2390 | static int __init _setup_reset(struct omap_hwmod *oh) |
| 2391 | { |
| 2392 | int r; |
| 2393 | |
| 2394 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
| 2395 | return -EINVAL; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2396 | |
Paul Walmsley | 5fb3d52 | 2012-10-29 22:11:50 -0600 | [diff] [blame] | 2397 | if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) |
| 2398 | return -EPERM; |
| 2399 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2400 | if (oh->rst_lines_cnt == 0) { |
| 2401 | r = _enable(oh); |
| 2402 | if (r) { |
Joe Perches | 3d0cb73 | 2014-09-13 11:31:16 -0700 | [diff] [blame] | 2403 | pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n", |
| 2404 | oh->name, oh->_state); |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2405 | return -EINVAL; |
| 2406 | } |
Benoit Cousson | 9a23dfe | 2010-05-20 12:31:08 -0600 | [diff] [blame] | 2407 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2408 | |
Rajendra Nayak | 2800852 | 2012-03-13 22:55:23 +0530 | [diff] [blame] | 2409 | if (!(oh->flags & HWMOD_INIT_NO_RESET)) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2410 | r = _reset(oh); |
| 2411 | |
| 2412 | return r; |
| 2413 | } |
| 2414 | |
| 2415 | /** |
| 2416 | * _setup_postsetup - transition to the appropriate state after _setup |
| 2417 | * @oh: struct omap_hwmod * |
| 2418 | * |
| 2419 | * Place an IP block represented by @oh into a "post-setup" state -- |
| 2420 | * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that |
| 2421 | * this function is called at the end of _setup().) The postsetup |
| 2422 | * state for an IP block can be changed by calling |
| 2423 | * omap_hwmod_enter_postsetup_state() early in the boot process, |
| 2424 | * before one of the omap_hwmod_setup*() functions are called for the |
| 2425 | * IP block. |
| 2426 | * |
| 2427 | * The IP block stays in this state until a PM runtime-based driver is |
| 2428 | * loaded for that IP block. A post-setup state of IDLE is |
| 2429 | * appropriate for almost all IP blocks with runtime PM-enabled |
| 2430 | * drivers, since those drivers are able to enable the IP block. A |
| 2431 | * post-setup state of ENABLED is appropriate for kernels with PM |
| 2432 | * runtime disabled. The DISABLED state is appropriate for unusual IP |
| 2433 | * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers |
| 2434 | * included, since the WDTIMER starts running on reset and will reset |
| 2435 | * the MPU if left active. |
| 2436 | * |
| 2437 | * This post-setup mechanism is deprecated. Once all of the OMAP |
| 2438 | * drivers have been converted to use PM runtime, and all of the IP |
| 2439 | * block data and interconnect data is available to the hwmod code, it |
| 2440 | * should be possible to replace this mechanism with a "lazy reset" |
| 2441 | * arrangement. In a "lazy reset" setup, each IP block is enabled |
| 2442 | * when the driver first probes, then all remaining IP blocks without |
| 2443 | * drivers are either shut down or enabled after the drivers have |
| 2444 | * loaded. However, this cannot take place until the above |
| 2445 | * preconditions have been met, since otherwise the late reset code |
| 2446 | * has no way of knowing which IP blocks are in use by drivers, and |
| 2447 | * which ones are unused. |
| 2448 | * |
| 2449 | * No return value. |
| 2450 | */ |
| 2451 | static void __init _setup_postsetup(struct omap_hwmod *oh) |
| 2452 | { |
| 2453 | u8 postsetup_state; |
| 2454 | |
| 2455 | if (oh->rst_lines_cnt > 0) |
| 2456 | return; |
Benoit Cousson | 76e5589 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 2457 | |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2458 | postsetup_state = oh->_postsetup_state; |
| 2459 | if (postsetup_state == _HWMOD_STATE_UNKNOWN) |
| 2460 | postsetup_state = _HWMOD_STATE_ENABLED; |
| 2461 | |
| 2462 | /* |
| 2463 | * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data - |
| 2464 | * it should be set by the core code as a runtime flag during startup |
| 2465 | */ |
Lokesh Vutla | 2e18f5a | 2016-03-07 01:41:21 -0700 | [diff] [blame] | 2466 | if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) && |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 2467 | (postsetup_state == _HWMOD_STATE_IDLE)) { |
| 2468 | oh->_int_flags |= _HWMOD_SKIP_ENABLE; |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2469 | postsetup_state = _HWMOD_STATE_ENABLED; |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 2470 | } |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2471 | |
| 2472 | if (postsetup_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2473 | _idle(oh); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2474 | else if (postsetup_state == _HWMOD_STATE_DISABLED) |
| 2475 | _shutdown(oh); |
| 2476 | else if (postsetup_state != _HWMOD_STATE_ENABLED) |
| 2477 | WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", |
| 2478 | oh->name, postsetup_state); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2479 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2480 | return; |
| 2481 | } |
| 2482 | |
| 2483 | /** |
| 2484 | * _setup - prepare IP block hardware for use |
| 2485 | * @oh: struct omap_hwmod * |
| 2486 | * @n: (unused, pass NULL) |
| 2487 | * |
| 2488 | * Configure the IP block represented by @oh. This may include |
| 2489 | * enabling the IP block, resetting it, and placing it into a |
| 2490 | * post-setup state, depending on the type of IP block and applicable |
| 2491 | * flags. IP blocks are reset to prevent any previous configuration |
| 2492 | * by the bootloader or previous operating system from interfering |
| 2493 | * with power management or other parts of the system. The reset can |
| 2494 | * be avoided; see omap_hwmod_no_setup_reset(). This is the second of |
| 2495 | * two phases for hwmod initialization. Code called here generally |
| 2496 | * affects the IP block hardware, or system integration hardware |
| 2497 | * associated with the IP block. Returns 0. |
| 2498 | */ |
| 2499 | static int __init _setup(struct omap_hwmod *oh, void *data) |
| 2500 | { |
| 2501 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
| 2502 | return 0; |
| 2503 | |
Tomi Valkeinen | f22d2545 | 2014-10-09 17:03:14 +0300 | [diff] [blame] | 2504 | if (oh->parent_hwmod) { |
| 2505 | int r; |
| 2506 | |
| 2507 | r = _enable(oh->parent_hwmod); |
| 2508 | WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n", |
| 2509 | oh->name, oh->parent_hwmod->name); |
| 2510 | } |
| 2511 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2512 | _setup_iclk_autoidle(oh); |
| 2513 | |
| 2514 | if (!_setup_reset(oh)) |
| 2515 | _setup_postsetup(oh); |
| 2516 | |
Tomi Valkeinen | f22d2545 | 2014-10-09 17:03:14 +0300 | [diff] [blame] | 2517 | if (oh->parent_hwmod) { |
| 2518 | u8 postsetup_state; |
| 2519 | |
| 2520 | postsetup_state = oh->parent_hwmod->_postsetup_state; |
| 2521 | |
| 2522 | if (postsetup_state == _HWMOD_STATE_IDLE) |
| 2523 | _idle(oh->parent_hwmod); |
| 2524 | else if (postsetup_state == _HWMOD_STATE_DISABLED) |
| 2525 | _shutdown(oh->parent_hwmod); |
| 2526 | else if (postsetup_state != _HWMOD_STATE_ENABLED) |
| 2527 | WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", |
| 2528 | oh->parent_hwmod->name, postsetup_state); |
| 2529 | } |
| 2530 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2531 | return 0; |
| 2532 | } |
| 2533 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2534 | /** |
| 2535 | * _register - register a struct omap_hwmod |
| 2536 | * @oh: struct omap_hwmod * |
| 2537 | * |
| 2538 | * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod |
| 2539 | * already has been registered by the same name; -EINVAL if the |
| 2540 | * omap_hwmod is in the wrong state, if @oh is NULL, if the |
| 2541 | * omap_hwmod's class field is NULL; if the omap_hwmod is missing a |
| 2542 | * name, or if the omap_hwmod's class is missing a name; or 0 upon |
| 2543 | * success. |
| 2544 | * |
| 2545 | * XXX The data should be copied into bootmem, so the original data |
| 2546 | * should be marked __initdata and freed after init. This would allow |
| 2547 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note |
| 2548 | * that the copy process would be relatively complex due to the large number |
| 2549 | * of substructures. |
| 2550 | */ |
Benoit Cousson | 01592df9 | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 2551 | static int __init _register(struct omap_hwmod *oh) |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2552 | { |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2553 | if (!oh || !oh->name || !oh->class || !oh->class->name || |
| 2554 | (oh->_state != _HWMOD_STATE_UNKNOWN)) |
| 2555 | return -EINVAL; |
| 2556 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2557 | pr_debug("omap_hwmod: %s: registering\n", oh->name); |
| 2558 | |
Benoit Cousson | ce35b24 | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 2559 | if (_lookup(oh->name)) |
| 2560 | return -EEXIST; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2561 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2562 | list_add_tail(&oh->node, &omap_hwmod_list); |
| 2563 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2564 | INIT_LIST_HEAD(&oh->slave_ports); |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2565 | spin_lock_init(&oh->_lock); |
Peter Ujfalusi | 6931795 | 2015-02-26 00:00:51 -0700 | [diff] [blame] | 2566 | lockdep_set_class(&oh->_lock, &oh->hwmod_key); |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2567 | |
| 2568 | oh->_state = _HWMOD_STATE_REGISTERED; |
| 2569 | |
Paul Walmsley | 569edd70 | 2011-02-23 00:14:06 -0700 | [diff] [blame] | 2570 | /* |
| 2571 | * XXX Rather than doing a strcmp(), this should test a flag |
| 2572 | * set in the hwmod data, inserted by the autogenerator code. |
| 2573 | */ |
| 2574 | if (!strcmp(oh->name, MPU_INITIATOR_NAME)) |
| 2575 | mpu_oh = oh; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2576 | |
Paul Walmsley | 569edd70 | 2011-02-23 00:14:06 -0700 | [diff] [blame] | 2577 | return 0; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2578 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2579 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2580 | /** |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2581 | * _add_link - add an interconnect between two IP blocks |
| 2582 | * @oi: pointer to a struct omap_hwmod_ocp_if record |
| 2583 | * |
Tony Lindgren | a1e3123 | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 2584 | * Add struct omap_hwmod_link records connecting the slave IP block |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2585 | * specified in @oi->slave to @oi. This code is assumed to run before |
| 2586 | * preemption or SMP has been enabled, thus avoiding the need for |
| 2587 | * locking in this code. Changes to this assumption will require |
| 2588 | * additional locking. Returns 0. |
| 2589 | */ |
| 2590 | static int __init _add_link(struct omap_hwmod_ocp_if *oi) |
| 2591 | { |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2592 | pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name, |
| 2593 | oi->slave->name); |
| 2594 | |
Tony Lindgren | a1e3123 | 2017-03-14 13:13:19 -0700 | [diff] [blame] | 2595 | list_add(&oi->node, &oi->slave->slave_ports); |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2596 | oi->slave->slaves_cnt++; |
| 2597 | |
| 2598 | return 0; |
| 2599 | } |
| 2600 | |
| 2601 | /** |
| 2602 | * _register_link - register a struct omap_hwmod_ocp_if |
| 2603 | * @oi: struct omap_hwmod_ocp_if * |
| 2604 | * |
| 2605 | * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it |
| 2606 | * has already been registered; -EINVAL if @oi is NULL or if the |
| 2607 | * record pointed to by @oi is missing required fields; or 0 upon |
| 2608 | * success. |
| 2609 | * |
| 2610 | * XXX The data should be copied into bootmem, so the original data |
| 2611 | * should be marked __initdata and freed after init. This would allow |
| 2612 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. |
| 2613 | */ |
| 2614 | static int __init _register_link(struct omap_hwmod_ocp_if *oi) |
| 2615 | { |
| 2616 | if (!oi || !oi->master || !oi->slave || !oi->user) |
| 2617 | return -EINVAL; |
| 2618 | |
| 2619 | if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED) |
| 2620 | return -EEXIST; |
| 2621 | |
| 2622 | pr_debug("omap_hwmod: registering link from %s to %s\n", |
| 2623 | oi->master->name, oi->slave->name); |
| 2624 | |
| 2625 | /* |
| 2626 | * Register the connected hwmods, if they haven't been |
| 2627 | * registered already |
| 2628 | */ |
| 2629 | if (oi->master->_state != _HWMOD_STATE_REGISTERED) |
| 2630 | _register(oi->master); |
| 2631 | |
| 2632 | if (oi->slave->_state != _HWMOD_STATE_REGISTERED) |
| 2633 | _register(oi->slave); |
| 2634 | |
| 2635 | _add_link(oi); |
| 2636 | |
| 2637 | oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED; |
| 2638 | |
| 2639 | return 0; |
| 2640 | } |
| 2641 | |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2642 | /* Static functions intended only for use in soc_ops field function pointers */ |
| 2643 | |
| 2644 | /** |
Tero Kristo | 9002e921 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 2645 | * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2646 | * @oh: struct omap_hwmod * |
| 2647 | * |
| 2648 | * Wait for a module @oh to leave slave idle. Returns 0 if the module |
| 2649 | * does not have an IDLEST bit or if the module successfully leaves |
| 2650 | * slave idle; otherwise, pass along the return value of the |
| 2651 | * appropriate *_cm*_wait_module_ready() function. |
| 2652 | */ |
Tero Kristo | 9002e921 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 2653 | static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2654 | { |
| 2655 | if (!oh) |
| 2656 | return -EINVAL; |
| 2657 | |
| 2658 | if (oh->flags & HWMOD_NO_IDLEST) |
| 2659 | return 0; |
| 2660 | |
| 2661 | if (!_find_mpu_rt_port(oh)) |
| 2662 | return 0; |
| 2663 | |
| 2664 | /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ |
| 2665 | |
Tero Kristo | 021b6ff | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 2666 | return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs, |
| 2667 | oh->prcm.omap2.idlest_reg_id, |
| 2668 | oh->prcm.omap2.idlest_idle_bit); |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2669 | } |
| 2670 | |
| 2671 | /** |
| 2672 | * _omap4_wait_target_ready - wait for a module to leave slave idle |
| 2673 | * @oh: struct omap_hwmod * |
| 2674 | * |
| 2675 | * Wait for a module @oh to leave slave idle. Returns 0 if the module |
| 2676 | * does not have an IDLEST bit or if the module successfully leaves |
| 2677 | * slave idle; otherwise, pass along the return value of the |
| 2678 | * appropriate *_cm*_wait_module_ready() function. |
| 2679 | */ |
| 2680 | static int _omap4_wait_target_ready(struct omap_hwmod *oh) |
| 2681 | { |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 2682 | if (!oh) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2683 | return -EINVAL; |
| 2684 | |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 2685 | if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2686 | return 0; |
| 2687 | |
| 2688 | if (!_find_mpu_rt_port(oh)) |
| 2689 | return 0; |
| 2690 | |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 2691 | if (_omap4_clkctrl_managed_by_clkfwk(oh)) |
| 2692 | return 0; |
| 2693 | |
| 2694 | if (!_omap4_has_clkctrl_clock(oh)) |
Dave Gerlach | 428929c | 2016-07-12 12:50:33 -0500 | [diff] [blame] | 2695 | return 0; |
| 2696 | |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2697 | /* XXX check module SIDLEMODE, hardreset status */ |
| 2698 | |
Tero Kristo | 021b6ff | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 2699 | return omap_cm_wait_module_ready(oh->clkdm->prcm_partition, |
| 2700 | oh->clkdm->cm_inst, |
| 2701 | oh->prcm.omap4.clkctrl_offs, 0); |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2702 | } |
| 2703 | |
| 2704 | /** |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2705 | * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args |
| 2706 | * @oh: struct omap_hwmod * to assert hardreset |
| 2707 | * @ohri: hardreset line data |
| 2708 | * |
| 2709 | * Call omap2_prm_assert_hardreset() with parameters extracted from |
| 2710 | * the hwmod @oh and the hardreset line data @ohri. Only intended for |
| 2711 | * use as an soc_ops function pointer. Passes along the return value |
| 2712 | * from omap2_prm_assert_hardreset(). XXX This function is scheduled |
| 2713 | * for removal when the PRM code is moved into drivers/. |
| 2714 | */ |
| 2715 | static int _omap2_assert_hardreset(struct omap_hwmod *oh, |
| 2716 | struct omap_hwmod_rst_info *ohri) |
| 2717 | { |
Tero Kristo | efd44dc | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 2718 | return omap_prm_assert_hardreset(ohri->rst_shift, 0, |
| 2719 | oh->prcm.omap2.module_offs, 0); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2720 | } |
| 2721 | |
| 2722 | /** |
| 2723 | * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args |
| 2724 | * @oh: struct omap_hwmod * to deassert hardreset |
| 2725 | * @ohri: hardreset line data |
| 2726 | * |
| 2727 | * Call omap2_prm_deassert_hardreset() with parameters extracted from |
| 2728 | * the hwmod @oh and the hardreset line data @ohri. Only intended for |
| 2729 | * use as an soc_ops function pointer. Passes along the return value |
| 2730 | * from omap2_prm_deassert_hardreset(). XXX This function is |
| 2731 | * scheduled for removal when the PRM code is moved into drivers/. |
| 2732 | */ |
| 2733 | static int _omap2_deassert_hardreset(struct omap_hwmod *oh, |
| 2734 | struct omap_hwmod_rst_info *ohri) |
| 2735 | { |
Tero Kristo | 37fb59d | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2736 | return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0, |
| 2737 | oh->prcm.omap2.module_offs, 0, 0); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2738 | } |
| 2739 | |
| 2740 | /** |
| 2741 | * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args |
| 2742 | * @oh: struct omap_hwmod * to test hardreset |
| 2743 | * @ohri: hardreset line data |
| 2744 | * |
| 2745 | * Call omap2_prm_is_hardreset_asserted() with parameters extracted |
| 2746 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2747 | * intended for use as an soc_ops function pointer. Passes along the |
| 2748 | * return value from omap2_prm_is_hardreset_asserted(). XXX This |
| 2749 | * function is scheduled for removal when the PRM code is moved into |
| 2750 | * drivers/. |
| 2751 | */ |
| 2752 | static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, |
| 2753 | struct omap_hwmod_rst_info *ohri) |
| 2754 | { |
Tero Kristo | 1bc28b3 | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2755 | return omap_prm_is_hardreset_asserted(ohri->st_shift, 0, |
| 2756 | oh->prcm.omap2.module_offs, 0); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2757 | } |
| 2758 | |
| 2759 | /** |
| 2760 | * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args |
| 2761 | * @oh: struct omap_hwmod * to assert hardreset |
| 2762 | * @ohri: hardreset line data |
| 2763 | * |
| 2764 | * Call omap4_prminst_assert_hardreset() with parameters extracted |
| 2765 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2766 | * intended for use as an soc_ops function pointer. Passes along the |
| 2767 | * return value from omap4_prminst_assert_hardreset(). XXX This |
| 2768 | * function is scheduled for removal when the PRM code is moved into |
| 2769 | * drivers/. |
| 2770 | */ |
| 2771 | static int _omap4_assert_hardreset(struct omap_hwmod *oh, |
| 2772 | struct omap_hwmod_rst_info *ohri) |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2773 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 2774 | if (!oh->clkdm) |
| 2775 | return -EINVAL; |
| 2776 | |
Tero Kristo | efd44dc | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 2777 | return omap_prm_assert_hardreset(ohri->rst_shift, |
| 2778 | oh->clkdm->pwrdm.ptr->prcm_partition, |
| 2779 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2780 | oh->prcm.omap4.rstctrl_offs); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2781 | } |
| 2782 | |
| 2783 | /** |
| 2784 | * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args |
| 2785 | * @oh: struct omap_hwmod * to deassert hardreset |
| 2786 | * @ohri: hardreset line data |
| 2787 | * |
| 2788 | * Call omap4_prminst_deassert_hardreset() with parameters extracted |
| 2789 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2790 | * intended for use as an soc_ops function pointer. Passes along the |
| 2791 | * return value from omap4_prminst_deassert_hardreset(). XXX This |
| 2792 | * function is scheduled for removal when the PRM code is moved into |
| 2793 | * drivers/. |
| 2794 | */ |
| 2795 | static int _omap4_deassert_hardreset(struct omap_hwmod *oh, |
| 2796 | struct omap_hwmod_rst_info *ohri) |
| 2797 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 2798 | if (!oh->clkdm) |
| 2799 | return -EINVAL; |
| 2800 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2801 | if (ohri->st_shift) |
| 2802 | pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", |
| 2803 | oh->name, ohri->name); |
Tero Kristo | 4ebf5b2 | 2015-05-05 16:33:04 +0300 | [diff] [blame] | 2804 | return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift, |
Tero Kristo | 37fb59d | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2805 | oh->clkdm->pwrdm.ptr->prcm_partition, |
| 2806 | oh->clkdm->pwrdm.ptr->prcm_offs, |
Tero Kristo | 4ebf5b2 | 2015-05-05 16:33:04 +0300 | [diff] [blame] | 2807 | oh->prcm.omap4.rstctrl_offs, |
| 2808 | oh->prcm.omap4.rstctrl_offs + |
| 2809 | OMAP4_RST_CTRL_ST_OFFSET); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2810 | } |
| 2811 | |
| 2812 | /** |
| 2813 | * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args |
| 2814 | * @oh: struct omap_hwmod * to test hardreset |
| 2815 | * @ohri: hardreset line data |
| 2816 | * |
| 2817 | * Call omap4_prminst_is_hardreset_asserted() with parameters |
| 2818 | * extracted from the hwmod @oh and the hardreset line data @ohri. |
| 2819 | * Only intended for use as an soc_ops function pointer. Passes along |
| 2820 | * the return value from omap4_prminst_is_hardreset_asserted(). XXX |
| 2821 | * This function is scheduled for removal when the PRM code is moved |
| 2822 | * into drivers/. |
| 2823 | */ |
| 2824 | static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, |
| 2825 | struct omap_hwmod_rst_info *ohri) |
| 2826 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 2827 | if (!oh->clkdm) |
| 2828 | return -EINVAL; |
| 2829 | |
Tero Kristo | 1bc28b3 | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2830 | return omap_prm_is_hardreset_asserted(ohri->rst_shift, |
| 2831 | oh->clkdm->pwrdm.ptr-> |
| 2832 | prcm_partition, |
| 2833 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2834 | oh->prcm.omap4.rstctrl_offs); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2835 | } |
| 2836 | |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2837 | /** |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 2838 | * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod |
| 2839 | * @oh: struct omap_hwmod * to disable control for |
| 2840 | * |
| 2841 | * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod |
| 2842 | * will be using its main_clk to enable/disable the module. Returns |
| 2843 | * 0 if successful. |
| 2844 | */ |
| 2845 | static int _omap4_disable_direct_prcm(struct omap_hwmod *oh) |
| 2846 | { |
| 2847 | if (!oh) |
| 2848 | return -EINVAL; |
| 2849 | |
Tony Lindgren | 8823ddf | 2017-08-29 10:03:33 -0700 | [diff] [blame] | 2850 | oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK; |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 2851 | |
| 2852 | return 0; |
| 2853 | } |
| 2854 | |
| 2855 | /** |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2856 | * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args |
| 2857 | * @oh: struct omap_hwmod * to deassert hardreset |
| 2858 | * @ohri: hardreset line data |
| 2859 | * |
| 2860 | * Call am33xx_prminst_deassert_hardreset() with parameters extracted |
| 2861 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2862 | * intended for use as an soc_ops function pointer. Passes along the |
| 2863 | * return value from am33xx_prminst_deassert_hardreset(). XXX This |
| 2864 | * function is scheduled for removal when the PRM code is moved into |
| 2865 | * drivers/. |
| 2866 | */ |
| 2867 | static int _am33xx_deassert_hardreset(struct omap_hwmod *oh, |
| 2868 | struct omap_hwmod_rst_info *ohri) |
| 2869 | { |
Tero Kristo | a5bf00c | 2015-05-05 16:33:05 +0300 | [diff] [blame] | 2870 | return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, |
| 2871 | oh->clkdm->pwrdm.ptr->prcm_partition, |
Tero Kristo | 37fb59d | 2014-10-27 08:39:25 -0700 | [diff] [blame] | 2872 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2873 | oh->prcm.omap4.rstctrl_offs, |
| 2874 | oh->prcm.omap4.rstst_offs); |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2875 | } |
| 2876 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2877 | /* Public functions */ |
| 2878 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2879 | u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2880 | { |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2881 | if (oh->flags & HWMOD_16BIT_REG) |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 2882 | return readw_relaxed(oh->_mpu_rt_va + reg_offs); |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2883 | else |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 2884 | return readl_relaxed(oh->_mpu_rt_va + reg_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2885 | } |
| 2886 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2887 | void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2888 | { |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2889 | if (oh->flags & HWMOD_16BIT_REG) |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 2890 | writew_relaxed(v, oh->_mpu_rt_va + reg_offs); |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 2891 | else |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 2892 | writel_relaxed(v, oh->_mpu_rt_va + reg_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2893 | } |
| 2894 | |
Paul Walmsley | 887adea | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 2895 | /** |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 2896 | * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit |
| 2897 | * @oh: struct omap_hwmod * |
| 2898 | * |
| 2899 | * This is a public function exposed to drivers. Some drivers may need to do |
| 2900 | * some settings before and after resetting the device. Those drivers after |
| 2901 | * doing the necessary settings could use this function to start a reset by |
| 2902 | * setting the SYSCONFIG.SOFTRESET bit. |
| 2903 | */ |
| 2904 | int omap_hwmod_softreset(struct omap_hwmod *oh) |
| 2905 | { |
Paul Walmsley | 3c55c1b | 2012-04-13 05:08:43 -0600 | [diff] [blame] | 2906 | u32 v; |
| 2907 | int ret; |
| 2908 | |
| 2909 | if (!oh || !(oh->_sysc_cache)) |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 2910 | return -EINVAL; |
| 2911 | |
Paul Walmsley | 3c55c1b | 2012-04-13 05:08:43 -0600 | [diff] [blame] | 2912 | v = oh->_sysc_cache; |
| 2913 | ret = _set_softreset(oh, &v); |
| 2914 | if (ret) |
| 2915 | goto error; |
| 2916 | _write_sysconfig(v, oh); |
| 2917 | |
Roger Quadros | 313a76e | 2013-12-08 18:39:02 -0700 | [diff] [blame] | 2918 | ret = _clear_softreset(oh, &v); |
| 2919 | if (ret) |
| 2920 | goto error; |
| 2921 | _write_sysconfig(v, oh); |
| 2922 | |
Paul Walmsley | 3c55c1b | 2012-04-13 05:08:43 -0600 | [diff] [blame] | 2923 | error: |
| 2924 | return ret; |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 2925 | } |
| 2926 | |
| 2927 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2928 | * omap_hwmod_lookup - look up a registered omap_hwmod by name |
| 2929 | * @name: name of the omap_hwmod to look up |
| 2930 | * |
| 2931 | * Given a @name of an omap_hwmod, return a pointer to the registered |
| 2932 | * struct omap_hwmod *, or NULL upon error. |
| 2933 | */ |
| 2934 | struct omap_hwmod *omap_hwmod_lookup(const char *name) |
| 2935 | { |
| 2936 | struct omap_hwmod *oh; |
| 2937 | |
| 2938 | if (!name) |
| 2939 | return NULL; |
| 2940 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2941 | oh = _lookup(name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2942 | |
| 2943 | return oh; |
| 2944 | } |
| 2945 | |
| 2946 | /** |
| 2947 | * omap_hwmod_for_each - call function for each registered omap_hwmod |
| 2948 | * @fn: pointer to a callback function |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 2949 | * @data: void * data to pass to callback function |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2950 | * |
| 2951 | * Call @fn for each registered omap_hwmod, passing @data to each |
| 2952 | * function. @fn must return 0 for success or any other value for |
| 2953 | * failure. If @fn returns non-zero, the iteration across omap_hwmods |
| 2954 | * will stop and the non-zero return value will be passed to the |
| 2955 | * caller of omap_hwmod_for_each(). @fn is called with |
| 2956 | * omap_hwmod_for_each() held. |
| 2957 | */ |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 2958 | int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), |
| 2959 | void *data) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2960 | { |
| 2961 | struct omap_hwmod *temp_oh; |
Govindraj.R | 30ebad9 | 2011-06-01 11:28:56 +0530 | [diff] [blame] | 2962 | int ret = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2963 | |
| 2964 | if (!fn) |
| 2965 | return -EINVAL; |
| 2966 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2967 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 2968 | ret = (*fn)(temp_oh, data); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2969 | if (ret) |
| 2970 | break; |
| 2971 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2972 | |
| 2973 | return ret; |
| 2974 | } |
| 2975 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2976 | /** |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2977 | * omap_hwmod_register_links - register an array of hwmod links |
| 2978 | * @ois: pointer to an array of omap_hwmod_ocp_if to register |
| 2979 | * |
| 2980 | * Intended to be called early in boot before the clock framework is |
| 2981 | * initialized. If @ois is not null, will register all omap_hwmods |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2982 | * listed in @ois that are valid for this chip. Returns -EINVAL if |
| 2983 | * omap_hwmod_init() hasn't been called before calling this function, |
| 2984 | * -ENOMEM if the link memory area can't be allocated, or 0 upon |
| 2985 | * success. |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2986 | */ |
| 2987 | int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) |
| 2988 | { |
| 2989 | int r, i; |
| 2990 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2991 | if (!inited) |
| 2992 | return -EINVAL; |
| 2993 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2994 | if (!ois) |
| 2995 | return 0; |
| 2996 | |
Rajendra Nayak | f7f7a29 | 2014-08-27 19:38:23 -0600 | [diff] [blame] | 2997 | if (ois[0] == NULL) /* Empty list */ |
| 2998 | return 0; |
| 2999 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3000 | i = 0; |
| 3001 | do { |
| 3002 | r = _register_link(ois[i]); |
| 3003 | WARN(r && r != -EEXIST, |
| 3004 | "omap_hwmod: _register_link(%s -> %s) returned %d\n", |
| 3005 | ois[i]->master->name, ois[i]->slave->name, r); |
| 3006 | } while (ois[++i]); |
| 3007 | |
| 3008 | return 0; |
| 3009 | } |
| 3010 | |
| 3011 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3012 | * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up |
| 3013 | * @oh: pointer to the hwmod currently being set up (usually not the MPU) |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3014 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3015 | * If the hwmod data corresponding to the MPU subsystem IP block |
| 3016 | * hasn't been initialized and set up yet, do so now. This must be |
| 3017 | * done first since sleep dependencies may be added from other hwmods |
| 3018 | * to the MPU. Intended to be called only by omap_hwmod_setup*(). No |
| 3019 | * return value. |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3020 | */ |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3021 | static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh) |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3022 | { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3023 | if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN) |
| 3024 | pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n", |
| 3025 | __func__, MPU_INITIATOR_NAME); |
| 3026 | else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh) |
| 3027 | omap_hwmod_setup_one(MPU_INITIATOR_NAME); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3028 | } |
| 3029 | |
| 3030 | /** |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3031 | * omap_hwmod_setup_one - set up a single hwmod |
| 3032 | * @oh_name: const char * name of the already-registered hwmod to set up |
| 3033 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3034 | * Initialize and set up a single hwmod. Intended to be used for a |
| 3035 | * small number of early devices, such as the timer IP blocks used for |
| 3036 | * the scheduler clock. Must be called after omap2_clk_init(). |
| 3037 | * Resolves the struct clk names to struct clk pointers for each |
| 3038 | * registered omap_hwmod. Also calls _setup() on each hwmod. Returns |
| 3039 | * -EINVAL upon error or 0 upon success. |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3040 | */ |
| 3041 | int __init omap_hwmod_setup_one(const char *oh_name) |
| 3042 | { |
| 3043 | struct omap_hwmod *oh; |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3044 | |
| 3045 | pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__); |
| 3046 | |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3047 | oh = _lookup(oh_name); |
| 3048 | if (!oh) { |
| 3049 | WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name); |
| 3050 | return -EINVAL; |
| 3051 | } |
| 3052 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3053 | _ensure_mpu_hwmod_is_setup(oh); |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3054 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3055 | _init(oh, NULL); |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3056 | _setup(oh, NULL); |
| 3057 | |
| 3058 | return 0; |
| 3059 | } |
| 3060 | |
| 3061 | /** |
Lokesh Vutla | 8dd6666 | 2017-01-20 10:39:10 -0800 | [diff] [blame] | 3062 | * omap_hwmod_setup_earlycon_flags - set up flags for early console |
| 3063 | * |
| 3064 | * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as |
| 3065 | * early concole so that hwmod core doesn't reset and keep it in idle |
| 3066 | * that specific uart. |
| 3067 | */ |
| 3068 | #ifdef CONFIG_SERIAL_EARLYCON |
| 3069 | static void __init omap_hwmod_setup_earlycon_flags(void) |
| 3070 | { |
| 3071 | struct device_node *np; |
| 3072 | struct omap_hwmod *oh; |
| 3073 | const char *uart; |
| 3074 | |
| 3075 | np = of_find_node_by_path("/chosen"); |
| 3076 | if (np) { |
| 3077 | uart = of_get_property(np, "stdout-path", NULL); |
| 3078 | if (uart) { |
| 3079 | np = of_find_node_by_path(uart); |
| 3080 | if (np) { |
| 3081 | uart = of_get_property(np, "ti,hwmods", NULL); |
| 3082 | oh = omap_hwmod_lookup(uart); |
| 3083 | if (oh) |
| 3084 | oh->flags |= DEBUG_OMAPUART_FLAGS; |
| 3085 | } |
| 3086 | } |
| 3087 | } |
| 3088 | } |
| 3089 | #endif |
| 3090 | |
| 3091 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3092 | * omap_hwmod_setup_all - set up all registered IP blocks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3093 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3094 | * Initialize and set up all IP blocks registered with the hwmod code. |
| 3095 | * Must be called after omap2_clk_init(). Resolves the struct clk |
| 3096 | * names to struct clk pointers for each registered omap_hwmod. Also |
| 3097 | * calls _setup() on each hwmod. Returns 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3098 | */ |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 3099 | static int __init omap_hwmod_setup_all(void) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3100 | { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3101 | _ensure_mpu_hwmod_is_setup(NULL); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3102 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3103 | omap_hwmod_for_each(_init, NULL); |
Lokesh Vutla | 8dd6666 | 2017-01-20 10:39:10 -0800 | [diff] [blame] | 3104 | #ifdef CONFIG_SERIAL_EARLYCON |
| 3105 | omap_hwmod_setup_earlycon_flags(); |
| 3106 | #endif |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3107 | omap_hwmod_for_each(_setup, NULL); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3108 | |
| 3109 | return 0; |
| 3110 | } |
Tony Lindgren | 8dd5ea7 | 2015-12-03 11:38:09 -0800 | [diff] [blame] | 3111 | omap_postcore_initcall(omap_hwmod_setup_all); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3112 | |
| 3113 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3114 | * omap_hwmod_enable - enable an omap_hwmod |
| 3115 | * @oh: struct omap_hwmod * |
| 3116 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3117 | * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3118 | * Returns -EINVAL on error or passes along the return value from _enable(). |
| 3119 | */ |
| 3120 | int omap_hwmod_enable(struct omap_hwmod *oh) |
| 3121 | { |
| 3122 | int r; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3123 | unsigned long flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3124 | |
| 3125 | if (!oh) |
| 3126 | return -EINVAL; |
| 3127 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3128 | spin_lock_irqsave(&oh->_lock, flags); |
| 3129 | r = _enable(oh); |
| 3130 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3131 | |
| 3132 | return r; |
| 3133 | } |
| 3134 | |
| 3135 | /** |
| 3136 | * omap_hwmod_idle - idle an omap_hwmod |
| 3137 | * @oh: struct omap_hwmod * |
| 3138 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3139 | * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3140 | * Returns -EINVAL on error or passes along the return value from _idle(). |
| 3141 | */ |
| 3142 | int omap_hwmod_idle(struct omap_hwmod *oh) |
| 3143 | { |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3144 | int r; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3145 | unsigned long flags; |
| 3146 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3147 | if (!oh) |
| 3148 | return -EINVAL; |
| 3149 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3150 | spin_lock_irqsave(&oh->_lock, flags); |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3151 | r = _idle(oh); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3152 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3153 | |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3154 | return r; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3155 | } |
| 3156 | |
| 3157 | /** |
| 3158 | * omap_hwmod_shutdown - shutdown an omap_hwmod |
| 3159 | * @oh: struct omap_hwmod * |
| 3160 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3161 | * Shutdown an omap_hwmod @oh. Intended to be called by |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3162 | * omap_device_shutdown(). Returns -EINVAL on error or passes along |
| 3163 | * the return value from _shutdown(). |
| 3164 | */ |
| 3165 | int omap_hwmod_shutdown(struct omap_hwmod *oh) |
| 3166 | { |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3167 | int r; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3168 | unsigned long flags; |
| 3169 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3170 | if (!oh) |
| 3171 | return -EINVAL; |
| 3172 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3173 | spin_lock_irqsave(&oh->_lock, flags); |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3174 | r = _shutdown(oh); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3175 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3176 | |
Pali RohƔr | 6da2335 | 2015-02-26 14:49:51 +0100 | [diff] [blame] | 3177 | return r; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3178 | } |
| 3179 | |
Paul Walmsley | 5e8370f | 2012-04-18 19:10:06 -0600 | [diff] [blame] | 3180 | /* |
| 3181 | * IP block data retrieval functions |
| 3182 | */ |
| 3183 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3184 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3185 | * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain |
| 3186 | * @oh: struct omap_hwmod * |
| 3187 | * |
| 3188 | * Return the powerdomain pointer associated with the OMAP module |
| 3189 | * @oh's main clock. If @oh does not have a main clk, return the |
| 3190 | * powerdomain associated with the interface clock associated with the |
| 3191 | * module's MPU port. (XXX Perhaps this should use the SDMA port |
| 3192 | * instead?) Returns NULL on error, or a struct powerdomain * on |
| 3193 | * success. |
| 3194 | */ |
| 3195 | struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) |
| 3196 | { |
| 3197 | struct clk *c; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3198 | struct omap_hwmod_ocp_if *oi; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3199 | struct clockdomain *clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3200 | struct clk_hw_omap *clk; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3201 | |
| 3202 | if (!oh) |
| 3203 | return NULL; |
| 3204 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3205 | if (oh->clkdm) |
| 3206 | return oh->clkdm->pwrdm.ptr; |
| 3207 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3208 | if (oh->_clk) { |
| 3209 | c = oh->_clk; |
| 3210 | } else { |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3211 | oi = _find_mpu_rt_port(oh); |
| 3212 | if (!oi) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3213 | return NULL; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3214 | c = oi->_clk; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3215 | } |
| 3216 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3217 | clk = to_clk_hw_omap(__clk_get_hw(c)); |
| 3218 | clkdm = clk->clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3219 | if (!clkdm) |
Thara Gopinath | d5647c1 | 2010-03-31 04:16:29 -0600 | [diff] [blame] | 3220 | return NULL; |
| 3221 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3222 | return clkdm->pwrdm.ptr; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3223 | } |
| 3224 | |
| 3225 | /** |
Paul Walmsley | db2a60b | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 3226 | * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) |
| 3227 | * @oh: struct omap_hwmod * |
| 3228 | * |
| 3229 | * Returns the virtual address corresponding to the beginning of the |
| 3230 | * module's register target, in the address range that is intended to |
| 3231 | * be used by the MPU. Returns the virtual address upon success or NULL |
| 3232 | * upon error. |
| 3233 | */ |
| 3234 | void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) |
| 3235 | { |
| 3236 | if (!oh) |
| 3237 | return NULL; |
| 3238 | |
| 3239 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
| 3240 | return NULL; |
| 3241 | |
| 3242 | if (oh->_state == _HWMOD_STATE_UNKNOWN) |
| 3243 | return NULL; |
| 3244 | |
| 3245 | return oh->_mpu_rt_va; |
| 3246 | } |
| 3247 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3248 | /* |
| 3249 | * XXX what about functions for drivers to save/restore ocp_sysconfig |
| 3250 | * for context save/restore operations? |
| 3251 | */ |
| 3252 | |
| 3253 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3254 | * omap_hwmod_enable_wakeup - allow device to wake up the system |
| 3255 | * @oh: struct omap_hwmod * |
| 3256 | * |
| 3257 | * Sets the module OCP socket ENAWAKEUP bit to allow the module to |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3258 | * send wakeups to the PRCM, and enable I/O ring wakeup events for |
| 3259 | * this IP block if it has dynamic mux entries. Eventually this |
| 3260 | * should set PRCM wakeup registers to cause the PRCM to receive |
| 3261 | * wakeup events from the module. Does not set any wakeup routing |
| 3262 | * registers beyond this point - if the module is to wake up any other |
| 3263 | * module or subsystem, that must be set separately. Called by |
| 3264 | * omap_device code. Returns -EINVAL on error or 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3265 | */ |
| 3266 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) |
| 3267 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3268 | unsigned long flags; |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 3269 | u32 v; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3270 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3271 | spin_lock_irqsave(&oh->_lock, flags); |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3272 | |
| 3273 | if (oh->class->sysc && |
| 3274 | (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { |
| 3275 | v = oh->_sysc_cache; |
| 3276 | _enable_wakeup(oh, &v); |
| 3277 | _write_sysconfig(v, oh); |
| 3278 | } |
| 3279 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3280 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3281 | |
| 3282 | return 0; |
| 3283 | } |
| 3284 | |
| 3285 | /** |
| 3286 | * omap_hwmod_disable_wakeup - prevent device from waking the system |
| 3287 | * @oh: struct omap_hwmod * |
| 3288 | * |
| 3289 | * Clears the module OCP socket ENAWAKEUP bit to prevent the module |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3290 | * from sending wakeups to the PRCM, and disable I/O ring wakeup |
| 3291 | * events for this IP block if it has dynamic mux entries. Eventually |
| 3292 | * this should clear PRCM wakeup registers to cause the PRCM to ignore |
| 3293 | * wakeup events from the module. Does not set any wakeup routing |
| 3294 | * registers beyond this point - if the module is to wake up any other |
| 3295 | * module or subsystem, that must be set separately. Called by |
| 3296 | * omap_device code. Returns -EINVAL on error or 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3297 | */ |
| 3298 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) |
| 3299 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3300 | unsigned long flags; |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 3301 | u32 v; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3302 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3303 | spin_lock_irqsave(&oh->_lock, flags); |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3304 | |
| 3305 | if (oh->class->sysc && |
| 3306 | (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { |
| 3307 | v = oh->_sysc_cache; |
| 3308 | _disable_wakeup(oh, &v); |
| 3309 | _write_sysconfig(v, oh); |
| 3310 | } |
| 3311 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3312 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3313 | |
| 3314 | return 0; |
| 3315 | } |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3316 | |
| 3317 | /** |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3318 | * omap_hwmod_assert_hardreset - assert the HW reset line of submodules |
| 3319 | * contained in the hwmod module. |
| 3320 | * @oh: struct omap_hwmod * |
| 3321 | * @name: name of the reset line to lookup and assert |
| 3322 | * |
| 3323 | * Some IP like dsp, ipu or iva contain processor that require |
| 3324 | * an HW reset line to be assert / deassert in order to enable fully |
| 3325 | * the IP. Returns -EINVAL if @oh is null or if the operation is not |
| 3326 | * yet supported on this OMAP; otherwise, passes along the return value |
| 3327 | * from _assert_hardreset(). |
| 3328 | */ |
| 3329 | int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name) |
| 3330 | { |
| 3331 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3332 | unsigned long flags; |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3333 | |
| 3334 | if (!oh) |
| 3335 | return -EINVAL; |
| 3336 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3337 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3338 | ret = _assert_hardreset(oh, name); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3339 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3340 | |
| 3341 | return ret; |
| 3342 | } |
| 3343 | |
| 3344 | /** |
| 3345 | * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules |
| 3346 | * contained in the hwmod module. |
| 3347 | * @oh: struct omap_hwmod * |
| 3348 | * @name: name of the reset line to look up and deassert |
| 3349 | * |
| 3350 | * Some IP like dsp, ipu or iva contain processor that require |
| 3351 | * an HW reset line to be assert / deassert in order to enable fully |
| 3352 | * the IP. Returns -EINVAL if @oh is null or if the operation is not |
| 3353 | * yet supported on this OMAP; otherwise, passes along the return value |
| 3354 | * from _deassert_hardreset(). |
| 3355 | */ |
| 3356 | int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name) |
| 3357 | { |
| 3358 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3359 | unsigned long flags; |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3360 | |
| 3361 | if (!oh) |
| 3362 | return -EINVAL; |
| 3363 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3364 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3365 | ret = _deassert_hardreset(oh, name); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3366 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3367 | |
| 3368 | return ret; |
| 3369 | } |
| 3370 | |
| 3371 | /** |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3372 | * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname |
| 3373 | * @classname: struct omap_hwmod_class name to search for |
| 3374 | * @fn: callback function pointer to call for each hwmod in class @classname |
| 3375 | * @user: arbitrary context data to pass to the callback function |
| 3376 | * |
Benoit Cousson | ce35b24 | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 3377 | * For each omap_hwmod of class @classname, call @fn. |
| 3378 | * If the callback function returns something other than |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3379 | * zero, the iterator is terminated, and the callback function's return |
| 3380 | * value is passed back to the caller. Returns 0 upon success, -EINVAL |
| 3381 | * if @classname or @fn are NULL, or passes back the error code from @fn. |
| 3382 | */ |
| 3383 | int omap_hwmod_for_each_by_class(const char *classname, |
| 3384 | int (*fn)(struct omap_hwmod *oh, |
| 3385 | void *user), |
| 3386 | void *user) |
| 3387 | { |
| 3388 | struct omap_hwmod *temp_oh; |
| 3389 | int ret = 0; |
| 3390 | |
| 3391 | if (!classname || !fn) |
| 3392 | return -EINVAL; |
| 3393 | |
| 3394 | pr_debug("omap_hwmod: %s: looking for modules of class %s\n", |
| 3395 | __func__, classname); |
| 3396 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3397 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
| 3398 | if (!strcmp(temp_oh->class->name, classname)) { |
| 3399 | pr_debug("omap_hwmod: %s: %s: calling callback fn\n", |
| 3400 | __func__, temp_oh->name); |
| 3401 | ret = (*fn)(temp_oh, user); |
| 3402 | if (ret) |
| 3403 | break; |
| 3404 | } |
| 3405 | } |
| 3406 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3407 | if (ret) |
| 3408 | pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", |
| 3409 | __func__, ret); |
| 3410 | |
| 3411 | return ret; |
| 3412 | } |
| 3413 | |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3414 | /** |
| 3415 | * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod |
| 3416 | * @oh: struct omap_hwmod * |
| 3417 | * @state: state that _setup() should leave the hwmod in |
| 3418 | * |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 3419 | * Sets the hwmod state that @oh will enter at the end of _setup() |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 3420 | * (called by omap_hwmod_setup_*()). See also the documentation |
| 3421 | * for _setup_postsetup(), above. Returns 0 upon success or |
| 3422 | * -EINVAL if there is a problem with the arguments or if the hwmod is |
| 3423 | * in the wrong state. |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3424 | */ |
| 3425 | int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state) |
| 3426 | { |
| 3427 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3428 | unsigned long flags; |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3429 | |
| 3430 | if (!oh) |
| 3431 | return -EINVAL; |
| 3432 | |
| 3433 | if (state != _HWMOD_STATE_DISABLED && |
| 3434 | state != _HWMOD_STATE_ENABLED && |
| 3435 | state != _HWMOD_STATE_IDLE) |
| 3436 | return -EINVAL; |
| 3437 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3438 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3439 | |
| 3440 | if (oh->_state != _HWMOD_STATE_REGISTERED) { |
| 3441 | ret = -EINVAL; |
| 3442 | goto ohsps_unlock; |
| 3443 | } |
| 3444 | |
| 3445 | oh->_postsetup_state = state; |
| 3446 | ret = 0; |
| 3447 | |
| 3448 | ohsps_unlock: |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3449 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3450 | |
| 3451 | return ret; |
| 3452 | } |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3453 | |
| 3454 | /** |
| 3455 | * omap_hwmod_get_context_loss_count - get lost context count |
| 3456 | * @oh: struct omap_hwmod * |
| 3457 | * |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3458 | * Returns the context loss count of associated @oh |
| 3459 | * upon success, or zero if no context loss data is available. |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3460 | * |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3461 | * On OMAP4, this queries the per-hwmod context loss register, |
| 3462 | * assuming one exists. If not, or on OMAP2/3, this queries the |
| 3463 | * enclosing powerdomain context loss count. |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3464 | */ |
Tomi Valkeinen | fc01387 | 2011-06-09 16:56:23 +0300 | [diff] [blame] | 3465 | int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3466 | { |
| 3467 | struct powerdomain *pwrdm; |
| 3468 | int ret = 0; |
| 3469 | |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3470 | if (soc_ops.get_context_lost) |
| 3471 | return soc_ops.get_context_lost(oh); |
| 3472 | |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3473 | pwrdm = omap_hwmod_get_pwrdm(oh); |
| 3474 | if (pwrdm) |
| 3475 | ret = pwrdm_get_context_loss_count(pwrdm); |
| 3476 | |
| 3477 | return ret; |
| 3478 | } |
Paul Walmsley | 43b0164 | 2011-03-10 03:50:07 -0700 | [diff] [blame] | 3479 | |
| 3480 | /** |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3481 | * omap_hwmod_init - initialize the hwmod code |
| 3482 | * |
| 3483 | * Sets up some function pointers needed by the hwmod code to operate on the |
| 3484 | * currently-booted SoC. Intended to be called once during kernel init |
| 3485 | * before any hwmods are registered. No return value. |
| 3486 | */ |
| 3487 | void __init omap_hwmod_init(void) |
| 3488 | { |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 3489 | if (cpu_is_omap24xx()) { |
Tero Kristo | 9002e921 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 3490 | soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 3491 | soc_ops.assert_hardreset = _omap2_assert_hardreset; |
| 3492 | soc_ops.deassert_hardreset = _omap2_deassert_hardreset; |
| 3493 | soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; |
| 3494 | } else if (cpu_is_omap34xx()) { |
Tero Kristo | 9002e921 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 3495 | soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3496 | soc_ops.assert_hardreset = _omap2_assert_hardreset; |
| 3497 | soc_ops.deassert_hardreset = _omap2_deassert_hardreset; |
| 3498 | soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; |
Tero Kristo | 0385c58 | 2013-07-17 18:03:25 +0300 | [diff] [blame] | 3499 | soc_ops.init_clkdm = _init_clkdm; |
Rajendra Nayak | debcd1f | 2013-07-02 18:20:08 +0530 | [diff] [blame] | 3500 | } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3501 | soc_ops.enable_module = _omap4_enable_module; |
| 3502 | soc_ops.disable_module = _omap4_disable_module; |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3503 | soc_ops.wait_target_ready = _omap4_wait_target_ready; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3504 | soc_ops.assert_hardreset = _omap4_assert_hardreset; |
| 3505 | soc_ops.deassert_hardreset = _omap4_deassert_hardreset; |
| 3506 | soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; |
Kevin Hilman | 0a179ea | 2012-06-18 12:12:25 -0600 | [diff] [blame] | 3507 | soc_ops.init_clkdm = _init_clkdm; |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3508 | soc_ops.update_context_lost = _omap4_update_context_lost; |
| 3509 | soc_ops.get_context_lost = _omap4_get_context_lost; |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 3510 | soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 3511 | soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl; |
Tony Lindgren | 0f3ccb2 | 2015-07-16 01:55:58 -0700 | [diff] [blame] | 3512 | } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() || |
| 3513 | soc_is_am43xx()) { |
Afzal Mohammed | c8b428a | 2013-10-12 15:46:20 +0530 | [diff] [blame] | 3514 | soc_ops.enable_module = _omap4_enable_module; |
| 3515 | soc_ops.disable_module = _omap4_disable_module; |
| 3516 | soc_ops.wait_target_ready = _omap4_wait_target_ready; |
Tero Kristo | 409d706 | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 3517 | soc_ops.assert_hardreset = _omap4_assert_hardreset; |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 3518 | soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; |
Tero Kristo | a5bf00c | 2015-05-05 16:33:05 +0300 | [diff] [blame] | 3519 | soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 3520 | soc_ops.init_clkdm = _init_clkdm; |
Tero Kristo | 9fabc1a | 2016-07-04 14:11:48 +0300 | [diff] [blame] | 3521 | soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; |
Tero Kristo | 2b96be3 | 2017-08-09 11:57:12 +0300 | [diff] [blame] | 3522 | soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl; |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3523 | } else { |
| 3524 | WARN(1, "omap_hwmod: unknown SoC type\n"); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3525 | } |
| 3526 | |
Tero Kristo | 70f05be | 2017-05-31 18:00:03 +0300 | [diff] [blame] | 3527 | _init_clkctrl_providers(); |
| 3528 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3529 | inited = true; |
| 3530 | } |
Tony Lindgren | 68c9a95 | 2012-07-06 00:58:43 -0700 | [diff] [blame] | 3531 | |
| 3532 | /** |
| 3533 | * omap_hwmod_get_main_clk - get pointer to main clock name |
| 3534 | * @oh: struct omap_hwmod * |
| 3535 | * |
| 3536 | * Returns the main clock name assocated with @oh upon success, |
| 3537 | * or NULL if @oh is NULL. |
| 3538 | */ |
| 3539 | const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh) |
| 3540 | { |
| 3541 | if (!oh) |
| 3542 | return NULL; |
| 3543 | |
| 3544 | return oh->main_clk; |
| 3545 | } |