blob: 1da3cafd545239a9e1ca9abaa91f780a64ffdc6e [file] [log] [blame]
Seppo Ingalsuo6a274832017-06-07 14:17:55 +03001/*
2 * Copyright (c) 2017, Intel Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Intel Corporation nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Author: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
29 * Liam Girdwood <liam.r.girdwood@linux.intel.com>
30 * Keyon Jie <yang.jie@linux.intel.com>
31 */
32
33#include <stdint.h>
34#include <stddef.h>
35#include <errno.h>
36#include <reef/reef.h>
37#include <reef/lock.h>
38#include <reef/list.h>
39#include <reef/stream.h>
40#include <reef/alloc.h>
41#include <reef/work.h>
42#include <reef/clock.h>
43#include <reef/audio/component.h>
44#include <reef/audio/pipeline.h>
Liam Girdwood17641522017-06-09 17:27:02 +010045#include <uapi/ipc.h>
Seppo Ingalsuo6a274832017-06-07 14:17:55 +030046#include "src_core.h"
47
48#ifdef MODULE_TEST
49#include <stdio.h>
50#endif
51
52#define trace_src(__e) trace_event(TRACE_CLASS_SRC, __e)
53#define tracev_src(__e) tracev_event(TRACE_CLASS_SRC, __e)
54#define trace_src_error(__e) trace_error(TRACE_CLASS_SRC, __e)
55
56/* src component private data */
57struct comp_data {
58 struct polyphase_src src[PLATFORM_MAX_CHANNELS];
59 int32_t *delay_lines;
60 int scratch_length;
61 //int32_t z[STAGE_BUF_SIZE];
62 void (*src_func)(struct comp_dev *dev,
63 struct comp_buffer *source,
64 struct comp_buffer *sink,
65 uint32_t source_frames,
66 uint32_t sink_frames);
67};
68
69/* Common mute function for 2s and 1s SRC. This preserves the same
70 * buffer consume and produce pattern as normal operation.
71 */
72static void src_muted_s32(struct comp_buffer *source, struct comp_buffer *sink,
73 int blk_in, int blk_out, int nch, int source_frames)
74{
75
76 int i;
77 int32_t *src = (int32_t *) source->r_ptr;
78 int32_t *dest = (int32_t *) sink->w_ptr;
79 int32_t *end = (int32_t *) sink->end_addr;
80 int n_read = 0;
81 int n_max;
82 int n;
83 int n_written = 0;
84
85 for (i = 0; i < source_frames - blk_in + 1; i += blk_in) {
86 n_max = end - dest;
87 n = nch*blk_out;
88 if (n < n_max) {
89 bzero(dest, n * sizeof(int32_t));
90 dest += n;
91 } else {
92 /* Also case n_max == n is done here */
93 bzero(dest, n_max * sizeof(int32_t));
94 dest = (int32_t *) sink->addr;
95 bzero(dest, (n - n_max) * sizeof(int32_t));
96 dest += n - n_max;
97 }
98 n_read += nch*blk_in;
99 n_written += nch*blk_out;
100 }
101 source->r_ptr = src + n_read;
102 sink->w_ptr = dest;
103 comp_wrap_source_r_ptr_circular(source);
104 comp_wrap_sink_w_ptr_circular(sink);
105 comp_update_source_free_avail(source, n_read);
106 comp_update_sink_free_avail(sink, n_written);
107}
108
109/* Fallback function to just output muted samples and advance
110 * pointers. Note that a buffer that is not having integer number of
111 * frames in a period will drift since there is no similar blk in/out
112 * check as for SRC.
113 */
114static void fallback_s32(struct comp_dev *dev,
115 struct comp_buffer *source,
116 struct comp_buffer *sink,
117 uint32_t source_frames,
118 uint32_t sink_frames)
119{
120
121 struct comp_data *cd = comp_get_drvdata(dev);
122 //int32_t *src = (int32_t*) source->r_ptr;
123 //int32_t *dest = (int32_t*) sink->w_ptr;
124 int nch = sink->params.pcm->channels;
125 int blk_in = cd->src[0].blk_in;
126 int blk_out = cd->src[0].blk_out;
127
128 src_muted_s32(source, sink, blk_in, blk_out, nch, source_frames);
129
130}
131
132/* Normal 2 stage SRC */
133static void src_2s_s32_default(struct comp_dev *dev,
134 struct comp_buffer *source, struct comp_buffer *sink,
135 uint32_t source_frames, uint32_t sink_frames)
136{
137 int i, j;
138 struct polyphase_src *s;
139 struct comp_data *cd = comp_get_drvdata(dev);
140 int blk_in = cd->src[0].blk_in;
141 int blk_out = cd->src[0].blk_out;
142 int n_times1 = cd->src[0].stage1_times;
143 int n_times2 = cd->src[0].stage2_times;
144 int nch = sink->params.pcm->channels;
145 int32_t *dest = (int32_t *) sink->w_ptr;
146 int32_t *src = (int32_t *) source->r_ptr;
147 struct src_stage_prm s1, s2;
148 int n_read = 0;
149 int n_written = 0;
150
151 if (cd->src[0].mute) {
152 src_muted_s32(source, sink, blk_in, blk_out, nch, source_frames);
153 return;
154 }
155
156 s1.times = n_times1;
157 s1.x_end_addr = source->end_addr;
158 s1.x_size = source->alloc_size;
159 s1.x_inc = nch;
160 s1.y_end_addr = &cd->delay_lines[cd->scratch_length];
161 s1.y_size = STAGE_BUF_SIZE * sizeof(int32_t);
162 s1.y_inc = 1;
163
164 s2.times = n_times2;
165 s2.x_end_addr = &cd->delay_lines[cd->scratch_length];
166 s2.x_size = STAGE_BUF_SIZE * sizeof(int32_t);
167 s2.x_inc = 1;
168 s2.y_end_addr = sink->end_addr;
169 s2.y_size = sink->alloc_size;
170 s2.y_inc = nch;
171
Seppo Ingalsuo6f27ab62017-06-12 11:31:15 +0300172 s1.x_rptr = src + nch - 1;
173 s2.y_wptr = dest + nch - 1;
174
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300175 for (j = 0; j < nch; j++) {
176 s = &cd->src[j]; /* Point to src[] for this channel */
177 s1.x_rptr = src++;
178 s2.y_wptr = dest++;
179 s1.state = &s->state1;
180 s1.stage = s->stage1;
181 s2.state = &s->state2;
182 s2.stage = s->stage2;
183
184 for (i = 0; i < source_frames - blk_in + 1; i += blk_in) {
185 /* Reset output to buffer start, read interleaved */
186 s1.y_wptr = cd->delay_lines;
187 src_polyphase_stage_cir(&s1);
188 s2.x_rptr = cd->delay_lines;
189 src_polyphase_stage_cir(&s2);
190
191 n_read += blk_in;
192 n_written += blk_out;
193 }
194 }
195 source->r_ptr = s1.x_rptr - nch + 1;
196 sink->w_ptr = s2.y_wptr - nch + 1;
197 comp_wrap_source_r_ptr_circular(source);
198 comp_wrap_sink_w_ptr_circular(sink);
199 comp_update_source_free_avail(source, n_read);
200 comp_update_sink_free_avail(sink, n_written);
201}
202
203/* 1 stage SRC for simple conversions */
204static void src_1s_s32_default(struct comp_dev *dev,
205 struct comp_buffer *source, struct comp_buffer *sink,
206 uint32_t source_frames, uint32_t sink_frames)
207{
208 int i, j;
209 //int32_t *xp, *yp;
210 struct polyphase_src *s;
211
212 struct comp_data *cd = comp_get_drvdata(dev);
213 int blk_in = cd->src[0].blk_in;
214 int blk_out = cd->src[0].blk_out;
215 int n_times = cd->src[0].stage1_times;
216 int nch = sink->params.pcm->channels;
217 int32_t *dest = (int32_t*) sink->w_ptr;
218 int32_t *src = (int32_t*) source->r_ptr;
219 int n_read = 0;
220 int n_written = 0;
221 struct src_stage_prm s1;
222
223 if (cd->src[0].mute) {
224 src_muted_s32(source, sink, blk_in, blk_out, nch, source_frames);
225 return;
226 }
227
228 s1.times = n_times;
229 s1.x_end_addr = source->end_addr;
230 s1.x_size = source->alloc_size;
231 s1.x_inc = nch;
232 s1.y_end_addr = sink->end_addr;
233 s1.y_size = sink->alloc_size;
234 s1.y_inc = nch;
Seppo Ingalsuo6f27ab62017-06-12 11:31:15 +0300235 s1.x_rptr = src + nch - 1;
236 s1.y_wptr = dest + nch - 1;
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300237
238 for (j = 0; j < nch; j++) {
239 s = &cd->src[j]; /* Point to src for this channel */
240 s1.x_rptr = src++;
241 s1.y_wptr = dest++;
242 s1.state = &s->state1;
243 s1.stage = s->stage1;
244
245 for (i = 0; i + blk_in - 1 < source_frames; i += blk_in) {
246 src_polyphase_stage_cir(&s1);
247
248 n_read += blk_in;
249 n_written += blk_out;
250 }
251
252 }
253 source->r_ptr = s1.x_rptr - nch + 1;
254 sink->w_ptr = s1.y_wptr - nch + 1;
255
256 comp_wrap_source_r_ptr_circular(source);
257 comp_wrap_sink_w_ptr_circular(sink);
258 comp_update_source_free_avail(source, n_read);
259 comp_update_sink_free_avail(sink, n_written);
260}
261
262static struct comp_dev *src_new(struct sof_ipc_comp *comp)
263{
264 int i;
265 struct comp_dev *dev;
266 struct comp_data *cd;
267
268 trace_src("SNw");
Liam Girdwood17641522017-06-09 17:27:02 +0100269 dev = rmalloc(RZONE_RUNTIME, RFLAGS_NONE,
270 COMP_SIZE(struct sof_ipc_comp_src));
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300271 if (dev == NULL)
272 return NULL;
273
274 memcpy(&dev->comp, comp, sizeof(struct sof_ipc_comp_src));
275
276 cd = rmalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*cd));
277 if (cd == NULL) {
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300278 rfree(dev);
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300279 return NULL;
280 }
281
282 comp_set_drvdata(dev, cd);
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300283
284 cd->delay_lines = NULL;
285 cd->src_func = src_2s_s32_default;
286 for (i = 0; i < PLATFORM_MAX_CHANNELS; i++)
287 src_polyphase_reset(&cd->src[i]);
288
289 return dev;
290}
291
292static void src_free(struct comp_dev *dev)
293{
294 struct comp_data *cd = comp_get_drvdata(dev);
295
296 trace_src("SFr");
297
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300298 /* Free dynamically reserved buffers for SRC algorithm */
299 if (cd->delay_lines != NULL)
300 rfree(cd->delay_lines);
301
302 rfree(cd);
303 rfree(dev);
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300304}
305
306/* set component audio stream parameters */
307static int src_params(struct comp_dev *dev, struct stream_params *params)
308{
309 int i;
310 struct comp_buffer *source, *sink;
311 struct src_alloc need;
312 size_t delay_lines_size;
313 int32_t *buffer_start;
314 int n = 0;
315 struct comp_data *cd = comp_get_drvdata(dev);
316
317 trace_src("SPa");
318
319 /* SRC supports only S32_LE PCM format */
320 if ((params->type != STREAM_TYPE_PCM)
321 || (params->pcm->frame_fmt != SOF_IPC_FRAME_S32_LE))
322 return -EINVAL;
323
324 /* No data transformation */
325 comp_set_sink_params(dev, params);
326
327 /* Allocate needed memory for delay lines */
328 source = list_first_item(&dev->bsource_list, struct comp_buffer,
329 sink_list);
330 sink = list_first_item(&dev->bsink_list, struct comp_buffer,
331 source_list);
332 src_buffer_lengths(&need, source->params.pcm->rate,
333 sink->params.pcm->rate, source->params.pcm->channels);
334 delay_lines_size = sizeof(int32_t) * need.total;
335 if (cd->delay_lines != NULL)
336 rfree(cd->delay_lines);
337
338 cd->delay_lines = rmalloc(RZONE_RUNTIME, RFLAGS_NONE, delay_lines_size);
339 if (cd->delay_lines == NULL)
340 return -EINVAL;
341
342 /* Clear all delay lines here */
343 memset(cd->delay_lines, 0, delay_lines_size);
344 cd->scratch_length = need.scratch;
345 buffer_start = cd->delay_lines + need.scratch;
346
347 /* Initize SRC for actual sample rate */
348 for (i = 0; i < source->params.pcm->channels; i++) {
349 n = src_polyphase_init(&cd->src[i], source->params.pcm->rate,
350 sink->params.pcm->rate, buffer_start);
351 buffer_start += need.single_src;
352 }
353
354 switch (n) {
355 case 1:
356 cd->src_func = src_1s_s32_default; /* Simpler 1 stage SRC */
357 break;
358 case 2:
359 cd->src_func = src_2s_s32_default; /* Default 2 stage SRC */
360 break;
361 default:
362 /* This is possibly due to missing coefficients for
363 * requested rates combination. Sink audio will be
364 * muted if copy() is run.
365 */
366 trace_src("SFa");
367 cd->src_func = fallback_s32;
368 return(-EINVAL);
369 break;
370 }
371
372 /* Check that src blk_in and blk_out are less than params.period_frames.
373 * Return an error if the period is too short.
374 */
375 if (src_polyphase_get_blk_in(&cd->src[0]) > source->params.pcm->period_count)
376 return(-EINVAL);
377
378 if (src_polyphase_get_blk_out(&cd->src[0]) > sink->params.pcm->period_count)
379 return(-EINVAL);
380
381
382 return 0;
383}
384
385/* used to pass standard and bespoke commands (with data) to component */
386static int src_cmd(struct comp_dev *dev, int cmd, void *data)
387{
388 trace_src("SCm");
389 struct comp_data *cd = comp_get_drvdata(dev);
390 struct sof_ipc_comp_src *cv;
391 int i;
392
393 switch (cmd) {
394 case COMP_CMD_SRC:
395 trace_src("SMa");
396 cv = (struct sof_ipc_comp_src *) data;
397 cv->in_mask = src_input_rates();
398 cv->out_mask = src_output_rates();
399 break;
400 case COMP_CMD_MUTE:
401 trace_src("SMu");
402 for (i = 0; i < PLATFORM_MAX_CHANNELS; i++)
403 src_polyphase_mute(&cd->src[i]);
404
405 break;
406 case COMP_CMD_UNMUTE:
407 trace_src("SUm");
408 for (i = 0; i < PLATFORM_MAX_CHANNELS; i++)
409 src_polyphase_unmute(&cd->src[i]);
410
411 break;
412 case COMP_CMD_START:
413 trace_src("SSt");
414 dev->state = COMP_STATE_RUNNING;
415 break;
416 case COMP_CMD_STOP:
417 trace_src("SSp");
418 if (dev->state == COMP_STATE_RUNNING ||
419 dev->state == COMP_STATE_DRAINING ||
420 dev->state == COMP_STATE_PAUSED) {
421 comp_buffer_reset(dev);
422 dev->state = COMP_STATE_SETUP;
423 }
424 break;
425 case COMP_CMD_PAUSE:
426 trace_src("SPe");
427 /* only support pausing for running */
428 if (dev->state == COMP_STATE_RUNNING)
429 dev->state = COMP_STATE_PAUSED;
430
431 break;
432 case COMP_CMD_RELEASE:
433 trace_src("SRl");
434 dev->state = COMP_STATE_RUNNING;
435 break;
436 default:
437 trace_src("SDf");
438 break;
439 }
440
441 return 0;
442}
443
444/* copy and process stream data from source to sink buffers */
445static int src_copy(struct comp_dev *dev)
446{
447 struct comp_data *cd = comp_get_drvdata(dev);
448 struct comp_buffer *source;
449 struct comp_buffer *sink;
450 uint32_t frames_source;
451 uint32_t frames_sink;
452 int need_source, need_sink, min_frames;
453
454 trace_comp("SRC");
455
456 /* src component needs 1 source and 1 sink buffer */
457 source = list_first_item(&dev->bsource_list, struct comp_buffer,
458 sink_list);
459 sink = list_first_item(&dev->bsink_list, struct comp_buffer,
460 source_list);
461
462 /* Check that source has enough frames available and sink enough
463 * frames free.
464 */
465 frames_source = source->params.pcm->period_count;
466 frames_sink = sink->params.pcm->period_count;
467 min_frames = src_polyphase_get_blk_in(&cd->src[0]);
468 if (frames_source > min_frames)
469 need_source = frames_source * source->params.pcm->frame_size;
470 else {
471 frames_source = min_frames;
472 need_source = min_frames * source->params.pcm->frame_size;
473 }
474
475 min_frames = src_polyphase_get_blk_out(&cd->src[0]);
476 if (frames_sink > min_frames)
477 need_sink = frames_sink * sink->params.pcm->frame_size;
478 else {
479 frames_sink = min_frames;
480 need_sink = min_frames * sink->params.pcm->frame_size;
481 }
482
483 /* Run as many times as buffers allow */
484 while ((source->avail >= need_source) && (sink->free >= need_sink)) {
485 /* Run src */
486 cd->src_func(dev, source, sink, frames_source, frames_sink);
487
488 }
489
490 return 0;
491}
492
493static int src_prepare(struct comp_dev *dev)
494{
495 // struct comp_data *cd = comp_get_drvdata(dev);
496 struct comp_buffer *source;
497 struct comp_buffer *sink;
498 // int i;
499
500 trace_src("SPp");
501
502#if 1
503 source = list_first_item(&dev->bsource_list, struct comp_buffer,
504 sink_list);
505 sink = list_first_item(&dev->bsink_list, struct comp_buffer,
506 source_list);
507
508 trace_value(source->params.pcm->channels);
509 trace_value(source->params.pcm->rate);
510 trace_value(sink->params.pcm->rate);
511#endif
512
513 //dev->preload = PLAT_INT_PERIODS;
514 dev->state = COMP_STATE_PREPARE;
515 return 0;
516}
517
518static int src_preload(struct comp_dev *dev)
519{
520 //int i;
521 trace_src("SPl");
522
523
524 //for (i = 0; i < dev->preload; i++)
525 // src_copy(dev);
526
527 return 0;
528}
529
530static int src_reset(struct comp_dev *dev)
531{
532 int i;
533 struct comp_data *cd = comp_get_drvdata(dev);
534
535 trace_src("SRe");
536
537 cd->src_func = src_2s_s32_default;
538 for (i = 0; i < PLATFORM_MAX_CHANNELS; i++)
539 src_polyphase_reset(&cd->src[i]);
540
541 dev->state = COMP_STATE_INIT;
542 return 0;
543}
544
545struct comp_driver comp_src = {
546 .type = SOF_COMP_SRC,
547 .ops =
548 {
549 .new = src_new,
550 .free = src_free,
551 .params = src_params,
552 .cmd = src_cmd,
553 .copy = src_copy,
554 .prepare = src_prepare,
555 .reset = src_reset,
556 .preload = src_preload,
557 },
558};
559
560void sys_comp_src_init(void)
561{
562 comp_register(&comp_src);
563}