blob: 6e2a73793a71dab956cf7eddba920edb7eac5ac6 [file] [log] [blame]
Seppo Ingalsuo6a274832017-06-07 14:17:55 +03001/*
2 * Copyright (c) 2017, Intel Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Intel Corporation nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Author: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
29 * Liam Girdwood <liam.r.girdwood@linux.intel.com>
30 * Keyon Jie <yang.jie@linux.intel.com>
31 */
32
33#include <stdint.h>
34#include <stddef.h>
35#include <errno.h>
36#include <reef/reef.h>
37#include <reef/lock.h>
38#include <reef/list.h>
39#include <reef/stream.h>
40#include <reef/alloc.h>
41#include <reef/work.h>
42#include <reef/clock.h>
43#include <reef/audio/component.h>
44#include <reef/audio/pipeline.h>
Liam Girdwood17641522017-06-09 17:27:02 +010045#include <uapi/ipc.h>
Seppo Ingalsuo6a274832017-06-07 14:17:55 +030046#include "src_core.h"
47
48#ifdef MODULE_TEST
49#include <stdio.h>
50#endif
51
52#define trace_src(__e) trace_event(TRACE_CLASS_SRC, __e)
53#define tracev_src(__e) tracev_event(TRACE_CLASS_SRC, __e)
54#define trace_src_error(__e) trace_error(TRACE_CLASS_SRC, __e)
55
56/* src component private data */
57struct comp_data {
58 struct polyphase_src src[PLATFORM_MAX_CHANNELS];
59 int32_t *delay_lines;
60 int scratch_length;
61 //int32_t z[STAGE_BUF_SIZE];
62 void (*src_func)(struct comp_dev *dev,
63 struct comp_buffer *source,
64 struct comp_buffer *sink,
65 uint32_t source_frames,
66 uint32_t sink_frames);
67};
68
69/* Common mute function for 2s and 1s SRC. This preserves the same
70 * buffer consume and produce pattern as normal operation.
71 */
72static void src_muted_s32(struct comp_buffer *source, struct comp_buffer *sink,
73 int blk_in, int blk_out, int nch, int source_frames)
74{
75
76 int i;
77 int32_t *src = (int32_t *) source->r_ptr;
78 int32_t *dest = (int32_t *) sink->w_ptr;
79 int32_t *end = (int32_t *) sink->end_addr;
80 int n_read = 0;
81 int n_max;
82 int n;
83 int n_written = 0;
84
85 for (i = 0; i < source_frames - blk_in + 1; i += blk_in) {
86 n_max = end - dest;
87 n = nch*blk_out;
88 if (n < n_max) {
89 bzero(dest, n * sizeof(int32_t));
90 dest += n;
91 } else {
92 /* Also case n_max == n is done here */
93 bzero(dest, n_max * sizeof(int32_t));
94 dest = (int32_t *) sink->addr;
95 bzero(dest, (n - n_max) * sizeof(int32_t));
96 dest += n - n_max;
97 }
98 n_read += nch*blk_in;
99 n_written += nch*blk_out;
100 }
101 source->r_ptr = src + n_read;
102 sink->w_ptr = dest;
103 comp_wrap_source_r_ptr_circular(source);
104 comp_wrap_sink_w_ptr_circular(sink);
105 comp_update_source_free_avail(source, n_read);
106 comp_update_sink_free_avail(sink, n_written);
107}
108
109/* Fallback function to just output muted samples and advance
110 * pointers. Note that a buffer that is not having integer number of
111 * frames in a period will drift since there is no similar blk in/out
112 * check as for SRC.
113 */
114static void fallback_s32(struct comp_dev *dev,
115 struct comp_buffer *source,
116 struct comp_buffer *sink,
117 uint32_t source_frames,
118 uint32_t sink_frames)
119{
120
121 struct comp_data *cd = comp_get_drvdata(dev);
122 //int32_t *src = (int32_t*) source->r_ptr;
123 //int32_t *dest = (int32_t*) sink->w_ptr;
124 int nch = sink->params.pcm->channels;
125 int blk_in = cd->src[0].blk_in;
126 int blk_out = cd->src[0].blk_out;
127
128 src_muted_s32(source, sink, blk_in, blk_out, nch, source_frames);
129
130}
131
132/* Normal 2 stage SRC */
133static void src_2s_s32_default(struct comp_dev *dev,
134 struct comp_buffer *source, struct comp_buffer *sink,
135 uint32_t source_frames, uint32_t sink_frames)
136{
137 int i, j;
138 struct polyphase_src *s;
139 struct comp_data *cd = comp_get_drvdata(dev);
140 int blk_in = cd->src[0].blk_in;
141 int blk_out = cd->src[0].blk_out;
142 int n_times1 = cd->src[0].stage1_times;
143 int n_times2 = cd->src[0].stage2_times;
144 int nch = sink->params.pcm->channels;
145 int32_t *dest = (int32_t *) sink->w_ptr;
146 int32_t *src = (int32_t *) source->r_ptr;
147 struct src_stage_prm s1, s2;
148 int n_read = 0;
149 int n_written = 0;
150
151 if (cd->src[0].mute) {
152 src_muted_s32(source, sink, blk_in, blk_out, nch, source_frames);
153 return;
154 }
155
156 s1.times = n_times1;
157 s1.x_end_addr = source->end_addr;
158 s1.x_size = source->alloc_size;
159 s1.x_inc = nch;
160 s1.y_end_addr = &cd->delay_lines[cd->scratch_length];
161 s1.y_size = STAGE_BUF_SIZE * sizeof(int32_t);
162 s1.y_inc = 1;
163
164 s2.times = n_times2;
165 s2.x_end_addr = &cd->delay_lines[cd->scratch_length];
166 s2.x_size = STAGE_BUF_SIZE * sizeof(int32_t);
167 s2.x_inc = 1;
168 s2.y_end_addr = sink->end_addr;
169 s2.y_size = sink->alloc_size;
170 s2.y_inc = nch;
171
172 for (j = 0; j < nch; j++) {
173 s = &cd->src[j]; /* Point to src[] for this channel */
174 s1.x_rptr = src++;
175 s2.y_wptr = dest++;
176 s1.state = &s->state1;
177 s1.stage = s->stage1;
178 s2.state = &s->state2;
179 s2.stage = s->stage2;
180
181 for (i = 0; i < source_frames - blk_in + 1; i += blk_in) {
182 /* Reset output to buffer start, read interleaved */
183 s1.y_wptr = cd->delay_lines;
184 src_polyphase_stage_cir(&s1);
185 s2.x_rptr = cd->delay_lines;
186 src_polyphase_stage_cir(&s2);
187
188 n_read += blk_in;
189 n_written += blk_out;
190 }
191 }
192 source->r_ptr = s1.x_rptr - nch + 1;
193 sink->w_ptr = s2.y_wptr - nch + 1;
194 comp_wrap_source_r_ptr_circular(source);
195 comp_wrap_sink_w_ptr_circular(sink);
196 comp_update_source_free_avail(source, n_read);
197 comp_update_sink_free_avail(sink, n_written);
198}
199
200/* 1 stage SRC for simple conversions */
201static void src_1s_s32_default(struct comp_dev *dev,
202 struct comp_buffer *source, struct comp_buffer *sink,
203 uint32_t source_frames, uint32_t sink_frames)
204{
205 int i, j;
206 //int32_t *xp, *yp;
207 struct polyphase_src *s;
208
209 struct comp_data *cd = comp_get_drvdata(dev);
210 int blk_in = cd->src[0].blk_in;
211 int blk_out = cd->src[0].blk_out;
212 int n_times = cd->src[0].stage1_times;
213 int nch = sink->params.pcm->channels;
214 int32_t *dest = (int32_t*) sink->w_ptr;
215 int32_t *src = (int32_t*) source->r_ptr;
216 int n_read = 0;
217 int n_written = 0;
218 struct src_stage_prm s1;
219
220 if (cd->src[0].mute) {
221 src_muted_s32(source, sink, blk_in, blk_out, nch, source_frames);
222 return;
223 }
224
225 s1.times = n_times;
226 s1.x_end_addr = source->end_addr;
227 s1.x_size = source->alloc_size;
228 s1.x_inc = nch;
229 s1.y_end_addr = sink->end_addr;
230 s1.y_size = sink->alloc_size;
231 s1.y_inc = nch;
232
233 for (j = 0; j < nch; j++) {
234 s = &cd->src[j]; /* Point to src for this channel */
235 s1.x_rptr = src++;
236 s1.y_wptr = dest++;
237 s1.state = &s->state1;
238 s1.stage = s->stage1;
239
240 for (i = 0; i + blk_in - 1 < source_frames; i += blk_in) {
241 src_polyphase_stage_cir(&s1);
242
243 n_read += blk_in;
244 n_written += blk_out;
245 }
246
247 }
248 source->r_ptr = s1.x_rptr - nch + 1;
249 sink->w_ptr = s1.y_wptr - nch + 1;
250
251 comp_wrap_source_r_ptr_circular(source);
252 comp_wrap_sink_w_ptr_circular(sink);
253 comp_update_source_free_avail(source, n_read);
254 comp_update_sink_free_avail(sink, n_written);
255}
256
257static struct comp_dev *src_new(struct sof_ipc_comp *comp)
258{
259 int i;
260 struct comp_dev *dev;
261 struct comp_data *cd;
262
263 trace_src("SNw");
Liam Girdwood17641522017-06-09 17:27:02 +0100264 dev = rmalloc(RZONE_RUNTIME, RFLAGS_NONE,
265 COMP_SIZE(struct sof_ipc_comp_src));
Seppo Ingalsuo6a274832017-06-07 14:17:55 +0300266 if (dev == NULL)
267 return NULL;
268
269 memcpy(&dev->comp, comp, sizeof(struct sof_ipc_comp_src));
270
271 cd = rmalloc(RZONE_RUNTIME, RFLAGS_NONE, sizeof(*cd));
272 if (cd == NULL) {
273#if SRC_SOF == 1
274 rfree(dev);
275#else
276 rfree(dev);
277#endif
278 return NULL;
279 }
280
281 comp_set_drvdata(dev, cd);
282#if SRC_SOF == 0
283
284#endif
285
286 cd->delay_lines = NULL;
287 cd->src_func = src_2s_s32_default;
288 for (i = 0; i < PLATFORM_MAX_CHANNELS; i++)
289 src_polyphase_reset(&cd->src[i]);
290
291 return dev;
292}
293
294static void src_free(struct comp_dev *dev)
295{
296 struct comp_data *cd = comp_get_drvdata(dev);
297
298 trace_src("SFr");
299
300#if SRC_SOF == 1
301 /* Free dynamically reserved buffers for SRC algorithm */
302 if (cd->delay_lines != NULL)
303 rfree(cd->delay_lines);
304
305 rfree(cd);
306 rfree(dev);
307#else
308 /* Free dynamically reserved buffers for SRC algorithm */
309 if (cd->delay_lines != NULL)
310 rfree(cd->delay_lines);
311
312 rfree(cd);
313 rfree(dev);
314#endif
315}
316
317/* set component audio stream parameters */
318static int src_params(struct comp_dev *dev, struct stream_params *params)
319{
320 int i;
321 struct comp_buffer *source, *sink;
322 struct src_alloc need;
323 size_t delay_lines_size;
324 int32_t *buffer_start;
325 int n = 0;
326 struct comp_data *cd = comp_get_drvdata(dev);
327
328 trace_src("SPa");
329
330 /* SRC supports only S32_LE PCM format */
331 if ((params->type != STREAM_TYPE_PCM)
332 || (params->pcm->frame_fmt != SOF_IPC_FRAME_S32_LE))
333 return -EINVAL;
334
335 /* No data transformation */
336 comp_set_sink_params(dev, params);
337
338 /* Allocate needed memory for delay lines */
339 source = list_first_item(&dev->bsource_list, struct comp_buffer,
340 sink_list);
341 sink = list_first_item(&dev->bsink_list, struct comp_buffer,
342 source_list);
343 src_buffer_lengths(&need, source->params.pcm->rate,
344 sink->params.pcm->rate, source->params.pcm->channels);
345 delay_lines_size = sizeof(int32_t) * need.total;
346 if (cd->delay_lines != NULL)
347 rfree(cd->delay_lines);
348
349 cd->delay_lines = rmalloc(RZONE_RUNTIME, RFLAGS_NONE, delay_lines_size);
350 if (cd->delay_lines == NULL)
351 return -EINVAL;
352
353 /* Clear all delay lines here */
354 memset(cd->delay_lines, 0, delay_lines_size);
355 cd->scratch_length = need.scratch;
356 buffer_start = cd->delay_lines + need.scratch;
357
358 /* Initize SRC for actual sample rate */
359 for (i = 0; i < source->params.pcm->channels; i++) {
360 n = src_polyphase_init(&cd->src[i], source->params.pcm->rate,
361 sink->params.pcm->rate, buffer_start);
362 buffer_start += need.single_src;
363 }
364
365 switch (n) {
366 case 1:
367 cd->src_func = src_1s_s32_default; /* Simpler 1 stage SRC */
368 break;
369 case 2:
370 cd->src_func = src_2s_s32_default; /* Default 2 stage SRC */
371 break;
372 default:
373 /* This is possibly due to missing coefficients for
374 * requested rates combination. Sink audio will be
375 * muted if copy() is run.
376 */
377 trace_src("SFa");
378 cd->src_func = fallback_s32;
379 return(-EINVAL);
380 break;
381 }
382
383 /* Check that src blk_in and blk_out are less than params.period_frames.
384 * Return an error if the period is too short.
385 */
386 if (src_polyphase_get_blk_in(&cd->src[0]) > source->params.pcm->period_count)
387 return(-EINVAL);
388
389 if (src_polyphase_get_blk_out(&cd->src[0]) > sink->params.pcm->period_count)
390 return(-EINVAL);
391
392
393 return 0;
394}
395
396/* used to pass standard and bespoke commands (with data) to component */
397static int src_cmd(struct comp_dev *dev, int cmd, void *data)
398{
399 trace_src("SCm");
400 struct comp_data *cd = comp_get_drvdata(dev);
401 struct sof_ipc_comp_src *cv;
402 int i;
403
404 switch (cmd) {
405 case COMP_CMD_SRC:
406 trace_src("SMa");
407 cv = (struct sof_ipc_comp_src *) data;
408 cv->in_mask = src_input_rates();
409 cv->out_mask = src_output_rates();
410 break;
411 case COMP_CMD_MUTE:
412 trace_src("SMu");
413 for (i = 0; i < PLATFORM_MAX_CHANNELS; i++)
414 src_polyphase_mute(&cd->src[i]);
415
416 break;
417 case COMP_CMD_UNMUTE:
418 trace_src("SUm");
419 for (i = 0; i < PLATFORM_MAX_CHANNELS; i++)
420 src_polyphase_unmute(&cd->src[i]);
421
422 break;
423 case COMP_CMD_START:
424 trace_src("SSt");
425 dev->state = COMP_STATE_RUNNING;
426 break;
427 case COMP_CMD_STOP:
428 trace_src("SSp");
429 if (dev->state == COMP_STATE_RUNNING ||
430 dev->state == COMP_STATE_DRAINING ||
431 dev->state == COMP_STATE_PAUSED) {
432 comp_buffer_reset(dev);
433 dev->state = COMP_STATE_SETUP;
434 }
435 break;
436 case COMP_CMD_PAUSE:
437 trace_src("SPe");
438 /* only support pausing for running */
439 if (dev->state == COMP_STATE_RUNNING)
440 dev->state = COMP_STATE_PAUSED;
441
442 break;
443 case COMP_CMD_RELEASE:
444 trace_src("SRl");
445 dev->state = COMP_STATE_RUNNING;
446 break;
447 default:
448 trace_src("SDf");
449 break;
450 }
451
452 return 0;
453}
454
455/* copy and process stream data from source to sink buffers */
456static int src_copy(struct comp_dev *dev)
457{
458 struct comp_data *cd = comp_get_drvdata(dev);
459 struct comp_buffer *source;
460 struct comp_buffer *sink;
461 uint32_t frames_source;
462 uint32_t frames_sink;
463 int need_source, need_sink, min_frames;
464
465 trace_comp("SRC");
466
467 /* src component needs 1 source and 1 sink buffer */
468 source = list_first_item(&dev->bsource_list, struct comp_buffer,
469 sink_list);
470 sink = list_first_item(&dev->bsink_list, struct comp_buffer,
471 source_list);
472
473 /* Check that source has enough frames available and sink enough
474 * frames free.
475 */
476 frames_source = source->params.pcm->period_count;
477 frames_sink = sink->params.pcm->period_count;
478 min_frames = src_polyphase_get_blk_in(&cd->src[0]);
479 if (frames_source > min_frames)
480 need_source = frames_source * source->params.pcm->frame_size;
481 else {
482 frames_source = min_frames;
483 need_source = min_frames * source->params.pcm->frame_size;
484 }
485
486 min_frames = src_polyphase_get_blk_out(&cd->src[0]);
487 if (frames_sink > min_frames)
488 need_sink = frames_sink * sink->params.pcm->frame_size;
489 else {
490 frames_sink = min_frames;
491 need_sink = min_frames * sink->params.pcm->frame_size;
492 }
493
494 /* Run as many times as buffers allow */
495 while ((source->avail >= need_source) && (sink->free >= need_sink)) {
496 /* Run src */
497 cd->src_func(dev, source, sink, frames_source, frames_sink);
498
499 }
500
501 return 0;
502}
503
504static int src_prepare(struct comp_dev *dev)
505{
506 // struct comp_data *cd = comp_get_drvdata(dev);
507 struct comp_buffer *source;
508 struct comp_buffer *sink;
509 // int i;
510
511 trace_src("SPp");
512
513#if 1
514 source = list_first_item(&dev->bsource_list, struct comp_buffer,
515 sink_list);
516 sink = list_first_item(&dev->bsink_list, struct comp_buffer,
517 source_list);
518
519 trace_value(source->params.pcm->channels);
520 trace_value(source->params.pcm->rate);
521 trace_value(sink->params.pcm->rate);
522#endif
523
524 //dev->preload = PLAT_INT_PERIODS;
525 dev->state = COMP_STATE_PREPARE;
526 return 0;
527}
528
529static int src_preload(struct comp_dev *dev)
530{
531 //int i;
532 trace_src("SPl");
533
534
535 //for (i = 0; i < dev->preload; i++)
536 // src_copy(dev);
537
538 return 0;
539}
540
541static int src_reset(struct comp_dev *dev)
542{
543 int i;
544 struct comp_data *cd = comp_get_drvdata(dev);
545
546 trace_src("SRe");
547
548 cd->src_func = src_2s_s32_default;
549 for (i = 0; i < PLATFORM_MAX_CHANNELS; i++)
550 src_polyphase_reset(&cd->src[i]);
551
552 dev->state = COMP_STATE_INIT;
553 return 0;
554}
555
556struct comp_driver comp_src = {
557 .type = SOF_COMP_SRC,
558 .ops =
559 {
560 .new = src_new,
561 .free = src_free,
562 .params = src_params,
563 .cmd = src_cmd,
564 .copy = src_copy,
565 .prepare = src_prepare,
566 .reset = src_reset,
567 .preload = src_preload,
568 },
569};
570
571void sys_comp_src_init(void)
572{
573 comp_register(&comp_src);
574}