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Paolo Bonzini7a39e722012-08-06 13:15:06 +02001// AMD PCscsi boot support.
2//
3// Copyright (C) 2012 Red Hat Inc.
4//
5// Authors:
6// Paolo Bonzini <pbonzini@redhat.com>
7//
8// based on lsi-scsi.c which is written by:
9// Gerd Hoffman <kraxel@redhat.com>
10//
11// This file may be distributed under the terms of the GNU LGPLv3 license.
12
13#include "util.h" // dprintf
14#include "pci.h" // foreachpci
15#include "config.h" // CONFIG_*
16#include "biosvar.h" // GET_GLOBAL
17#include "pci_ids.h" // PCI_DEVICE_ID
18#include "pci_regs.h" // PCI_VENDOR_ID
19#include "boot.h" // bootprio_find_scsi_device
Kevin O'Connord83c87b2013-01-21 01:14:12 -050020#include "blockcmd.h" // scsi_drive_setup
Paolo Bonzini7a39e722012-08-06 13:15:06 +020021#include "disk.h"
22
23#define ESP_TCLO 0x00
24#define ESP_TCMID 0x04
25#define ESP_FIFO 0x08
26#define ESP_CMD 0x0c
27#define ESP_WBUSID 0x10
28#define ESP_TCHI 0x38
29
30#define ESP_RSTAT 0x10
31#define ESP_RINTR 0x14
32#define ESP_RFLAGS 0x1c
33
34#define ESP_DMA_CMD 0x40
35#define ESP_DMA_STC 0x44
36#define ESP_DMA_SPA 0x48
37#define ESP_DMA_WBC 0x4c
38#define ESP_DMA_WAC 0x50
39#define ESP_DMA_STAT 0x54
40#define ESP_DMA_SMDLA 0x58
41#define ESP_DMA_WMAC 0x58c
42
43#define ESP_CMD_DMA 0x80
44#define ESP_CMD_RESET 0x02
45#define ESP_CMD_TI 0x10
46#define ESP_CMD_ICCS 0x11
47#define ESP_CMD_SELATN 0x42
48
49#define ESP_STAT_DI 0x01
50#define ESP_STAT_CD 0x02
51#define ESP_STAT_MSG 0x04
52#define ESP_STAT_TC 0x10
53
54#define ESP_INTR_DC 0x20
55
56struct esp_lun_s {
57 struct drive_s drive;
58 struct pci_device *pci;
59 u32 iobase;
60 u8 target;
61 u8 lun;
62};
63
64static void
65esp_scsi_dma(u32 iobase, u32 buf, u32 len, int read)
66{
67 outb(len & 0xff, iobase + ESP_TCLO);
68 outb((len >> 8) & 0xff, iobase + ESP_TCMID);
69 outb((len >> 16) & 0xff, iobase + ESP_TCHI);
70 outl(buf, iobase + ESP_DMA_SPA);
71 outl(len, iobase + ESP_DMA_STC);
72 outb(read ? 0x83 : 0x03, iobase + ESP_DMA_CMD);
73}
74
75static int
76esp_scsi_cmd(struct esp_lun_s *llun, struct disk_op_s *op,
77 u8 *cdbcmd, u16 target, u16 lun, u16 blocksize)
78{
79 u32 iobase = GET_GLOBAL(llun->iobase);
80 int i, state;
81 u8 status;
82
83 outb(target, iobase + ESP_WBUSID);
84
85 /*
86 * We need to pass the LUN at the beginning of the command, and the FIFO
87 * is only 16 bytes, so we cannot support 16-byte CDBs. The alternative
88 * would be to use DMA for the 17-byte command too, which is quite
89 * overkill.
90 */
91 outb(lun, iobase + ESP_FIFO);
92 cdbcmd[1] &= 0x1f;
93 cdbcmd[1] |= lun << 5;
94 for (i = 0; i < 12; i++)
95 outb(cdbcmd[i], iobase + ESP_FIFO);
96 outb(ESP_CMD_SELATN, iobase + ESP_CMD);
97
98 for (state = 0;;) {
99 u8 stat = inb(iobase + ESP_RSTAT);
100
101 /* Detect disconnected device. */
102 if (state == 0 && (inb(iobase + ESP_RINTR) & ESP_INTR_DC)) {
103 return DISK_RET_ENOTREADY;
104 }
105
106 /* HBA reads command, clears CD, sets TC -> do DMA if needed. */
107 if (state == 0 && (stat & ESP_STAT_TC)) {
108 state++;
109 if (op->count && blocksize) {
110 /* Data phase. */
111 u32 count = (u32)op->count * blocksize;
112 esp_scsi_dma(iobase, (u32)op->buf_fl, count,
113 cdb_is_read(cdbcmd, blocksize));
114 outb(ESP_CMD_TI | ESP_CMD_DMA, iobase + ESP_CMD);
115 continue;
116 }
117 }
118
119 /* At end of DMA TC is set again -> complete command. */
120 if (state == 1 && (stat & ESP_STAT_TC)) {
121 state++;
122 outb(ESP_CMD_ICCS, iobase + ESP_CMD);
123 continue;
124 }
125
126 /* Finally read data from the message in phase. */
127 if (state == 2 && (stat & ESP_STAT_MSG)) {
128 state++;
129 status = inb(iobase + ESP_FIFO);
130 inb(iobase + ESP_FIFO);
131 break;
132 }
133 usleep(5);
134 }
135
136 if (status == 0) {
137 return DISK_RET_SUCCESS;
138 }
139
140 return DISK_RET_EBADTRACK;
141}
142
143int
144esp_scsi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
145{
146 if (!CONFIG_ESP_SCSI)
147 return DISK_RET_EBADTRACK;
148
149 struct esp_lun_s *llun =
150 container_of(op->drive_g, struct esp_lun_s, drive);
151
152 return esp_scsi_cmd(llun, op, cdbcmd,
153 GET_GLOBAL(llun->target), GET_GLOBAL(llun->lun),
154 blocksize);
155}
156
157static int
158esp_scsi_add_lun(struct pci_device *pci, u32 iobase, u8 target, u8 lun)
159{
160 struct esp_lun_s *llun = malloc_fseg(sizeof(*llun));
161 if (!llun) {
162 warn_noalloc();
163 return -1;
164 }
165 memset(llun, 0, sizeof(*llun));
166 llun->drive.type = DTYPE_ESP_SCSI;
167 llun->drive.cntl_id = pci->bdf;
168 llun->pci = pci;
169 llun->target = target;
170 llun->lun = lun;
171 llun->iobase = iobase;
172
173 char *name = znprintf(16, "esp %02x:%02x.%x %d:%d",
174 pci_bdf_to_bus(pci->bdf), pci_bdf_to_dev(pci->bdf),
175 pci_bdf_to_fn(pci->bdf), target, lun);
176 int prio = bootprio_find_scsi_device(pci, target, lun);
Kevin O'Connord83c87b2013-01-21 01:14:12 -0500177 int ret = scsi_drive_setup(&llun->drive, name, prio);
Paolo Bonzini7a39e722012-08-06 13:15:06 +0200178 free(name);
179 if (ret)
180 goto fail;
181 return 0;
182
183fail:
184 free(llun);
185 return -1;
186}
187
188static void
189esp_scsi_scan_target(struct pci_device *pci, u32 iobase, u8 target)
190{
191 esp_scsi_add_lun(pci, iobase, target, 0);
192}
193
194static void
195init_esp_scsi(struct pci_device *pci)
196{
197 u16 bdf = pci->bdf;
198 u32 iobase = pci_config_readl(pci->bdf, PCI_BASE_ADDRESS_0)
199 & PCI_BASE_ADDRESS_IO_MASK;
200
201 dprintf(1, "found esp at %02x:%02x.%x, io @ %x\n",
202 pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf),
203 pci_bdf_to_fn(bdf), iobase);
204
Paolo Bonzini68513ab2012-11-20 18:33:41 +0100205 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
206
Paolo Bonzini7a39e722012-08-06 13:15:06 +0200207 // reset
208 outb(ESP_CMD_RESET, iobase + ESP_CMD);
209
210 int i;
211 for (i = 0; i <= 7; i++)
212 esp_scsi_scan_target(pci, iobase, i);
213
214 return;
215}
216
217void
218esp_scsi_setup(void)
219{
220 ASSERT32FLAT();
221 if (!CONFIG_ESP_SCSI)
222 return;
223
224 dprintf(3, "init esp\n");
225
226 struct pci_device *pci;
227 foreachpci(pci) {
228 if (pci->vendor != PCI_VENDOR_ID_AMD
229 || pci->device != PCI_DEVICE_ID_AMD_SCSI)
230 continue;
231 init_esp_scsi(pci);
232 }
233}