blob: 1a1c6fb90c0a7bd052c34e74888e5b9bd026ff84 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040027#include "qemu-common.h"
Paolo Bonzini00f6da62016-03-15 13:16:36 +010028#include "exec/cpu-common.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029#include "tcg-op.h"
30
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040031#define CASE_OP_32_64(x) \
32 glue(glue(case INDEX_op_, x), _i32): \
33 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040034
Kirill Batuzov22613af2011-07-07 16:37:13 +040035struct tcg_temp_info {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020036 bool is_const;
Kirill Batuzov22613af2011-07-07 16:37:13 +040037 uint16_t prev_copy;
38 uint16_t next_copy;
39 tcg_target_ulong val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080040 tcg_target_ulong mask;
Kirill Batuzov22613af2011-07-07 16:37:13 +040041};
42
43static struct tcg_temp_info temps[TCG_MAX_TEMPS];
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020044static TCGTempSet temps_used;
Kirill Batuzov22613af2011-07-07 16:37:13 +040045
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020046static inline bool temp_is_const(TCGArg arg)
47{
Aurelien Jarnob41059d2015-07-27 12:41:44 +020048 return temps[arg].is_const;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020049}
50
51static inline bool temp_is_copy(TCGArg arg)
52{
Aurelien Jarnob41059d2015-07-27 12:41:44 +020053 return temps[arg].next_copy != arg;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020054}
55
Aurelien Jarnob41059d2015-07-27 12:41:44 +020056/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +020057static void reset_temp(TCGArg temp)
Kirill Batuzov22613af2011-07-07 16:37:13 +040058{
Aurelien Jarnob41059d2015-07-27 12:41:44 +020059 temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy;
60 temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy;
61 temps[temp].next_copy = temp;
62 temps[temp].prev_copy = temp;
63 temps[temp].is_const = false;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080064 temps[temp].mask = -1;
Kirill Batuzov22613af2011-07-07 16:37:13 +040065}
66
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020067/* Reset all temporaries, given that there are NB_TEMPS of them. */
68static void reset_all_temps(int nb_temps)
69{
70 bitmap_zero(temps_used.l, nb_temps);
71}
72
73/* Initialize and activate a temporary. */
74static void init_temp_info(TCGArg temp)
75{
76 if (!test_bit(temp, temps_used.l)) {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020077 temps[temp].next_copy = temp;
78 temps[temp].prev_copy = temp;
79 temps[temp].is_const = false;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020080 temps[temp].mask = -1;
81 set_bit(temp, temps_used.l);
82 }
83}
84
Blue Swirlfe0de7a2011-07-30 19:18:32 +000085static int op_bits(TCGOpcode op)
Kirill Batuzov22613af2011-07-07 16:37:13 +040086{
Richard Henderson8399ad52011-08-17 14:11:45 -070087 const TCGOpDef *def = &tcg_op_defs[op];
88 return def->flags & TCG_OPF_64BIT ? 64 : 32;
Kirill Batuzov22613af2011-07-07 16:37:13 +040089}
90
Richard Hendersona62f6f52014-05-22 10:59:12 -070091static TCGOpcode op_to_mov(TCGOpcode op)
92{
93 switch (op_bits(op)) {
94 case 32:
95 return INDEX_op_mov_i32;
96 case 64:
97 return INDEX_op_mov_i64;
98 default:
99 fprintf(stderr, "op_to_mov: unexpected return value of "
100 "function op_bits.\n");
101 tcg_abort();
102 }
103}
104
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000105static TCGOpcode op_to_movi(TCGOpcode op)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400106{
107 switch (op_bits(op)) {
108 case 32:
109 return INDEX_op_movi_i32;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400110 case 64:
111 return INDEX_op_movi_i64;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400112 default:
113 fprintf(stderr, "op_to_movi: unexpected return value of "
114 "function op_bits.\n");
115 tcg_abort();
116 }
117}
118
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200119static TCGArg find_better_copy(TCGContext *s, TCGArg temp)
120{
121 TCGArg i;
122
123 /* If this is already a global, we can't do better. */
124 if (temp < s->nb_globals) {
125 return temp;
126 }
127
128 /* Search for a global first. */
129 for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) {
130 if (i < s->nb_globals) {
131 return i;
132 }
133 }
134
135 /* If it is a temp, search for a temp local. */
136 if (!s->temps[temp].temp_local) {
137 for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) {
138 if (s->temps[i].temp_local) {
139 return i;
140 }
141 }
142 }
143
144 /* Failure to find a better representation, return the same temp. */
145 return temp;
146}
147
148static bool temps_are_copies(TCGArg arg1, TCGArg arg2)
149{
150 TCGArg i;
151
152 if (arg1 == arg2) {
153 return true;
154 }
155
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200156 if (!temp_is_copy(arg1) || !temp_is_copy(arg2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200157 return false;
158 }
159
160 for (i = temps[arg1].next_copy ; i != arg1 ; i = temps[i].next_copy) {
161 if (i == arg2) {
162 return true;
163 }
164 }
165
166 return false;
167}
168
Richard Hendersonacd93702016-12-08 12:28:42 -0800169static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200170{
171 TCGOpcode new_op = op_to_movi(op->opc);
172 tcg_target_ulong mask;
173
174 op->opc = new_op;
175
176 reset_temp(dst);
Aurelien Jarnob41059d2015-07-27 12:41:44 +0200177 temps[dst].is_const = true;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200178 temps[dst].val = val;
179 mask = val;
Aurelien Jarno96152122015-07-10 18:03:30 +0200180 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200181 /* High bits of the destination are now garbage. */
182 mask |= ~0xffffffffull;
183 }
184 temps[dst].mask = mask;
185
Richard Hendersonacd93702016-12-08 12:28:42 -0800186 op->args[0] = dst;
187 op->args[1] = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200188}
189
Richard Hendersonacd93702016-12-08 12:28:42 -0800190static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400191{
Aurelien Jarno53657182015-06-04 21:53:25 +0200192 if (temps_are_copies(dst, src)) {
193 tcg_op_remove(s, op);
194 return;
195 }
196
Aurelien Jarno8d6a9162015-06-04 21:53:24 +0200197 TCGOpcode new_op = op_to_mov(op->opc);
Richard Henderson24666ba2014-05-22 11:14:10 -0700198 tcg_target_ulong mask;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700199
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700200 op->opc = new_op;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700201
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800202 reset_temp(dst);
Richard Henderson24666ba2014-05-22 11:14:10 -0700203 mask = temps[src].mask;
204 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
205 /* High bits of the destination are now garbage. */
206 mask |= ~0xffffffffull;
207 }
208 temps[dst].mask = mask;
209
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800210 if (s->temps[src].type == s->temps[dst].type) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800211 temps[dst].next_copy = temps[src].next_copy;
212 temps[dst].prev_copy = src;
213 temps[temps[dst].next_copy].prev_copy = dst;
214 temps[src].next_copy = dst;
Aurelien Jarno299f8012015-07-27 12:41:44 +0200215 temps[dst].is_const = temps[src].is_const;
216 temps[dst].val = temps[src].val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800217 }
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200218
Richard Hendersonacd93702016-12-08 12:28:42 -0800219 op->args[0] = dst;
220 op->args[1] = src;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400221}
222
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000223static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400224{
Richard Henderson03271522013-08-14 14:35:56 -0700225 uint64_t l64, h64;
226
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400227 switch (op) {
228 CASE_OP_32_64(add):
229 return x + y;
230
231 CASE_OP_32_64(sub):
232 return x - y;
233
234 CASE_OP_32_64(mul):
235 return x * y;
236
Kirill Batuzov9a810902011-07-07 16:37:15 +0400237 CASE_OP_32_64(and):
238 return x & y;
239
240 CASE_OP_32_64(or):
241 return x | y;
242
243 CASE_OP_32_64(xor):
244 return x ^ y;
245
Kirill Batuzov55c09752011-07-07 16:37:16 +0400246 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700247 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400248
Kirill Batuzov55c09752011-07-07 16:37:16 +0400249 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700250 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400251
252 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700253 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400254
Kirill Batuzov55c09752011-07-07 16:37:16 +0400255 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700256 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400257
258 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700259 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400260
Kirill Batuzov55c09752011-07-07 16:37:16 +0400261 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700262 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400263
264 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700265 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400266
Kirill Batuzov55c09752011-07-07 16:37:16 +0400267 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700268 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400269
270 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700271 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400272
Kirill Batuzov55c09752011-07-07 16:37:16 +0400273 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700274 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400275
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700276 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400277 return ~x;
278
Richard Hendersoncb25c802011-08-17 14:11:47 -0700279 CASE_OP_32_64(neg):
280 return -x;
281
282 CASE_OP_32_64(andc):
283 return x & ~y;
284
285 CASE_OP_32_64(orc):
286 return x | ~y;
287
288 CASE_OP_32_64(eqv):
289 return ~(x ^ y);
290
291 CASE_OP_32_64(nand):
292 return ~(x & y);
293
294 CASE_OP_32_64(nor):
295 return ~(x | y);
296
Richard Henderson0e28d002016-11-16 09:23:28 +0100297 case INDEX_op_clz_i32:
298 return (uint32_t)x ? clz32(x) : y;
299
300 case INDEX_op_clz_i64:
301 return x ? clz64(x) : y;
302
303 case INDEX_op_ctz_i32:
304 return (uint32_t)x ? ctz32(x) : y;
305
306 case INDEX_op_ctz_i64:
307 return x ? ctz64(x) : y;
308
Richard Hendersona768e4e2016-11-21 11:13:39 +0100309 case INDEX_op_ctpop_i32:
310 return ctpop32(x);
311
312 case INDEX_op_ctpop_i64:
313 return ctpop64(x);
314
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700315 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400316 return (int8_t)x;
317
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700318 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400319 return (int16_t)x;
320
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700321 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400322 return (uint8_t)x;
323
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700324 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400325 return (uint16_t)x;
326
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200327 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400328 case INDEX_op_ext32s_i64:
329 return (int32_t)x;
330
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200331 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700332 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400333 case INDEX_op_ext32u_i64:
334 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400335
Richard Henderson609ad702015-07-24 07:16:00 -0700336 case INDEX_op_extrh_i64_i32:
337 return (uint64_t)x >> 32;
338
Richard Henderson03271522013-08-14 14:35:56 -0700339 case INDEX_op_muluh_i32:
340 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
341 case INDEX_op_mulsh_i32:
342 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
343
344 case INDEX_op_muluh_i64:
345 mulu64(&l64, &h64, x, y);
346 return h64;
347 case INDEX_op_mulsh_i64:
348 muls64(&l64, &h64, x, y);
349 return h64;
350
Richard Henderson01547f72013-08-14 15:22:46 -0700351 case INDEX_op_div_i32:
352 /* Avoid crashing on divide by zero, otherwise undefined. */
353 return (int32_t)x / ((int32_t)y ? : 1);
354 case INDEX_op_divu_i32:
355 return (uint32_t)x / ((uint32_t)y ? : 1);
356 case INDEX_op_div_i64:
357 return (int64_t)x / ((int64_t)y ? : 1);
358 case INDEX_op_divu_i64:
359 return (uint64_t)x / ((uint64_t)y ? : 1);
360
361 case INDEX_op_rem_i32:
362 return (int32_t)x % ((int32_t)y ? : 1);
363 case INDEX_op_remu_i32:
364 return (uint32_t)x % ((uint32_t)y ? : 1);
365 case INDEX_op_rem_i64:
366 return (int64_t)x % ((int64_t)y ? : 1);
367 case INDEX_op_remu_i64:
368 return (uint64_t)x % ((uint64_t)y ? : 1);
369
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400370 default:
371 fprintf(stderr,
372 "Unrecognized operation %d in do_constant_folding.\n", op);
373 tcg_abort();
374 }
375}
376
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000377static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400378{
379 TCGArg res = do_constant_folding_2(op, x, y);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400380 if (op_bits(op) == 32) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200381 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400382 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400383 return res;
384}
385
Richard Henderson9519da72012-10-02 11:32:26 -0700386static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
387{
388 switch (c) {
389 case TCG_COND_EQ:
390 return x == y;
391 case TCG_COND_NE:
392 return x != y;
393 case TCG_COND_LT:
394 return (int32_t)x < (int32_t)y;
395 case TCG_COND_GE:
396 return (int32_t)x >= (int32_t)y;
397 case TCG_COND_LE:
398 return (int32_t)x <= (int32_t)y;
399 case TCG_COND_GT:
400 return (int32_t)x > (int32_t)y;
401 case TCG_COND_LTU:
402 return x < y;
403 case TCG_COND_GEU:
404 return x >= y;
405 case TCG_COND_LEU:
406 return x <= y;
407 case TCG_COND_GTU:
408 return x > y;
409 default:
410 tcg_abort();
411 }
412}
413
414static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
415{
416 switch (c) {
417 case TCG_COND_EQ:
418 return x == y;
419 case TCG_COND_NE:
420 return x != y;
421 case TCG_COND_LT:
422 return (int64_t)x < (int64_t)y;
423 case TCG_COND_GE:
424 return (int64_t)x >= (int64_t)y;
425 case TCG_COND_LE:
426 return (int64_t)x <= (int64_t)y;
427 case TCG_COND_GT:
428 return (int64_t)x > (int64_t)y;
429 case TCG_COND_LTU:
430 return x < y;
431 case TCG_COND_GEU:
432 return x >= y;
433 case TCG_COND_LEU:
434 return x <= y;
435 case TCG_COND_GTU:
436 return x > y;
437 default:
438 tcg_abort();
439 }
440}
441
442static bool do_constant_folding_cond_eq(TCGCond c)
443{
444 switch (c) {
445 case TCG_COND_GT:
446 case TCG_COND_LTU:
447 case TCG_COND_LT:
448 case TCG_COND_GTU:
449 case TCG_COND_NE:
450 return 0;
451 case TCG_COND_GE:
452 case TCG_COND_GEU:
453 case TCG_COND_LE:
454 case TCG_COND_LEU:
455 case TCG_COND_EQ:
456 return 1;
457 default:
458 tcg_abort();
459 }
460}
461
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200462/* Return 2 if the condition can't be simplified, and the result
463 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200464static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
465 TCGArg y, TCGCond c)
466{
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200467 if (temp_is_const(x) && temp_is_const(y)) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200468 switch (op_bits(op)) {
469 case 32:
Richard Henderson9519da72012-10-02 11:32:26 -0700470 return do_constant_folding_cond_32(temps[x].val, temps[y].val, c);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200471 case 64:
Richard Henderson9519da72012-10-02 11:32:26 -0700472 return do_constant_folding_cond_64(temps[x].val, temps[y].val, c);
473 default:
474 tcg_abort();
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200475 }
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200476 } else if (temps_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700477 return do_constant_folding_cond_eq(c);
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200478 } else if (temp_is_const(y) && temps[y].val == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200479 switch (c) {
480 case TCG_COND_LTU:
481 return 0;
482 case TCG_COND_GEU:
483 return 1;
484 default:
485 return 2;
486 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200487 }
Alex Bennée550276a2016-09-30 22:30:55 +0100488 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200489}
490
Richard Henderson6c4382f2012-10-02 11:32:27 -0700491/* Return 2 if the condition can't be simplified, and the result
492 of the condition (0 or 1) if it can */
493static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
494{
495 TCGArg al = p1[0], ah = p1[1];
496 TCGArg bl = p2[0], bh = p2[1];
497
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200498 if (temp_is_const(bl) && temp_is_const(bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700499 uint64_t b = ((uint64_t)temps[bh].val << 32) | (uint32_t)temps[bl].val;
500
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200501 if (temp_is_const(al) && temp_is_const(ah)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700502 uint64_t a;
503 a = ((uint64_t)temps[ah].val << 32) | (uint32_t)temps[al].val;
504 return do_constant_folding_cond_64(a, b, c);
505 }
506 if (b == 0) {
507 switch (c) {
508 case TCG_COND_LTU:
509 return 0;
510 case TCG_COND_GEU:
511 return 1;
512 default:
513 break;
514 }
515 }
516 }
517 if (temps_are_copies(al, bl) && temps_are_copies(ah, bh)) {
518 return do_constant_folding_cond_eq(c);
519 }
520 return 2;
521}
522
Richard Henderson24c9ae42012-10-02 11:32:21 -0700523static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
524{
525 TCGArg a1 = *p1, a2 = *p2;
526 int sum = 0;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200527 sum += temp_is_const(a1);
528 sum -= temp_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700529
530 /* Prefer the constant in second argument, and then the form
531 op a, a, b, which is better handled on non-RISC hosts. */
532 if (sum > 0 || (sum == 0 && dest == a2)) {
533 *p1 = a2;
534 *p2 = a1;
535 return true;
536 }
537 return false;
538}
539
Richard Henderson0bfcb862012-10-02 11:32:23 -0700540static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
541{
542 int sum = 0;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200543 sum += temp_is_const(p1[0]);
544 sum += temp_is_const(p1[1]);
545 sum -= temp_is_const(p2[0]);
546 sum -= temp_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700547 if (sum > 0) {
548 TCGArg t;
549 t = p1[0], p1[0] = p2[0], p2[0] = t;
550 t = p1[1], p1[1] = p2[1], p2[1] = t;
551 return true;
552 }
553 return false;
554}
555
Kirill Batuzov22613af2011-07-07 16:37:13 +0400556/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200557void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400558{
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700559 int oi, oi_next, nb_temps, nb_globals;
Richard Hendersonacd93702016-12-08 12:28:42 -0800560 TCGOp *prev_mb = NULL;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700561
Kirill Batuzov22613af2011-07-07 16:37:13 +0400562 /* Array VALS has an element for each temp.
563 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200564 If this temp is a copy of other ones then the other copies are
565 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400566
567 nb_temps = s->nb_temps;
568 nb_globals = s->nb_globals;
Paolo Bonzinid193a142013-01-11 15:42:51 -0800569 reset_all_temps(nb_temps);
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400570
Richard Hendersondcb8e752016-06-22 19:42:31 -0700571 for (oi = s->gen_op_buf[0].next; oi != 0; oi = oi_next) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700572 tcg_target_ulong mask, partmask, affected;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700573 int nb_oargs, nb_iargs, i;
Richard Hendersoncf066672014-03-22 20:06:52 -0700574 TCGArg tmp;
575
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700576 TCGOp * const op = &s->gen_op_buf[oi];
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700577 TCGOpcode opc = op->opc;
578 const TCGOpDef *def = &tcg_op_defs[opc];
579
580 oi_next = op->next;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200581
582 /* Count the arguments, and initialize the temps that are
583 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700584 if (opc == INDEX_op_call) {
585 nb_oargs = op->callo;
586 nb_iargs = op->calli;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200587 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800588 tmp = op->args[i];
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200589 if (tmp != TCG_CALL_DUMMY_ARG) {
590 init_temp_info(tmp);
591 }
592 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200593 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700594 nb_oargs = def->nb_oargs;
595 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200596 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800597 init_temp_info(op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200598 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700599 }
600
601 /* Do copy propagation */
602 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800603 if (temp_is_copy(op->args[i])) {
604 op->args[i] = find_better_copy(s, op->args[i]);
Kirill Batuzov22613af2011-07-07 16:37:13 +0400605 }
606 }
607
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400608 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700609 switch (opc) {
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400610 CASE_OP_32_64(add):
611 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +0400612 CASE_OP_32_64(and):
613 CASE_OP_32_64(or):
614 CASE_OP_32_64(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700615 CASE_OP_32_64(eqv):
616 CASE_OP_32_64(nand):
617 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700618 CASE_OP_32_64(muluh):
619 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800620 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400621 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200622 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800623 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
624 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200625 }
626 break;
627 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800628 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
629 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200630 }
631 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700632 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800633 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
634 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700635 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700636 /* For movcond, we canonicalize the "false" input reg to match
637 the destination reg so that the tcg backend can implement
638 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800639 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
640 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700641 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700642 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800643 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800644 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
645 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700646 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800647 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800648 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800649 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700650 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700651 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800652 if (swap_commutative2(&op->args[0], &op->args[2])) {
653 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700654 }
655 break;
656 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800657 if (swap_commutative2(&op->args[1], &op->args[3])) {
658 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700659 }
660 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400661 default:
662 break;
663 }
664
Richard Henderson2d497542013-03-21 09:13:33 -0700665 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
666 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700667 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200668 CASE_OP_32_64(shl):
669 CASE_OP_32_64(shr):
670 CASE_OP_32_64(sar):
671 CASE_OP_32_64(rotl):
672 CASE_OP_32_64(rotr):
Richard Hendersonacd93702016-12-08 12:28:42 -0800673 if (temp_is_const(op->args[1]) && temps[op->args[1]].val == 0) {
674 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200675 continue;
676 }
677 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700678 CASE_OP_32_64(sub):
679 {
680 TCGOpcode neg_op;
681 bool have_neg;
682
Richard Hendersonacd93702016-12-08 12:28:42 -0800683 if (temp_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700684 /* Proceed with possible constant folding. */
685 break;
686 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700687 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700688 neg_op = INDEX_op_neg_i32;
689 have_neg = TCG_TARGET_HAS_neg_i32;
690 } else {
691 neg_op = INDEX_op_neg_i64;
692 have_neg = TCG_TARGET_HAS_neg_i64;
693 }
694 if (!have_neg) {
695 break;
696 }
Richard Hendersonacd93702016-12-08 12:28:42 -0800697 if (temp_is_const(op->args[1])
698 && temps[op->args[1]].val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700699 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800700 reset_temp(op->args[0]);
701 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700702 continue;
703 }
704 }
705 break;
Richard Hendersone201b562014-01-28 13:15:38 -0800706 CASE_OP_32_64(xor):
707 CASE_OP_32_64(nand):
Richard Hendersonacd93702016-12-08 12:28:42 -0800708 if (!temp_is_const(op->args[1])
709 && temp_is_const(op->args[2])
710 && temps[op->args[2]].val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800711 i = 1;
712 goto try_not;
713 }
714 break;
715 CASE_OP_32_64(nor):
Richard Hendersonacd93702016-12-08 12:28:42 -0800716 if (!temp_is_const(op->args[1])
717 && temp_is_const(op->args[2])
718 && temps[op->args[2]].val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800719 i = 1;
720 goto try_not;
721 }
722 break;
723 CASE_OP_32_64(andc):
Richard Hendersonacd93702016-12-08 12:28:42 -0800724 if (!temp_is_const(op->args[2])
725 && temp_is_const(op->args[1])
726 && temps[op->args[1]].val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800727 i = 2;
728 goto try_not;
729 }
730 break;
731 CASE_OP_32_64(orc):
732 CASE_OP_32_64(eqv):
Richard Hendersonacd93702016-12-08 12:28:42 -0800733 if (!temp_is_const(op->args[2])
734 && temp_is_const(op->args[1])
735 && temps[op->args[1]].val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800736 i = 2;
737 goto try_not;
738 }
739 break;
740 try_not:
741 {
742 TCGOpcode not_op;
743 bool have_not;
744
745 if (def->flags & TCG_OPF_64BIT) {
746 not_op = INDEX_op_not_i64;
747 have_not = TCG_TARGET_HAS_not_i64;
748 } else {
749 not_op = INDEX_op_not_i32;
750 have_not = TCG_TARGET_HAS_not_i32;
751 }
752 if (!have_not) {
753 break;
754 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700755 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800756 reset_temp(op->args[0]);
757 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800758 continue;
759 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200760 default:
761 break;
762 }
763
Richard Henderson464a1442014-01-31 07:42:11 -0600764 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700765 switch (opc) {
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400766 CASE_OP_32_64(add):
767 CASE_OP_32_64(sub):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400768 CASE_OP_32_64(shl):
769 CASE_OP_32_64(shr):
770 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700771 CASE_OP_32_64(rotl):
772 CASE_OP_32_64(rotr):
Aurelien Jarno38ee1882012-09-06 16:47:14 +0200773 CASE_OP_32_64(or):
774 CASE_OP_32_64(xor):
Richard Henderson464a1442014-01-31 07:42:11 -0600775 CASE_OP_32_64(andc):
Richard Hendersonacd93702016-12-08 12:28:42 -0800776 if (!temp_is_const(op->args[1])
777 && temp_is_const(op->args[2])
778 && temps[op->args[2]].val == 0) {
779 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200780 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400781 }
782 break;
Richard Henderson464a1442014-01-31 07:42:11 -0600783 CASE_OP_32_64(and):
784 CASE_OP_32_64(orc):
785 CASE_OP_32_64(eqv):
Richard Hendersonacd93702016-12-08 12:28:42 -0800786 if (!temp_is_const(op->args[1])
787 && temp_is_const(op->args[2])
788 && temps[op->args[2]].val == -1) {
789 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200790 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600791 }
792 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200793 default:
794 break;
795 }
796
Aurelien Jarno30312442013-09-03 08:27:38 +0200797 /* Simplify using known-zero bits. Currently only ops with a single
798 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800799 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800800 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700801 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800802 CASE_OP_32_64(ext8s):
Richard Hendersonacd93702016-12-08 12:28:42 -0800803 if ((temps[op->args[1]].mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800804 break;
805 }
806 CASE_OP_32_64(ext8u):
807 mask = 0xff;
808 goto and_const;
809 CASE_OP_32_64(ext16s):
Richard Hendersonacd93702016-12-08 12:28:42 -0800810 if ((temps[op->args[1]].mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800811 break;
812 }
813 CASE_OP_32_64(ext16u):
814 mask = 0xffff;
815 goto and_const;
816 case INDEX_op_ext32s_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800817 if ((temps[op->args[1]].mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800818 break;
819 }
820 case INDEX_op_ext32u_i64:
821 mask = 0xffffffffU;
822 goto and_const;
823
824 CASE_OP_32_64(and):
Richard Hendersonacd93702016-12-08 12:28:42 -0800825 mask = temps[op->args[2]].mask;
826 if (temp_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800827 and_const:
Richard Hendersonacd93702016-12-08 12:28:42 -0800828 affected = temps[op->args[1]].mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800829 }
Richard Hendersonacd93702016-12-08 12:28:42 -0800830 mask = temps[op->args[1]].mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800831 break;
832
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200833 case INDEX_op_ext_i32_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800834 if ((temps[op->args[1]].mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200835 break;
836 }
837 case INDEX_op_extu_i32_i64:
838 /* We do not compute affected as it is a size changing op. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800839 mask = (uint32_t)temps[op->args[1]].mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200840 break;
841
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800842 CASE_OP_32_64(andc):
843 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800844 op->args[2] is constant, we can't infer anything from it. */
845 if (temp_is_const(op->args[2])) {
846 mask = ~temps[op->args[2]].mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800847 goto and_const;
848 }
Richard Hendersonacd93702016-12-08 12:28:42 -0800849 /* But we certainly know nothing outside op->args[1] may be set. */
850 mask = temps[op->args[1]].mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800851 break;
852
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200853 case INDEX_op_sar_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800854 if (temp_is_const(op->args[2])) {
855 tmp = temps[op->args[2]].val & 31;
856 mask = (int32_t)temps[op->args[1]].mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200857 }
858 break;
859 case INDEX_op_sar_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800860 if (temp_is_const(op->args[2])) {
861 tmp = temps[op->args[2]].val & 63;
862 mask = (int64_t)temps[op->args[1]].mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800863 }
864 break;
865
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200866 case INDEX_op_shr_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800867 if (temp_is_const(op->args[2])) {
868 tmp = temps[op->args[2]].val & 31;
869 mask = (uint32_t)temps[op->args[1]].mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200870 }
871 break;
872 case INDEX_op_shr_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800873 if (temp_is_const(op->args[2])) {
874 tmp = temps[op->args[2]].val & 63;
875 mask = (uint64_t)temps[op->args[1]].mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800876 }
877 break;
878
Richard Henderson609ad702015-07-24 07:16:00 -0700879 case INDEX_op_extrl_i64_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800880 mask = (uint32_t)temps[op->args[1]].mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700881 break;
882 case INDEX_op_extrh_i64_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800883 mask = (uint64_t)temps[op->args[1]].mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700884 break;
885
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800886 CASE_OP_32_64(shl):
Richard Hendersonacd93702016-12-08 12:28:42 -0800887 if (temp_is_const(op->args[2])) {
888 tmp = temps[op->args[2]].val & (TCG_TARGET_REG_BITS - 1);
889 mask = temps[op->args[1]].mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800890 }
891 break;
892
893 CASE_OP_32_64(neg):
894 /* Set to 1 all bits to the left of the rightmost. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800895 mask = -(temps[op->args[1]].mask & -temps[op->args[1]].mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800896 break;
897
898 CASE_OP_32_64(deposit):
Richard Hendersonacd93702016-12-08 12:28:42 -0800899 mask = deposit64(temps[op->args[1]].mask, op->args[3],
900 op->args[4], temps[op->args[2]].mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800901 break;
902
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500903 CASE_OP_32_64(extract):
Richard Hendersonacd93702016-12-08 12:28:42 -0800904 mask = extract64(temps[op->args[1]].mask, op->args[2], op->args[3]);
905 if (op->args[2] == 0) {
906 affected = temps[op->args[1]].mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500907 }
908 break;
909 CASE_OP_32_64(sextract):
Richard Hendersonacd93702016-12-08 12:28:42 -0800910 mask = sextract64(temps[op->args[1]].mask,
911 op->args[2], op->args[3]);
912 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
913 affected = temps[op->args[1]].mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500914 }
915 break;
916
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800917 CASE_OP_32_64(or):
918 CASE_OP_32_64(xor):
Richard Hendersonacd93702016-12-08 12:28:42 -0800919 mask = temps[op->args[1]].mask | temps[op->args[2]].mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800920 break;
921
Richard Henderson0e28d002016-11-16 09:23:28 +0100922 case INDEX_op_clz_i32:
923 case INDEX_op_ctz_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800924 mask = temps[op->args[2]].mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100925 break;
926
927 case INDEX_op_clz_i64:
928 case INDEX_op_ctz_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800929 mask = temps[op->args[2]].mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100930 break;
931
Richard Hendersona768e4e2016-11-21 11:13:39 +0100932 case INDEX_op_ctpop_i32:
933 mask = 32 | 31;
934 break;
935 case INDEX_op_ctpop_i64:
936 mask = 64 | 63;
937 break;
938
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800939 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -0700940 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800941 mask = 1;
942 break;
943
944 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800945 mask = temps[op->args[3]].mask | temps[op->args[4]].mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800946 break;
947
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200948 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200949 mask = 0xff;
950 break;
951 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200952 mask = 0xffff;
953 break;
954 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200955 mask = 0xffffffffu;
956 break;
957
958 CASE_OP_32_64(qemu_ld):
959 {
Richard Hendersonacd93702016-12-08 12:28:42 -0800960 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Richard Henderson59227d52015-05-12 11:51:44 -0700961 TCGMemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200962 if (!(mop & MO_SIGN)) {
963 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
964 }
965 }
966 break;
967
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800968 default:
969 break;
970 }
971
Richard Hendersonbc8d6882014-06-08 18:24:14 -0700972 /* 32-bit ops generate 32-bit results. For the result is zero test
973 below, we can ignore high bits, but for further optimizations we
974 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -0700975 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -0700976 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700977 mask |= ~(tcg_target_ulong)0xffffffffu;
978 partmask &= 0xffffffffu;
979 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +0200980 }
981
Richard Henderson24666ba2014-05-22 11:14:10 -0700982 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +0200983 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -0800984 tcg_opt_gen_movi(s, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -0800985 continue;
986 }
987 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +0200988 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -0800989 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -0800990 continue;
991 }
992
Aurelien Jarno56e49432012-09-06 16:47:13 +0200993 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700994 switch (opc) {
Aurelien Jarno61251c02012-09-06 16:47:14 +0200995 CASE_OP_32_64(and):
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400996 CASE_OP_32_64(mul):
Richard Henderson03271522013-08-14 14:35:56 -0700997 CASE_OP_32_64(muluh):
998 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800999 if ((temp_is_const(op->args[2]) && temps[op->args[2]].val == 0)) {
1000 tcg_opt_gen_movi(s, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001001 continue;
1002 }
1003 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001004 default:
1005 break;
1006 }
1007
1008 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001009 switch (opc) {
Kirill Batuzov9a810902011-07-07 16:37:15 +04001010 CASE_OP_32_64(or):
1011 CASE_OP_32_64(and):
Richard Hendersonacd93702016-12-08 12:28:42 -08001012 if (temps_are_copies(op->args[1], op->args[2])) {
1013 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001014 continue;
1015 }
1016 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001017 default:
1018 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001019 }
1020
Aurelien Jarno3c941932012-09-18 19:12:36 +02001021 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001022 switch (opc) {
Richard Hendersone64e9582014-01-28 13:26:17 -08001023 CASE_OP_32_64(andc):
Aurelien Jarno3c941932012-09-18 19:12:36 +02001024 CASE_OP_32_64(sub):
1025 CASE_OP_32_64(xor):
Richard Hendersonacd93702016-12-08 12:28:42 -08001026 if (temps_are_copies(op->args[1], op->args[2])) {
1027 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001028 continue;
1029 }
1030 break;
1031 default:
1032 break;
1033 }
1034
Kirill Batuzov22613af2011-07-07 16:37:13 +04001035 /* Propagate constants through copy operations and do constant
1036 folding. Constants will be substituted to arguments by register
1037 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001038 switch (opc) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001039 CASE_OP_32_64(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001040 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001041 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001042 CASE_OP_32_64(movi):
Richard Hendersonacd93702016-12-08 12:28:42 -08001043 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001044 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001045
Kirill Batuzova640f032011-07-07 16:37:17 +04001046 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001047 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001048 CASE_OP_32_64(ext8s):
1049 CASE_OP_32_64(ext8u):
1050 CASE_OP_32_64(ext16s):
1051 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001052 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001053 case INDEX_op_ext32s_i64:
1054 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001055 case INDEX_op_ext_i32_i64:
1056 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001057 case INDEX_op_extrl_i64_i32:
1058 case INDEX_op_extrh_i64_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001059 if (temp_is_const(op->args[1])) {
1060 tmp = do_constant_folding(opc, temps[op->args[1]].val, 0);
1061 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001062 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001063 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001064 goto do_default;
1065
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001066 CASE_OP_32_64(add):
1067 CASE_OP_32_64(sub):
1068 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001069 CASE_OP_32_64(or):
1070 CASE_OP_32_64(and):
1071 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001072 CASE_OP_32_64(shl):
1073 CASE_OP_32_64(shr):
1074 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001075 CASE_OP_32_64(rotl):
1076 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001077 CASE_OP_32_64(andc):
1078 CASE_OP_32_64(orc):
1079 CASE_OP_32_64(eqv):
1080 CASE_OP_32_64(nand):
1081 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001082 CASE_OP_32_64(muluh):
1083 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001084 CASE_OP_32_64(div):
1085 CASE_OP_32_64(divu):
1086 CASE_OP_32_64(rem):
1087 CASE_OP_32_64(remu):
Richard Hendersonacd93702016-12-08 12:28:42 -08001088 if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) {
1089 tmp = do_constant_folding(opc, temps[op->args[1]].val,
1090 temps[op->args[2]].val);
1091 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001092 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001093 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001094 goto do_default;
1095
Richard Henderson0e28d002016-11-16 09:23:28 +01001096 CASE_OP_32_64(clz):
1097 CASE_OP_32_64(ctz):
Richard Hendersonacd93702016-12-08 12:28:42 -08001098 if (temp_is_const(op->args[1])) {
1099 TCGArg v = temps[op->args[1]].val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001100 if (v != 0) {
1101 tmp = do_constant_folding(opc, v, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001102 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001103 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001104 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001105 }
1106 break;
1107 }
1108 goto do_default;
1109
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001110 CASE_OP_32_64(deposit):
Richard Hendersonacd93702016-12-08 12:28:42 -08001111 if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) {
1112 tmp = deposit64(temps[op->args[1]].val, op->args[3],
1113 op->args[4], temps[op->args[2]].val);
1114 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001115 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001116 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001117 goto do_default;
1118
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001119 CASE_OP_32_64(extract):
Richard Hendersonacd93702016-12-08 12:28:42 -08001120 if (temp_is_const(op->args[1])) {
1121 tmp = extract64(temps[op->args[1]].val,
1122 op->args[2], op->args[3]);
1123 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001124 break;
1125 }
1126 goto do_default;
1127
1128 CASE_OP_32_64(sextract):
Richard Hendersonacd93702016-12-08 12:28:42 -08001129 if (temp_is_const(op->args[1])) {
1130 tmp = sextract64(temps[op->args[1]].val,
1131 op->args[2], op->args[3]);
1132 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001133 break;
1134 }
1135 goto do_default;
1136
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001137 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001138 tmp = do_constant_folding_cond(opc, op->args[1],
1139 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001140 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001141 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001142 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001143 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001144 goto do_default;
1145
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001146 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001147 tmp = do_constant_folding_cond(opc, op->args[0],
1148 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001149 if (tmp != 2) {
1150 if (tmp) {
Paolo Bonzinid193a142013-01-11 15:42:51 -08001151 reset_all_temps(nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001152 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001153 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001154 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001155 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001156 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001157 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001158 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001159 goto do_default;
1160
Richard Hendersonfa01a202012-09-21 10:13:37 -07001161 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001162 tmp = do_constant_folding_cond(opc, op->args[1],
1163 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001164 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001165 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001166 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001167 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001168 if (temp_is_const(op->args[3]) && temp_is_const(op->args[4])) {
1169 tcg_target_ulong tv = temps[op->args[3]].val;
1170 tcg_target_ulong fv = temps[op->args[4]].val;
1171 TCGCond cond = op->args[5];
Richard Henderson333b21b2016-10-23 20:44:32 -07001172 if (fv == 1 && tv == 0) {
1173 cond = tcg_invert_cond(cond);
1174 } else if (!(tv == 1 && fv == 0)) {
1175 goto do_default;
1176 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001177 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001178 op->opc = opc = (opc == INDEX_op_movcond_i32
1179 ? INDEX_op_setcond_i32
1180 : INDEX_op_setcond_i64);
1181 nb_iargs = 2;
1182 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001183 goto do_default;
1184
Richard Henderson212c3282012-10-02 11:32:28 -07001185 case INDEX_op_add2_i32:
1186 case INDEX_op_sub2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001187 if (temp_is_const(op->args[2]) && temp_is_const(op->args[3])
1188 && temp_is_const(op->args[4]) && temp_is_const(op->args[5])) {
1189 uint32_t al = temps[op->args[2]].val;
1190 uint32_t ah = temps[op->args[3]].val;
1191 uint32_t bl = temps[op->args[4]].val;
1192 uint32_t bh = temps[op->args[5]].val;
Richard Henderson212c3282012-10-02 11:32:28 -07001193 uint64_t a = ((uint64_t)ah << 32) | al;
1194 uint64_t b = ((uint64_t)bh << 32) | bl;
1195 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001196 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson212c3282012-10-02 11:32:28 -07001197
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001198 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001199 a += b;
1200 } else {
1201 a -= b;
1202 }
1203
Richard Hendersonacd93702016-12-08 12:28:42 -08001204 rl = op->args[0];
1205 rh = op->args[1];
1206 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1207 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001208
1209 /* We've done all we need to do with the movi. Skip it. */
1210 oi_next = op2->next;
Richard Henderson212c3282012-10-02 11:32:28 -07001211 break;
1212 }
1213 goto do_default;
1214
Richard Henderson14149682012-10-02 11:32:30 -07001215 case INDEX_op_mulu2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001216 if (temp_is_const(op->args[2]) && temp_is_const(op->args[3])) {
1217 uint32_t a = temps[op->args[2]].val;
1218 uint32_t b = temps[op->args[3]].val;
Richard Henderson14149682012-10-02 11:32:30 -07001219 uint64_t r = (uint64_t)a * b;
1220 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001221 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson14149682012-10-02 11:32:30 -07001222
Richard Hendersonacd93702016-12-08 12:28:42 -08001223 rl = op->args[0];
1224 rh = op->args[1];
1225 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1226 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001227
1228 /* We've done all we need to do with the movi. Skip it. */
1229 oi_next = op2->next;
Richard Henderson14149682012-10-02 11:32:30 -07001230 break;
1231 }
1232 goto do_default;
1233
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001234 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001235 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1236 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001237 if (tmp != 2) {
1238 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001239 do_brcond_true:
Paolo Bonzinid193a142013-01-11 15:42:51 -08001240 reset_all_temps(nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001241 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001242 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001243 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001244 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001245 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001246 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001247 } else if ((op->args[4] == TCG_COND_LT
1248 || op->args[4] == TCG_COND_GE)
1249 && temp_is_const(op->args[2])
1250 && temps[op->args[2]].val == 0
1251 && temp_is_const(op->args[3])
1252 && temps[op->args[3]].val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001253 /* Simplify LT/GE comparisons vs zero to a single compare
1254 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001255 do_brcond_high:
Paolo Bonzinid193a142013-01-11 15:42:51 -08001256 reset_all_temps(nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001257 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001258 op->args[0] = op->args[1];
1259 op->args[1] = op->args[3];
1260 op->args[2] = op->args[4];
1261 op->args[3] = op->args[5];
1262 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001263 /* Simplify EQ comparisons where one of the pairs
1264 can be simplified. */
1265 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001266 op->args[0], op->args[2],
1267 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001268 if (tmp == 0) {
1269 goto do_brcond_false;
1270 } else if (tmp == 1) {
1271 goto do_brcond_high;
1272 }
1273 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001274 op->args[1], op->args[3],
1275 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001276 if (tmp == 0) {
1277 goto do_brcond_false;
1278 } else if (tmp != 1) {
1279 goto do_default;
1280 }
1281 do_brcond_low:
1282 reset_all_temps(nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001283 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001284 op->args[1] = op->args[2];
1285 op->args[2] = op->args[4];
1286 op->args[3] = op->args[5];
1287 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001288 /* Simplify NE comparisons where one of the pairs
1289 can be simplified. */
1290 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001291 op->args[0], op->args[2],
1292 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001293 if (tmp == 0) {
1294 goto do_brcond_high;
1295 } else if (tmp == 1) {
1296 goto do_brcond_true;
1297 }
1298 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001299 op->args[1], op->args[3],
1300 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001301 if (tmp == 0) {
1302 goto do_brcond_low;
1303 } else if (tmp == 1) {
1304 goto do_brcond_true;
1305 }
1306 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001307 } else {
1308 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001309 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001310 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001311
1312 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001313 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1314 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001315 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001316 do_setcond_const:
Richard Hendersonacd93702016-12-08 12:28:42 -08001317 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1318 } else if ((op->args[5] == TCG_COND_LT
1319 || op->args[5] == TCG_COND_GE)
1320 && temp_is_const(op->args[3])
1321 && temps[op->args[3]].val == 0
1322 && temp_is_const(op->args[4])
1323 && temps[op->args[4]].val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001324 /* Simplify LT/GE comparisons vs zero to a single compare
1325 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001326 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001327 reset_temp(op->args[0]);
1328 temps[op->args[0]].mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001329 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001330 op->args[1] = op->args[2];
1331 op->args[2] = op->args[4];
1332 op->args[3] = op->args[5];
1333 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001334 /* Simplify EQ comparisons where one of the pairs
1335 can be simplified. */
1336 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001337 op->args[1], op->args[3],
1338 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001339 if (tmp == 0) {
1340 goto do_setcond_const;
1341 } else if (tmp == 1) {
1342 goto do_setcond_high;
1343 }
1344 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001345 op->args[2], op->args[4],
1346 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001347 if (tmp == 0) {
1348 goto do_setcond_high;
1349 } else if (tmp != 1) {
1350 goto do_default;
1351 }
1352 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001353 reset_temp(op->args[0]);
1354 temps[op->args[0]].mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001355 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001356 op->args[2] = op->args[3];
1357 op->args[3] = op->args[5];
1358 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001359 /* Simplify NE comparisons where one of the pairs
1360 can be simplified. */
1361 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001362 op->args[1], op->args[3],
1363 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001364 if (tmp == 0) {
1365 goto do_setcond_high;
1366 } else if (tmp == 1) {
1367 goto do_setcond_const;
1368 }
1369 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001370 op->args[2], op->args[4],
1371 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001372 if (tmp == 0) {
1373 goto do_setcond_low;
1374 } else if (tmp == 1) {
1375 goto do_setcond_const;
1376 }
1377 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001378 } else {
1379 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001380 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001381 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001382
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001383 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001384 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001385 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001386 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001387 if (test_bit(i, temps_used.l)) {
1388 reset_temp(i);
1389 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001390 }
1391 }
Richard Hendersoncf066672014-03-22 20:06:52 -07001392 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001393
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001394 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001395 do_default:
1396 /* Default case: we know nothing about operation (or were unable
1397 to compute the operation result) so no propagation is done.
1398 We trash everything if the operation is the end of a basic
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001399 block, otherwise we only trash the output args. "mask" is
1400 the non-zero bits mask for the first output arg. */
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001401 if (def->flags & TCG_OPF_BB_END) {
Paolo Bonzinid193a142013-01-11 15:42:51 -08001402 reset_all_temps(nb_temps);
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001403 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -07001404 do_reset_output:
1405 for (i = 0; i < nb_oargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001406 reset_temp(op->args[i]);
Aurelien Jarno30312442013-09-03 08:27:38 +02001407 /* Save the corresponding known-zero bits mask for the
1408 first output argument (only one supported so far). */
1409 if (i == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001410 temps[op->args[i]].mask = mask;
Aurelien Jarno30312442013-09-03 08:27:38 +02001411 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001412 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001413 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001414 break;
1415 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001416
1417 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001418 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001419 switch (opc) {
1420 case INDEX_op_mb:
1421 /* Merge two barriers of the same type into one,
1422 * or a weaker barrier into a stronger one,
1423 * or two weaker barriers into a stronger one.
1424 * mb X; mb Y => mb X|Y
1425 * mb; strl => mb; st
1426 * ldaq; mb => ld; mb
1427 * ldaq; strl => ld; mb; st
1428 * Other combinations are also merged into a strong
1429 * barrier. This is stricter than specified but for
1430 * the purposes of TCG is better than not optimizing.
1431 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001432 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001433 tcg_op_remove(s, op);
1434 break;
1435
1436 default:
1437 /* Opcodes that end the block stop the optimization. */
1438 if ((def->flags & TCG_OPF_BB_END) == 0) {
1439 break;
1440 }
1441 /* fallthru */
1442 case INDEX_op_qemu_ld_i32:
1443 case INDEX_op_qemu_ld_i64:
1444 case INDEX_op_qemu_st_i32:
1445 case INDEX_op_qemu_st_i64:
1446 case INDEX_op_call:
1447 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001448 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001449 break;
1450 }
1451 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001452 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001453 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001454 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001455}