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bellardb4608c02003-06-27 17:34:32 +00001/*
2 * gdb server stub
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard34751872005-07-02 14:31:34 +00004 * Copyright (c) 2003-2005 Fabrice Bellard
bellardb4608c02003-06-27 17:34:32 +00005 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
pbrook978efd62006-06-17 18:30:42 +000020#include "config.h"
bellard1fddef42005-04-17 19:16:13 +000021#ifdef CONFIG_USER_ONLY
22#include <stdlib.h>
23#include <stdio.h>
24#include <stdarg.h>
25#include <string.h>
26#include <errno.h>
27#include <unistd.h>
pbrook978efd62006-06-17 18:30:42 +000028#include <fcntl.h>
bellard1fddef42005-04-17 19:16:13 +000029
30#include "qemu.h"
31#else
pbrook87ecb682007-11-17 17:14:51 +000032#include "qemu-common.h"
33#include "qemu-char.h"
34#include "sysemu.h"
35#include "gdbstub.h"
bellard1fddef42005-04-17 19:16:13 +000036#endif
bellard67b915a2004-03-31 23:37:16 +000037
bellard8f447cc2006-06-14 15:21:14 +000038#include "qemu_socket.h"
39#ifdef _WIN32
40/* XXX: these constants may be independent of the host ones even for Unix */
41#ifndef SIGTRAP
42#define SIGTRAP 5
43#endif
44#ifndef SIGINT
45#define SIGINT 2
46#endif
47#else
bellardb4608c02003-06-27 17:34:32 +000048#include <signal.h>
bellard8f447cc2006-06-14 15:21:14 +000049#endif
bellardb4608c02003-06-27 17:34:32 +000050
bellard4abe6152003-07-26 18:01:58 +000051//#define DEBUG_GDB
bellardb4608c02003-06-27 17:34:32 +000052
bellard858693c2004-03-31 18:52:07 +000053enum RSState {
54 RS_IDLE,
55 RS_GETLINE,
56 RS_CHKSUM1,
57 RS_CHKSUM2,
pbrooka2d1eba2007-01-28 03:10:55 +000058 RS_SYSCALL,
bellard858693c2004-03-31 18:52:07 +000059};
bellard858693c2004-03-31 18:52:07 +000060typedef struct GDBState {
bellard6a00d602005-11-21 23:25:50 +000061 CPUState *env; /* current CPU */
bellard41625032005-04-24 10:07:11 +000062 enum RSState state; /* parsing state */
bellard858693c2004-03-31 18:52:07 +000063 char line_buf[4096];
64 int line_buf_index;
65 int line_csum;
ths60fe76f2007-12-16 03:02:09 +000066 uint8_t last_packet[4100];
pbrook4046d912007-01-28 01:53:16 +000067 int last_packet_len;
bellard41625032005-04-24 10:07:11 +000068#ifdef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +000069 int fd;
bellard41625032005-04-24 10:07:11 +000070 int running_state;
pbrook4046d912007-01-28 01:53:16 +000071#else
72 CharDriverState *chr;
bellard41625032005-04-24 10:07:11 +000073#endif
bellard858693c2004-03-31 18:52:07 +000074} GDBState;
bellardb4608c02003-06-27 17:34:32 +000075
bellard1fddef42005-04-17 19:16:13 +000076#ifdef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +000077/* XXX: This is not thread safe. Do we care? */
78static int gdbserver_fd = -1;
79
bellard1fddef42005-04-17 19:16:13 +000080/* XXX: remove this hack. */
81static GDBState gdbserver_state;
bellard1fddef42005-04-17 19:16:13 +000082
bellard858693c2004-03-31 18:52:07 +000083static int get_char(GDBState *s)
bellardb4608c02003-06-27 17:34:32 +000084{
85 uint8_t ch;
86 int ret;
87
88 for(;;) {
bellard8f447cc2006-06-14 15:21:14 +000089 ret = recv(s->fd, &ch, 1, 0);
bellardb4608c02003-06-27 17:34:32 +000090 if (ret < 0) {
91 if (errno != EINTR && errno != EAGAIN)
92 return -1;
93 } else if (ret == 0) {
94 return -1;
95 } else {
96 break;
97 }
98 }
99 return ch;
100}
pbrook4046d912007-01-28 01:53:16 +0000101#endif
bellardb4608c02003-06-27 17:34:32 +0000102
pbrooka2d1eba2007-01-28 03:10:55 +0000103/* GDB stub state for use by semihosting syscalls. */
104static GDBState *gdb_syscall_state;
105static gdb_syscall_complete_cb gdb_current_syscall_cb;
106
107enum {
108 GDB_SYS_UNKNOWN,
109 GDB_SYS_ENABLED,
110 GDB_SYS_DISABLED,
111} gdb_syscall_mode;
112
113/* If gdb is connected when the first semihosting syscall occurs then use
114 remote gdb syscalls. Otherwise use native file IO. */
115int use_gdb_syscalls(void)
116{
117 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
118 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
119 : GDB_SYS_DISABLED);
120 }
121 return gdb_syscall_mode == GDB_SYS_ENABLED;
122}
123
edgar_iglba70a622008-03-14 06:10:42 +0000124/* Resume execution. */
125static inline void gdb_continue(GDBState *s)
126{
127#ifdef CONFIG_USER_ONLY
128 s->running_state = 1;
129#else
130 vm_start();
131#endif
132}
133
bellard858693c2004-03-31 18:52:07 +0000134static void put_buffer(GDBState *s, const uint8_t *buf, int len)
bellardb4608c02003-06-27 17:34:32 +0000135{
pbrook4046d912007-01-28 01:53:16 +0000136#ifdef CONFIG_USER_ONLY
bellardb4608c02003-06-27 17:34:32 +0000137 int ret;
138
139 while (len > 0) {
bellard8f447cc2006-06-14 15:21:14 +0000140 ret = send(s->fd, buf, len, 0);
bellardb4608c02003-06-27 17:34:32 +0000141 if (ret < 0) {
142 if (errno != EINTR && errno != EAGAIN)
143 return;
144 } else {
145 buf += ret;
146 len -= ret;
147 }
148 }
pbrook4046d912007-01-28 01:53:16 +0000149#else
150 qemu_chr_write(s->chr, buf, len);
151#endif
bellardb4608c02003-06-27 17:34:32 +0000152}
153
154static inline int fromhex(int v)
155{
156 if (v >= '0' && v <= '9')
157 return v - '0';
158 else if (v >= 'A' && v <= 'F')
159 return v - 'A' + 10;
160 else if (v >= 'a' && v <= 'f')
161 return v - 'a' + 10;
162 else
163 return 0;
164}
165
166static inline int tohex(int v)
167{
168 if (v < 10)
169 return v + '0';
170 else
171 return v - 10 + 'a';
172}
173
174static void memtohex(char *buf, const uint8_t *mem, int len)
175{
176 int i, c;
177 char *q;
178 q = buf;
179 for(i = 0; i < len; i++) {
180 c = mem[i];
181 *q++ = tohex(c >> 4);
182 *q++ = tohex(c & 0xf);
183 }
184 *q = '\0';
185}
186
187static void hextomem(uint8_t *mem, const char *buf, int len)
188{
189 int i;
190
191 for(i = 0; i < len; i++) {
192 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
193 buf += 2;
194 }
195}
196
bellardb4608c02003-06-27 17:34:32 +0000197/* return -1 if error, 0 if OK */
bellard858693c2004-03-31 18:52:07 +0000198static int put_packet(GDBState *s, char *buf)
bellardb4608c02003-06-27 17:34:32 +0000199{
pbrook4046d912007-01-28 01:53:16 +0000200 int len, csum, i;
ths60fe76f2007-12-16 03:02:09 +0000201 uint8_t *p;
bellardb4608c02003-06-27 17:34:32 +0000202
203#ifdef DEBUG_GDB
204 printf("reply='%s'\n", buf);
205#endif
206
207 for(;;) {
pbrook4046d912007-01-28 01:53:16 +0000208 p = s->last_packet;
209 *(p++) = '$';
bellardb4608c02003-06-27 17:34:32 +0000210 len = strlen(buf);
pbrook4046d912007-01-28 01:53:16 +0000211 memcpy(p, buf, len);
212 p += len;
bellardb4608c02003-06-27 17:34:32 +0000213 csum = 0;
214 for(i = 0; i < len; i++) {
215 csum += buf[i];
216 }
pbrook4046d912007-01-28 01:53:16 +0000217 *(p++) = '#';
218 *(p++) = tohex((csum >> 4) & 0xf);
219 *(p++) = tohex((csum) & 0xf);
bellardb4608c02003-06-27 17:34:32 +0000220
pbrook4046d912007-01-28 01:53:16 +0000221 s->last_packet_len = p - s->last_packet;
thsffe8ab82007-12-16 03:16:05 +0000222 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
bellardb4608c02003-06-27 17:34:32 +0000223
pbrook4046d912007-01-28 01:53:16 +0000224#ifdef CONFIG_USER_ONLY
225 i = get_char(s);
226 if (i < 0)
bellardb4608c02003-06-27 17:34:32 +0000227 return -1;
pbrook4046d912007-01-28 01:53:16 +0000228 if (i == '+')
bellardb4608c02003-06-27 17:34:32 +0000229 break;
pbrook4046d912007-01-28 01:53:16 +0000230#else
231 break;
232#endif
bellardb4608c02003-06-27 17:34:32 +0000233 }
234 return 0;
235}
edgar_iglc5841162008-05-09 08:23:19 +0000236#if defined(TARGET_X86_64)
bellardb4608c02003-06-27 17:34:32 +0000237
edgar_iglc5841162008-05-09 08:23:19 +0000238static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
239{
240 uint8_t *p = mem_buf;
241 int i, fpus;
bellard6da41ea2004-01-04 15:48:38 +0000242
edgar_iglc5841162008-05-09 08:23:19 +0000243#define PUTREG(x) do { \
244 target_ulong reg = tswapl(x); \
245 memcpy(p, &reg, sizeof reg); \
246 p += sizeof reg; \
247 } while (0)
248#define PUTREG32(x) do { \
249 uint32_t reg = tswap32(x); \
250 memcpy(p, &reg, sizeof reg); \
251 p += sizeof reg; \
252 } while (0)
253#define PUTREGF(x) do { \
254 memcpy(p, &(x), 10); \
255 p += sizeof (x); \
256 } while (0)
257
258 PUTREG(env->regs[R_EAX]);
259 PUTREG(env->regs[R_EBX]);
260 PUTREG(env->regs[R_ECX]);
261 PUTREG(env->regs[R_EDX]);
262 PUTREG(env->regs[R_ESI]);
263 PUTREG(env->regs[R_EDI]);
264 PUTREG(env->regs[R_EBP]);
265 PUTREG(env->regs[R_ESP]);
266 PUTREG(env->regs[8]);
267 PUTREG(env->regs[9]);
268 PUTREG(env->regs[10]);
269 PUTREG(env->regs[11]);
270 PUTREG(env->regs[12]);
271 PUTREG(env->regs[13]);
272 PUTREG(env->regs[14]);
273 PUTREG(env->regs[15]);
274
275 PUTREG(env->eip);
276 PUTREG32(env->eflags);
277 PUTREG32(env->segs[R_CS].selector);
278 PUTREG32(env->segs[R_SS].selector);
279 PUTREG32(env->segs[R_DS].selector);
280 PUTREG32(env->segs[R_ES].selector);
281 PUTREG32(env->segs[R_FS].selector);
282 PUTREG32(env->segs[R_GS].selector);
283 /* XXX: convert floats */
284 for(i = 0; i < 8; i++) {
285 PUTREGF(env->fpregs[i]);
286 }
287 PUTREG32(env->fpuc);
288 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
289 PUTREG32(fpus);
290 PUTREG32(0); /* XXX: convert tags */
291 PUTREG32(0); /* fiseg */
292 PUTREG32(0); /* fioff */
293 PUTREG32(0); /* foseg */
294 PUTREG32(0); /* fooff */
295 PUTREG32(0); /* fop */
296
297#undef PUTREG
298#undef PUTREG32
299#undef PUTREGF
300
301 return p - mem_buf;
302}
303
304static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
305{
306 uint8_t *p = mem_buf;
307 uint32_t junk;
308 int i, fpus;
309
310#define GETREG(x) do { \
311 target_ulong reg; \
312 memcpy(&reg, p, sizeof reg); \
313 x = tswapl(reg); \
314 p += sizeof reg; \
315 } while (0)
316#define GETREG32(x) do { \
317 uint32_t reg; \
318 memcpy(&reg, p, sizeof reg); \
319 x = tswap32(reg); \
320 p += sizeof reg; \
321 } while (0)
322#define GETREGF(x) do { \
323 memcpy(&(x), p, 10); \
324 p += 10; \
325 } while (0)
326
327 GETREG(env->regs[R_EAX]);
328 GETREG(env->regs[R_EBX]);
329 GETREG(env->regs[R_ECX]);
330 GETREG(env->regs[R_EDX]);
331 GETREG(env->regs[R_ESI]);
332 GETREG(env->regs[R_EDI]);
333 GETREG(env->regs[R_EBP]);
334 GETREG(env->regs[R_ESP]);
335 GETREG(env->regs[8]);
336 GETREG(env->regs[9]);
337 GETREG(env->regs[10]);
338 GETREG(env->regs[11]);
339 GETREG(env->regs[12]);
340 GETREG(env->regs[13]);
341 GETREG(env->regs[14]);
342 GETREG(env->regs[15]);
343
344 GETREG(env->eip);
345 GETREG32(env->eflags);
346 GETREG32(env->segs[R_CS].selector);
347 GETREG32(env->segs[R_SS].selector);
348 GETREG32(env->segs[R_DS].selector);
349 GETREG32(env->segs[R_ES].selector);
350 GETREG32(env->segs[R_FS].selector);
351 GETREG32(env->segs[R_GS].selector);
352 /* XXX: convert floats */
353 for(i = 0; i < 8; i++) {
354 GETREGF(env->fpregs[i]);
355 }
356 GETREG32(env->fpuc);
357 GETREG32(fpus); /* XXX: convert fpus */
358 GETREG32(junk); /* XXX: convert tags */
359 GETREG32(junk); /* fiseg */
360 GETREG32(junk); /* fioff */
361 GETREG32(junk); /* foseg */
362 GETREG32(junk); /* fooff */
363 GETREG32(junk); /* fop */
364
365#undef GETREG
366#undef GETREG32
367#undef GETREGF
368}
369
370#elif defined(TARGET_I386)
bellard6da41ea2004-01-04 15:48:38 +0000371static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
372{
373 int i, fpus;
balrog5ad265e2007-10-31 00:21:35 +0000374 uint32_t *registers = (uint32_t *)mem_buf;
375
376#ifdef TARGET_X86_64
377 /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
378 uint64_t *registers64 = (uint64_t *)mem_buf;
379
380 if (env->hflags & HF_CS64_MASK) {
381 registers64[0] = tswap64(env->regs[R_EAX]);
382 registers64[1] = tswap64(env->regs[R_EBX]);
383 registers64[2] = tswap64(env->regs[R_ECX]);
384 registers64[3] = tswap64(env->regs[R_EDX]);
385 registers64[4] = tswap64(env->regs[R_ESI]);
386 registers64[5] = tswap64(env->regs[R_EDI]);
387 registers64[6] = tswap64(env->regs[R_EBP]);
388 registers64[7] = tswap64(env->regs[R_ESP]);
389 for(i = 8; i < 16; i++) {
390 registers64[i] = tswap64(env->regs[i]);
391 }
392 registers64[16] = tswap64(env->eip);
393
394 registers = (uint32_t *)&registers64[17];
395 registers[0] = tswap32(env->eflags);
396 registers[1] = tswap32(env->segs[R_CS].selector);
397 registers[2] = tswap32(env->segs[R_SS].selector);
398 registers[3] = tswap32(env->segs[R_DS].selector);
399 registers[4] = tswap32(env->segs[R_ES].selector);
400 registers[5] = tswap32(env->segs[R_FS].selector);
401 registers[6] = tswap32(env->segs[R_GS].selector);
402 /* XXX: convert floats */
403 for(i = 0; i < 8; i++) {
404 memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
405 }
406 registers[27] = tswap32(env->fpuc); /* fctrl */
407 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
408 registers[28] = tswap32(fpus); /* fstat */
409 registers[29] = 0; /* ftag */
410 registers[30] = 0; /* fiseg */
411 registers[31] = 0; /* fioff */
412 registers[32] = 0; /* foseg */
413 registers[33] = 0; /* fooff */
414 registers[34] = 0; /* fop */
415 for(i = 0; i < 16; i++) {
416 memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
417 }
418 registers[99] = tswap32(env->mxcsr);
419
420 return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
421 }
422#endif
bellard6da41ea2004-01-04 15:48:38 +0000423
424 for(i = 0; i < 8; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000425 registers[i] = env->regs[i];
bellard6da41ea2004-01-04 15:48:38 +0000426 }
bellarde95c8d52004-09-30 22:22:08 +0000427 registers[8] = env->eip;
428 registers[9] = env->eflags;
429 registers[10] = env->segs[R_CS].selector;
430 registers[11] = env->segs[R_SS].selector;
431 registers[12] = env->segs[R_DS].selector;
432 registers[13] = env->segs[R_ES].selector;
433 registers[14] = env->segs[R_FS].selector;
434 registers[15] = env->segs[R_GS].selector;
bellard6da41ea2004-01-04 15:48:38 +0000435 /* XXX: convert floats */
436 for(i = 0; i < 8; i++) {
437 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
438 }
bellarde95c8d52004-09-30 22:22:08 +0000439 registers[36] = env->fpuc;
bellard6da41ea2004-01-04 15:48:38 +0000440 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
bellarde95c8d52004-09-30 22:22:08 +0000441 registers[37] = fpus;
442 registers[38] = 0; /* XXX: convert tags */
443 registers[39] = 0; /* fiseg */
444 registers[40] = 0; /* fioff */
445 registers[41] = 0; /* foseg */
446 registers[42] = 0; /* fooff */
447 registers[43] = 0; /* fop */
ths3b46e622007-09-17 08:09:54 +0000448
bellarde95c8d52004-09-30 22:22:08 +0000449 for(i = 0; i < 16; i++)
450 tswapls(&registers[i]);
451 for(i = 36; i < 44; i++)
452 tswapls(&registers[i]);
bellard6da41ea2004-01-04 15:48:38 +0000453 return 44 * 4;
454}
455
456static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
457{
458 uint32_t *registers = (uint32_t *)mem_buf;
459 int i;
460
461 for(i = 0; i < 8; i++) {
462 env->regs[i] = tswapl(registers[i]);
463 }
bellarde95c8d52004-09-30 22:22:08 +0000464 env->eip = tswapl(registers[8]);
465 env->eflags = tswapl(registers[9]);
bellard6da41ea2004-01-04 15:48:38 +0000466#if defined(CONFIG_USER_ONLY)
467#define LOAD_SEG(index, sreg)\
468 if (tswapl(registers[index]) != env->segs[sreg].selector)\
469 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
470 LOAD_SEG(10, R_CS);
471 LOAD_SEG(11, R_SS);
472 LOAD_SEG(12, R_DS);
473 LOAD_SEG(13, R_ES);
474 LOAD_SEG(14, R_FS);
475 LOAD_SEG(15, R_GS);
476#endif
477}
478
bellard9e62fd72004-01-05 22:49:06 +0000479#elif defined (TARGET_PPC)
bellard9e62fd72004-01-05 22:49:06 +0000480static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
481{
bellarda541f292004-04-12 20:39:29 +0000482 uint32_t *registers = (uint32_t *)mem_buf, tmp;
bellard9e62fd72004-01-05 22:49:06 +0000483 int i;
484
485 /* fill in gprs */
bellarda541f292004-04-12 20:39:29 +0000486 for(i = 0; i < 32; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000487 registers[i] = tswapl(env->gpr[i]);
bellard9e62fd72004-01-05 22:49:06 +0000488 }
489 /* fill in fprs */
490 for (i = 0; i < 32; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000491 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
492 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
bellard9e62fd72004-01-05 22:49:06 +0000493 }
494 /* nip, msr, ccr, lnk, ctr, xer, mq */
bellarde95c8d52004-09-30 22:22:08 +0000495 registers[96] = tswapl(env->nip);
j_mayer0411a972007-10-25 21:35:50 +0000496 registers[97] = tswapl(env->msr);
bellard9e62fd72004-01-05 22:49:06 +0000497 tmp = 0;
498 for (i = 0; i < 8; i++)
bellarda541f292004-04-12 20:39:29 +0000499 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
bellarde95c8d52004-09-30 22:22:08 +0000500 registers[98] = tswapl(tmp);
501 registers[99] = tswapl(env->lr);
502 registers[100] = tswapl(env->ctr);
j_mayer76a66252007-03-07 08:32:30 +0000503 registers[101] = tswapl(ppc_load_xer(env));
bellarde95c8d52004-09-30 22:22:08 +0000504 registers[102] = 0;
bellard9e62fd72004-01-05 22:49:06 +0000505
bellarda541f292004-04-12 20:39:29 +0000506 return 103 * 4;
bellard9e62fd72004-01-05 22:49:06 +0000507}
508
509static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
510{
511 uint32_t *registers = (uint32_t *)mem_buf;
512 int i;
513
514 /* fill in gprs */
515 for (i = 0; i < 32; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000516 env->gpr[i] = tswapl(registers[i]);
bellard9e62fd72004-01-05 22:49:06 +0000517 }
518 /* fill in fprs */
519 for (i = 0; i < 32; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000520 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
521 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
bellard9e62fd72004-01-05 22:49:06 +0000522 }
523 /* nip, msr, ccr, lnk, ctr, xer, mq */
bellarde95c8d52004-09-30 22:22:08 +0000524 env->nip = tswapl(registers[96]);
j_mayer0411a972007-10-25 21:35:50 +0000525 ppc_store_msr(env, tswapl(registers[97]));
bellarde95c8d52004-09-30 22:22:08 +0000526 registers[98] = tswapl(registers[98]);
bellard9e62fd72004-01-05 22:49:06 +0000527 for (i = 0; i < 8; i++)
bellarda541f292004-04-12 20:39:29 +0000528 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
bellarde95c8d52004-09-30 22:22:08 +0000529 env->lr = tswapl(registers[99]);
530 env->ctr = tswapl(registers[100]);
j_mayer76a66252007-03-07 08:32:30 +0000531 ppc_store_xer(env, tswapl(registers[101]));
bellarde95c8d52004-09-30 22:22:08 +0000532}
533#elif defined (TARGET_SPARC)
534static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
535{
bellard34751872005-07-02 14:31:34 +0000536 target_ulong *registers = (target_ulong *)mem_buf;
bellarde95c8d52004-09-30 22:22:08 +0000537 int i;
538
539 /* fill in g0..g7 */
bellard48b2c192005-10-30 16:08:23 +0000540 for(i = 0; i < 8; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000541 registers[i] = tswapl(env->gregs[i]);
542 }
543 /* fill in register window */
544 for(i = 0; i < 24; i++) {
545 registers[i + 8] = tswapl(env->regwptr[i]);
546 }
bellard9d9754a2006-06-25 15:32:37 +0000547#ifndef TARGET_SPARC64
bellarde95c8d52004-09-30 22:22:08 +0000548 /* fill in fprs */
549 for (i = 0; i < 32; i++) {
550 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
551 }
552 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
553 registers[64] = tswapl(env->y);
bellard34751872005-07-02 14:31:34 +0000554 {
555 target_ulong tmp;
556
557 tmp = GET_PSR(env);
558 registers[65] = tswapl(tmp);
559 }
bellarde95c8d52004-09-30 22:22:08 +0000560 registers[66] = tswapl(env->wim);
561 registers[67] = tswapl(env->tbr);
562 registers[68] = tswapl(env->pc);
563 registers[69] = tswapl(env->npc);
564 registers[70] = tswapl(env->fsr);
565 registers[71] = 0; /* csr */
566 registers[72] = 0;
bellard34751872005-07-02 14:31:34 +0000567 return 73 * sizeof(target_ulong);
568#else
bellard9d9754a2006-06-25 15:32:37 +0000569 /* fill in fprs */
570 for (i = 0; i < 64; i += 2) {
571 uint64_t tmp;
572
blueswir189795962007-04-14 16:15:48 +0000573 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
574 tmp |= *(uint32_t *)&env->fpr[i + 1];
575 registers[i / 2 + 32] = tswap64(tmp);
bellard34751872005-07-02 14:31:34 +0000576 }
bellard9d9754a2006-06-25 15:32:37 +0000577 registers[64] = tswapl(env->pc);
578 registers[65] = tswapl(env->npc);
blueswir117d996e2007-07-07 20:53:22 +0000579 registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
580 ((env->asi & 0xff) << 24) |
581 ((env->pstate & 0xfff) << 8) |
582 GET_CWP64(env));
bellard9d9754a2006-06-25 15:32:37 +0000583 registers[67] = tswapl(env->fsr);
584 registers[68] = tswapl(env->fprs);
585 registers[69] = tswapl(env->y);
586 return 70 * sizeof(target_ulong);
bellard34751872005-07-02 14:31:34 +0000587#endif
bellarde95c8d52004-09-30 22:22:08 +0000588}
589
590static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
591{
bellard34751872005-07-02 14:31:34 +0000592 target_ulong *registers = (target_ulong *)mem_buf;
bellarde95c8d52004-09-30 22:22:08 +0000593 int i;
594
595 /* fill in g0..g7 */
596 for(i = 0; i < 7; i++) {
597 env->gregs[i] = tswapl(registers[i]);
598 }
599 /* fill in register window */
600 for(i = 0; i < 24; i++) {
bellard34751872005-07-02 14:31:34 +0000601 env->regwptr[i] = tswapl(registers[i + 8]);
bellarde95c8d52004-09-30 22:22:08 +0000602 }
bellard9d9754a2006-06-25 15:32:37 +0000603#ifndef TARGET_SPARC64
bellarde95c8d52004-09-30 22:22:08 +0000604 /* fill in fprs */
605 for (i = 0; i < 32; i++) {
606 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
607 }
608 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
609 env->y = tswapl(registers[64]);
bellarde80cfcf2004-12-19 23:18:01 +0000610 PUT_PSR(env, tswapl(registers[65]));
bellarde95c8d52004-09-30 22:22:08 +0000611 env->wim = tswapl(registers[66]);
612 env->tbr = tswapl(registers[67]);
613 env->pc = tswapl(registers[68]);
614 env->npc = tswapl(registers[69]);
615 env->fsr = tswapl(registers[70]);
bellard34751872005-07-02 14:31:34 +0000616#else
bellard9d9754a2006-06-25 15:32:37 +0000617 for (i = 0; i < 64; i += 2) {
blueswir189795962007-04-14 16:15:48 +0000618 uint64_t tmp;
619
620 tmp = tswap64(registers[i / 2 + 32]);
621 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
622 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
bellard34751872005-07-02 14:31:34 +0000623 }
bellard9d9754a2006-06-25 15:32:37 +0000624 env->pc = tswapl(registers[64]);
625 env->npc = tswapl(registers[65]);
blueswir117d996e2007-07-07 20:53:22 +0000626 {
627 uint64_t tmp = tswapl(registers[66]);
628
629 PUT_CCR(env, tmp >> 32);
630 env->asi = (tmp >> 24) & 0xff;
631 env->pstate = (tmp >> 8) & 0xfff;
632 PUT_CWP64(env, tmp & 0xff);
633 }
bellard9d9754a2006-06-25 15:32:37 +0000634 env->fsr = tswapl(registers[67]);
635 env->fprs = tswapl(registers[68]);
636 env->y = tswapl(registers[69]);
bellard34751872005-07-02 14:31:34 +0000637#endif
bellard9e62fd72004-01-05 22:49:06 +0000638}
bellard1fddef42005-04-17 19:16:13 +0000639#elif defined (TARGET_ARM)
640static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
641{
642 int i;
643 uint8_t *ptr;
bellard6da41ea2004-01-04 15:48:38 +0000644
bellard1fddef42005-04-17 19:16:13 +0000645 ptr = mem_buf;
646 /* 16 core integer registers (4 bytes each). */
647 for (i = 0; i < 16; i++)
648 {
649 *(uint32_t *)ptr = tswapl(env->regs[i]);
650 ptr += 4;
651 }
652 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
653 Not yet implemented. */
654 memset (ptr, 0, 8 * 12 + 4);
655 ptr += 8 * 12 + 4;
656 /* CPSR (4 bytes). */
bellardb5ff1b32005-11-26 10:38:39 +0000657 *(uint32_t *)ptr = tswapl (cpsr_read(env));
bellard1fddef42005-04-17 19:16:13 +0000658 ptr += 4;
659
660 return ptr - mem_buf;
661}
662
663static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
664{
665 int i;
666 uint8_t *ptr;
667
668 ptr = mem_buf;
669 /* Core integer registers. */
670 for (i = 0; i < 16; i++)
671 {
672 env->regs[i] = tswapl(*(uint32_t *)ptr);
673 ptr += 4;
674 }
675 /* Ignore FPA regs and scr. */
676 ptr += 8 * 12 + 4;
bellardb5ff1b32005-11-26 10:38:39 +0000677 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
bellard1fddef42005-04-17 19:16:13 +0000678}
pbrooke6e59062006-10-22 00:18:54 +0000679#elif defined (TARGET_M68K)
680static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
681{
682 int i;
683 uint8_t *ptr;
684 CPU_DoubleU u;
685
686 ptr = mem_buf;
687 /* D0-D7 */
688 for (i = 0; i < 8; i++) {
689 *(uint32_t *)ptr = tswapl(env->dregs[i]);
690 ptr += 4;
691 }
692 /* A0-A7 */
693 for (i = 0; i < 8; i++) {
694 *(uint32_t *)ptr = tswapl(env->aregs[i]);
695 ptr += 4;
696 }
697 *(uint32_t *)ptr = tswapl(env->sr);
698 ptr += 4;
699 *(uint32_t *)ptr = tswapl(env->pc);
700 ptr += 4;
701 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
702 ColdFire has 8-bit double precision registers. */
703 for (i = 0; i < 8; i++) {
704 u.d = env->fregs[i];
705 *(uint32_t *)ptr = tswap32(u.l.upper);
706 *(uint32_t *)ptr = tswap32(u.l.lower);
707 }
708 /* FP control regs (not implemented). */
709 memset (ptr, 0, 3 * 4);
710 ptr += 3 * 4;
711
712 return ptr - mem_buf;
713}
714
715static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
716{
717 int i;
718 uint8_t *ptr;
719 CPU_DoubleU u;
720
721 ptr = mem_buf;
722 /* D0-D7 */
723 for (i = 0; i < 8; i++) {
724 env->dregs[i] = tswapl(*(uint32_t *)ptr);
725 ptr += 4;
726 }
727 /* A0-A7 */
728 for (i = 0; i < 8; i++) {
729 env->aregs[i] = tswapl(*(uint32_t *)ptr);
730 ptr += 4;
731 }
732 env->sr = tswapl(*(uint32_t *)ptr);
733 ptr += 4;
734 env->pc = tswapl(*(uint32_t *)ptr);
735 ptr += 4;
736 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
737 ColdFire has 8-bit double precision registers. */
738 for (i = 0; i < 8; i++) {
ths5fafdf22007-09-16 21:08:06 +0000739 u.l.upper = tswap32(*(uint32_t *)ptr);
pbrooke6e59062006-10-22 00:18:54 +0000740 u.l.lower = tswap32(*(uint32_t *)ptr);
741 env->fregs[i] = u.d;
742 }
743 /* FP control regs (not implemented). */
744 ptr += 3 * 4;
745}
bellard6f970bd2005-12-05 19:55:19 +0000746#elif defined (TARGET_MIPS)
747static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
748{
749 int i;
750 uint8_t *ptr;
751
752 ptr = mem_buf;
753 for (i = 0; i < 32; i++)
754 {
thsd0dc7dc2008-02-12 21:01:26 +0000755 *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
ths2052caa2007-06-01 13:18:19 +0000756 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000757 }
758
ths7ac256b2007-10-25 21:30:37 +0000759 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
ths2052caa2007-06-01 13:18:19 +0000760 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000761
thsd0dc7dc2008-02-12 21:01:26 +0000762 *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
ths2052caa2007-06-01 13:18:19 +0000763 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000764
thsd0dc7dc2008-02-12 21:01:26 +0000765 *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
ths2052caa2007-06-01 13:18:19 +0000766 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000767
ths2052caa2007-06-01 13:18:19 +0000768 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
769 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000770
ths7ac256b2007-10-25 21:30:37 +0000771 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
ths2052caa2007-06-01 13:18:19 +0000772 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000773
thsead93602007-09-06 00:18:15 +0000774 *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
ths2052caa2007-06-01 13:18:19 +0000775 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000776
ths36d23952007-02-28 22:37:42 +0000777 if (env->CP0_Config1 & (1 << CP0C1_FP))
ths8e33c082006-12-11 19:22:27 +0000778 {
ths36d23952007-02-28 22:37:42 +0000779 for (i = 0; i < 32; i++)
780 {
ths7ac256b2007-10-25 21:30:37 +0000781 if (env->CP0_Status & (1 << CP0St_FR))
782 *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
783 else
784 *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
ths2052caa2007-06-01 13:18:19 +0000785 ptr += sizeof(target_ulong);
ths36d23952007-02-28 22:37:42 +0000786 }
787
ths7ac256b2007-10-25 21:30:37 +0000788 *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
ths2052caa2007-06-01 13:18:19 +0000789 ptr += sizeof(target_ulong);
ths36d23952007-02-28 22:37:42 +0000790
ths7ac256b2007-10-25 21:30:37 +0000791 *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
ths2052caa2007-06-01 13:18:19 +0000792 ptr += sizeof(target_ulong);
ths8e33c082006-12-11 19:22:27 +0000793 }
794
ths7ac256b2007-10-25 21:30:37 +0000795 /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
796 *(target_ulong *)ptr = 0;
797 ptr += sizeof(target_ulong);
798
799 /* Registers for embedded use, we just pad them. */
800 for (i = 0; i < 16; i++)
801 {
802 *(target_ulong *)ptr = 0;
803 ptr += sizeof(target_ulong);
804 }
805
806 /* Processor ID. */
807 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
808 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000809
810 return ptr - mem_buf;
811}
812
ths8e33c082006-12-11 19:22:27 +0000813/* convert MIPS rounding mode in FCR31 to IEEE library */
814static unsigned int ieee_rm[] =
815 {
816 float_round_nearest_even,
817 float_round_to_zero,
818 float_round_up,
819 float_round_down
820 };
821#define RESTORE_ROUNDING_MODE \
thsead93602007-09-06 00:18:15 +0000822 set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
ths8e33c082006-12-11 19:22:27 +0000823
bellard6f970bd2005-12-05 19:55:19 +0000824static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
825{
826 int i;
827 uint8_t *ptr;
828
829 ptr = mem_buf;
830 for (i = 0; i < 32; i++)
831 {
thsd0dc7dc2008-02-12 21:01:26 +0000832 env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000833 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000834 }
835
ths2052caa2007-06-01 13:18:19 +0000836 env->CP0_Status = tswapl(*(target_ulong *)ptr);
837 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000838
thsd0dc7dc2008-02-12 21:01:26 +0000839 env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000840 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000841
thsd0dc7dc2008-02-12 21:01:26 +0000842 env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000843 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000844
ths2052caa2007-06-01 13:18:19 +0000845 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
846 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000847
ths2052caa2007-06-01 13:18:19 +0000848 env->CP0_Cause = tswapl(*(target_ulong *)ptr);
849 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000850
thsead93602007-09-06 00:18:15 +0000851 env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000852 ptr += sizeof(target_ulong);
ths8e33c082006-12-11 19:22:27 +0000853
ths36d23952007-02-28 22:37:42 +0000854 if (env->CP0_Config1 & (1 << CP0C1_FP))
ths8e33c082006-12-11 19:22:27 +0000855 {
ths36d23952007-02-28 22:37:42 +0000856 for (i = 0; i < 32; i++)
857 {
ths7ac256b2007-10-25 21:30:37 +0000858 if (env->CP0_Status & (1 << CP0St_FR))
859 env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
860 else
861 env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000862 ptr += sizeof(target_ulong);
ths36d23952007-02-28 22:37:42 +0000863 }
864
ths7ac256b2007-10-25 21:30:37 +0000865 env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
ths2052caa2007-06-01 13:18:19 +0000866 ptr += sizeof(target_ulong);
ths8e33c082006-12-11 19:22:27 +0000867
ths7ac256b2007-10-25 21:30:37 +0000868 /* The remaining registers are assumed to be read-only. */
ths8e33c082006-12-11 19:22:27 +0000869
ths36d23952007-02-28 22:37:42 +0000870 /* set rounding mode */
871 RESTORE_ROUNDING_MODE;
ths8e33c082006-12-11 19:22:27 +0000872
873#ifndef CONFIG_SOFTFLOAT
ths36d23952007-02-28 22:37:42 +0000874 /* no floating point exception for native float */
875 SET_FP_ENABLE(env->fcr31, 0);
ths8e33c082006-12-11 19:22:27 +0000876#endif
ths36d23952007-02-28 22:37:42 +0000877 }
bellard6f970bd2005-12-05 19:55:19 +0000878}
bellardfdf9b3e2006-04-27 21:07:38 +0000879#elif defined (TARGET_SH4)
ths6ef99fc2007-05-13 16:36:24 +0000880
881/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
882
bellardfdf9b3e2006-04-27 21:07:38 +0000883static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
884{
885 uint32_t *ptr = (uint32_t *)mem_buf;
886 int i;
887
888#define SAVE(x) *ptr++=tswapl(x)
pbrook9c2a9ea2006-06-18 19:12:54 +0000889 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
890 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
891 } else {
892 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
893 }
894 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
bellardfdf9b3e2006-04-27 21:07:38 +0000895 SAVE (env->pc);
896 SAVE (env->pr);
897 SAVE (env->gbr);
898 SAVE (env->vbr);
899 SAVE (env->mach);
900 SAVE (env->macl);
901 SAVE (env->sr);
ths6ef99fc2007-05-13 16:36:24 +0000902 SAVE (env->fpul);
903 SAVE (env->fpscr);
904 for (i = 0; i < 16; i++)
905 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
906 SAVE (env->ssr);
907 SAVE (env->spc);
908 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
909 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
bellardfdf9b3e2006-04-27 21:07:38 +0000910 return ((uint8_t *)ptr - mem_buf);
911}
912
913static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
914{
915 uint32_t *ptr = (uint32_t *)mem_buf;
916 int i;
917
918#define LOAD(x) (x)=*ptr++;
pbrook9c2a9ea2006-06-18 19:12:54 +0000919 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
920 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
921 } else {
922 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
923 }
924 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
bellardfdf9b3e2006-04-27 21:07:38 +0000925 LOAD (env->pc);
926 LOAD (env->pr);
927 LOAD (env->gbr);
928 LOAD (env->vbr);
929 LOAD (env->mach);
930 LOAD (env->macl);
931 LOAD (env->sr);
ths6ef99fc2007-05-13 16:36:24 +0000932 LOAD (env->fpul);
933 LOAD (env->fpscr);
934 for (i = 0; i < 16; i++)
935 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
936 LOAD (env->ssr);
937 LOAD (env->spc);
938 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
939 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
bellardfdf9b3e2006-04-27 21:07:38 +0000940}
thsf1ccf902007-10-08 13:16:14 +0000941#elif defined (TARGET_CRIS)
942
943static int cris_save_32 (unsigned char *d, uint32_t value)
944{
945 *d++ = (value);
946 *d++ = (value >>= 8);
947 *d++ = (value >>= 8);
948 *d++ = (value >>= 8);
949 return 4;
950}
951static int cris_save_16 (unsigned char *d, uint32_t value)
952{
953 *d++ = (value);
954 *d++ = (value >>= 8);
955 return 2;
956}
957static int cris_save_8 (unsigned char *d, uint32_t value)
958{
959 *d++ = (value);
960 return 1;
961}
962
963/* FIXME: this will bug on archs not supporting unaligned word accesses. */
964static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
965{
966 uint8_t *ptr = mem_buf;
967 uint8_t srs;
968 int i;
969
970 for (i = 0; i < 16; i++)
971 ptr += cris_save_32 (ptr, env->regs[i]);
972
edgar_igl90046272008-02-28 08:28:32 +0000973 srs = env->pregs[PR_SRS];
thsf1ccf902007-10-08 13:16:14 +0000974
975 ptr += cris_save_8 (ptr, env->pregs[0]);
976 ptr += cris_save_8 (ptr, env->pregs[1]);
977 ptr += cris_save_32 (ptr, env->pregs[2]);
978 ptr += cris_save_8 (ptr, srs);
979 ptr += cris_save_16 (ptr, env->pregs[4]);
980
981 for (i = 5; i < 16; i++)
982 ptr += cris_save_32 (ptr, env->pregs[i]);
983
984 ptr += cris_save_32 (ptr, env->pc);
985
986 for (i = 0; i < 16; i++)
987 ptr += cris_save_32 (ptr, env->sregs[srs][i]);
988
989 return ((uint8_t *)ptr - mem_buf);
990}
991
992static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
993{
994 uint32_t *ptr = (uint32_t *)mem_buf;
995 int i;
996
997#define LOAD(x) (x)=*ptr++;
998 for (i = 0; i < 16; i++) LOAD(env->regs[i]);
999 LOAD (env->pc);
1000}
bellard1fddef42005-04-17 19:16:13 +00001001#else
bellard6da41ea2004-01-04 15:48:38 +00001002static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
1003{
1004 return 0;
1005}
1006
1007static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
1008{
1009}
1010
1011#endif
bellardb4608c02003-06-27 17:34:32 +00001012
bellard1fddef42005-04-17 19:16:13 +00001013static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
bellardb4608c02003-06-27 17:34:32 +00001014{
bellardb4608c02003-06-27 17:34:32 +00001015 const char *p;
bellard858693c2004-03-31 18:52:07 +00001016 int ch, reg_size, type;
bellardb4608c02003-06-27 17:34:32 +00001017 char buf[4096];
thsf1ccf902007-10-08 13:16:14 +00001018 uint8_t mem_buf[4096];
bellardb4608c02003-06-27 17:34:32 +00001019 uint32_t *registers;
bellard9d9754a2006-06-25 15:32:37 +00001020 target_ulong addr, len;
ths3b46e622007-09-17 08:09:54 +00001021
bellard858693c2004-03-31 18:52:07 +00001022#ifdef DEBUG_GDB
1023 printf("command='%s'\n", line_buf);
bellard4c3a88a2003-07-26 12:06:08 +00001024#endif
bellard858693c2004-03-31 18:52:07 +00001025 p = line_buf;
1026 ch = *p++;
1027 switch(ch) {
1028 case '?':
bellard1fddef42005-04-17 19:16:13 +00001029 /* TODO: Make this return the correct value for user-mode. */
bellard858693c2004-03-31 18:52:07 +00001030 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
1031 put_packet(s, buf);
1032 break;
1033 case 'c':
1034 if (*p != '\0') {
bellard9d9754a2006-06-25 15:32:37 +00001035 addr = strtoull(p, (char **)&p, 16);
bellardc33a3462003-07-29 20:50:33 +00001036#if defined(TARGET_I386)
bellard858693c2004-03-31 18:52:07 +00001037 env->eip = addr;
bellard5be1a8e2004-01-04 23:51:58 +00001038#elif defined (TARGET_PPC)
bellard858693c2004-03-31 18:52:07 +00001039 env->nip = addr;
bellard8d5f07f2004-10-04 21:23:09 +00001040#elif defined (TARGET_SPARC)
1041 env->pc = addr;
1042 env->npc = addr + 4;
bellardb5ff1b32005-11-26 10:38:39 +00001043#elif defined (TARGET_ARM)
1044 env->regs[15] = addr;
bellardfdf9b3e2006-04-27 21:07:38 +00001045#elif defined (TARGET_SH4)
ths8fac5802007-07-12 10:05:07 +00001046 env->pc = addr;
1047#elif defined (TARGET_MIPS)
thsead93602007-09-06 00:18:15 +00001048 env->PC[env->current_tc] = addr;
thsf1ccf902007-10-08 13:16:14 +00001049#elif defined (TARGET_CRIS)
1050 env->pc = addr;
bellardc33a3462003-07-29 20:50:33 +00001051#endif
bellard858693c2004-03-31 18:52:07 +00001052 }
edgar_iglba70a622008-03-14 06:10:42 +00001053 gdb_continue(s);
bellard41625032005-04-24 10:07:11 +00001054 return RS_IDLE;
bellard858693c2004-03-31 18:52:07 +00001055 case 's':
1056 if (*p != '\0') {
ths8fac5802007-07-12 10:05:07 +00001057 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001058#if defined(TARGET_I386)
1059 env->eip = addr;
1060#elif defined (TARGET_PPC)
1061 env->nip = addr;
bellard8d5f07f2004-10-04 21:23:09 +00001062#elif defined (TARGET_SPARC)
1063 env->pc = addr;
1064 env->npc = addr + 4;
bellardb5ff1b32005-11-26 10:38:39 +00001065#elif defined (TARGET_ARM)
1066 env->regs[15] = addr;
bellardfdf9b3e2006-04-27 21:07:38 +00001067#elif defined (TARGET_SH4)
ths8fac5802007-07-12 10:05:07 +00001068 env->pc = addr;
1069#elif defined (TARGET_MIPS)
thsead93602007-09-06 00:18:15 +00001070 env->PC[env->current_tc] = addr;
thsf1ccf902007-10-08 13:16:14 +00001071#elif defined (TARGET_CRIS)
1072 env->pc = addr;
bellard858693c2004-03-31 18:52:07 +00001073#endif
1074 }
1075 cpu_single_step(env, 1);
edgar_iglba70a622008-03-14 06:10:42 +00001076 gdb_continue(s);
bellard41625032005-04-24 10:07:11 +00001077 return RS_IDLE;
pbrooka2d1eba2007-01-28 03:10:55 +00001078 case 'F':
1079 {
1080 target_ulong ret;
1081 target_ulong err;
1082
1083 ret = strtoull(p, (char **)&p, 16);
1084 if (*p == ',') {
1085 p++;
1086 err = strtoull(p, (char **)&p, 16);
1087 } else {
1088 err = 0;
1089 }
1090 if (*p == ',')
1091 p++;
1092 type = *p;
1093 if (gdb_current_syscall_cb)
1094 gdb_current_syscall_cb(s->env, ret, err);
1095 if (type == 'C') {
1096 put_packet(s, "T02");
1097 } else {
edgar_iglba70a622008-03-14 06:10:42 +00001098 gdb_continue(s);
pbrooka2d1eba2007-01-28 03:10:55 +00001099 }
1100 }
1101 break;
bellard858693c2004-03-31 18:52:07 +00001102 case 'g':
1103 reg_size = cpu_gdb_read_registers(env, mem_buf);
1104 memtohex(buf, mem_buf, reg_size);
1105 put_packet(s, buf);
1106 break;
1107 case 'G':
1108 registers = (void *)mem_buf;
1109 len = strlen(p) / 2;
1110 hextomem((uint8_t *)registers, p, len);
1111 cpu_gdb_write_registers(env, mem_buf, len);
1112 put_packet(s, "OK");
1113 break;
1114 case 'm':
bellard9d9754a2006-06-25 15:32:37 +00001115 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001116 if (*p == ',')
1117 p++;
bellard9d9754a2006-06-25 15:32:37 +00001118 len = strtoull(p, NULL, 16);
bellard6f970bd2005-12-05 19:55:19 +00001119 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
1120 put_packet (s, "E14");
1121 } else {
1122 memtohex(buf, mem_buf, len);
1123 put_packet(s, buf);
1124 }
bellard858693c2004-03-31 18:52:07 +00001125 break;
1126 case 'M':
bellard9d9754a2006-06-25 15:32:37 +00001127 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001128 if (*p == ',')
1129 p++;
bellard9d9754a2006-06-25 15:32:37 +00001130 len = strtoull(p, (char **)&p, 16);
bellardb328f872005-01-17 22:03:16 +00001131 if (*p == ':')
bellard858693c2004-03-31 18:52:07 +00001132 p++;
1133 hextomem(mem_buf, p, len);
1134 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
bellard905f20b2005-04-26 21:09:55 +00001135 put_packet(s, "E14");
bellard858693c2004-03-31 18:52:07 +00001136 else
1137 put_packet(s, "OK");
1138 break;
1139 case 'Z':
1140 type = strtoul(p, (char **)&p, 16);
1141 if (*p == ',')
1142 p++;
bellard9d9754a2006-06-25 15:32:37 +00001143 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001144 if (*p == ',')
1145 p++;
bellard9d9754a2006-06-25 15:32:37 +00001146 len = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001147 if (type == 0 || type == 1) {
1148 if (cpu_breakpoint_insert(env, addr) < 0)
bellard4c3a88a2003-07-26 12:06:08 +00001149 goto breakpoint_error;
bellard858693c2004-03-31 18:52:07 +00001150 put_packet(s, "OK");
pbrook6658ffb2007-03-16 23:58:11 +00001151#ifndef CONFIG_USER_ONLY
1152 } else if (type == 2) {
1153 if (cpu_watchpoint_insert(env, addr) < 0)
1154 goto breakpoint_error;
1155 put_packet(s, "OK");
1156#endif
bellard858693c2004-03-31 18:52:07 +00001157 } else {
1158 breakpoint_error:
bellard905f20b2005-04-26 21:09:55 +00001159 put_packet(s, "E22");
bellard858693c2004-03-31 18:52:07 +00001160 }
1161 break;
1162 case 'z':
1163 type = strtoul(p, (char **)&p, 16);
1164 if (*p == ',')
1165 p++;
bellard9d9754a2006-06-25 15:32:37 +00001166 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001167 if (*p == ',')
1168 p++;
bellard9d9754a2006-06-25 15:32:37 +00001169 len = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001170 if (type == 0 || type == 1) {
1171 cpu_breakpoint_remove(env, addr);
1172 put_packet(s, "OK");
pbrook6658ffb2007-03-16 23:58:11 +00001173#ifndef CONFIG_USER_ONLY
1174 } else if (type == 2) {
1175 cpu_watchpoint_remove(env, addr);
1176 put_packet(s, "OK");
1177#endif
bellard858693c2004-03-31 18:52:07 +00001178 } else {
1179 goto breakpoint_error;
1180 }
1181 break;
ths831b7822007-01-18 20:06:33 +00001182#ifdef CONFIG_LINUX_USER
pbrook978efd62006-06-17 18:30:42 +00001183 case 'q':
1184 if (strncmp(p, "Offsets", 7) == 0) {
1185 TaskState *ts = env->opaque;
1186
thsfe834d02007-06-03 17:08:32 +00001187 sprintf(buf,
pbrookcd041682007-11-11 14:52:02 +00001188 "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1189 ";Bss=" TARGET_ABI_FMT_lx,
thsfe834d02007-06-03 17:08:32 +00001190 ts->info->code_offset,
1191 ts->info->data_offset,
1192 ts->info->data_offset);
pbrook978efd62006-06-17 18:30:42 +00001193 put_packet(s, buf);
1194 break;
1195 }
1196 /* Fall through. */
1197#endif
bellard858693c2004-03-31 18:52:07 +00001198 default:
1199 // unknown_command:
1200 /* put empty packet */
1201 buf[0] = '\0';
1202 put_packet(s, buf);
1203 break;
1204 }
1205 return RS_IDLE;
1206}
1207
bellard612458f2005-01-03 23:34:06 +00001208extern void tb_flush(CPUState *env);
1209
bellard1fddef42005-04-17 19:16:13 +00001210#ifndef CONFIG_USER_ONLY
bellard858693c2004-03-31 18:52:07 +00001211static void gdb_vm_stopped(void *opaque, int reason)
1212{
1213 GDBState *s = opaque;
1214 char buf[256];
1215 int ret;
1216
pbrooka2d1eba2007-01-28 03:10:55 +00001217 if (s->state == RS_SYSCALL)
1218 return;
1219
bellard858693c2004-03-31 18:52:07 +00001220 /* disable single step if it was enable */
bellard6a00d602005-11-21 23:25:50 +00001221 cpu_single_step(s->env, 0);
bellard858693c2004-03-31 18:52:07 +00001222
bellarde80cfcf2004-12-19 23:18:01 +00001223 if (reason == EXCP_DEBUG) {
pbrook6658ffb2007-03-16 23:58:11 +00001224 if (s->env->watchpoint_hit) {
pbrookaa6290b2007-04-14 22:35:50 +00001225 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1226 SIGTRAP,
pbrook6658ffb2007-03-16 23:58:11 +00001227 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1228 put_packet(s, buf);
1229 s->env->watchpoint_hit = 0;
1230 return;
1231 }
bellard6a00d602005-11-21 23:25:50 +00001232 tb_flush(s->env);
bellard858693c2004-03-31 18:52:07 +00001233 ret = SIGTRAP;
bellardbbeb7b52006-04-23 18:42:15 +00001234 } else if (reason == EXCP_INTERRUPT) {
1235 ret = SIGINT;
1236 } else {
bellard858693c2004-03-31 18:52:07 +00001237 ret = 0;
bellardbbeb7b52006-04-23 18:42:15 +00001238 }
bellard858693c2004-03-31 18:52:07 +00001239 snprintf(buf, sizeof(buf), "S%02x", ret);
1240 put_packet(s, buf);
1241}
bellard1fddef42005-04-17 19:16:13 +00001242#endif
bellard858693c2004-03-31 18:52:07 +00001243
pbrooka2d1eba2007-01-28 03:10:55 +00001244/* Send a gdb syscall request.
1245 This accepts limited printf-style format specifiers, specifically:
pbrooka87295e2007-05-26 15:09:38 +00001246 %x - target_ulong argument printed in hex.
1247 %lx - 64-bit argument printed in hex.
1248 %s - string pointer (target_ulong) and length (int) pair. */
pbrooka2d1eba2007-01-28 03:10:55 +00001249void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1250{
1251 va_list va;
1252 char buf[256];
1253 char *p;
1254 target_ulong addr;
pbrooka87295e2007-05-26 15:09:38 +00001255 uint64_t i64;
pbrooka2d1eba2007-01-28 03:10:55 +00001256 GDBState *s;
1257
1258 s = gdb_syscall_state;
1259 if (!s)
1260 return;
1261 gdb_current_syscall_cb = cb;
1262 s->state = RS_SYSCALL;
1263#ifndef CONFIG_USER_ONLY
1264 vm_stop(EXCP_DEBUG);
1265#endif
1266 s->state = RS_IDLE;
1267 va_start(va, fmt);
1268 p = buf;
1269 *(p++) = 'F';
1270 while (*fmt) {
1271 if (*fmt == '%') {
1272 fmt++;
1273 switch (*fmt++) {
1274 case 'x':
1275 addr = va_arg(va, target_ulong);
1276 p += sprintf(p, TARGET_FMT_lx, addr);
1277 break;
pbrooka87295e2007-05-26 15:09:38 +00001278 case 'l':
1279 if (*(fmt++) != 'x')
1280 goto bad_format;
1281 i64 = va_arg(va, uint64_t);
1282 p += sprintf(p, "%" PRIx64, i64);
1283 break;
pbrooka2d1eba2007-01-28 03:10:55 +00001284 case 's':
1285 addr = va_arg(va, target_ulong);
1286 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1287 break;
1288 default:
pbrooka87295e2007-05-26 15:09:38 +00001289 bad_format:
pbrooka2d1eba2007-01-28 03:10:55 +00001290 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1291 fmt - 1);
1292 break;
1293 }
1294 } else {
1295 *(p++) = *(fmt++);
1296 }
1297 }
pbrook8a93e022007-08-06 13:19:15 +00001298 *p = 0;
pbrooka2d1eba2007-01-28 03:10:55 +00001299 va_end(va);
1300 put_packet(s, buf);
1301#ifdef CONFIG_USER_ONLY
1302 gdb_handlesig(s->env, 0);
1303#else
1304 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1305#endif
1306}
1307
bellard6a00d602005-11-21 23:25:50 +00001308static void gdb_read_byte(GDBState *s, int ch)
bellard858693c2004-03-31 18:52:07 +00001309{
bellard6a00d602005-11-21 23:25:50 +00001310 CPUState *env = s->env;
bellard858693c2004-03-31 18:52:07 +00001311 int i, csum;
ths60fe76f2007-12-16 03:02:09 +00001312 uint8_t reply;
bellard858693c2004-03-31 18:52:07 +00001313
bellard1fddef42005-04-17 19:16:13 +00001314#ifndef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +00001315 if (s->last_packet_len) {
1316 /* Waiting for a response to the last packet. If we see the start
1317 of a new command then abandon the previous response. */
1318 if (ch == '-') {
1319#ifdef DEBUG_GDB
1320 printf("Got NACK, retransmitting\n");
1321#endif
thsffe8ab82007-12-16 03:16:05 +00001322 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
pbrook4046d912007-01-28 01:53:16 +00001323 }
1324#ifdef DEBUG_GDB
1325 else if (ch == '+')
1326 printf("Got ACK\n");
1327 else
1328 printf("Got '%c' when expecting ACK/NACK\n", ch);
1329#endif
1330 if (ch == '+' || ch == '$')
1331 s->last_packet_len = 0;
1332 if (ch != '$')
1333 return;
1334 }
bellard858693c2004-03-31 18:52:07 +00001335 if (vm_running) {
1336 /* when the CPU is running, we cannot do anything except stop
1337 it when receiving a char */
1338 vm_stop(EXCP_INTERRUPT);
ths5fafdf22007-09-16 21:08:06 +00001339 } else
bellard1fddef42005-04-17 19:16:13 +00001340#endif
bellard41625032005-04-24 10:07:11 +00001341 {
bellard858693c2004-03-31 18:52:07 +00001342 switch(s->state) {
1343 case RS_IDLE:
1344 if (ch == '$') {
1345 s->line_buf_index = 0;
1346 s->state = RS_GETLINE;
bellard4c3a88a2003-07-26 12:06:08 +00001347 }
1348 break;
bellard858693c2004-03-31 18:52:07 +00001349 case RS_GETLINE:
1350 if (ch == '#') {
1351 s->state = RS_CHKSUM1;
1352 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1353 s->state = RS_IDLE;
1354 } else {
1355 s->line_buf[s->line_buf_index++] = ch;
1356 }
1357 break;
1358 case RS_CHKSUM1:
1359 s->line_buf[s->line_buf_index] = '\0';
1360 s->line_csum = fromhex(ch) << 4;
1361 s->state = RS_CHKSUM2;
1362 break;
1363 case RS_CHKSUM2:
1364 s->line_csum |= fromhex(ch);
1365 csum = 0;
1366 for(i = 0; i < s->line_buf_index; i++) {
1367 csum += s->line_buf[i];
1368 }
1369 if (s->line_csum != (csum & 0xff)) {
ths60fe76f2007-12-16 03:02:09 +00001370 reply = '-';
1371 put_buffer(s, &reply, 1);
bellard858693c2004-03-31 18:52:07 +00001372 s->state = RS_IDLE;
1373 } else {
ths60fe76f2007-12-16 03:02:09 +00001374 reply = '+';
1375 put_buffer(s, &reply, 1);
bellard1fddef42005-04-17 19:16:13 +00001376 s->state = gdb_handle_packet(s, env, s->line_buf);
bellard858693c2004-03-31 18:52:07 +00001377 }
bellardb4608c02003-06-27 17:34:32 +00001378 break;
pbrooka2d1eba2007-01-28 03:10:55 +00001379 default:
1380 abort();
bellardb4608c02003-06-27 17:34:32 +00001381 }
1382 }
bellard858693c2004-03-31 18:52:07 +00001383}
1384
bellard1fddef42005-04-17 19:16:13 +00001385#ifdef CONFIG_USER_ONLY
1386int
1387gdb_handlesig (CPUState *env, int sig)
1388{
1389 GDBState *s;
1390 char buf[256];
1391 int n;
1392
1393 if (gdbserver_fd < 0)
1394 return sig;
1395
1396 s = &gdbserver_state;
1397
1398 /* disable single step if it was enabled */
1399 cpu_single_step(env, 0);
1400 tb_flush(env);
1401
1402 if (sig != 0)
1403 {
1404 snprintf(buf, sizeof(buf), "S%02x", sig);
1405 put_packet(s, buf);
1406 }
1407
bellard1fddef42005-04-17 19:16:13 +00001408 sig = 0;
1409 s->state = RS_IDLE;
bellard41625032005-04-24 10:07:11 +00001410 s->running_state = 0;
1411 while (s->running_state == 0) {
bellard1fddef42005-04-17 19:16:13 +00001412 n = read (s->fd, buf, 256);
1413 if (n > 0)
1414 {
1415 int i;
1416
1417 for (i = 0; i < n; i++)
bellard6a00d602005-11-21 23:25:50 +00001418 gdb_read_byte (s, buf[i]);
bellard1fddef42005-04-17 19:16:13 +00001419 }
1420 else if (n == 0 || errno != EAGAIN)
1421 {
1422 /* XXX: Connection closed. Should probably wait for annother
1423 connection before continuing. */
1424 return sig;
1425 }
bellard41625032005-04-24 10:07:11 +00001426 }
bellard1fddef42005-04-17 19:16:13 +00001427 return sig;
1428}
bellarde9009672005-04-26 20:42:36 +00001429
1430/* Tell the remote gdb that the process has exited. */
1431void gdb_exit(CPUState *env, int code)
1432{
1433 GDBState *s;
1434 char buf[4];
1435
1436 if (gdbserver_fd < 0)
1437 return;
1438
1439 s = &gdbserver_state;
1440
1441 snprintf(buf, sizeof(buf), "W%02x", code);
1442 put_packet(s, buf);
1443}
1444
bellard1fddef42005-04-17 19:16:13 +00001445
bellard7c9d8e02005-11-15 22:16:05 +00001446static void gdb_accept(void *opaque)
bellard858693c2004-03-31 18:52:07 +00001447{
1448 GDBState *s;
1449 struct sockaddr_in sockaddr;
1450 socklen_t len;
1451 int val, fd;
1452
1453 for(;;) {
1454 len = sizeof(sockaddr);
1455 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1456 if (fd < 0 && errno != EINTR) {
1457 perror("accept");
1458 return;
1459 } else if (fd >= 0) {
1460 break;
1461 }
1462 }
1463
1464 /* set short latency */
1465 val = 1;
bellard8f447cc2006-06-14 15:21:14 +00001466 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
ths3b46e622007-09-17 08:09:54 +00001467
bellard1fddef42005-04-17 19:16:13 +00001468 s = &gdbserver_state;
1469 memset (s, 0, sizeof (GDBState));
bellard6a00d602005-11-21 23:25:50 +00001470 s->env = first_cpu; /* XXX: allow to change CPU */
bellard858693c2004-03-31 18:52:07 +00001471 s->fd = fd;
1472
pbrooka2d1eba2007-01-28 03:10:55 +00001473 gdb_syscall_state = s;
1474
bellard858693c2004-03-31 18:52:07 +00001475 fcntl(fd, F_SETFL, O_NONBLOCK);
bellard858693c2004-03-31 18:52:07 +00001476}
1477
1478static int gdbserver_open(int port)
1479{
1480 struct sockaddr_in sockaddr;
1481 int fd, val, ret;
1482
1483 fd = socket(PF_INET, SOCK_STREAM, 0);
1484 if (fd < 0) {
1485 perror("socket");
1486 return -1;
1487 }
1488
1489 /* allow fast reuse */
1490 val = 1;
bellard8f447cc2006-06-14 15:21:14 +00001491 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
bellard858693c2004-03-31 18:52:07 +00001492
1493 sockaddr.sin_family = AF_INET;
1494 sockaddr.sin_port = htons(port);
1495 sockaddr.sin_addr.s_addr = 0;
1496 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1497 if (ret < 0) {
1498 perror("bind");
1499 return -1;
1500 }
1501 ret = listen(fd, 0);
1502 if (ret < 0) {
1503 perror("listen");
1504 return -1;
1505 }
bellard858693c2004-03-31 18:52:07 +00001506 return fd;
1507}
1508
1509int gdbserver_start(int port)
1510{
1511 gdbserver_fd = gdbserver_open(port);
1512 if (gdbserver_fd < 0)
1513 return -1;
1514 /* accept connections */
bellard7c9d8e02005-11-15 22:16:05 +00001515 gdb_accept (NULL);
bellardb4608c02003-06-27 17:34:32 +00001516 return 0;
1517}
pbrook4046d912007-01-28 01:53:16 +00001518#else
thsaa1f17c2007-07-11 22:48:58 +00001519static int gdb_chr_can_receive(void *opaque)
pbrook4046d912007-01-28 01:53:16 +00001520{
1521 return 1;
1522}
1523
thsaa1f17c2007-07-11 22:48:58 +00001524static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
pbrook4046d912007-01-28 01:53:16 +00001525{
1526 GDBState *s = opaque;
1527 int i;
1528
1529 for (i = 0; i < size; i++) {
1530 gdb_read_byte(s, buf[i]);
1531 }
1532}
1533
1534static void gdb_chr_event(void *opaque, int event)
1535{
1536 switch (event) {
1537 case CHR_EVENT_RESET:
1538 vm_stop(EXCP_INTERRUPT);
pbrooka2d1eba2007-01-28 03:10:55 +00001539 gdb_syscall_state = opaque;
pbrook4046d912007-01-28 01:53:16 +00001540 break;
1541 default:
1542 break;
1543 }
1544}
1545
pbrookcfc34752007-02-22 01:48:01 +00001546int gdbserver_start(const char *port)
pbrook4046d912007-01-28 01:53:16 +00001547{
1548 GDBState *s;
pbrookcfc34752007-02-22 01:48:01 +00001549 char gdbstub_port_name[128];
1550 int port_num;
1551 char *p;
1552 CharDriverState *chr;
pbrook4046d912007-01-28 01:53:16 +00001553
pbrookcfc34752007-02-22 01:48:01 +00001554 if (!port || !*port)
1555 return -1;
1556
1557 port_num = strtol(port, &p, 10);
1558 if (*p == 0) {
1559 /* A numeric value is interpreted as a port number. */
1560 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1561 "tcp::%d,nowait,nodelay,server", port_num);
1562 port = gdbstub_port_name;
1563 }
1564
1565 chr = qemu_chr_open(port);
pbrook4046d912007-01-28 01:53:16 +00001566 if (!chr)
1567 return -1;
1568
1569 s = qemu_mallocz(sizeof(GDBState));
1570 if (!s) {
1571 return -1;
1572 }
1573 s->env = first_cpu; /* XXX: allow to change CPU */
1574 s->chr = chr;
thsaa1f17c2007-07-11 22:48:58 +00001575 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
pbrook4046d912007-01-28 01:53:16 +00001576 gdb_chr_event, s);
1577 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1578 return 0;
1579}
1580#endif