blob: 6b98ec13e67a70f932cf4fb869bb3ea7d26184c4 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040027#include "qemu-common.h"
Paolo Bonzini00f6da62016-03-15 13:16:36 +010028#include "exec/cpu-common.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029#include "tcg-op.h"
30
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040031#define CASE_OP_32_64(x) \
32 glue(glue(case INDEX_op_, x), _i32): \
33 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040034
Richard Henderson170ba882017-11-22 09:07:11 +010035#define CASE_OP_32_64_VEC(x) \
36 glue(glue(case INDEX_op_, x), _i32): \
37 glue(glue(case INDEX_op_, x), _i64): \
38 glue(glue(case INDEX_op_, x), _vec)
39
Kirill Batuzov22613af2011-07-07 16:37:13 +040040struct tcg_temp_info {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020041 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070042 TCGTemp *prev_copy;
43 TCGTemp *next_copy;
Kirill Batuzov22613af2011-07-07 16:37:13 +040044 tcg_target_ulong val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080045 tcg_target_ulong mask;
Kirill Batuzov22613af2011-07-07 16:37:13 +040046};
47
Richard Henderson63490392017-06-20 13:43:15 -070048static inline struct tcg_temp_info *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020049{
Richard Henderson63490392017-06-20 13:43:15 -070050 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020051}
52
Richard Henderson63490392017-06-20 13:43:15 -070053static inline struct tcg_temp_info *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020054{
Richard Henderson63490392017-06-20 13:43:15 -070055 return ts_info(arg_temp(arg));
56}
57
58static inline bool ts_is_const(TCGTemp *ts)
59{
60 return ts_info(ts)->is_const;
61}
62
63static inline bool arg_is_const(TCGArg arg)
64{
65 return ts_is_const(arg_temp(arg));
66}
67
68static inline bool ts_is_copy(TCGTemp *ts)
69{
70 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020071}
72
Aurelien Jarnob41059d2015-07-27 12:41:44 +020073/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070074static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040075{
Richard Henderson63490392017-06-20 13:43:15 -070076 struct tcg_temp_info *ti = ts_info(ts);
77 struct tcg_temp_info *pi = ts_info(ti->prev_copy);
78 struct tcg_temp_info *ni = ts_info(ti->next_copy);
79
80 ni->prev_copy = ti->prev_copy;
81 pi->next_copy = ti->next_copy;
82 ti->next_copy = ts;
83 ti->prev_copy = ts;
84 ti->is_const = false;
85 ti->mask = -1;
86}
87
88static void reset_temp(TCGArg arg)
89{
90 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040091}
92
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020093/* Initialize and activate a temporary. */
Emilio G. Cota34184b02017-07-19 14:32:24 -040094static void init_ts_info(struct tcg_temp_info *infos,
95 TCGTempSet *temps_used, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020096{
Richard Henderson63490392017-06-20 13:43:15 -070097 size_t idx = temp_idx(ts);
Emilio G. Cota34184b02017-07-19 14:32:24 -040098 if (!test_bit(idx, temps_used->l)) {
99 struct tcg_temp_info *ti = &infos[idx];
Richard Henderson63490392017-06-20 13:43:15 -0700100
101 ts->state_ptr = ti;
102 ti->next_copy = ts;
103 ti->prev_copy = ts;
104 ti->is_const = false;
105 ti->mask = -1;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400106 set_bit(idx, temps_used->l);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200107 }
108}
109
Emilio G. Cota34184b02017-07-19 14:32:24 -0400110static void init_arg_info(struct tcg_temp_info *infos,
111 TCGTempSet *temps_used, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700112{
Emilio G. Cota34184b02017-07-19 14:32:24 -0400113 init_ts_info(infos, temps_used, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700114}
115
Richard Henderson63490392017-06-20 13:43:15 -0700116static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200117{
Richard Henderson63490392017-06-20 13:43:15 -0700118 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200119
120 /* If this is already a global, we can't do better. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600121 if (ts->temp_global) {
Richard Henderson63490392017-06-20 13:43:15 -0700122 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200123 }
124
125 /* Search for a global first. */
Richard Henderson63490392017-06-20 13:43:15 -0700126 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
127 if (i->temp_global) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200128 return i;
129 }
130 }
131
132 /* If it is a temp, search for a temp local. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600133 if (!ts->temp_local) {
Richard Henderson63490392017-06-20 13:43:15 -0700134 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
135 if (ts->temp_local) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200136 return i;
137 }
138 }
139 }
140
141 /* Failure to find a better representation, return the same temp. */
Richard Henderson63490392017-06-20 13:43:15 -0700142 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200143}
144
Richard Henderson63490392017-06-20 13:43:15 -0700145static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200146{
Richard Henderson63490392017-06-20 13:43:15 -0700147 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200148
Richard Henderson63490392017-06-20 13:43:15 -0700149 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200150 return true;
151 }
152
Richard Henderson63490392017-06-20 13:43:15 -0700153 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200154 return false;
155 }
156
Richard Henderson63490392017-06-20 13:43:15 -0700157 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
158 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200159 return true;
160 }
161 }
162
163 return false;
164}
165
Richard Henderson63490392017-06-20 13:43:15 -0700166static bool args_are_copies(TCGArg arg1, TCGArg arg2)
167{
168 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
169}
170
Richard Hendersonacd93702016-12-08 12:28:42 -0800171static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200172{
Richard Henderson170ba882017-11-22 09:07:11 +0100173 const TCGOpDef *def;
174 TCGOpcode new_op;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200175 tcg_target_ulong mask;
Richard Henderson63490392017-06-20 13:43:15 -0700176 struct tcg_temp_info *di = arg_info(dst);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200177
Richard Henderson170ba882017-11-22 09:07:11 +0100178 def = &tcg_op_defs[op->opc];
179 if (def->flags & TCG_OPF_VECTOR) {
180 new_op = INDEX_op_dupi_vec;
181 } else if (def->flags & TCG_OPF_64BIT) {
182 new_op = INDEX_op_movi_i64;
183 } else {
184 new_op = INDEX_op_movi_i32;
185 }
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200186 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100187 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
188 op->args[0] = dst;
189 op->args[1] = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200190
191 reset_temp(dst);
Richard Henderson63490392017-06-20 13:43:15 -0700192 di->is_const = true;
193 di->val = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200194 mask = val;
Aurelien Jarno96152122015-07-10 18:03:30 +0200195 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200196 /* High bits of the destination are now garbage. */
197 mask |= ~0xffffffffull;
198 }
Richard Henderson63490392017-06-20 13:43:15 -0700199 di->mask = mask;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200200}
201
Richard Hendersonacd93702016-12-08 12:28:42 -0800202static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400203{
Richard Henderson63490392017-06-20 13:43:15 -0700204 TCGTemp *dst_ts = arg_temp(dst);
205 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100206 const TCGOpDef *def;
Richard Henderson63490392017-06-20 13:43:15 -0700207 struct tcg_temp_info *di;
208 struct tcg_temp_info *si;
209 tcg_target_ulong mask;
210 TCGOpcode new_op;
211
212 if (ts_are_copies(dst_ts, src_ts)) {
Aurelien Jarno53657182015-06-04 21:53:25 +0200213 tcg_op_remove(s, op);
214 return;
215 }
216
Richard Henderson63490392017-06-20 13:43:15 -0700217 reset_ts(dst_ts);
218 di = ts_info(dst_ts);
219 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100220 def = &tcg_op_defs[op->opc];
221 if (def->flags & TCG_OPF_VECTOR) {
222 new_op = INDEX_op_mov_vec;
223 } else if (def->flags & TCG_OPF_64BIT) {
224 new_op = INDEX_op_mov_i64;
225 } else {
226 new_op = INDEX_op_mov_i32;
227 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700228 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100229 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700230 op->args[0] = dst;
231 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700232
Richard Henderson63490392017-06-20 13:43:15 -0700233 mask = si->mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700234 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
235 /* High bits of the destination are now garbage. */
236 mask |= ~0xffffffffull;
237 }
Richard Henderson63490392017-06-20 13:43:15 -0700238 di->mask = mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700239
Richard Henderson63490392017-06-20 13:43:15 -0700240 if (src_ts->type == dst_ts->type) {
241 struct tcg_temp_info *ni = ts_info(si->next_copy);
242
243 di->next_copy = si->next_copy;
244 di->prev_copy = src_ts;
245 ni->prev_copy = dst_ts;
246 si->next_copy = dst_ts;
247 di->is_const = si->is_const;
248 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800249 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400250}
251
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000252static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400253{
Richard Henderson03271522013-08-14 14:35:56 -0700254 uint64_t l64, h64;
255
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400256 switch (op) {
257 CASE_OP_32_64(add):
258 return x + y;
259
260 CASE_OP_32_64(sub):
261 return x - y;
262
263 CASE_OP_32_64(mul):
264 return x * y;
265
Kirill Batuzov9a810902011-07-07 16:37:15 +0400266 CASE_OP_32_64(and):
267 return x & y;
268
269 CASE_OP_32_64(or):
270 return x | y;
271
272 CASE_OP_32_64(xor):
273 return x ^ y;
274
Kirill Batuzov55c09752011-07-07 16:37:16 +0400275 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700276 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400277
Kirill Batuzov55c09752011-07-07 16:37:16 +0400278 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700279 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400280
281 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700282 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400283
Kirill Batuzov55c09752011-07-07 16:37:16 +0400284 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700285 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400286
287 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
293 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
299 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700305 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400306 return ~x;
307
Richard Hendersoncb25c802011-08-17 14:11:47 -0700308 CASE_OP_32_64(neg):
309 return -x;
310
311 CASE_OP_32_64(andc):
312 return x & ~y;
313
314 CASE_OP_32_64(orc):
315 return x | ~y;
316
317 CASE_OP_32_64(eqv):
318 return ~(x ^ y);
319
320 CASE_OP_32_64(nand):
321 return ~(x & y);
322
323 CASE_OP_32_64(nor):
324 return ~(x | y);
325
Richard Henderson0e28d002016-11-16 09:23:28 +0100326 case INDEX_op_clz_i32:
327 return (uint32_t)x ? clz32(x) : y;
328
329 case INDEX_op_clz_i64:
330 return x ? clz64(x) : y;
331
332 case INDEX_op_ctz_i32:
333 return (uint32_t)x ? ctz32(x) : y;
334
335 case INDEX_op_ctz_i64:
336 return x ? ctz64(x) : y;
337
Richard Hendersona768e4e2016-11-21 11:13:39 +0100338 case INDEX_op_ctpop_i32:
339 return ctpop32(x);
340
341 case INDEX_op_ctpop_i64:
342 return ctpop64(x);
343
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700344 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400345 return (int8_t)x;
346
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700347 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400348 return (int16_t)x;
349
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700350 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400351 return (uint8_t)x;
352
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700353 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400354 return (uint16_t)x;
355
Richard Henderson64985942018-11-20 08:53:34 +0100356 CASE_OP_32_64(bswap16):
357 return bswap16(x);
358
359 CASE_OP_32_64(bswap32):
360 return bswap32(x);
361
362 case INDEX_op_bswap64_i64:
363 return bswap64(x);
364
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200365 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400366 case INDEX_op_ext32s_i64:
367 return (int32_t)x;
368
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200369 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700370 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400371 case INDEX_op_ext32u_i64:
372 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400373
Richard Henderson609ad702015-07-24 07:16:00 -0700374 case INDEX_op_extrh_i64_i32:
375 return (uint64_t)x >> 32;
376
Richard Henderson03271522013-08-14 14:35:56 -0700377 case INDEX_op_muluh_i32:
378 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
379 case INDEX_op_mulsh_i32:
380 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
381
382 case INDEX_op_muluh_i64:
383 mulu64(&l64, &h64, x, y);
384 return h64;
385 case INDEX_op_mulsh_i64:
386 muls64(&l64, &h64, x, y);
387 return h64;
388
Richard Henderson01547f72013-08-14 15:22:46 -0700389 case INDEX_op_div_i32:
390 /* Avoid crashing on divide by zero, otherwise undefined. */
391 return (int32_t)x / ((int32_t)y ? : 1);
392 case INDEX_op_divu_i32:
393 return (uint32_t)x / ((uint32_t)y ? : 1);
394 case INDEX_op_div_i64:
395 return (int64_t)x / ((int64_t)y ? : 1);
396 case INDEX_op_divu_i64:
397 return (uint64_t)x / ((uint64_t)y ? : 1);
398
399 case INDEX_op_rem_i32:
400 return (int32_t)x % ((int32_t)y ? : 1);
401 case INDEX_op_remu_i32:
402 return (uint32_t)x % ((uint32_t)y ? : 1);
403 case INDEX_op_rem_i64:
404 return (int64_t)x % ((int64_t)y ? : 1);
405 case INDEX_op_remu_i64:
406 return (uint64_t)x % ((uint64_t)y ? : 1);
407
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400408 default:
409 fprintf(stderr,
410 "Unrecognized operation %d in do_constant_folding.\n", op);
411 tcg_abort();
412 }
413}
414
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000415static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400416{
Richard Henderson170ba882017-11-22 09:07:11 +0100417 const TCGOpDef *def = &tcg_op_defs[op];
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400418 TCGArg res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100419 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200420 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400421 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400422 return res;
423}
424
Richard Henderson9519da72012-10-02 11:32:26 -0700425static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
426{
427 switch (c) {
428 case TCG_COND_EQ:
429 return x == y;
430 case TCG_COND_NE:
431 return x != y;
432 case TCG_COND_LT:
433 return (int32_t)x < (int32_t)y;
434 case TCG_COND_GE:
435 return (int32_t)x >= (int32_t)y;
436 case TCG_COND_LE:
437 return (int32_t)x <= (int32_t)y;
438 case TCG_COND_GT:
439 return (int32_t)x > (int32_t)y;
440 case TCG_COND_LTU:
441 return x < y;
442 case TCG_COND_GEU:
443 return x >= y;
444 case TCG_COND_LEU:
445 return x <= y;
446 case TCG_COND_GTU:
447 return x > y;
448 default:
449 tcg_abort();
450 }
451}
452
453static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
454{
455 switch (c) {
456 case TCG_COND_EQ:
457 return x == y;
458 case TCG_COND_NE:
459 return x != y;
460 case TCG_COND_LT:
461 return (int64_t)x < (int64_t)y;
462 case TCG_COND_GE:
463 return (int64_t)x >= (int64_t)y;
464 case TCG_COND_LE:
465 return (int64_t)x <= (int64_t)y;
466 case TCG_COND_GT:
467 return (int64_t)x > (int64_t)y;
468 case TCG_COND_LTU:
469 return x < y;
470 case TCG_COND_GEU:
471 return x >= y;
472 case TCG_COND_LEU:
473 return x <= y;
474 case TCG_COND_GTU:
475 return x > y;
476 default:
477 tcg_abort();
478 }
479}
480
481static bool do_constant_folding_cond_eq(TCGCond c)
482{
483 switch (c) {
484 case TCG_COND_GT:
485 case TCG_COND_LTU:
486 case TCG_COND_LT:
487 case TCG_COND_GTU:
488 case TCG_COND_NE:
489 return 0;
490 case TCG_COND_GE:
491 case TCG_COND_GEU:
492 case TCG_COND_LE:
493 case TCG_COND_LEU:
494 case TCG_COND_EQ:
495 return 1;
496 default:
497 tcg_abort();
498 }
499}
500
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200501/* Return 2 if the condition can't be simplified, and the result
502 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200503static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
504 TCGArg y, TCGCond c)
505{
Richard Henderson63490392017-06-20 13:43:15 -0700506 tcg_target_ulong xv = arg_info(x)->val;
507 tcg_target_ulong yv = arg_info(y)->val;
508 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100509 const TCGOpDef *def = &tcg_op_defs[op];
510 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
511 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700512 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100513 } else {
514 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200515 }
Richard Henderson63490392017-06-20 13:43:15 -0700516 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700517 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700518 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200519 switch (c) {
520 case TCG_COND_LTU:
521 return 0;
522 case TCG_COND_GEU:
523 return 1;
524 default:
525 return 2;
526 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200527 }
Alex Bennée550276a2016-09-30 22:30:55 +0100528 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200529}
530
Richard Henderson6c4382f2012-10-02 11:32:27 -0700531/* Return 2 if the condition can't be simplified, and the result
532 of the condition (0 or 1) if it can */
533static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
534{
535 TCGArg al = p1[0], ah = p1[1];
536 TCGArg bl = p2[0], bh = p2[1];
537
Richard Henderson63490392017-06-20 13:43:15 -0700538 if (arg_is_const(bl) && arg_is_const(bh)) {
539 tcg_target_ulong blv = arg_info(bl)->val;
540 tcg_target_ulong bhv = arg_info(bh)->val;
541 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700542
Richard Henderson63490392017-06-20 13:43:15 -0700543 if (arg_is_const(al) && arg_is_const(ah)) {
544 tcg_target_ulong alv = arg_info(al)->val;
545 tcg_target_ulong ahv = arg_info(ah)->val;
546 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700547 return do_constant_folding_cond_64(a, b, c);
548 }
549 if (b == 0) {
550 switch (c) {
551 case TCG_COND_LTU:
552 return 0;
553 case TCG_COND_GEU:
554 return 1;
555 default:
556 break;
557 }
558 }
559 }
Richard Henderson63490392017-06-20 13:43:15 -0700560 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700561 return do_constant_folding_cond_eq(c);
562 }
563 return 2;
564}
565
Richard Henderson24c9ae42012-10-02 11:32:21 -0700566static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
567{
568 TCGArg a1 = *p1, a2 = *p2;
569 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700570 sum += arg_is_const(a1);
571 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700572
573 /* Prefer the constant in second argument, and then the form
574 op a, a, b, which is better handled on non-RISC hosts. */
575 if (sum > 0 || (sum == 0 && dest == a2)) {
576 *p1 = a2;
577 *p2 = a1;
578 return true;
579 }
580 return false;
581}
582
Richard Henderson0bfcb862012-10-02 11:32:23 -0700583static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
584{
585 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700586 sum += arg_is_const(p1[0]);
587 sum += arg_is_const(p1[1]);
588 sum -= arg_is_const(p2[0]);
589 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700590 if (sum > 0) {
591 TCGArg t;
592 t = p1[0], p1[0] = p2[0], p2[0] = t;
593 t = p1[1], p1[1] = p2[1], p2[1] = t;
594 return true;
595 }
596 return false;
597}
598
Kirill Batuzov22613af2011-07-07 16:37:13 +0400599/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200600void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400601{
Richard Henderson15fa08f2017-11-02 15:19:14 +0100602 int nb_temps, nb_globals;
603 TCGOp *op, *op_next, *prev_mb = NULL;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400604 struct tcg_temp_info *infos;
605 TCGTempSet temps_used;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700606
Kirill Batuzov22613af2011-07-07 16:37:13 +0400607 /* Array VALS has an element for each temp.
608 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200609 If this temp is a copy of other ones then the other copies are
610 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400611
612 nb_temps = s->nb_temps;
613 nb_globals = s->nb_globals;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400614 bitmap_zero(temps_used.l, nb_temps);
615 infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps);
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400616
Richard Henderson15fa08f2017-11-02 15:19:14 +0100617 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700618 tcg_target_ulong mask, partmask, affected;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700619 int nb_oargs, nb_iargs, i;
Richard Hendersoncf066672014-03-22 20:06:52 -0700620 TCGArg tmp;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700621 TCGOpcode opc = op->opc;
622 const TCGOpDef *def = &tcg_op_defs[opc];
623
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200624 /* Count the arguments, and initialize the temps that are
625 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700626 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100627 nb_oargs = TCGOP_CALLO(op);
628 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200629 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700630 TCGTemp *ts = arg_temp(op->args[i]);
631 if (ts) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400632 init_ts_info(infos, &temps_used, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200633 }
634 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200635 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700636 nb_oargs = def->nb_oargs;
637 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200638 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400639 init_arg_info(infos, &temps_used, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200640 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700641 }
642
643 /* Do copy propagation */
644 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700645 TCGTemp *ts = arg_temp(op->args[i]);
646 if (ts && ts_is_copy(ts)) {
647 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400648 }
649 }
650
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400651 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700652 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100653 CASE_OP_32_64_VEC(add):
654 CASE_OP_32_64_VEC(mul):
655 CASE_OP_32_64_VEC(and):
656 CASE_OP_32_64_VEC(or):
657 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700658 CASE_OP_32_64(eqv):
659 CASE_OP_32_64(nand):
660 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700661 CASE_OP_32_64(muluh):
662 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800663 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400664 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200665 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800666 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
667 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200668 }
669 break;
670 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800671 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
672 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200673 }
674 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700675 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800676 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
677 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700678 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700679 /* For movcond, we canonicalize the "false" input reg to match
680 the destination reg so that the tcg backend can implement
681 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800682 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
683 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700684 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700685 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800686 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800687 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
688 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700689 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800690 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800691 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800692 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700693 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700694 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800695 if (swap_commutative2(&op->args[0], &op->args[2])) {
696 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700697 }
698 break;
699 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800700 if (swap_commutative2(&op->args[1], &op->args[3])) {
701 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700702 }
703 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400704 default:
705 break;
706 }
707
Richard Henderson2d497542013-03-21 09:13:33 -0700708 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
709 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700710 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200711 CASE_OP_32_64(shl):
712 CASE_OP_32_64(shr):
713 CASE_OP_32_64(sar):
714 CASE_OP_32_64(rotl):
715 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700716 if (arg_is_const(op->args[1])
717 && arg_info(op->args[1])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800718 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200719 continue;
720 }
721 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100722 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700723 {
724 TCGOpcode neg_op;
725 bool have_neg;
726
Richard Henderson63490392017-06-20 13:43:15 -0700727 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700728 /* Proceed with possible constant folding. */
729 break;
730 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700731 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700732 neg_op = INDEX_op_neg_i32;
733 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100734 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700735 neg_op = INDEX_op_neg_i64;
736 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Henderson170ba882017-11-22 09:07:11 +0100737 } else {
738 neg_op = INDEX_op_neg_vec;
739 have_neg = TCG_TARGET_HAS_neg_vec;
Richard Henderson2d497542013-03-21 09:13:33 -0700740 }
741 if (!have_neg) {
742 break;
743 }
Richard Henderson63490392017-06-20 13:43:15 -0700744 if (arg_is_const(op->args[1])
745 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700746 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800747 reset_temp(op->args[0]);
748 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700749 continue;
750 }
751 }
752 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100753 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800754 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700755 if (!arg_is_const(op->args[1])
756 && arg_is_const(op->args[2])
757 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800758 i = 1;
759 goto try_not;
760 }
761 break;
762 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700763 if (!arg_is_const(op->args[1])
764 && arg_is_const(op->args[2])
765 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800766 i = 1;
767 goto try_not;
768 }
769 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100770 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700771 if (!arg_is_const(op->args[2])
772 && arg_is_const(op->args[1])
773 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800774 i = 2;
775 goto try_not;
776 }
777 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100778 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800779 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700780 if (!arg_is_const(op->args[2])
781 && arg_is_const(op->args[1])
782 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800783 i = 2;
784 goto try_not;
785 }
786 break;
787 try_not:
788 {
789 TCGOpcode not_op;
790 bool have_not;
791
Richard Henderson170ba882017-11-22 09:07:11 +0100792 if (def->flags & TCG_OPF_VECTOR) {
793 not_op = INDEX_op_not_vec;
794 have_not = TCG_TARGET_HAS_not_vec;
795 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800796 not_op = INDEX_op_not_i64;
797 have_not = TCG_TARGET_HAS_not_i64;
798 } else {
799 not_op = INDEX_op_not_i32;
800 have_not = TCG_TARGET_HAS_not_i32;
801 }
802 if (!have_not) {
803 break;
804 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700805 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800806 reset_temp(op->args[0]);
807 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800808 continue;
809 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200810 default:
811 break;
812 }
813
Richard Henderson464a1442014-01-31 07:42:11 -0600814 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700815 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100816 CASE_OP_32_64_VEC(add):
817 CASE_OP_32_64_VEC(sub):
818 CASE_OP_32_64_VEC(or):
819 CASE_OP_32_64_VEC(xor):
820 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400821 CASE_OP_32_64(shl):
822 CASE_OP_32_64(shr):
823 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700824 CASE_OP_32_64(rotl):
825 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700826 if (!arg_is_const(op->args[1])
827 && arg_is_const(op->args[2])
828 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800829 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200830 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400831 }
832 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100833 CASE_OP_32_64_VEC(and):
834 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600835 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700836 if (!arg_is_const(op->args[1])
837 && arg_is_const(op->args[2])
838 && arg_info(op->args[2])->val == -1) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800839 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200840 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600841 }
842 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200843 default:
844 break;
845 }
846
Aurelien Jarno30312442013-09-03 08:27:38 +0200847 /* Simplify using known-zero bits. Currently only ops with a single
848 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800849 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800850 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700851 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800852 CASE_OP_32_64(ext8s):
Richard Henderson63490392017-06-20 13:43:15 -0700853 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800854 break;
855 }
856 CASE_OP_32_64(ext8u):
857 mask = 0xff;
858 goto and_const;
859 CASE_OP_32_64(ext16s):
Richard Henderson63490392017-06-20 13:43:15 -0700860 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800861 break;
862 }
863 CASE_OP_32_64(ext16u):
864 mask = 0xffff;
865 goto and_const;
866 case INDEX_op_ext32s_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700867 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800868 break;
869 }
870 case INDEX_op_ext32u_i64:
871 mask = 0xffffffffU;
872 goto and_const;
873
874 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -0700875 mask = arg_info(op->args[2])->mask;
876 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800877 and_const:
Richard Henderson63490392017-06-20 13:43:15 -0700878 affected = arg_info(op->args[1])->mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800879 }
Richard Henderson63490392017-06-20 13:43:15 -0700880 mask = arg_info(op->args[1])->mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800881 break;
882
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200883 case INDEX_op_ext_i32_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700884 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200885 break;
886 }
887 case INDEX_op_extu_i32_i64:
888 /* We do not compute affected as it is a size changing op. */
Richard Henderson63490392017-06-20 13:43:15 -0700889 mask = (uint32_t)arg_info(op->args[1])->mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200890 break;
891
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800892 CASE_OP_32_64(andc):
893 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800894 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700895 if (arg_is_const(op->args[2])) {
896 mask = ~arg_info(op->args[2])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800897 goto and_const;
898 }
Richard Henderson63490392017-06-20 13:43:15 -0700899 /* But we certainly know nothing outside args[1] may be set. */
900 mask = arg_info(op->args[1])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800901 break;
902
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200903 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700904 if (arg_is_const(op->args[2])) {
905 tmp = arg_info(op->args[2])->val & 31;
906 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200907 }
908 break;
909 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700910 if (arg_is_const(op->args[2])) {
911 tmp = arg_info(op->args[2])->val & 63;
912 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800913 }
914 break;
915
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200916 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700917 if (arg_is_const(op->args[2])) {
918 tmp = arg_info(op->args[2])->val & 31;
919 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200920 }
921 break;
922 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700923 if (arg_is_const(op->args[2])) {
924 tmp = arg_info(op->args[2])->val & 63;
925 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800926 }
927 break;
928
Richard Henderson609ad702015-07-24 07:16:00 -0700929 case INDEX_op_extrl_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700930 mask = (uint32_t)arg_info(op->args[1])->mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700931 break;
932 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700933 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700934 break;
935
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800936 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700937 if (arg_is_const(op->args[2])) {
938 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
939 mask = arg_info(op->args[1])->mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800940 }
941 break;
942
943 CASE_OP_32_64(neg):
944 /* Set to 1 all bits to the left of the rightmost. */
Richard Henderson63490392017-06-20 13:43:15 -0700945 mask = -(arg_info(op->args[1])->mask
946 & -arg_info(op->args[1])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800947 break;
948
949 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -0700950 mask = deposit64(arg_info(op->args[1])->mask,
951 op->args[3], op->args[4],
952 arg_info(op->args[2])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800953 break;
954
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500955 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -0700956 mask = extract64(arg_info(op->args[1])->mask,
957 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800958 if (op->args[2] == 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700959 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500960 }
961 break;
962 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -0700963 mask = sextract64(arg_info(op->args[1])->mask,
Richard Hendersonacd93702016-12-08 12:28:42 -0800964 op->args[2], op->args[3]);
965 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700966 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500967 }
968 break;
969
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800970 CASE_OP_32_64(or):
971 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -0700972 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800973 break;
974
Richard Henderson0e28d002016-11-16 09:23:28 +0100975 case INDEX_op_clz_i32:
976 case INDEX_op_ctz_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700977 mask = arg_info(op->args[2])->mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100978 break;
979
980 case INDEX_op_clz_i64:
981 case INDEX_op_ctz_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700982 mask = arg_info(op->args[2])->mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100983 break;
984
Richard Hendersona768e4e2016-11-21 11:13:39 +0100985 case INDEX_op_ctpop_i32:
986 mask = 32 | 31;
987 break;
988 case INDEX_op_ctpop_i64:
989 mask = 64 | 63;
990 break;
991
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800992 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -0700993 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800994 mask = 1;
995 break;
996
997 CASE_OP_32_64(movcond):
Richard Henderson63490392017-06-20 13:43:15 -0700998 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800999 break;
1000
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001001 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001002 mask = 0xff;
1003 break;
1004 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001005 mask = 0xffff;
1006 break;
1007 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001008 mask = 0xffffffffu;
1009 break;
1010
1011 CASE_OP_32_64(qemu_ld):
1012 {
Richard Hendersonacd93702016-12-08 12:28:42 -08001013 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Richard Henderson59227d52015-05-12 11:51:44 -07001014 TCGMemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001015 if (!(mop & MO_SIGN)) {
1016 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1017 }
1018 }
1019 break;
1020
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001021 default:
1022 break;
1023 }
1024
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001025 /* 32-bit ops generate 32-bit results. For the result is zero test
1026 below, we can ignore high bits, but for further optimizations we
1027 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -07001028 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001029 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -07001030 mask |= ~(tcg_target_ulong)0xffffffffu;
1031 partmask &= 0xffffffffu;
1032 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001033 }
1034
Richard Henderson24666ba2014-05-22 11:14:10 -07001035 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001036 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001037 tcg_opt_gen_movi(s, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001038 continue;
1039 }
1040 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001041 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001042 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001043 continue;
1044 }
1045
Aurelien Jarno56e49432012-09-06 16:47:13 +02001046 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001047 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001048 CASE_OP_32_64_VEC(and):
1049 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001050 CASE_OP_32_64(muluh):
1051 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001052 if (arg_is_const(op->args[2])
1053 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001054 tcg_opt_gen_movi(s, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001055 continue;
1056 }
1057 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001058 default:
1059 break;
1060 }
1061
1062 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001063 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001064 CASE_OP_32_64_VEC(or):
1065 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001066 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001067 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001068 continue;
1069 }
1070 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001071 default:
1072 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001073 }
1074
Aurelien Jarno3c941932012-09-18 19:12:36 +02001075 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001076 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001077 CASE_OP_32_64_VEC(andc):
1078 CASE_OP_32_64_VEC(sub):
1079 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001080 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001081 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001082 continue;
1083 }
1084 break;
1085 default:
1086 break;
1087 }
1088
Kirill Batuzov22613af2011-07-07 16:37:13 +04001089 /* Propagate constants through copy operations and do constant
1090 folding. Constants will be substituted to arguments by register
1091 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001092 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001093 CASE_OP_32_64_VEC(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001094 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001095 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001096 CASE_OP_32_64(movi):
Richard Henderson170ba882017-11-22 09:07:11 +01001097 case INDEX_op_dupi_vec:
Richard Hendersonacd93702016-12-08 12:28:42 -08001098 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001099 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001100
Richard Henderson170ba882017-11-22 09:07:11 +01001101 case INDEX_op_dup_vec:
1102 if (arg_is_const(op->args[1])) {
1103 tmp = arg_info(op->args[1])->val;
1104 tmp = dup_const(TCGOP_VECE(op), tmp);
1105 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson1fb57da72018-08-05 16:32:58 -07001106 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001107 }
Richard Henderson1fb57da72018-08-05 16:32:58 -07001108 goto do_default;
Richard Henderson170ba882017-11-22 09:07:11 +01001109
Kirill Batuzova640f032011-07-07 16:37:17 +04001110 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001111 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001112 CASE_OP_32_64(ext8s):
1113 CASE_OP_32_64(ext8u):
1114 CASE_OP_32_64(ext16s):
1115 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001116 CASE_OP_32_64(ctpop):
Richard Henderson64985942018-11-20 08:53:34 +01001117 CASE_OP_32_64(bswap16):
1118 CASE_OP_32_64(bswap32):
1119 case INDEX_op_bswap64_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +04001120 case INDEX_op_ext32s_i64:
1121 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001122 case INDEX_op_ext_i32_i64:
1123 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001124 case INDEX_op_extrl_i64_i32:
1125 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001126 if (arg_is_const(op->args[1])) {
1127 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001128 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001129 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001130 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001131 goto do_default;
1132
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001133 CASE_OP_32_64(add):
1134 CASE_OP_32_64(sub):
1135 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001136 CASE_OP_32_64(or):
1137 CASE_OP_32_64(and):
1138 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001139 CASE_OP_32_64(shl):
1140 CASE_OP_32_64(shr):
1141 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001142 CASE_OP_32_64(rotl):
1143 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001144 CASE_OP_32_64(andc):
1145 CASE_OP_32_64(orc):
1146 CASE_OP_32_64(eqv):
1147 CASE_OP_32_64(nand):
1148 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001149 CASE_OP_32_64(muluh):
1150 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001151 CASE_OP_32_64(div):
1152 CASE_OP_32_64(divu):
1153 CASE_OP_32_64(rem):
1154 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001155 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1156 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1157 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001158 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001159 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001160 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001161 goto do_default;
1162
Richard Henderson0e28d002016-11-16 09:23:28 +01001163 CASE_OP_32_64(clz):
1164 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001165 if (arg_is_const(op->args[1])) {
1166 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001167 if (v != 0) {
1168 tmp = do_constant_folding(opc, v, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001169 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001170 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001171 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001172 }
1173 break;
1174 }
1175 goto do_default;
1176
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001177 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001178 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1179 tmp = deposit64(arg_info(op->args[1])->val,
1180 op->args[3], op->args[4],
1181 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001182 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001183 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001184 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001185 goto do_default;
1186
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001187 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001188 if (arg_is_const(op->args[1])) {
1189 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001190 op->args[2], op->args[3]);
1191 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001192 break;
1193 }
1194 goto do_default;
1195
1196 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001197 if (arg_is_const(op->args[1])) {
1198 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001199 op->args[2], op->args[3]);
1200 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001201 break;
1202 }
1203 goto do_default;
1204
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001205 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001206 tmp = do_constant_folding_cond(opc, op->args[1],
1207 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001208 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001209 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001210 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001211 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001212 goto do_default;
1213
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001214 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001215 tmp = do_constant_folding_cond(opc, op->args[0],
1216 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001217 if (tmp != 2) {
1218 if (tmp) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001219 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001220 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001221 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001222 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001223 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001224 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001225 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001226 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001227 goto do_default;
1228
Richard Hendersonfa01a202012-09-21 10:13:37 -07001229 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001230 tmp = do_constant_folding_cond(opc, op->args[1],
1231 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001232 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001233 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001234 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001235 }
Richard Henderson63490392017-06-20 13:43:15 -07001236 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
1237 tcg_target_ulong tv = arg_info(op->args[3])->val;
1238 tcg_target_ulong fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001239 TCGCond cond = op->args[5];
Richard Henderson333b21b2016-10-23 20:44:32 -07001240 if (fv == 1 && tv == 0) {
1241 cond = tcg_invert_cond(cond);
1242 } else if (!(tv == 1 && fv == 0)) {
1243 goto do_default;
1244 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001245 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001246 op->opc = opc = (opc == INDEX_op_movcond_i32
1247 ? INDEX_op_setcond_i32
1248 : INDEX_op_setcond_i64);
1249 nb_iargs = 2;
1250 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001251 goto do_default;
1252
Richard Henderson212c3282012-10-02 11:32:28 -07001253 case INDEX_op_add2_i32:
1254 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001255 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1256 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1257 uint32_t al = arg_info(op->args[2])->val;
1258 uint32_t ah = arg_info(op->args[3])->val;
1259 uint32_t bl = arg_info(op->args[4])->val;
1260 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001261 uint64_t a = ((uint64_t)ah << 32) | al;
1262 uint64_t b = ((uint64_t)bh << 32) | bl;
1263 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001264 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson212c3282012-10-02 11:32:28 -07001265
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001266 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001267 a += b;
1268 } else {
1269 a -= b;
1270 }
1271
Richard Hendersonacd93702016-12-08 12:28:42 -08001272 rl = op->args[0];
1273 rh = op->args[1];
1274 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1275 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
Richard Henderson212c3282012-10-02 11:32:28 -07001276 break;
1277 }
1278 goto do_default;
1279
Richard Henderson14149682012-10-02 11:32:30 -07001280 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001281 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1282 uint32_t a = arg_info(op->args[2])->val;
1283 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001284 uint64_t r = (uint64_t)a * b;
1285 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001286 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson14149682012-10-02 11:32:30 -07001287
Richard Hendersonacd93702016-12-08 12:28:42 -08001288 rl = op->args[0];
1289 rh = op->args[1];
1290 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1291 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
Richard Henderson14149682012-10-02 11:32:30 -07001292 break;
1293 }
1294 goto do_default;
1295
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001296 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001297 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1298 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001299 if (tmp != 2) {
1300 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001301 do_brcond_true:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001302 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001303 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001304 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001305 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001306 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001307 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001308 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001309 } else if ((op->args[4] == TCG_COND_LT
1310 || op->args[4] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001311 && arg_is_const(op->args[2])
1312 && arg_info(op->args[2])->val == 0
1313 && arg_is_const(op->args[3])
1314 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001315 /* Simplify LT/GE comparisons vs zero to a single compare
1316 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001317 do_brcond_high:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001318 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001319 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001320 op->args[0] = op->args[1];
1321 op->args[1] = op->args[3];
1322 op->args[2] = op->args[4];
1323 op->args[3] = op->args[5];
1324 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001325 /* Simplify EQ comparisons where one of the pairs
1326 can be simplified. */
1327 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001328 op->args[0], op->args[2],
1329 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001330 if (tmp == 0) {
1331 goto do_brcond_false;
1332 } else if (tmp == 1) {
1333 goto do_brcond_high;
1334 }
1335 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001336 op->args[1], op->args[3],
1337 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001338 if (tmp == 0) {
1339 goto do_brcond_false;
1340 } else if (tmp != 1) {
1341 goto do_default;
1342 }
1343 do_brcond_low:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001344 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001345 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001346 op->args[1] = op->args[2];
1347 op->args[2] = op->args[4];
1348 op->args[3] = op->args[5];
1349 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001350 /* Simplify NE comparisons where one of the pairs
1351 can be simplified. */
1352 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001353 op->args[0], op->args[2],
1354 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001355 if (tmp == 0) {
1356 goto do_brcond_high;
1357 } else if (tmp == 1) {
1358 goto do_brcond_true;
1359 }
1360 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001361 op->args[1], op->args[3],
1362 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001363 if (tmp == 0) {
1364 goto do_brcond_low;
1365 } else if (tmp == 1) {
1366 goto do_brcond_true;
1367 }
1368 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001369 } else {
1370 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001371 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001372 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001373
1374 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001375 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1376 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001377 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001378 do_setcond_const:
Richard Hendersonacd93702016-12-08 12:28:42 -08001379 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1380 } else if ((op->args[5] == TCG_COND_LT
1381 || op->args[5] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001382 && arg_is_const(op->args[3])
1383 && arg_info(op->args[3])->val == 0
1384 && arg_is_const(op->args[4])
1385 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001386 /* Simplify LT/GE comparisons vs zero to a single compare
1387 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001388 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001389 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001390 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001391 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001392 op->args[1] = op->args[2];
1393 op->args[2] = op->args[4];
1394 op->args[3] = op->args[5];
1395 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001396 /* Simplify EQ comparisons where one of the pairs
1397 can be simplified. */
1398 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001399 op->args[1], op->args[3],
1400 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001401 if (tmp == 0) {
1402 goto do_setcond_const;
1403 } else if (tmp == 1) {
1404 goto do_setcond_high;
1405 }
1406 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001407 op->args[2], op->args[4],
1408 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001409 if (tmp == 0) {
1410 goto do_setcond_high;
1411 } else if (tmp != 1) {
1412 goto do_default;
1413 }
1414 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001415 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001416 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001417 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001418 op->args[2] = op->args[3];
1419 op->args[3] = op->args[5];
1420 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001421 /* Simplify NE comparisons where one of the pairs
1422 can be simplified. */
1423 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001424 op->args[1], op->args[3],
1425 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001426 if (tmp == 0) {
1427 goto do_setcond_high;
1428 } else if (tmp == 1) {
1429 goto do_setcond_const;
1430 }
1431 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001432 op->args[2], op->args[4],
1433 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001434 if (tmp == 0) {
1435 goto do_setcond_low;
1436 } else if (tmp == 1) {
1437 goto do_setcond_const;
1438 }
1439 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001440 } else {
1441 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001442 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001443 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001444
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001445 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001446 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001447 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001448 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001449 if (test_bit(i, temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001450 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001451 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001452 }
1453 }
Richard Hendersoncf066672014-03-22 20:06:52 -07001454 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001455
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001456 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001457 do_default:
1458 /* Default case: we know nothing about operation (or were unable
1459 to compute the operation result) so no propagation is done.
1460 We trash everything if the operation is the end of a basic
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001461 block, otherwise we only trash the output args. "mask" is
1462 the non-zero bits mask for the first output arg. */
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001463 if (def->flags & TCG_OPF_BB_END) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001464 bitmap_zero(temps_used.l, nb_temps);
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001465 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -07001466 do_reset_output:
1467 for (i = 0; i < nb_oargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001468 reset_temp(op->args[i]);
Aurelien Jarno30312442013-09-03 08:27:38 +02001469 /* Save the corresponding known-zero bits mask for the
1470 first output argument (only one supported so far). */
1471 if (i == 0) {
Richard Henderson63490392017-06-20 13:43:15 -07001472 arg_info(op->args[i])->mask = mask;
Aurelien Jarno30312442013-09-03 08:27:38 +02001473 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001474 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001475 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001476 break;
1477 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001478
1479 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001480 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001481 switch (opc) {
1482 case INDEX_op_mb:
1483 /* Merge two barriers of the same type into one,
1484 * or a weaker barrier into a stronger one,
1485 * or two weaker barriers into a stronger one.
1486 * mb X; mb Y => mb X|Y
1487 * mb; strl => mb; st
1488 * ldaq; mb => ld; mb
1489 * ldaq; strl => ld; mb; st
1490 * Other combinations are also merged into a strong
1491 * barrier. This is stricter than specified but for
1492 * the purposes of TCG is better than not optimizing.
1493 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001494 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001495 tcg_op_remove(s, op);
1496 break;
1497
1498 default:
1499 /* Opcodes that end the block stop the optimization. */
1500 if ((def->flags & TCG_OPF_BB_END) == 0) {
1501 break;
1502 }
1503 /* fallthru */
1504 case INDEX_op_qemu_ld_i32:
1505 case INDEX_op_qemu_ld_i64:
1506 case INDEX_op_qemu_st_i32:
1507 case INDEX_op_qemu_st_i64:
1508 case INDEX_op_call:
1509 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001510 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001511 break;
1512 }
1513 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001514 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001515 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001516 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001517}