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bellard7d132992003-03-06 23:23:54 +00001/*
2 * i386 emulator main execution loop
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20#include "exec-i386.h"
21
bellarddc990652003-03-19 00:00:28 +000022//#define DEBUG_EXEC
bellard7d132992003-03-06 23:23:54 +000023#define DEBUG_FLUSH
24
25/* main execution loop */
26
27/* maximum total translate dcode allocated */
28#define CODE_GEN_BUFFER_SIZE (2048 * 1024)
29//#define CODE_GEN_BUFFER_SIZE (128 * 1024)
30#define CODE_GEN_MAX_SIZE 65536
31#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
32
33/* threshold to flush the translated code buffer */
34#define CODE_GEN_BUFFER_MAX_SIZE (CODE_GEN_BUFFER_SIZE - CODE_GEN_MAX_SIZE)
35
36#define CODE_GEN_MAX_BLOCKS (CODE_GEN_BUFFER_SIZE / 64)
37#define CODE_GEN_HASH_BITS 15
38#define CODE_GEN_HASH_SIZE (1 << CODE_GEN_HASH_BITS)
bellard6dbad632003-03-16 18:05:05 +000039
bellard7d132992003-03-06 23:23:54 +000040typedef struct TranslationBlock {
41 unsigned long pc; /* simulated PC corresponding to this block */
bellard6dbad632003-03-16 18:05:05 +000042 unsigned int flags; /* flags defining in which context the code was generated */
bellard7d132992003-03-06 23:23:54 +000043 uint8_t *tc_ptr; /* pointer to the translated code */
44 struct TranslationBlock *hash_next; /* next matching block */
45} TranslationBlock;
46
47TranslationBlock tbs[CODE_GEN_MAX_BLOCKS];
48TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
49int nb_tbs;
50
51uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
52uint8_t *code_gen_ptr;
53
54#ifdef DEBUG_EXEC
55static const char *cc_op_str[] = {
56 "DYNAMIC",
57 "EFLAGS",
58 "MUL",
59 "ADDB",
60 "ADDW",
61 "ADDL",
62 "ADCB",
63 "ADCW",
64 "ADCL",
65 "SUBB",
66 "SUBW",
67 "SUBL",
68 "SBBB",
69 "SBBW",
70 "SBBL",
71 "LOGICB",
72 "LOGICW",
73 "LOGICL",
74 "INCB",
75 "INCW",
76 "INCL",
77 "DECB",
78 "DECW",
79 "DECL",
80 "SHLB",
81 "SHLW",
82 "SHLL",
83 "SARB",
84 "SARW",
85 "SARL",
86};
87
88static void cpu_x86_dump_state(void)
89{
90 int eflags;
91 eflags = cc_table[CC_OP].compute_all();
92 eflags |= (DF & DIRECTION_FLAG);
93 fprintf(logfile,
94 "EAX=%08x EBX=%08X ECX=%08x EDX=%08x\n"
95 "ESI=%08x EDI=%08X EBP=%08x ESP=%08x\n"
96 "CCS=%08x CCD=%08x CCO=%-8s EFL=%c%c%c%c%c%c%c\n",
97 env->regs[R_EAX], env->regs[R_EBX], env->regs[R_ECX], env->regs[R_EDX],
98 env->regs[R_ESI], env->regs[R_EDI], env->regs[R_EBP], env->regs[R_ESP],
99 env->cc_src, env->cc_dst, cc_op_str[env->cc_op],
100 eflags & DIRECTION_FLAG ? 'D' : '-',
101 eflags & CC_O ? 'O' : '-',
102 eflags & CC_S ? 'S' : '-',
103 eflags & CC_Z ? 'Z' : '-',
104 eflags & CC_A ? 'A' : '-',
105 eflags & CC_P ? 'P' : '-',
106 eflags & CC_C ? 'C' : '-'
107 );
108#if 1
109 fprintf(logfile, "ST0=%f ST1=%f ST2=%f ST3=%f\n",
110 (double)ST0, (double)ST1, (double)ST(2), (double)ST(3));
111#endif
112}
113
114#endif
115
116void cpu_x86_tblocks_init(void)
117{
118 if (!code_gen_ptr) {
119 code_gen_ptr = code_gen_buffer;
120 }
121}
122
123/* flush all the translation blocks */
124static void tb_flush(void)
125{
126 int i;
127#ifdef DEBUG_FLUSH
128 printf("gemu: flush code_size=%d nb_tbs=%d avg_tb_size=%d\n",
129 code_gen_ptr - code_gen_buffer,
130 nb_tbs,
131 (code_gen_ptr - code_gen_buffer) / nb_tbs);
132#endif
133 nb_tbs = 0;
134 for(i = 0;i < CODE_GEN_HASH_SIZE; i++)
135 tb_hash[i] = NULL;
136 code_gen_ptr = code_gen_buffer;
137 /* XXX: flush processor icache at this point */
138}
139
140/* find a translation block in the translation cache. If not found,
141 allocate a new one */
bellard6dbad632003-03-16 18:05:05 +0000142static inline TranslationBlock *tb_find_and_alloc(unsigned long pc,
143 unsigned int flags)
bellard7d132992003-03-06 23:23:54 +0000144{
145 TranslationBlock **ptb, *tb;
146 unsigned int h;
147
148 h = pc & (CODE_GEN_HASH_SIZE - 1);
149 ptb = &tb_hash[h];
150 for(;;) {
151 tb = *ptb;
152 if (!tb)
153 break;
bellard6dbad632003-03-16 18:05:05 +0000154 if (tb->pc == pc && tb->flags == flags)
bellard7d132992003-03-06 23:23:54 +0000155 return tb;
156 ptb = &tb->hash_next;
157 }
158 if (nb_tbs >= CODE_GEN_MAX_BLOCKS ||
159 (code_gen_ptr - code_gen_buffer) >= CODE_GEN_BUFFER_MAX_SIZE)
160 tb_flush();
161 tb = &tbs[nb_tbs++];
162 *ptb = tb;
163 tb->pc = pc;
bellard6dbad632003-03-16 18:05:05 +0000164 tb->flags = flags;
bellard7d132992003-03-06 23:23:54 +0000165 tb->tc_ptr = NULL;
166 tb->hash_next = NULL;
167 return tb;
168}
169
170int cpu_x86_exec(CPUX86State *env1)
171{
172 int saved_T0, saved_T1, saved_A0;
173 CPUX86State *saved_env;
bellard04369ff2003-03-20 22:33:23 +0000174#ifdef reg_EAX
175 int saved_EAX;
176#endif
177#ifdef reg_ECX
178 int saved_ECX;
179#endif
180#ifdef reg_EDX
181 int saved_EDX;
182#endif
183#ifdef reg_EBX
184 int saved_EBX;
185#endif
186#ifdef reg_ESP
187 int saved_ESP;
188#endif
189#ifdef reg_EBP
190 int saved_EBP;
191#endif
192#ifdef reg_ESI
193 int saved_ESI;
194#endif
195#ifdef reg_EDI
196 int saved_EDI;
197#endif
bellard7d132992003-03-06 23:23:54 +0000198 int code_gen_size, ret;
199 void (*gen_func)(void);
200 TranslationBlock *tb;
201 uint8_t *tc_ptr;
bellard6dbad632003-03-16 18:05:05 +0000202 unsigned int flags;
203
bellard7d132992003-03-06 23:23:54 +0000204 /* first we save global registers */
205 saved_T0 = T0;
206 saved_T1 = T1;
207 saved_A0 = A0;
208 saved_env = env;
209 env = env1;
bellard04369ff2003-03-20 22:33:23 +0000210#ifdef reg_EAX
211 saved_EAX = EAX;
212 EAX = env->regs[R_EAX];
213#endif
214#ifdef reg_ECX
215 saved_ECX = ECX;
216 ECX = env->regs[R_ECX];
217#endif
218#ifdef reg_EDX
219 saved_EDX = EDX;
220 EDX = env->regs[R_EDX];
221#endif
222#ifdef reg_EBX
223 saved_EBX = EBX;
224 EBX = env->regs[R_EBX];
225#endif
226#ifdef reg_ESP
227 saved_ESP = ESP;
228 ESP = env->regs[R_ESP];
229#endif
230#ifdef reg_EBP
231 saved_EBP = EBP;
232 EBP = env->regs[R_EBP];
233#endif
234#ifdef reg_ESI
235 saved_ESI = ESI;
236 ESI = env->regs[R_ESI];
237#endif
238#ifdef reg_EDI
239 saved_EDI = EDI;
240 EDI = env->regs[R_EDI];
241#endif
bellard7d132992003-03-06 23:23:54 +0000242
243 /* prepare setjmp context for exception handling */
244 if (setjmp(env->jmp_env) == 0) {
245 for(;;) {
246#ifdef DEBUG_EXEC
247 if (loglevel) {
248 cpu_x86_dump_state();
249 }
250#endif
bellard6dbad632003-03-16 18:05:05 +0000251 /* we compute the CPU state. We assume it will not
252 change during the whole generated block. */
253 flags = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT;
254 flags |= (((unsigned long)env->seg_cache[R_DS].base |
255 (unsigned long)env->seg_cache[R_ES].base |
256 (unsigned long)env->seg_cache[R_SS].base) != 0) <<
257 GEN_FLAG_ADDSEG_SHIFT;
258 tb = tb_find_and_alloc((unsigned long)env->pc, flags);
bellard7d132992003-03-06 23:23:54 +0000259 tc_ptr = tb->tc_ptr;
260 if (!tb->tc_ptr) {
261 /* if no translated code available, then translate it now */
262 tc_ptr = code_gen_ptr;
263 cpu_x86_gen_code(code_gen_ptr, CODE_GEN_MAX_SIZE,
bellard6dbad632003-03-16 18:05:05 +0000264 &code_gen_size, (uint8_t *)env->pc, flags);
bellard7d132992003-03-06 23:23:54 +0000265 tb->tc_ptr = tc_ptr;
266 code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
267 }
268 /* execute the generated code */
269 gen_func = (void *)tc_ptr;
270 gen_func();
271 }
272 }
273 ret = env->exception_index;
274
275 /* restore global registers */
bellard04369ff2003-03-20 22:33:23 +0000276#ifdef reg_EAX
277 EAX = saved_EAX;
278#endif
279#ifdef reg_ECX
280 ECX = saved_ECX;
281#endif
282#ifdef reg_EDX
283 EDX = saved_EDX;
284#endif
285#ifdef reg_EBX
286 EBX = saved_EBX;
287#endif
288#ifdef reg_ESP
289 ESP = saved_ESP;
290#endif
291#ifdef reg_EBP
292 EBP = saved_EBP;
293#endif
294#ifdef reg_ESI
295 ESI = saved_ESI;
296#endif
297#ifdef reg_EDI
298 EDI = saved_EDI;
299#endif
bellard7d132992003-03-06 23:23:54 +0000300 T0 = saved_T0;
301 T1 = saved_T1;
302 A0 = saved_A0;
303 env = saved_env;
304 return ret;
305}
bellard6dbad632003-03-16 18:05:05 +0000306
307void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
308{
309 CPUX86State *saved_env;
310
311 saved_env = env;
312 env = s;
313 load_seg(seg_reg, selector);
314 env = saved_env;
315}