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hailfinger336d3c32008-03-14 00:02:25 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21/*
22 * Datasheet:
23 * - Name: Intel 82802AB/82802AC Firmware Hub (FWH)
24 * - URL: http://www.intel.com/design/chipsets/datashts/290658.htm
25 * - PDF: http://download.intel.com/design/chipsets/datashts/29065804.pdf
26 * - Order number: 290658-004
27 */
28
stepan2e0773b2008-04-24 09:07:57 +000029#include <string.h>
hailfinger9d987ef2009-06-05 18:32:07 +000030#include <stdlib.h>
hailfinger336d3c32008-03-14 00:02:25 +000031#include "flash.h"
snelson8913d082010-02-26 05:48:29 +000032#include "chipdrivers.h"
hailfinger336d3c32008-03-14 00:02:25 +000033
34// I need that Berkeley bit-map printer
snelsonc0acbeb2010-03-19 18:47:06 +000035void print_status_82802ab(uint8_t status)
hailfinger336d3c32008-03-14 00:02:25 +000036{
snelsonfc007bb2010-03-24 23:14:32 +000037 msg_cdbg("%s", status & 0x80 ? "Ready:" : "Busy:");
38 msg_cdbg("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:");
39 msg_cdbg("%s", status & 0x20 ? "BE ERROR:" : "BE OK:");
40 msg_cdbg("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:");
41 msg_cdbg("%s", status & 0x8 ? "VP ERR:" : "VPP OK:");
42 msg_cdbg("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:");
43 msg_cdbg("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
hailfinger336d3c32008-03-14 00:02:25 +000044}
45
46int probe_82802ab(struct flashchip *flash)
47{
hailfinger82719632009-05-16 21:22:56 +000048 chipaddr bios = flash->virtual_memory;
hailfinger336d3c32008-03-14 00:02:25 +000049 uint8_t id1, id2;
hailfingercbc09f92010-03-22 23:47:38 +000050 uint8_t flashcontent1, flashcontent2;
hailfinger336d3c32008-03-14 00:02:25 +000051
hailfinger2fc3c402009-09-05 01:16:30 +000052 /* Reset to get a clean state */
53 chip_writeb(0xFF, bios);
hailfingere5829f62009-06-05 17:48:08 +000054 programmer_delay(10);
hailfinger2fc3c402009-09-05 01:16:30 +000055
56 /* Enter ID mode */
hailfinger1ff6e362009-03-06 22:26:00 +000057 chip_writeb(0x90, bios);
hailfingere5829f62009-06-05 17:48:08 +000058 programmer_delay(10);
hailfinger336d3c32008-03-14 00:02:25 +000059
hailfinger1ff6e362009-03-06 22:26:00 +000060 id1 = chip_readb(bios);
61 id2 = chip_readb(bios + 0x01);
hailfinger336d3c32008-03-14 00:02:25 +000062
63 /* Leave ID mode */
hailfinger2fc3c402009-09-05 01:16:30 +000064 chip_writeb(0xFF, bios);
hailfinger336d3c32008-03-14 00:02:25 +000065
hailfingere5829f62009-06-05 17:48:08 +000066 programmer_delay(10);
hailfinger336d3c32008-03-14 00:02:25 +000067
snelsonfc007bb2010-03-24 23:14:32 +000068 msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2);
hailfinger336d3c32008-03-14 00:02:25 +000069
hailfingercbc09f92010-03-22 23:47:38 +000070 if (!oddparity(id1))
snelsonfc007bb2010-03-24 23:14:32 +000071 msg_cdbg(", id1 parity violation");
hailfingercbc09f92010-03-22 23:47:38 +000072
73 /* Read the product ID location again. We should now see normal flash contents. */
74 flashcontent1 = chip_readb(bios);
75 flashcontent2 = chip_readb(bios + 0x01);
76
77 if (id1 == flashcontent1)
snelsonfc007bb2010-03-24 23:14:32 +000078 msg_cdbg(", id1 is normal flash content");
hailfingercbc09f92010-03-22 23:47:38 +000079 if (id2 == flashcontent2)
snelsonfc007bb2010-03-24 23:14:32 +000080 msg_cdbg(", id2 is normal flash content");
hailfingercbc09f92010-03-22 23:47:38 +000081
snelsonfc007bb2010-03-24 23:14:32 +000082 msg_cdbg("\n");
hailfinger336d3c32008-03-14 00:02:25 +000083 if (id1 != flash->manufacture_id || id2 != flash->model_id)
84 return 0;
85
hailfingerb8e4e212010-03-15 03:48:42 +000086 if (flash->feature_bits & FEATURE_REGISTERMAP)
87 map_flash_registers(flash);
hailfinger336d3c32008-03-14 00:02:25 +000088
89 return 1;
90}
91
hailfinger82719632009-05-16 21:22:56 +000092uint8_t wait_82802ab(chipaddr bios)
hailfinger336d3c32008-03-14 00:02:25 +000093{
94 uint8_t status;
hailfinger336d3c32008-03-14 00:02:25 +000095
hailfinger1ff6e362009-03-06 22:26:00 +000096 chip_writeb(0x70, bios);
97 if ((chip_readb(bios) & 0x80) == 0) { // it's busy
98 while ((chip_readb(bios) & 0x80) == 0) ;
hailfinger336d3c32008-03-14 00:02:25 +000099 }
100
hailfinger1ff6e362009-03-06 22:26:00 +0000101 status = chip_readb(bios);
hailfinger336d3c32008-03-14 00:02:25 +0000102
hailfinger2fc3c402009-09-05 01:16:30 +0000103 /* Reset to get a clean state */
104 chip_writeb(0xFF, bios);
hailfinger336d3c32008-03-14 00:02:25 +0000105
106 return status;
107}
108
snelsonc0acbeb2010-03-19 18:47:06 +0000109int unlock_82802ab(struct flashchip *flash)
110{
111 int i;
112 //chipaddr wrprotect = flash->virtual_registers + page + 2;
113
snelson7af202b2010-03-20 15:15:36 +0000114 for (i = 0; i < flash->total_size * 1024; i+= flash->page_size)
snelsonc0acbeb2010-03-19 18:47:06 +0000115 {
116 chip_writeb(0, flash->virtual_registers + i + 2);
117 }
118
119 return 0;
120}
121
122int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize)
hailfinger336d3c32008-03-14 00:02:25 +0000123{
snelson2d471072010-01-09 05:30:14 +0000124 chipaddr bios = flash->virtual_memory;
hailfinger336d3c32008-03-14 00:02:25 +0000125 uint8_t status;
126
127 // clear status register
snelson2d471072010-01-09 05:30:14 +0000128 chip_writeb(0x50, bios + page);
stepana5807bf2009-09-16 08:26:59 +0000129
hailfinger336d3c32008-03-14 00:02:25 +0000130 // now start it
snelson2d471072010-01-09 05:30:14 +0000131 chip_writeb(0x20, bios + page);
132 chip_writeb(0xd0, bios + page);
hailfingere5829f62009-06-05 17:48:08 +0000133 programmer_delay(10);
stepana5807bf2009-09-16 08:26:59 +0000134
hailfinger336d3c32008-03-14 00:02:25 +0000135 // now let's see what the register is
snelson2d471072010-01-09 05:30:14 +0000136 status = wait_82802ab(bios);
snelsonc0acbeb2010-03-19 18:47:06 +0000137 print_status_82802ab(status);
stepana5807bf2009-09-16 08:26:59 +0000138
snelson2d471072010-01-09 05:30:14 +0000139 if (check_erased_range(flash, page, pagesize)) {
snelsonfc007bb2010-03-24 23:14:32 +0000140 msg_cerr("ERASE FAILED!\n");
hailfinger7af83692009-06-15 17:23:36 +0000141 return -1;
stepan2e0773b2008-04-24 09:07:57 +0000142 }
snelsonfc007bb2010-03-24 23:14:32 +0000143 msg_cinfo("DONE BLOCK 0x%x\n", page);
hailfinger336d3c32008-03-14 00:02:25 +0000144
145 return 0;
146}
147
148int erase_82802ab(struct flashchip *flash)
149{
150 int i;
151 unsigned int total_size = flash->total_size * 1024;
152
snelsonfc007bb2010-03-24 23:14:32 +0000153 msg_cspew("total_size is %d; flash->page_size is %d\n",
hailfinger336d3c32008-03-14 00:02:25 +0000154 total_size, flash->page_size);
155 for (i = 0; i < total_size; i += flash->page_size)
snelsonc0acbeb2010-03-19 18:47:06 +0000156 if (erase_block_82802ab(flash, i, flash->page_size)) {
snelsonfc007bb2010-03-24 23:14:32 +0000157 msg_cerr("ERASE FAILED!\n");
hailfinger7af83692009-06-15 17:23:36 +0000158 return -1;
159 }
snelsonfc007bb2010-03-24 23:14:32 +0000160 msg_cinfo("DONE ERASE\n");
hailfinger336d3c32008-03-14 00:02:25 +0000161
162 return 0;
163}
164
hailfinger82719632009-05-16 21:22:56 +0000165void write_page_82802ab(chipaddr bios, uint8_t *src,
166 chipaddr dst, int page_size)
hailfinger336d3c32008-03-14 00:02:25 +0000167{
168 int i;
169
170 for (i = 0; i < page_size; i++) {
171 /* transfer data from source to destination */
hailfinger1ff6e362009-03-06 22:26:00 +0000172 chip_writeb(0x40, dst);
173 chip_writeb(*src++, dst++);
hailfinger336d3c32008-03-14 00:02:25 +0000174 wait_82802ab(bios);
175 }
176}
177
178int write_82802ab(struct flashchip *flash, uint8_t *buf)
179{
180 int i;
181 int total_size = flash->total_size * 1024;
182 int page_size = flash->page_size;
hailfinger82719632009-05-16 21:22:56 +0000183 chipaddr bios = flash->virtual_memory;
hailfinger9d987ef2009-06-05 18:32:07 +0000184 uint8_t *tmpbuf = malloc(page_size);
hailfinger336d3c32008-03-14 00:02:25 +0000185
hailfinger9d987ef2009-06-05 18:32:07 +0000186 if (!tmpbuf) {
snelsonfc007bb2010-03-24 23:14:32 +0000187 msg_cerr("Could not allocate memory!\n");
hailfinger9d987ef2009-06-05 18:32:07 +0000188 exit(1);
189 }
snelsonfc007bb2010-03-24 23:14:32 +0000190 msg_cinfo("Programming page: \n");
hailfinger336d3c32008-03-14 00:02:25 +0000191 for (i = 0; i < total_size / page_size; i++) {
snelsonfc007bb2010-03-24 23:14:32 +0000192 msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
193 msg_cinfo("%04d at address: 0x%08x", i, i * page_size);
stepan2e0773b2008-04-24 09:07:57 +0000194
195 /* Auto Skip Blocks, which already contain the desired data
196 * Faster, because we only write, what has changed
197 * More secure, because blocks, which are excluded
198 * (with the exclude or layout feature)
199 * or not erased and rewritten; their data is retained also in
200 * sudden power off situations
201 */
hailfinger9d987ef2009-06-05 18:32:07 +0000202 chip_readn(tmpbuf, bios + i * page_size, page_size);
203 if (!memcmp((void *)(buf + i * page_size), tmpbuf, page_size)) {
snelsonfc007bb2010-03-24 23:14:32 +0000204 msg_cdbg("SKIPPED\n");
stepan2e0773b2008-04-24 09:07:57 +0000205 continue;
206 }
207
208 /* erase block by block and write block by block; this is the most secure way */
snelsonc0acbeb2010-03-19 18:47:06 +0000209 if (erase_block_82802ab(flash, i * page_size, page_size)) {
snelsonfc007bb2010-03-24 23:14:32 +0000210 msg_cerr("ERASE FAILED!\n");
hailfinger7af83692009-06-15 17:23:36 +0000211 return -1;
212 }
hailfinger336d3c32008-03-14 00:02:25 +0000213 write_page_82802ab(bios, buf + i * page_size,
214 bios + i * page_size, page_size);
hailfinger336d3c32008-03-14 00:02:25 +0000215 }
snelsonfc007bb2010-03-24 23:14:32 +0000216 msg_cinfo("DONE!\n");
hailfinger9d987ef2009-06-05 18:32:07 +0000217 free(tmpbuf);
hailfinger336d3c32008-03-14 00:02:25 +0000218
219 return 0;
220}
snelsona013bf62010-03-22 04:39:31 +0000221
snelson2c4981a2010-03-22 06:57:02 +0000222int unlock_28f004s5(struct flashchip *flash)
snelsona013bf62010-03-22 04:39:31 +0000223{
224 chipaddr bios = flash->virtual_memory;
snelson6cfa2392010-03-22 07:03:26 +0000225 uint8_t mcfg, bcfg, need_unlock = 0, can_unlock = 0;
226 int i;
snelsona013bf62010-03-22 04:39:31 +0000227
228 /* Clear status register */
229 chip_writeb(0x50, bios);
230
231 /* Read identifier codes */
232 chip_writeb(0x90, bios);
233
234 /* Read master lock-bit */
235 mcfg = chip_readb(bios + 0x3);
snelsonfc007bb2010-03-24 23:14:32 +0000236 msg_cdbg("master lock is ");
snelsona013bf62010-03-22 04:39:31 +0000237 if (mcfg) {
238 msg_cdbg("locked!\n");
239 } else {
240 msg_cdbg("unlocked!\n");
241 can_unlock = 1;
242 }
243
244 /* Read block lock-bits */
245 for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) {
246 bcfg = chip_readb(bios + i + 2); // read block lock config
247 msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un");
248 if (bcfg) {
249 need_unlock = 1;
250 }
251 }
252
253 /* Reset chip */
254 chip_writeb(0xFF, bios);
255
256 /* Unlock: clear block lock-bits, if needed */
257 if (can_unlock && need_unlock) {
snelsonfc007bb2010-03-24 23:14:32 +0000258 msg_cdbg("Unlock: ");
snelsona013bf62010-03-22 04:39:31 +0000259 chip_writeb(0x60, bios);
260 chip_writeb(0xD0, bios);
261 chip_writeb(0xFF, bios);
snelsonfc007bb2010-03-24 23:14:32 +0000262 msg_cdbg("Done!\n");
snelsona013bf62010-03-22 04:39:31 +0000263 }
264
265 /* Error: master locked or a block is locked */
266 if (!can_unlock && need_unlock) {
267 msg_cerr("At least one block is locked and lockdown is active!\n");
268 return -1;
269 }
270
271 return 0;
272}