blob: e32e0b10444e099616421ecd1d0d50252ff846ee [file] [log] [blame]
David Hendricksf7924d12010-06-10 21:26:44 -07001#include <stdlib.h>
2#include <string.h>
3
4#include "flash.h"
5#include "flashchips.h"
6#include "chipdrivers.h"
7
8/*
9 * The following procedures rely on look-up tables to match the user-specified
10 * range with the chip's supported ranges. This turned out to be the most
11 * elegant approach since diferent flash chips use different levels of
12 * granularity and methods to determine protected ranges. In other words,
13 * be stupid and simple since clever arithmetic will not for many chips.
14 */
15
16struct wp_range {
17 unsigned int start; /* starting address */
18 unsigned int len; /* len */
19};
20
21enum bit_state {
22 OFF = 0,
23 ON = 1,
24 X = 0 /* don't care */
25};
26
27struct w25q_range {
28 enum bit_state sec; /* if 1, bp[2:0] describe sectors */
29 enum bit_state tb; /* top/bottom select */
30 unsigned short int bp : 3; /* block protect bitfield */
31 struct wp_range range;
32};
33
34static struct w25q_range w25q16_ranges[] = {
35 { X, X, 0, {0, 0} }, /* none */
36 { 0, 0, 0x1, {0x1f0000, 64 * 1024} },
37 { 0, 0, 0x2, {0x1e0000, 128 * 1024} },
38 { 0, 0, 0x3, {0x1c0000, 256 * 1024} },
39 { 0, 0, 0x4, {0x180000, 512 * 1024} },
40 { 0, 0, 0x5, {0x100000, 1024 * 1024} },
41
42 { 0, 1, 0x1, {0x000000, 64 * 1024} },
43 { 0, 1, 0x2, {0x000000, 128 * 1024} },
44 { 0, 1, 0x3, {0x000000, 256 * 1024} },
45 { 0, 1, 0x4, {0x000000, 512 * 1024} },
46 { 0, 1, 0x5, {0x000000, 1024 * 1024} },
47 { X, X, 0x6, {0x000000, 2048 * 1024} },
48 { X, X, 0x7, {0x000000, 2048 * 1024} },
49
50 { 1, 0, 0x1, {0x1ff000, 4 * 1024} },
51 { 1, 0, 0x2, {0x1fe000, 8 * 1024} },
52 { 1, 0, 0x3, {0x1fc000, 16 * 1024} },
53 { 1, 0, 0x4, {0x1f8000, 32 * 1024} },
54 { 1, 0, 0x5, {0x1f8000, 32 * 1024} },
55
56 { 1, 1, 0x1, {0x000000, 4 * 1024} },
57 { 1, 1, 0x2, {0x000000, 8 * 1024} },
58 { 1, 1, 0x3, {0x000000, 16 * 1024} },
59 { 1, 1, 0x4, {0x000000, 32 * 1024} },
60 { 1, 1, 0x5, {0x000000, 32 * 1024} },
61};
62
63static struct w25q_range w25q32_ranges[] = {
64 { X, X, 0, {0, 0} }, /* none */
65 { 0, 0, 0x1, {0x3f0000, 64 * 1024} },
66 { 0, 0, 0x2, {0x3e0000, 128 * 1024} },
67 { 0, 0, 0x3, {0x3c0000, 256 * 1024} },
68 { 0, 0, 0x4, {0x380000, 512 * 1024} },
69 { 0, 0, 0x5, {0x300000, 1024 * 1024} },
David Hendricks05653ff2010-06-15 16:05:12 -070070 { 0, 0, 0x6, {0x200000, 2048 * 1024} },
David Hendricksf7924d12010-06-10 21:26:44 -070071
72 { 0, 1, 0x1, {0x000000, 64 * 1024} },
73 { 0, 1, 0x2, {0x000000, 128 * 1024} },
74 { 0, 1, 0x3, {0x000000, 256 * 1024} },
75 { 0, 1, 0x4, {0x000000, 512 * 1024} },
76 { 0, 1, 0x5, {0x000000, 1024 * 1024} },
77 { 0, 1, 0x6, {0x000000, 2048 * 1024} },
78 { X, X, 0x7, {0x000000, 4096 * 1024} },
79
80 { 1, 0, 0x1, {0x3ff000, 4 * 1024} },
81 { 1, 0, 0x2, {0x3fe000, 8 * 1024} },
82 { 1, 0, 0x3, {0x3fc000, 16 * 1024} },
83 { 1, 0, 0x4, {0x3f8000, 32 * 1024} },
84 { 1, 0, 0x5, {0x3f8000, 32 * 1024} },
85
86 { 1, 1, 0x1, {0x000000, 4 * 1024} },
87 { 1, 1, 0x2, {0x000000, 8 * 1024} },
88 { 1, 1, 0x3, {0x000000, 16 * 1024} },
89 { 1, 1, 0x4, {0x000000, 32 * 1024} },
90 { 1, 1, 0x5, {0x000000, 32 * 1024} },
91};
92
93static struct w25q_range w25q80_ranges[] = {
94 { X, X, 0, {0, 0} }, /* none */
95 { 0, 0, 0x1, {0x0f0000, 64 * 1024} },
96 { 0, 0, 0x2, {0x0e0000, 128 * 1024} },
97 { 0, 0, 0x3, {0x0c0000, 256 * 1024} },
98 { 0, 0, 0x4, {0x080000, 512 * 1024} },
99
100 { 0, 1, 0x1, {0x000000, 64 * 1024} },
101 { 0, 1, 0x2, {0x000000, 128 * 1024} },
102 { 0, 1, 0x3, {0x000000, 256 * 1024} },
103 { 0, 1, 0x4, {0x000000, 512 * 1024} },
David Hendricks05653ff2010-06-15 16:05:12 -0700104 { X, X, 0x6, {0x000000, 1024 * 1024} },
105 { X, X, 0x7, {0x000000, 1024 * 1024} },
David Hendricksf7924d12010-06-10 21:26:44 -0700106
107 { 1, 0, 0x1, {0x1ff000, 4 * 1024} },
108 { 1, 0, 0x2, {0x1fe000, 8 * 1024} },
109 { 1, 0, 0x3, {0x1fc000, 16 * 1024} },
110 { 1, 0, 0x4, {0x1f8000, 32 * 1024} },
111 { 1, 0, 0x5, {0x1f8000, 32 * 1024} },
112
113 { 1, 1, 0x1, {0x000000, 4 * 1024} },
114 { 1, 1, 0x2, {0x000000, 8 * 1024} },
115 { 1, 1, 0x3, {0x000000, 16 * 1024} },
116 { 1, 1, 0x4, {0x000000, 32 * 1024} },
117 { 1, 1, 0x5, {0x000000, 32 * 1024} },
118};
119
David Hendricks2c4a76c2010-06-28 14:00:43 -0700120static struct w25q_range w25q64_ranges[] = {
121 { X, X, 0, {0, 0} }, /* none */
122
123 { 0, 0, 0x1, {0x7e0000, 128 * 1024} },
124 { 0, 0, 0x2, {0x7c0000, 256 * 1024} },
125 { 0, 0, 0x3, {0x780000, 512 * 1024} },
126 { 0, 0, 0x4, {0x700000, 1024 * 1024} },
127 { 0, 0, 0x5, {0x600000, 2048 * 1024} },
128 { 0, 0, 0x6, {0x400000, 4096 * 1024} },
129
130 { 0, 1, 0x1, {0x000000, 128 * 1024} },
131 { 0, 1, 0x2, {0x000000, 256 * 1024} },
132 { 0, 1, 0x3, {0x000000, 512 * 1024} },
133 { 0, 1, 0x4, {0x000000, 1024 * 1024} },
134 { 0, 1, 0x5, {0x000000, 2048 * 1024} },
135 { 0, 1, 0x6, {0x000000, 4096 * 1024} },
136 { X, X, 0x7, {0x000000, 8192 * 1024} },
137
138 { 1, 0, 0x1, {0x7ff000, 4 * 1024} },
139 { 1, 0, 0x2, {0x7fe000, 8 * 1024} },
140 { 1, 0, 0x3, {0x7fc000, 16 * 1024} },
141 { 1, 0, 0x4, {0x7f8000, 32 * 1024} },
142 { 1, 0, 0x5, {0x7f8000, 32 * 1024} },
143
144 { 1, 1, 0x1, {0x000000, 4 * 1024} },
145 { 1, 1, 0x2, {0x000000, 8 * 1024} },
146 { 1, 1, 0x3, {0x000000, 16 * 1024} },
147 { 1, 1, 0x4, {0x000000, 32 * 1024} },
148 { 1, 1, 0x5, {0x000000, 32 * 1024} },
149};
150
David Hendricks470ca952010-08-13 14:01:53 -0700151struct w25q_range w25x40_ranges[] = {
152 { X, X, 0, {0, 0} }, /* none */
153 { 0, 0, 0x1, {0x070000, 64 * 1024} },
154 { 0, 0, 0x2, {0x060000, 128 * 1024} },
155 { 0, 0, 0x3, {0x040000, 256 * 1024} },
156 { 0, 1, 0x1, {0x000000, 64 * 1024} },
157 { 0, 1, 0x2, {0x000000, 128 * 1024} },
158 { 0, 1, 0x3, {0x000000, 256 * 1024} },
159 { 0, X, 0x4, {0x000000, 512 * 1024} },
160};
161
David Hendricksf7924d12010-06-10 21:26:44 -0700162struct w25q_status {
163 /* this maps to register layout -- do not change ordering */
164 unsigned char busy : 1;
165 unsigned char wel : 1;
166 unsigned char bp0 : 1;
167 unsigned char bp1 : 1;
168 unsigned char bp2 : 1;
169 unsigned char tb : 1;
170 unsigned char sec : 1;
171 unsigned char srp0 : 1;
172 /* FIXME: what about the second status register? */
173// unsigned char srp1 : 1;
174// unsigned char qe : 1;
175} __attribute__ ((packed));
176
David Hendricksd494b0a2010-08-16 16:28:50 -0700177int wp_get_status(const struct flashchip *flash,
178 unsigned int start, unsigned int len,
179 struct w25q_status *status)
David Hendricksf7924d12010-06-10 21:26:44 -0700180{
David Hendricksf7924d12010-06-10 21:26:44 -0700181 struct w25q_range *w25q_ranges;
182 int i, num_entries = 0;
183 int tmp = 0, range_found = 0;
184
David Hendricksd494b0a2010-08-16 16:28:50 -0700185 switch (flash->manufacture_id) {
186 case WINBOND_NEX_ID:
187 switch(flash->model_id) {
188 case W_25X40:
189 w25q_ranges = w25x40_ranges;
190 num_entries = ARRAY_SIZE(w25x40_ranges);
191 break;
192 case W_25Q80:
193 w25q_ranges = w25q80_ranges;
194 num_entries = ARRAY_SIZE(w25q80_ranges);
195 break;
196 case W_25Q16:
197 w25q_ranges = w25q16_ranges;
198 num_entries = ARRAY_SIZE(w25q16_ranges);
199 break;
200 case W_25Q32:
201 w25q_ranges = w25q32_ranges;
202 num_entries = ARRAY_SIZE(w25q32_ranges);
203 break;
204 case W_25Q64:
205 w25q_ranges = w25q64_ranges;
206 num_entries = ARRAY_SIZE(w25q64_ranges);
207 break;
208 default:
209 msg_cerr("%s() %d: WINBOND flash chip mismatch (0x%04x)"
210 ", aborting\n", __func__, __LINE__,
211 flash->model_id);
212 return -1;
213 }
David Hendricks2c4a76c2010-06-28 14:00:43 -0700214 break;
David Hendricksf7924d12010-06-10 21:26:44 -0700215 default:
David Hendricksd494b0a2010-08-16 16:28:50 -0700216 msg_cerr("%s: flash vendor (0x%x) not found, aborting\n",
217 __func__, flash->manufacture_id);
David Hendricksf7924d12010-06-10 21:26:44 -0700218 return -1;
219 }
220
221 memset(&status, 0, sizeof(status));
222 tmp = spi_read_status_register();
223 memcpy(&status, &tmp, 1);
224 msg_cdbg("%s: old status: 0x%02x\n", __func__, tmp);
225
226 for (i = 0; i < num_entries; i++) {
227 struct wp_range *r = &w25q_ranges[i].range;
228
229 msg_cspew("comparing range 0x%x 0x%x / 0x%x 0x%x\n",
230 start, len, r->start, r->len);
231 if ((start == r->start) && (len == r->len)) {
David Hendricksd494b0a2010-08-16 16:28:50 -0700232 status->bp0 = w25q_ranges[i].bp & 1;
233 status->bp1 = w25q_ranges[i].bp >> 1;
234 status->bp2 = w25q_ranges[i].bp >> 2;
235 status->tb = w25q_ranges[i].tb;
236 status->sec = w25q_ranges[i].sec;
David Hendricksf7924d12010-06-10 21:26:44 -0700237
238 range_found = 1;
239 break;
240 }
241 }
242
243 if (!range_found) {
244 msg_cerr("matching range not found\n");
245 return -1;
246 }
David Hendricksd494b0a2010-08-16 16:28:50 -0700247 return 0;
248}
249
250static int w25_set_range(struct flashchip *flash,
251 unsigned int start, unsigned int len)
252{
253 struct w25q_status status;
254 int tmp;
255
256 memset(&status, 0, sizeof(status));
257 tmp = spi_read_status_register();
258 memcpy(&status, &tmp, 1);
259 msg_cdbg("%s: old status: 0x%02x\n", __func__, tmp);
260
261 if (wp_get_status(flash, start, len, &status)) return -1;
David Hendricksf7924d12010-06-10 21:26:44 -0700262
263 msg_cdbg("status.busy: %x\n", status.busy);
264 msg_cdbg("status.wel: %x\n", status.wel);
265 msg_cdbg("status.bp0: %x\n", status.bp0);
266 msg_cdbg("status.bp1: %x\n", status.bp1);
267 msg_cdbg("status.bp2: %x\n", status.bp2);
268 msg_cdbg("status.tb: %x\n", status.tb);
269 msg_cdbg("status.sec: %x\n", status.sec);
270 msg_cdbg("status.srp0: %x\n", status.srp0);
271
272 memcpy(&tmp, &status, sizeof(status));
David Hendricks82fd8ae2010-08-04 14:34:54 -0700273 spi_write_status_register(flash, tmp);
David Hendricksf7924d12010-06-10 21:26:44 -0700274 msg_cdbg("%s: new status: 0x%02x\n",
275 __func__, spi_read_status_register());
276
277 return 0;
278}
279
280static int w25_enable_writeprotect(struct flashchip *flash)
281{
282 struct w25q_status status;
283 int tmp = 0;
284
285 memset(&status, 0, sizeof(status));
286 tmp = spi_read_status_register();
287 memcpy(&status, &tmp, 1);
288 msg_cdbg("%s: old status: 0x%02x\n", __func__, tmp);
289
290 status.srp0 = 1;
291 memcpy(&tmp, &status, sizeof(status));
292 spi_write_status_enable();
David Hendricks82fd8ae2010-08-04 14:34:54 -0700293 spi_write_status_register(flash, tmp);
David Hendricksf7924d12010-06-10 21:26:44 -0700294 msg_cdbg("%s: new status: 0x%02x\n",
295 __func__, spi_read_status_register());
296
297 return 0;
298}
299
300struct wp wp_w25 = {
301 .set_range = w25_set_range,
302 .enable = w25_enable_writeprotect,
303};