blob: e3e70db085349b152c0d55eb5cc3409a1741caa3 [file] [log] [blame]
Edward O'Callaghan97dd9262020-03-26 00:00:41 +11001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2020 The Chromium OS Authors
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <stdlib.h>
18#include <stdint.h>
19#include <stdio.h>
20#include <string.h>
21#include <time.h>
22#include <errno.h>
23
24#include "programmer.h"
25#include "spi.h"
26#include "i2c_helper.h"
27
28
29#define MCU_I2C_SLAVE_ADDR 0x94
30#define REGISTER_ADDRESS (0x94 >> 1)
31#define PAGE_SIZE 256
32#define MAX_SPI_WAIT_RETRIES 1000
33
Edward O'Callaghan33653fd2020-05-04 13:01:54 +100034#define MCU_MODE 0x6F
35#define ENTER_ISP_MODE 0x80
Edward O'Callaghan387632a2020-05-06 16:16:47 +100036#define START_WRITE_XFER 0xA0
37#define WRITE_XFER_STATUS_MASK 0x20
Edward O'Callaghan33653fd2020-05-04 13:01:54 +100038
39#define MCU_DATA_PORT 0x70
40
41#define MAP_PAGE_BYTE2 0x64
42#define MAP_PAGE_BYTE1 0x65
43#define MAP_PAGE_BYTE0 0x66
44
Edward O'Callaghan97dd9262020-03-26 00:00:41 +110045//opcodes
46#define OPCODE_READ 3
47#define OPCODE_WRITE 2
48
49
50struct realtek_mst_i2c_spi_data {
51 int fd;
52};
53
54static int realtek_mst_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t len)
55{
56 i2c_buffer_t data;
57 if (i2c_buffer_t_fill(&data, buf, len))
58 return SPI_GENERIC_ERROR;
59
60 return i2c_write(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
61}
62
63static int realtek_mst_i2c_spi_read_data(int fd, uint16_t addr, void *buf, uint16_t len)
64{
65 i2c_buffer_t data;
66 if (i2c_buffer_t_fill(&data, buf, len))
67 return SPI_GENERIC_ERROR;
68
69 return i2c_read(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
70}
71
72static int get_fd_from_context(const struct flashctx *flash)
73{
74 if (!flash || !flash->mst || !flash->mst->spi.data) {
75 msg_perr("Unable to extract fd from flash context.\n");
76 return SPI_GENERIC_ERROR;
77 }
78 const struct realtek_mst_i2c_spi_data *data =
79 (const struct realtek_mst_i2c_spi_data *)flash->mst->spi.data;
80
81 return data->fd;
82}
83
84static int realtek_mst_i2c_spi_write_register(int fd, uint8_t reg, uint8_t value)
85{
86 uint8_t command[] = { reg, value };
87 return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 2);
88}
89
90static int realtek_mst_i2c_spi_read_register(int fd, uint8_t reg, uint8_t *value)
91{
92 uint8_t command[] = { reg };
93 int ret = realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 1);
94 ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS, value, 1);
95
96 return ret ? SPI_GENERIC_ERROR : 0;
97}
98
Edward O'Callaghan387632a2020-05-06 16:16:47 +100099static int realtek_mst_i2c_spi_wait_command_done(int fd, unsigned int offset, int mask, int target)
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100100{
101 uint8_t val;
102 int tried = 0;
103 int ret = 0;
104 do {
105 ret |= realtek_mst_i2c_spi_read_register(fd, offset, &val);
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000106 } while (!ret && ((val & mask) != target) && ++tried < MAX_SPI_WAIT_RETRIES);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100107
108 if (tried == MAX_SPI_WAIT_RETRIES) {
109 msg_perr("%s: Time out on sending command.\n", __func__);
110 return -MAX_SPI_WAIT_RETRIES;
111 }
112
113 return (val & mask) ? SPI_GENERIC_ERROR : ret;
114}
115
116static int realtek_mst_i2c_spi_enter_isp_mode(int fd)
117{
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000118 int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, ENTER_ISP_MODE);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100119
120 // set internal osc divider register to default to speed up MCU
121 // 0x06A0 = 0x74
122 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
123 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x06);
124 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xA0);
125 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x74);
126
127 return ret;
128}
129
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000130static int realtek_mst_i2c_execute_write(int fd)
131{
132 int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, START_WRITE_XFER);
133 ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, WRITE_XFER_STATUS_MASK, 0);
134 return ret;
135}
136
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100137static int realtek_mst_i2c_spi_reset_mpu(int fd)
138{
139 int ret = 0;
140 // 0xFFEE[1] = 1;
141 uint8_t val = 0;
142 ret |= realtek_mst_i2c_spi_read_register(fd, 0xEE, &val);
143 ret |= realtek_mst_i2c_spi_write_register(fd, 0xEE, (val & 0xFD) | 0x02);
144 return ret;
145}
146
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100147static int realtek_mst_i2c_spi_disable_protection(int fd)
148{
149 int ret = 0;
150 uint8_t val = 0;
151 // 0xAB[2:0] = b001
152
153 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
154 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x10);
155 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xAB);
156
157 ret |= realtek_mst_i2c_spi_read_register(fd, 0xF5, &val);
158
159 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
160 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x10);
161 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xAB);
162
163 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, (val & 0xF8) | 0x01);
164
165 /* Set pin value to high, 0xFFD7[0] = 1. */
166 ret |= realtek_mst_i2c_spi_read_register(fd, 0xD7, &val);
167 ret |= realtek_mst_i2c_spi_write_register(fd, 0xD7, (val & 0xFE) | 0x01);
168
169 return ret;
170}
171
172static int realtek_mst_i2c_spi_send_command(const struct flashctx *flash,
173 unsigned int writecnt, unsigned int readcnt,
174 const unsigned char *writearr,
175 unsigned char *readarr)
176{
177 unsigned i;
178 int ret = 0;
179
180 if (writecnt > 4 || readcnt > 3 || writecnt == 0) {
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100181 return SPI_GENERIC_ERROR;
182 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100183
184 int fd = get_fd_from_context(flash);
185 if (fd < 0)
186 return SPI_GENERIC_ERROR;
187
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000188 /* First byte of writearr should be the spi opcode value, followed by the value to write. */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100189 writecnt--;
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000190
191 /**
192 * Before dispatching a SPI opcode the MCU register 0x60 requires
193 * the following configuration byte set:
194 *
195 * BIT0 - start [0] , end [1].
196 * BITS[1-4] - counts.
197 * BITS[5-7] - opcode type.
198 *
199 * | bit7 | bit6 | bit5 |
200 * +------+------+------+
201 * | 0 | 1 | 0 | ~ JEDEC_RDID,REMS,READ
202 * | 0 | 1 | 1 | ~ JEDEC_WRSR
203 * | 1 | 0 | 1 | ~ JEDEC_.. erasures.
204 */
205 uint8_t ctrl_reg_val = (writecnt << 3) | (readcnt << 1);
206 switch (writearr[0]) {
207 /* WREN isn't a supported somehow? ignore it. */
208 case JEDEC_WREN: return 0;
209 /* WRSR requires BIT6 && BIT5 set. */
210 case JEDEC_WRSR:
211 ctrl_reg_val |= (1 << 5);
212 ctrl_reg_val |= (2 << 5);
213 break;
214 /* Erasures require BIT7 && BIT5 set. */
215 case JEDEC_CE_60:
216 case JEDEC_CE_C7:
217 case JEDEC_BE_52:
218 case JEDEC_BE_D8:
219 case JEDEC_BE_D7:
220 case JEDEC_SE:
221 ctrl_reg_val |= (1 << 5);
222 ctrl_reg_val |= (4 << 5);
223 break;
224 default:
225 /* Otherwise things like RDID,REMS,READ require BIT6 */
226 ctrl_reg_val |= (2 << 5);
227 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100228 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val);
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000229 ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, writearr[0]); /* opcode */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100230
231 for (i = 0; i < writecnt; ++i)
232 ret |= realtek_mst_i2c_spi_write_register(fd, 0x64 + i, writearr[i + 1]);
233 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val | 0x1);
234 if (ret)
235 return ret;
236
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000237 ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01, 0);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100238 if (ret)
239 return ret;
240
241 for (i = 0; i < readcnt; ++i)
242 ret |= realtek_mst_i2c_spi_read_register(fd, 0x67 + i, &readarr[i]);
243
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100244 return ret;
245}
246
247static int realtek_mst_i2c_spi_map_page(int fd, uint8_t block_idx, uint8_t page_idx, uint8_t byte_idx)
248{
249 int ret = 0;
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000250 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE2, block_idx);
251 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE1, page_idx);
252 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE0, byte_idx);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100253
254 return ret ? SPI_GENERIC_ERROR : 0;
255}
256
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000257static int realtek_mst_i2c_spi_write_page(int fd, uint8_t reg, const uint8_t *buf, unsigned int len)
258{
259 /**
260 * Using static buffer with maximum possible size,
261 * extra byte is needed for prefixing the data port register at index 0.
262 */
263 uint8_t wbuf[PAGE_SIZE + 1] = { MCU_DATA_PORT };
264 if (len > PAGE_SIZE)
265 return SPI_GENERIC_ERROR;
266
267 memcpy(&wbuf[1], buf, len);
268
269 return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, wbuf, len + 1);
270}
271
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100272static int realtek_mst_i2c_spi_read(struct flashctx *flash, uint8_t *buf,
273 unsigned int start, unsigned int len)
274{
275 unsigned i;
276 int ret = 0;
277
278 if (start & 0xff)
279 return default_spi_read(flash, buf, start, len);
280
281 int fd = get_fd_from_context(flash);
282 if (fd < 0)
283 return SPI_GENERIC_ERROR;
284
285 start--;
286 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x46); // **
287 ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, OPCODE_READ);
288 uint8_t block_idx = start >> 16;
289 uint8_t page_idx = start >> 8;
290 uint8_t byte_idx = start;
291 ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx);
292 ret |= realtek_mst_i2c_spi_write_register(fd, 0x6a, 0x03);
293 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x47); // **
294 if (ret)
295 return ret;
296
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000297 ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01, 0);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100298 if (ret)
299 return ret;
300
301 /**
302 * The first byte is just a null, probably a status code?
303 * Advance the read by a offset of one byte and continue.
304 */
305 uint8_t dummy;
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000306 realtek_mst_i2c_spi_read_register(fd, MCU_DATA_PORT, &dummy);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100307
308 for (i = 0; i < len; i += PAGE_SIZE) {
309 ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS,
310 buf + i, min(len - i, PAGE_SIZE));
311 if (ret)
312 return ret;
313 }
314
315 return ret;
316}
317
318static int realtek_mst_i2c_spi_write_256(struct flashctx *flash, const uint8_t *buf,
319 unsigned int start, unsigned int len)
320{
321 unsigned i;
322 int ret = 0;
323
324 if (start & 0xff)
325 return default_spi_write_256(flash, buf, start, len);
326
327 int fd = get_fd_from_context(flash);
328 if (fd < 0)
329 return SPI_GENERIC_ERROR;
330
331 ret = realtek_mst_i2c_spi_disable_protection(fd);
332 if (ret)
333 return ret;
334
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000335 ret |= realtek_mst_i2c_spi_write_register(fd, 0x6D, 0x02); /* write opcode */
336 ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, (PAGE_SIZE - 1)); /* fit len=256 */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100337
338 for (i = 0; i < len; i += PAGE_SIZE) {
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000339 uint16_t page_len = min(len - i, PAGE_SIZE);
340 if (len - i < PAGE_SIZE)
341 ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, page_len-1);
342 uint8_t block_idx = (start + i) >> 16;
343 uint8_t page_idx = (start + i) >> 8;
344 ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, 0);
345 if (ret)
346 break;
347
348 /* Wait for empty buffer. */
349 ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, 0x10, 0x10);
350 if (ret)
351 break;
352
353 ret |= realtek_mst_i2c_spi_write_page(fd, MCU_DATA_PORT,
354 buf + i, page_len);
355 if (ret)
356 break;
357 ret |= realtek_mst_i2c_execute_write(fd);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100358 if (ret)
359 break;
360 }
361
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000362
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100363 /* TODO: re-enable the write protection? */
364
365 return ret;
366}
367
368static int realtek_mst_i2c_spi_write_aai(struct flashctx *flash, const uint8_t *buf,
369 unsigned int start, unsigned int len)
370{
371 msg_perr("%s: AAI write function is not supported.\n", __func__);
372 return SPI_GENERIC_ERROR;
373}
374
375static struct spi_master spi_master_i2c_realtek_mst = {
376 .max_data_read = 16,
377 .max_data_write = 8,
378 .command = realtek_mst_i2c_spi_send_command,
379 .multicommand = default_spi_send_multicommand,
380 .read = realtek_mst_i2c_spi_read,
381 .write_256 = realtek_mst_i2c_spi_write_256,
382 .write_aai = realtek_mst_i2c_spi_write_aai,
383};
384
385static int realtek_mst_i2c_spi_shutdown(void *data)
386{
387 int ret = 0;
388 struct realtek_mst_i2c_spi_data *realtek_mst_data =
389 (struct realtek_mst_i2c_spi_data *)data;
390 int fd = realtek_mst_data->fd;
391 ret |= realtek_mst_i2c_spi_reset_mpu(fd);
392 i2c_close(fd);
393 free(data);
394
395 return ret;
396}
397
398static int get_params(int *i2c_bus)
399{
400 char *bus_str = NULL;
401 int ret = SPI_GENERIC_ERROR;
402
403 bus_str = extract_programmer_param("bus");
404 if (bus_str) {
405 char *bus_suffix;
406 errno = 0;
407 int bus = (int)strtol(bus_str, &bus_suffix, 10);
408 if (errno != 0 || bus_str == bus_suffix) {
409 msg_perr("%s: Could not convert 'bus'.\n", __func__);
410 goto get_params_done;
411 }
412
413 if (bus < 0 || bus > 255) {
414 msg_perr("%s: Value for 'bus' is out of range(0-255).\n", __func__);
415 goto get_params_done;
416 }
417
418 if (strlen(bus_suffix) > 0) {
419 msg_perr("%s: Garbage following 'bus' value.\n", __func__);
420 goto get_params_done;
421 }
422
423 msg_pinfo("Using i2c bus %i.\n", bus);
424 *i2c_bus = bus;
425 ret = 0;
426 goto get_params_done;
427 } else {
428 msg_perr("%s: Bus number not specified.\n", __func__);
429 }
430get_params_done:
431 if (bus_str)
432 free(bus_str);
433
434 return ret;
435}
436
437int realtek_mst_i2c_spi_init(void)
438{
439 int ret = 0;
440 int i2c_bus = 0;
441
442 if (get_params(&i2c_bus))
443 return SPI_GENERIC_ERROR;
444
445 int fd = i2c_open(i2c_bus, REGISTER_ADDRESS, 0);
446 if (fd < 0)
447 return fd;
448
449 /* Ensure we are in a known state before entering ISP mode */
450 ret |= realtek_mst_i2c_spi_reset_mpu(fd);
451 if (ret)
452 return ret;
453
454 ret |= realtek_mst_i2c_spi_enter_isp_mode(fd);
455 if (ret)
456 return ret;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100457
458 struct realtek_mst_i2c_spi_data *data = calloc(1, sizeof(struct realtek_mst_i2c_spi_data));
459 if (!data) {
460 msg_perr("Unable to allocate space for extra SPI master data.\n");
461 return SPI_GENERIC_ERROR;
462 }
463
464 data->fd = fd;
465 ret |= register_shutdown(realtek_mst_i2c_spi_shutdown, data);
466
467 spi_master_i2c_realtek_mst.data = data;
468 ret |= register_spi_master(&spi_master_i2c_realtek_mst);
469
470 return ret;
471}