David Hendricks | ee71247 | 2012-05-23 21:50:59 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2012 The Chromium OS Authors. All rights reserved. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * |
| 10 | * Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * |
| 13 | * Redistributions in binary form must reproduce the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer in the |
| 15 | * documentation and/or other materials provided with the distribution. |
| 16 | * |
| 17 | * Neither the name of Google or the names of contributors or |
| 18 | * licensors may be used to endorse or promote products derived from this |
| 19 | * software without specific prior written permission. |
| 20 | * |
| 21 | * This software is provided "AS IS," without a warranty of any kind. |
| 22 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, |
| 23 | * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A |
| 24 | * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. |
| 25 | * GOOGLE INC AND ITS LICENSORS SHALL NOT BE LIABLE |
| 26 | * FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING |
| 27 | * OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL |
| 28 | * GOOGLE OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, |
| 29 | * OR FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR |
| 30 | * PUNITIVE DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF |
| 31 | * LIABILITY, ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE, |
| 32 | * EVEN IF GOOGLE HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
| 33 | */ |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 34 | #include <errno.h> |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 35 | #include <stdio.h> |
| 36 | #include <stdlib.h> |
| 37 | #include <string.h> |
| 38 | #include <unistd.h> |
| 39 | #include "flashchips.h" |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 40 | #include "fmap.h" |
David Hendricks | a5c5cf8 | 2014-08-11 16:40:17 -0700 | [diff] [blame] | 41 | #include "cros_ec.h" |
| 42 | #include "cros_ec_lock.h" |
| 43 | #include "cros_ec_commands.h" |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 44 | #include "programmer.h" |
| 45 | #include "spi.h" |
| 46 | #include "writeprotect.h" |
| 47 | |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 48 | /* FIXME: used for wp hacks */ |
| 49 | #include <sys/types.h> |
| 50 | #include <sys/stat.h> |
| 51 | #include <fcntl.h> |
| 52 | #include <unistd.h> |
| 53 | struct wp_data { |
| 54 | int enable; |
| 55 | unsigned int start; |
| 56 | unsigned int len; |
| 57 | }; |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 58 | #define WP_STATE_HACK_FILENAME "/mnt/stateful_partition/flashrom_wp_state" |
| 59 | |
Louis Yung-Chieh Lo | ef88ec3 | 2012-09-20 10:39:35 +0800 | [diff] [blame] | 60 | /* If software sync is enabled, then we don't try the latest firmware copy |
| 61 | * after updating. |
| 62 | */ |
| 63 | #define SOFTWARE_SYNC_ENABLED |
| 64 | |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 65 | /* 1 if we want the flashrom to call erase_and_write_flash() again. */ |
| 66 | static int need_2nd_pass = 0; |
| 67 | |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 68 | /* 1 if we want the flashrom to try jumping to new firmware after update. */ |
| 69 | static int try_latest_firmware = 0; |
| 70 | |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 71 | /* The range of each firmware copy from the image file to update. |
| 72 | * But re-define the .flags as the valid flag to indicate the firmware is |
| 73 | * new or not (if flags = 1). |
| 74 | */ |
| 75 | static struct fmap_area fwcopy[4]; // [0] is not used. |
| 76 | |
| 77 | /* The names of enum lpc_current_image to match in FMAP area names. */ |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 78 | static const char *sections[] = { |
David Hendricks | bf8c4dd | 2012-07-19 12:13:17 -0700 | [diff] [blame] | 79 | "UNKNOWN SECTION", // EC_IMAGE_UNKNOWN -- never matches |
| 80 | "EC_RO", |
| 81 | "EC_RW", |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 82 | }; |
| 83 | |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 84 | /* |
| 85 | * The names of the different device that can be found in a machine. |
| 86 | * Order is important: for backward compatibilty issue, |
| 87 | * 'ec' must be 0, 'pd' must be 1. |
| 88 | */ |
| 89 | static const char *ec_type[] = { |
| 90 | [0] = "ec", |
| 91 | [1] = "pd", |
| 92 | [2] = "sh", |
| 93 | }; |
| 94 | |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 95 | /* EC_FLASH_REGION_WP_RO is the highest numbered region so it also indicates |
| 96 | * the number of regions */ |
| 97 | static struct ec_response_flash_region_info regions[EC_FLASH_REGION_WP_RO + 1]; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 98 | |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 99 | /* Given the range not able to update, mark the corresponding |
| 100 | * firmware as old. |
| 101 | */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 102 | static void cros_ec_invalidate_copy(unsigned int addr, unsigned int len) |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 103 | { |
| 104 | int i; |
| 105 | |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 106 | for (i = EC_IMAGE_RO; i < ARRAY_SIZE(fwcopy); i++) { |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 107 | struct fmap_area *fw = &fwcopy[i]; |
| 108 | if ((addr >= fw->offset && (addr < fw->offset + fw->size)) || |
| 109 | (fw->offset >= addr && (fw->offset < addr + len))) { |
| 110 | msg_pdbg("Mark firmware [%s] as old.\n", |
| 111 | sections[i]); |
| 112 | fw->flags = 0; // mark as old |
| 113 | } |
| 114 | } |
| 115 | } |
| 116 | |
| 117 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 118 | static int cros_ec_get_current_image(struct cros_ec_priv *priv) |
Simon Glass | 01c1167 | 2013-07-01 18:03:33 +0900 | [diff] [blame] | 119 | { |
| 120 | struct ec_response_get_version resp; |
| 121 | int rc; |
| 122 | |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 123 | rc = priv->ec_command(EC_CMD_GET_VERSION, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 124 | 0, NULL, 0, &resp, sizeof(resp)); |
Simon Glass | 01c1167 | 2013-07-01 18:03:33 +0900 | [diff] [blame] | 125 | if (rc < 0) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 126 | msg_perr("CROS_EC cannot get the running copy: rc=%d\n", rc); |
Simon Glass | 01c1167 | 2013-07-01 18:03:33 +0900 | [diff] [blame] | 127 | return rc; |
| 128 | } |
| 129 | if (resp.current_image == EC_IMAGE_UNKNOWN) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 130 | msg_perr("CROS_EC gets unknown running copy\n"); |
Simon Glass | 01c1167 | 2013-07-01 18:03:33 +0900 | [diff] [blame] | 131 | return -1; |
| 132 | } |
| 133 | |
| 134 | return resp.current_image; |
| 135 | } |
| 136 | |
| 137 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 138 | static int cros_ec_get_region_info(struct cros_ec_priv *priv, |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 139 | enum ec_flash_region region, |
| 140 | struct ec_response_flash_region_info *info) |
| 141 | { |
| 142 | struct ec_params_flash_region_info req; |
| 143 | struct ec_response_flash_region_info resp; |
| 144 | int rc; |
| 145 | |
| 146 | req.region = region; |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 147 | rc = priv->ec_command(EC_CMD_FLASH_REGION_INFO, |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 148 | EC_VER_FLASH_REGION_INFO, &req, sizeof(req), |
| 149 | &resp, sizeof(resp)); |
| 150 | if (rc < 0) { |
| 151 | msg_perr("Cannot get the WP_RO region info: %d\n", rc); |
| 152 | return rc; |
| 153 | } |
| 154 | |
| 155 | info->offset = resp.offset; |
| 156 | info->size = resp.size; |
| 157 | return 0; |
| 158 | } |
| 159 | |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 160 | /** |
| 161 | * Get the versions of the command supported by the EC. |
| 162 | * |
| 163 | * @param cmd Command |
| 164 | * @param pmask Destination for version mask; will be set to 0 on |
| 165 | * error. |
| 166 | * @return 0 if success, <0 if error |
| 167 | */ |
| 168 | static int ec_get_cmd_versions(int cmd, uint32_t *pmask) |
| 169 | { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 170 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 171 | struct ec_params_get_cmd_versions pver; |
| 172 | struct ec_response_get_cmd_versions rver; |
| 173 | int rc; |
| 174 | |
| 175 | *pmask = 0; |
| 176 | |
| 177 | pver.cmd = cmd; |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 178 | rc = priv->ec_command(EC_CMD_GET_CMD_VERSIONS, 0, |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 179 | &pver, sizeof(pver), &rver, sizeof(rver)); |
| 180 | |
| 181 | if (rc < 0) |
| 182 | return rc; |
| 183 | |
| 184 | *pmask = rver.version_mask; |
| 185 | return rc; |
| 186 | } |
| 187 | |
| 188 | /** |
| 189 | * Return non-zero if the EC supports the command and version |
| 190 | * |
| 191 | * @param cmd Command to check |
| 192 | * @param ver Version to check |
| 193 | * @return non-zero if command version supported; 0 if not. |
| 194 | */ |
| 195 | static int ec_cmd_version_supported(int cmd, int ver) |
| 196 | { |
| 197 | uint32_t mask = 0; |
| 198 | int rc; |
| 199 | |
| 200 | rc = ec_get_cmd_versions(cmd, &mask); |
| 201 | if (rc < 0) |
| 202 | return rc; |
| 203 | |
| 204 | return (mask & EC_VER_MASK(ver)) ? 1 : 0; |
| 205 | } |
| 206 | |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 207 | /* returns 0 if successful or <0 to indicate error */ |
| 208 | static int set_ideal_write_size(struct cros_ec_priv *priv) |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 209 | { |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 210 | int cmd_version, ret; |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 211 | |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 212 | cmd_version = ec_cmd_version_supported(EC_CMD_FLASH_WRITE, |
| 213 | EC_VER_FLASH_WRITE); |
| 214 | if (cmd_version < 0) { |
| 215 | msg_perr("Cannot determine write command version\n"); |
| 216 | return cmd_version; |
| 217 | } else if (cmd_version == 0) { |
| 218 | struct ec_response_flash_info info; |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 219 | |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 220 | ret = priv->ec_command(EC_CMD_FLASH_INFO, |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 221 | cmd_version, NULL, 0, &info, sizeof(info)); |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 222 | if (ret < 0) { |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 223 | msg_perr("%s(): Cannot get flash info.\n", __func__); |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 224 | return ret; |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 225 | } |
| 226 | |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 227 | priv->ideal_write_size = EC_FLASH_WRITE_VER0_SIZE; |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 228 | } else { |
| 229 | struct ec_response_flash_info_1 info; |
| 230 | |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 231 | ret = priv->ec_command(EC_CMD_FLASH_INFO, |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 232 | cmd_version, NULL, 0, &info, sizeof(info)); |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 233 | if (ret < 0) { |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 234 | msg_perr("%s(): Cannot get flash info.\n", __func__); |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 235 | return ret; |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 236 | } |
| 237 | |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 238 | priv->ideal_write_size = info.write_ideal_size; |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 239 | } |
| 240 | |
David Hendricks | fb405f1 | 2014-08-19 22:42:30 -0700 | [diff] [blame] | 241 | return 0; |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 242 | } |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 243 | |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 244 | /* Asks EC to jump to a firmware copy. If target is EC_IMAGE_UNKNOWN, |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 245 | * then this functions picks a NEW firmware copy and jumps to it. Note that |
| 246 | * RO is preferred, then A, finally B. |
| 247 | * |
| 248 | * Returns 0 for success. |
| 249 | */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 250 | static int cros_ec_jump_copy(enum ec_current_image target) { |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 251 | struct ec_params_reboot_ec p; |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 252 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 253 | int rc; |
Vadim Bendebury | 9fa26e8 | 2013-09-19 13:56:32 -0700 | [diff] [blame] | 254 | int current_image; |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 255 | |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 256 | /* Since the EC may return EC_RES_SUCCESS twice if the EC doesn't |
| 257 | * jump to different firmware copy. The second EC_RES_SUCCESS would |
| 258 | * set the OBF=1 and the next command cannot be executed. |
| 259 | * Thus, we call EC to jump only if the target is different. |
| 260 | */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 261 | current_image = cros_ec_get_current_image(priv); |
Vadim Bendebury | 9fa26e8 | 2013-09-19 13:56:32 -0700 | [diff] [blame] | 262 | if (current_image < 0) |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 263 | return 1; |
Vadim Bendebury | 9fa26e8 | 2013-09-19 13:56:32 -0700 | [diff] [blame] | 264 | if (current_image == target) |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 265 | return 0; |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 266 | |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 267 | memset(&p, 0, sizeof(p)); |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 268 | |
| 269 | /* Translate target --> EC reboot command parameter */ |
| 270 | switch (target) { |
| 271 | case EC_IMAGE_RO: |
| 272 | p.cmd = EC_REBOOT_JUMP_RO; |
| 273 | break; |
| 274 | case EC_IMAGE_RW: |
| 275 | p.cmd = EC_REBOOT_JUMP_RW; |
| 276 | break; |
| 277 | default: |
| 278 | /* |
| 279 | * If target is unspecified, set EC reboot command to use |
| 280 | * a new image. Also set "target" so that it may be used |
| 281 | * to update the priv->current_image if jump is successful. |
| 282 | */ |
| 283 | if (fwcopy[EC_IMAGE_RO].flags) { |
| 284 | p.cmd = EC_REBOOT_JUMP_RO; |
| 285 | target = EC_IMAGE_RO; |
| 286 | } else if (fwcopy[EC_IMAGE_RW].flags) { |
| 287 | p.cmd = EC_REBOOT_JUMP_RW; |
| 288 | target = EC_IMAGE_RW; |
| 289 | } else { |
| 290 | p.cmd = EC_IMAGE_UNKNOWN; |
| 291 | } |
| 292 | break; |
| 293 | } |
| 294 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 295 | msg_pdbg("CROS_EC is jumping to [%s]\n", sections[p.cmd]); |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 296 | if (p.cmd == EC_IMAGE_UNKNOWN) return 1; |
| 297 | |
Vadim Bendebury | 9fa26e8 | 2013-09-19 13:56:32 -0700 | [diff] [blame] | 298 | if (current_image == p.cmd) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 299 | msg_pdbg("CROS_EC is already in [%s]\n", sections[p.cmd]); |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 300 | priv->current_image = target; |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 301 | return 0; |
| 302 | } |
| 303 | |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 304 | rc = priv->ec_command(EC_CMD_REBOOT_EC, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 305 | 0, &p, sizeof(p), NULL, 0); |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 306 | if (rc < 0) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 307 | msg_perr("CROS_EC cannot jump to [%s]:%d\n", |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 308 | sections[p.cmd], rc); |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 309 | } else { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 310 | msg_pdbg("CROS_EC has jumped to [%s]\n", sections[p.cmd]); |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 311 | rc = EC_RES_SUCCESS; |
Simon Glass | 01c1167 | 2013-07-01 18:03:33 +0900 | [diff] [blame] | 312 | priv->current_image = target; |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | /* Sleep 1 sec to wait the EC re-init. */ |
| 316 | usleep(1000000); |
| 317 | |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 318 | /* update max data write size in case we're jumping to an EC |
| 319 | * firmware with different protocol */ |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 320 | set_ideal_write_size(priv); |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 321 | |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 322 | return rc; |
| 323 | } |
| 324 | |
| 325 | |
| 326 | /* Given an image, this function parses FMAP and recognize the firmware |
| 327 | * ranges. |
| 328 | */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 329 | int cros_ec_prepare(uint8_t *image, int size) { |
| 330 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 331 | struct fmap *fmap; |
| 332 | int i, j; |
| 333 | |
Louis Yung-Chieh Lo | 0eaa0ca | 2012-05-29 15:28:58 +0800 | [diff] [blame] | 334 | if (!(priv && priv->detected)) return 0; |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 335 | |
| 336 | // Parse the fmap in the image file and cache the firmware ranges. |
| 337 | fmap = fmap_find_in_memory(image, size); |
| 338 | if (!fmap) return 0; |
| 339 | |
| 340 | // Lookup RO/A/B sections in FMAP. |
| 341 | for (i = 0; i < fmap->nareas; i++) { |
| 342 | struct fmap_area *fa = &fmap->areas[i]; |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 343 | for (j = EC_IMAGE_RO; j < ARRAY_SIZE(sections); j++) { |
David Hendricks | 5b06c88 | 2012-05-20 18:27:25 -0700 | [diff] [blame] | 344 | if (!strcmp(sections[j], (const char *)fa->name)) { |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 345 | msg_pdbg("Found '%s' in image.\n", fa->name); |
| 346 | memcpy(&fwcopy[j], fa, sizeof(*fa)); |
| 347 | fwcopy[j].flags = 1; // mark as new |
| 348 | } |
| 349 | } |
| 350 | } |
| 351 | |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 352 | /* Warning: before update, we jump the EC to RO copy. If you want to |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 353 | * change this behavior, please also check the cros_ec_finish(). |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 354 | */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 355 | return cros_ec_jump_copy(EC_IMAGE_RO); |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 356 | } |
| 357 | |
| 358 | |
| 359 | /* Returns >0 if we need 2nd pass of erase_and_write_flash(). |
| 360 | * <0 if we cannot jump to any firmware copy. |
| 361 | * ==0 if no more pass is needed. |
| 362 | * |
| 363 | * This function also jumps to new-updated firmware copy before return >0. |
| 364 | */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 365 | int cros_ec_need_2nd_pass(void) { |
| 366 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
David Hendricks | 7cfbd02 | 2012-05-20 17:25:51 -0700 | [diff] [blame] | 367 | |
Louis Yung-Chieh Lo | 0eaa0ca | 2012-05-29 15:28:58 +0800 | [diff] [blame] | 368 | if (!(priv && priv->detected)) return 0; |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 369 | |
| 370 | if (need_2nd_pass) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 371 | if (cros_ec_jump_copy(EC_IMAGE_UNKNOWN)) { |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 372 | return -1; |
| 373 | } |
| 374 | } |
| 375 | |
| 376 | return need_2nd_pass; |
| 377 | } |
| 378 | |
| 379 | |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 380 | /* Returns 0 for success. |
| 381 | * |
| 382 | * Try latest firmware: B > A > RO |
| 383 | * |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 384 | * This function assumes the EC jumps to RO at cros_ec_prepare() so that |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 385 | * the fwcopy[RO].flags is old (0) and A/B are new. Please also refine |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 386 | * this code logic if you change the cros_ec_prepare() behavior. |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 387 | */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 388 | int cros_ec_finish(void) { |
| 389 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 390 | |
| 391 | if (!(priv && priv->detected)) return 0; |
| 392 | |
| 393 | if (try_latest_firmware) { |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 394 | if (fwcopy[EC_IMAGE_RW].flags && |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 395 | cros_ec_jump_copy(EC_IMAGE_RW) == 0) return 0; |
| 396 | return cros_ec_jump_copy(EC_IMAGE_RO); |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 397 | } |
| 398 | |
| 399 | return 0; |
| 400 | } |
| 401 | |
| 402 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 403 | int cros_ec_read(struct flashchip *flash, uint8_t *readarr, |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 404 | unsigned int blockaddr, unsigned int readcnt) { |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 405 | int rc = 0; |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 406 | struct ec_params_flash_read p; |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 407 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
David Hendricks | d6a0f66 | 2012-05-29 14:39:50 -0700 | [diff] [blame] | 408 | int maxlen = opaque_programmer->max_data_read; |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 409 | uint8_t buf[maxlen]; |
David Hendricks | 133083b | 2012-07-17 20:39:38 -0700 | [diff] [blame] | 410 | int offset = 0, count; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 411 | |
David Hendricks | 133083b | 2012-07-17 20:39:38 -0700 | [diff] [blame] | 412 | while (offset < readcnt) { |
| 413 | count = min(maxlen, readcnt - offset); |
| 414 | p.offset = blockaddr + offset; |
| 415 | p.size = count; |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 416 | rc = priv->ec_command(EC_CMD_FLASH_READ, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 417 | 0, &p, sizeof(p), buf, count); |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 418 | if (rc < 0) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 419 | msg_perr("CROS_EC: Flash read error at offset 0x%x\n", |
David Hendricks | 133083b | 2012-07-17 20:39:38 -0700 | [diff] [blame] | 420 | blockaddr + offset); |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 421 | return rc; |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 422 | } else { |
| 423 | rc = EC_RES_SUCCESS; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 424 | } |
| 425 | |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 426 | memcpy(readarr + offset, buf, count); |
David Hendricks | 133083b | 2012-07-17 20:39:38 -0700 | [diff] [blame] | 427 | offset += count; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 428 | } |
| 429 | |
| 430 | return rc; |
| 431 | } |
| 432 | |
| 433 | |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 434 | /* |
| 435 | * returns 0 to indicate area does not overlap current EC image |
| 436 | * returns 1 to indicate area overlaps current EC image or error |
| 437 | */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 438 | static int in_current_image(struct cros_ec_priv *priv, |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 439 | unsigned int addr, unsigned int len) |
| 440 | { |
| 441 | int ret; |
| 442 | enum ec_current_image image; |
| 443 | uint32_t region_offset; |
| 444 | uint32_t region_size; |
| 445 | |
| 446 | image = priv->current_image; |
| 447 | region_offset = priv->region[image].offset; |
| 448 | region_size = priv->region[image].size; |
| 449 | |
| 450 | if ((addr + len - 1 < region_offset) || |
| 451 | (addr > region_offset + region_size - 1)) { |
| 452 | return 0; |
| 453 | } |
| 454 | return 1; |
| 455 | } |
| 456 | |
| 457 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 458 | int cros_ec_block_erase(struct flashchip *flash, |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 459 | unsigned int blockaddr, |
| 460 | unsigned int len) { |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 461 | struct ec_params_flash_erase erase; |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 462 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 463 | int rc; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 464 | |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 465 | if (in_current_image(priv, blockaddr, len)) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 466 | cros_ec_invalidate_copy(blockaddr, len); |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 467 | need_2nd_pass = 1; |
| 468 | return ACCESS_DENIED; |
| 469 | } |
| 470 | |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 471 | erase.offset = blockaddr; |
| 472 | erase.size = len; |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 473 | rc = priv->ec_command(EC_CMD_FLASH_ERASE, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 474 | 0, &erase, sizeof(erase), NULL, 0); |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 475 | if (rc == -EC_RES_ACCESS_DENIED) { |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 476 | // this is active image. |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 477 | cros_ec_invalidate_copy(blockaddr, len); |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 478 | need_2nd_pass = 1; |
| 479 | return ACCESS_DENIED; |
| 480 | } |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 481 | if (rc < 0) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 482 | msg_perr("CROS_EC: Flash erase error at address 0x%x, rc=%d\n", |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 483 | blockaddr, rc); |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 484 | return rc; |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 485 | } else { |
| 486 | rc = EC_RES_SUCCESS; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 487 | } |
| 488 | |
Louis Yung-Chieh Lo | ef88ec3 | 2012-09-20 10:39:35 +0800 | [diff] [blame] | 489 | #ifndef SOFTWARE_SYNC_ENABLED |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 490 | try_latest_firmware = 1; |
Louis Yung-Chieh Lo | ef88ec3 | 2012-09-20 10:39:35 +0800 | [diff] [blame] | 491 | #endif |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 492 | return rc; |
| 493 | } |
| 494 | |
| 495 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 496 | int cros_ec_write(struct flashchip *flash, uint8_t *buf, unsigned int addr, |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 497 | unsigned int nbytes) { |
| 498 | int i, rc = 0; |
Ken Chang | 69c31b8 | 2014-10-28 15:17:21 +0800 | [diff] [blame] | 499 | unsigned int written = 0, real_write_size; |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 500 | struct ec_params_flash_write p; |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 501 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
David Hendricks | 2d6db77 | 2013-07-10 21:07:48 -0700 | [diff] [blame] | 502 | uint8_t *packet; |
| 503 | |
Ken Chang | 69c31b8 | 2014-10-28 15:17:21 +0800 | [diff] [blame] | 504 | /* |
| 505 | * For chrome-os-partner:33035, to workaround the undersized |
| 506 | * outdata buffer issue in kernel. |
| 507 | */ |
| 508 | real_write_size = min(opaque_programmer->max_data_write, |
| 509 | priv->ideal_write_size); |
| 510 | packet = malloc(sizeof(p) + real_write_size); |
David Hendricks | 2d6db77 | 2013-07-10 21:07:48 -0700 | [diff] [blame] | 511 | if (!packet) |
| 512 | return -1; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 513 | |
| 514 | for (i = 0; i < nbytes; i += written) { |
Ken Chang | 69c31b8 | 2014-10-28 15:17:21 +0800 | [diff] [blame] | 515 | written = min(nbytes - i, real_write_size); |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 516 | p.offset = addr + i; |
| 517 | p.size = written; |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 518 | |
| 519 | if (in_current_image(priv, p.offset, p.size)) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 520 | cros_ec_invalidate_copy(addr, nbytes); |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 521 | need_2nd_pass = 1; |
| 522 | return ACCESS_DENIED; |
| 523 | } |
| 524 | |
David Hendricks | 2d6db77 | 2013-07-10 21:07:48 -0700 | [diff] [blame] | 525 | memcpy(packet, &p, sizeof(p)); |
| 526 | memcpy(packet + sizeof(p), &buf[i], written); |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 527 | rc = priv->ec_command(EC_CMD_FLASH_WRITE, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 528 | 0, packet, sizeof(p) + p.size, NULL, 0); |
David Hendricks | 2d6db77 | 2013-07-10 21:07:48 -0700 | [diff] [blame] | 529 | |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 530 | if (rc == -EC_RES_ACCESS_DENIED) { |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 531 | // this is active image. |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 532 | cros_ec_invalidate_copy(addr, nbytes); |
Louis Yung-Chieh Lo | 8d0971e | 2012-03-23 00:07:38 +0800 | [diff] [blame] | 533 | need_2nd_pass = 1; |
| 534 | return ACCESS_DENIED; |
| 535 | } |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 536 | |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 537 | if (rc < 0) break; |
| 538 | rc = EC_RES_SUCCESS; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 539 | } |
| 540 | |
Louis Yung-Chieh Lo | ef88ec3 | 2012-09-20 10:39:35 +0800 | [diff] [blame] | 541 | #ifndef SOFTWARE_SYNC_ENABLED |
Louis Yung-Chieh Lo | deefd82 | 2012-07-09 17:07:43 +0800 | [diff] [blame] | 542 | try_latest_firmware = 1; |
Louis Yung-Chieh Lo | ef88ec3 | 2012-09-20 10:39:35 +0800 | [diff] [blame] | 543 | #endif |
David Hendricks | 2d6db77 | 2013-07-10 21:07:48 -0700 | [diff] [blame] | 544 | free(packet); |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 545 | return rc; |
| 546 | } |
| 547 | |
| 548 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 549 | static int cros_ec_list_ranges(const struct flashchip *flash) { |
| 550 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 551 | struct ec_response_flash_region_info info; |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 552 | int rc; |
| 553 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 554 | rc = cros_ec_get_region_info(priv, EC_FLASH_REGION_WP_RO, &info); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 555 | if (rc < 0) { |
| 556 | msg_perr("Cannot get the WP_RO region info: %d\n", rc); |
| 557 | return 1; |
| 558 | } |
| 559 | |
| 560 | msg_pinfo("Supported write protect range:\n"); |
| 561 | msg_pinfo(" disable: start=0x%06x len=0x%06x\n", 0, 0); |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 562 | msg_pinfo(" enable: start=0x%06x len=0x%06x\n", info.offset, |
| 563 | info.size); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 564 | |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 565 | return 0; |
| 566 | } |
| 567 | |
| 568 | |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 569 | /* |
| 570 | * Helper function for flash protection. |
| 571 | * |
| 572 | * On EC API v1, the EC write protection has been simplified to one-bit: |
| 573 | * EC_FLASH_PROTECT_RO_AT_BOOT, which means the state is either enabled |
| 574 | * or disabled. However, this is different from the SPI-style write protect |
| 575 | * behavior. Thus, we re-define the flashrom command (SPI-style) so that |
| 576 | * either SRP or range is non-zero, the EC_FLASH_PROTECT_RO_AT_BOOT is set. |
| 577 | * |
| 578 | * SRP Range | PROTECT_RO_AT_BOOT |
| 579 | * 0 0 | 0 |
| 580 | * 0 non-zero | 1 |
| 581 | * 1 0 | 1 |
| 582 | * 1 non-zero | 1 |
| 583 | * |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 584 | * |
| 585 | * Besides, to make the protection take effect as soon as possible, we |
| 586 | * try to set EC_FLASH_PROTECT_RO_NOW at the same time. However, not |
| 587 | * every EC supports RO_NOW, thus we then try to protect the entire chip. |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 588 | */ |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 589 | static int set_wp(int enable) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 590 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 591 | struct ec_params_flash_protect p; |
| 592 | struct ec_response_flash_protect r; |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 593 | const int ro_at_boot_flag = EC_FLASH_PROTECT_RO_AT_BOOT; |
| 594 | const int ro_now_flag = EC_FLASH_PROTECT_RO_NOW; |
| 595 | int need_an_ec_cold_reset = 0; |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 596 | int rc; |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 597 | |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 598 | /* Try to set RO_AT_BOOT and RO_NOW first */ |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 599 | memset(&p, 0, sizeof(p)); |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 600 | p.mask = (ro_at_boot_flag | ro_now_flag); |
| 601 | p.flags = enable ? (ro_at_boot_flag | ro_now_flag) : 0; |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 602 | rc = priv->ec_command(EC_CMD_FLASH_PROTECT, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 603 | EC_VER_FLASH_PROTECT, &p, sizeof(p), &r, sizeof(r)); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 604 | if (rc < 0) { |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 605 | msg_perr("FAILED: Cannot set the RO_AT_BOOT and RO_NOW: %d\n", |
| 606 | rc); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 607 | return 1; |
| 608 | } |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 609 | |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 610 | /* Read back */ |
| 611 | memset(&p, 0, sizeof(p)); |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 612 | rc = priv->ec_command(EC_CMD_FLASH_PROTECT, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 613 | EC_VER_FLASH_PROTECT, &p, sizeof(p), &r, sizeof(r)); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 614 | if (rc < 0) { |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 615 | msg_perr("FAILED: Cannot get RO_AT_BOOT and RO_NOW: %d\n", |
| 616 | rc); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 617 | return 1; |
| 618 | } |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 619 | |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 620 | if (!enable) { |
| 621 | /* The disable case is easier to check. */ |
| 622 | if (r.flags & ro_at_boot_flag) { |
| 623 | msg_perr("FAILED: RO_AT_BOOT is not clear.\n"); |
| 624 | return 1; |
| 625 | } else if (r.flags & ro_now_flag) { |
| 626 | msg_perr("FAILED: RO_NOW is asserted unexpectedly.\n"); |
| 627 | need_an_ec_cold_reset = 1; |
| 628 | goto exit; |
| 629 | } |
| 630 | |
| 631 | msg_pdbg("INFO: RO_AT_BOOT is clear.\n"); |
| 632 | return 0; |
| 633 | } |
| 634 | |
| 635 | /* Check if RO_AT_BOOT is set. If not, fail in anyway. */ |
| 636 | if (r.flags & ro_at_boot_flag) { |
| 637 | msg_pdbg("INFO: RO_AT_BOOT has been set.\n"); |
| 638 | } else { |
| 639 | msg_perr("FAILED: RO_AT_BOOT is not set.\n"); |
| 640 | return 1; |
| 641 | } |
| 642 | |
| 643 | /* Then, we check if the protection has been activated. */ |
| 644 | if (r.flags & ro_now_flag) { |
| 645 | /* Good, RO_NOW is set. */ |
| 646 | msg_pdbg("INFO: RO_NOW is set. WP is active now.\n"); |
| 647 | } else if (r.writable_flags & EC_FLASH_PROTECT_ALL_NOW) { |
| 648 | struct ec_params_reboot_ec reboot; |
| 649 | |
| 650 | msg_pdbg("WARN: RO_NOW is not set. Trying ALL_NOW.\n"); |
| 651 | |
| 652 | memset(&p, 0, sizeof(p)); |
| 653 | p.mask = EC_FLASH_PROTECT_ALL_NOW; |
| 654 | p.flags = EC_FLASH_PROTECT_ALL_NOW; |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 655 | rc = priv->ec_command(EC_CMD_FLASH_PROTECT, |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 656 | EC_VER_FLASH_PROTECT, |
| 657 | &p, sizeof(p), &r, sizeof(r)); |
| 658 | if (rc < 0) { |
| 659 | msg_perr("FAILED: Cannot set ALL_NOW: %d\n", rc); |
| 660 | return 1; |
| 661 | } |
| 662 | |
| 663 | /* Read back */ |
| 664 | memset(&p, 0, sizeof(p)); |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 665 | rc = priv->ec_command(EC_CMD_FLASH_PROTECT, |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 666 | EC_VER_FLASH_PROTECT, |
| 667 | &p, sizeof(p), &r, sizeof(r)); |
| 668 | if (rc < 0) { |
| 669 | msg_perr("FAILED:Cannot get ALL_NOW: %d\n", rc); |
| 670 | return 1; |
| 671 | } |
| 672 | |
| 673 | if (!(r.flags & EC_FLASH_PROTECT_ALL_NOW)) { |
| 674 | msg_perr("FAILED: ALL_NOW is not set.\n"); |
| 675 | need_an_ec_cold_reset = 1; |
| 676 | goto exit; |
| 677 | } |
| 678 | |
| 679 | msg_pdbg("INFO: ALL_NOW has been set. WP is active now.\n"); |
| 680 | |
| 681 | /* |
| 682 | * Our goal is to protect the RO ASAP. The entire protection |
| 683 | * is just a workaround for platform not supporting RO_NOW. |
| 684 | * It has side-effect that the RW is also protected and leads |
| 685 | * the RW update failed. So, we arrange an EC code reset to |
| 686 | * unlock RW ASAP. |
| 687 | */ |
| 688 | memset(&reboot, 0, sizeof(reboot)); |
| 689 | reboot.cmd = EC_REBOOT_COLD; |
| 690 | reboot.flags = EC_REBOOT_FLAG_ON_AP_SHUTDOWN; |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 691 | rc = priv->ec_command(EC_CMD_REBOOT_EC, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 692 | 0, &reboot, sizeof(reboot), NULL, 0); |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 693 | if (rc < 0) { |
| 694 | msg_perr("WARN: Cannot arrange a cold reset at next " |
| 695 | "shutdown to unlock entire protect.\n"); |
| 696 | msg_perr(" But you can do it manually.\n"); |
| 697 | } else { |
| 698 | msg_pdbg("INFO: A cold reset is arranged at next " |
| 699 | "shutdown.\n"); |
| 700 | } |
| 701 | |
| 702 | } else { |
| 703 | msg_perr("FAILED: RO_NOW is not set.\n"); |
| 704 | msg_perr("FAILED: The PROTECT_RO_AT_BOOT is set, but cannot " |
| 705 | "make write protection active now.\n"); |
| 706 | need_an_ec_cold_reset = 1; |
| 707 | } |
| 708 | |
| 709 | exit: |
| 710 | if (need_an_ec_cold_reset) { |
| 711 | msg_perr("FAILED: You may need a reboot to take effect of " |
| 712 | "PROTECT_RO_AT_BOOT.\n"); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 713 | return 1; |
| 714 | } |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 715 | |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 716 | return 0; |
| 717 | } |
| 718 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 719 | static int cros_ec_set_range(const struct flashchip *flash, |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 720 | unsigned int start, unsigned int len) { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 721 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 722 | struct ec_response_flash_region_info info; |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 723 | int rc; |
| 724 | |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 725 | /* Check if the given range is supported */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 726 | rc = cros_ec_get_region_info(priv, EC_FLASH_REGION_WP_RO, &info); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 727 | if (rc < 0) { |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 728 | msg_perr("FAILED: Cannot get the WP_RO region info: %d\n", rc); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 729 | return 1; |
| 730 | } |
| 731 | if ((!start && !len) || /* list supported ranges */ |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 732 | ((start == info.offset) && (len == info.size))) { |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 733 | /* pass */ |
| 734 | } else { |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 735 | msg_perr("FAILED: Unsupported write protection range " |
| 736 | "(0x%06x,0x%06x)\n\n", start, len); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 737 | msg_perr("Currently supported range:\n"); |
| 738 | msg_perr(" disable: (0x%06x,0x%06x)\n", 0, 0); |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 739 | msg_perr(" enable: (0x%06x,0x%06x)\n", info.offset, |
| 740 | info.size); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 741 | return 1; |
| 742 | } |
| 743 | |
| 744 | return set_wp(!!len); |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 745 | } |
| 746 | |
| 747 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 748 | static int cros_ec_enable_writeprotect(const struct flashchip *flash, |
David Hendricks | 1c09f80 | 2012-10-03 11:03:48 -0700 | [diff] [blame] | 749 | enum wp_mode wp_mode) { |
| 750 | int ret; |
| 751 | |
| 752 | switch (wp_mode) { |
| 753 | case WP_MODE_HARDWARE: |
| 754 | ret = set_wp(1); |
| 755 | break; |
| 756 | default: |
| 757 | msg_perr("%s():%d Unsupported write-protection mode\n", |
| 758 | __func__, __LINE__); |
| 759 | ret = 1; |
| 760 | break; |
| 761 | } |
| 762 | |
| 763 | return ret; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 764 | } |
| 765 | |
| 766 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 767 | static int cros_ec_disable_writeprotect(const struct flashchip *flash) { |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 768 | return set_wp(0); |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 769 | } |
| 770 | |
| 771 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 772 | static int cros_ec_wp_status(const struct flashchip *flash) { |
| 773 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 774 | struct ec_params_flash_protect p; |
| 775 | struct ec_response_flash_protect r; |
| 776 | int start, len; /* wp range */ |
| 777 | int enabled; |
| 778 | int rc; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 779 | |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 780 | memset(&p, 0, sizeof(p)); |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 781 | rc = priv->ec_command(EC_CMD_FLASH_PROTECT, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 782 | EC_VER_FLASH_PROTECT, &p, sizeof(p), &r, sizeof(r)); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 783 | if (rc < 0) { |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 784 | msg_perr("FAILED: Cannot get the write protection status: %d\n", |
| 785 | rc); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 786 | return 1; |
| 787 | } else if (rc < sizeof(r)) { |
David Hendricks | f797dde | 2012-10-30 11:39:12 -0700 | [diff] [blame] | 788 | msg_perr("FAILED: Too little data returned (expected:%zd, " |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 789 | "actual:%d)\n", sizeof(r), rc); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 790 | return 1; |
| 791 | } |
| 792 | |
| 793 | start = len = 0; |
| 794 | if (r.flags & EC_FLASH_PROTECT_RO_AT_BOOT) { |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 795 | struct ec_response_flash_region_info info; |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 796 | |
| 797 | msg_pdbg("%s(): EC_FLASH_PROTECT_RO_AT_BOOT is set.\n", |
| 798 | __func__); |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 799 | rc = cros_ec_get_region_info(priv, EC_FLASH_REGION_WP_RO, &info); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 800 | if (rc < 0) { |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 801 | msg_perr("FAILED: Cannot get the WP_RO region info: " |
| 802 | "%d\n", rc); |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 803 | return 1; |
| 804 | } |
Simon Glass | 3c01dca | 2013-07-01 18:07:34 +0900 | [diff] [blame] | 805 | start = info.offset; |
| 806 | len = info.size; |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 807 | } else { |
| 808 | msg_pdbg("%s(): EC_FLASH_PROTECT_RO_AT_BOOT is clear.\n", |
| 809 | __func__); |
| 810 | } |
| 811 | |
Louis Yung-Chieh Lo | ca052c4 | 2012-08-24 14:12:21 +0800 | [diff] [blame] | 812 | /* |
| 813 | * If neither RO_NOW or ALL_NOW is set, it means write protect is |
| 814 | * NOT active now. |
| 815 | */ |
| 816 | if (!(r.flags & (EC_FLASH_PROTECT_RO_NOW | EC_FLASH_PROTECT_ALL_NOW))) |
| 817 | start = len = 0; |
| 818 | |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 819 | /* Remove the SPI-style messages. */ |
| 820 | enabled = r.flags & EC_FLASH_PROTECT_RO_AT_BOOT ? 1 : 0; |
| 821 | msg_pinfo("WP: status: 0x%02x\n", enabled ? 0x80 : 0x00); |
| 822 | msg_pinfo("WP: status.srp0: %x\n", enabled); |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 823 | msg_pinfo("WP: write protect is %s.\n", |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 824 | enabled ? "enabled" : "disabled"); |
Louis Yung-Chieh Lo | 05b7a7b | 2012-08-06 19:10:39 +0800 | [diff] [blame] | 825 | msg_pinfo("WP: write protect range: start=0x%08x, len=0x%08x\n", |
Louis Yung-Chieh Lo | 3e6da21 | 2012-08-13 17:21:01 +0800 | [diff] [blame] | 826 | start, len); |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 827 | |
| 828 | return 0; |
| 829 | } |
| 830 | |
David Hendricks | e545493 | 2013-11-04 18:16:11 -0800 | [diff] [blame] | 831 | /* perform basic "hello" test to see if we can talk to the EC */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 832 | int cros_ec_test(struct cros_ec_priv *priv) |
David Hendricks | e545493 | 2013-11-04 18:16:11 -0800 | [diff] [blame] | 833 | { |
| 834 | struct ec_params_hello request; |
| 835 | struct ec_response_hello response; |
| 836 | struct ec_response_proto_version proto; |
| 837 | int rc = 0; |
| 838 | |
| 839 | /* Say hello to EC. */ |
| 840 | request.in_data = 0xf0e0d0c0; /* Expect EC will add on 0x01020304. */ |
| 841 | msg_pdbg("%s: sending HELLO request with 0x%08x\n", |
| 842 | __func__, request.in_data); |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 843 | rc = priv->ec_command(EC_CMD_HELLO, 0, &request, |
David Hendricks | e545493 | 2013-11-04 18:16:11 -0800 | [diff] [blame] | 844 | sizeof(request), &response, sizeof(response)); |
| 845 | msg_pdbg("%s: response: 0x%08x\n", __func__, response.out_data); |
| 846 | |
| 847 | if (rc < 0 || response.out_data != 0xf1e2d3c4) { |
| 848 | msg_pdbg("response.out_data is not 0xf1e2d3c4.\n" |
| 849 | "rc=%d, request=0x%x response=0x%x\n", |
| 850 | rc, request.in_data, response.out_data); |
| 851 | return 1; |
| 852 | } |
| 853 | |
| 854 | return 0; |
| 855 | } |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 856 | |
Puthikorn Voravootivat | c0993cf | 2014-08-28 16:04:58 -0700 | [diff] [blame] | 857 | void cros_ec_set_max_size(struct cros_ec_priv *priv, |
| 858 | struct opaque_programmer *op) { |
| 859 | struct ec_response_get_protocol_info info; |
| 860 | int rc = 0; |
| 861 | msg_pdbg("%s: sending protoinfo command\n", __func__); |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 862 | rc = priv->ec_command(EC_CMD_GET_PROTOCOL_INFO, 0, NULL, 0, |
Puthikorn Voravootivat | c0993cf | 2014-08-28 16:04:58 -0700 | [diff] [blame] | 863 | &info, sizeof(info)); |
| 864 | msg_pdbg("%s: rc:%d\n", __func__, rc); |
| 865 | |
| 866 | if (rc == sizeof(info)) { |
| 867 | op->max_data_write = min(op->max_data_write, |
| 868 | info.max_request_packet_size - |
| 869 | sizeof(struct ec_host_request)); |
| 870 | op->max_data_read = min(op->max_data_read, |
| 871 | info.max_response_packet_size - |
| 872 | sizeof(struct ec_host_response)); |
| 873 | msg_pdbg("%s: max_write:%d max_read:%d\n", __func__, |
| 874 | op->max_data_write, op->max_data_read); |
| 875 | } |
| 876 | } |
| 877 | |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 878 | |
| 879 | /* |
David Hendricks | 052446b | 2014-09-11 11:26:51 -0700 | [diff] [blame] | 880 | * Returns 0 to indicate success, non-zero otherwise |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 881 | * |
| 882 | * This function parses programmer parameters from the command line. Since |
| 883 | * CrOS EC hangs off the "internal programmer" (AP, PCH, etc) this gets |
| 884 | * run during internal programmer initialization. |
| 885 | */ |
| 886 | int cros_ec_parse_param(struct cros_ec_priv *priv) |
| 887 | { |
| 888 | char *p; |
| 889 | |
| 890 | p = extract_programmer_param("dev"); |
| 891 | if (p) { |
| 892 | unsigned int index; |
| 893 | char *endptr = NULL; |
| 894 | |
| 895 | errno = 0; |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 896 | /* |
| 897 | * For backward compatibility, check if the index is |
| 898 | * a number: 0: main EC, 1: PD |
| 899 | * works only on Samus. |
| 900 | */ |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 901 | index = strtoul(p, &endptr, 10); |
| 902 | if (errno || (endptr != (p + 1)) || (strlen(p) > 1)) { |
| 903 | msg_perr("Invalid argument: \"%s\"\n", p); |
| 904 | return 1; |
| 905 | } |
| 906 | |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 907 | if (index > 1) { |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 908 | msg_perr("%s: Invalid device index\n", __func__); |
| 909 | return 1; |
| 910 | } |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 911 | priv->dev = ec_type[index]; |
| 912 | msg_pdbg("Target %s used\n", priv->dev); |
| 913 | } |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 914 | |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 915 | p = extract_programmer_param("type"); |
| 916 | if (p) { |
| 917 | unsigned int index; |
| 918 | for (index = 0; index < ARRAY_SIZE(ec_type); index++) |
| 919 | if (!strcmp(p, ec_type[index])) |
| 920 | break; |
| 921 | if (index == ARRAY_SIZE(ec_type)) { |
| 922 | msg_perr("Invalid argument: \"%s\"\n", p); |
| 923 | return 1; |
| 924 | } |
| 925 | priv->dev = ec_type[index]; |
| 926 | msg_pdbg("Target %s used\n", priv->dev); |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 927 | } |
| 928 | |
Duncan Laurie | 8432872 | 2014-09-10 23:25:01 -0700 | [diff] [blame] | 929 | p = extract_programmer_param("block"); |
| 930 | if (p) { |
| 931 | unsigned int block; |
| 932 | char *endptr = NULL; |
| 933 | |
| 934 | errno = 0; |
| 935 | block = strtoul(p, &endptr, 0); |
| 936 | if (errno || (strlen(p) > 10) || (endptr != (p + strlen(p)))) { |
| 937 | msg_perr("Invalid argument: \"%s\"\n", p); |
| 938 | return 1; |
| 939 | } |
| 940 | |
| 941 | if (block <= 0) { |
| 942 | msg_perr("%s: Invalid block size\n", __func__); |
| 943 | return 1; |
| 944 | } |
| 945 | |
| 946 | msg_pdbg("Override block size to 0x%x\n", block); |
| 947 | priv->erase_block_size = block; |
| 948 | } |
| 949 | |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 950 | return 0; |
| 951 | } |
| 952 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 953 | int cros_ec_probe_size(struct flashchip *flash) { |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 954 | int rc; |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 955 | struct ec_response_flash_info info; |
David Hendricks | 194b3bb | 2013-07-16 14:32:26 -0700 | [diff] [blame] | 956 | struct ec_response_get_chip_info chip_info; |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 957 | struct cros_ec_priv *priv = (struct cros_ec_priv *)opaque_programmer->data; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 958 | struct block_eraser *eraser; |
| 959 | static struct wp wp = { |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 960 | .list_ranges = cros_ec_list_ranges, |
| 961 | .set_range = cros_ec_set_range, |
| 962 | .enable = cros_ec_enable_writeprotect, |
| 963 | .disable = cros_ec_disable_writeprotect, |
| 964 | .wp_status = cros_ec_wp_status, |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 965 | }; |
| 966 | |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 967 | rc = priv->ec_command(EC_CMD_FLASH_INFO, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 968 | 0, NULL, 0, &info, sizeof(info)); |
Louis Yung-Chieh Lo | f779a7b | 2012-07-30 18:20:39 +0800 | [diff] [blame] | 969 | if (rc < 0) { |
| 970 | msg_perr("%s(): FLASH_INFO returns %d.\n", __func__, rc); |
| 971 | return 0; |
| 972 | } |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 973 | rc = cros_ec_get_current_image(priv); |
Simon Glass | 01c1167 | 2013-07-01 18:03:33 +0900 | [diff] [blame] | 974 | if (rc < 0) { |
| 975 | msg_perr("%s(): Failed to probe (no current image): %d\n", |
| 976 | __func__, rc); |
| 977 | return 0; |
| 978 | } |
| 979 | priv->current_image = rc; |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 980 | priv->region = ®ions[0]; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 981 | |
| 982 | flash->total_size = info.flash_size / 1024; |
Simon Glass | 144fc2c | 2013-07-16 09:33:35 -0600 | [diff] [blame] | 983 | flash->page_size = opaque_programmer->max_data_read; |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 984 | flash->tested = TEST_OK_PREW; |
| 985 | eraser = &flash->block_erasers[0]; |
Duncan Laurie | 8432872 | 2014-09-10 23:25:01 -0700 | [diff] [blame] | 986 | |
| 987 | /* Allow overriding the erase block size in case EC is incorrect */ |
| 988 | if (priv->erase_block_size > 0) |
| 989 | eraser->eraseblocks[0].size = priv->erase_block_size; |
| 990 | else |
| 991 | eraser->eraseblocks[0].size = info.erase_block_size; |
| 992 | |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 993 | eraser->eraseblocks[0].count = info.flash_size / |
| 994 | eraser->eraseblocks[0].size; |
| 995 | flash->wp = ℘ |
| 996 | |
David Hendricks | 194b3bb | 2013-07-16 14:32:26 -0700 | [diff] [blame] | 997 | /* |
| 998 | * Some STM32 variants erase bits to 0. For now, assume that this |
| 999 | * applies to STM32L parts. |
| 1000 | * |
| 1001 | * FIXME: This info will eventually be exposed via some EC command. |
| 1002 | * See chrome-os-partner:20973. |
| 1003 | */ |
Gwendal Grignou | 94e87d6 | 2014-11-25 15:34:15 -0800 | [diff] [blame^] | 1004 | rc = priv->ec_command(EC_CMD_GET_CHIP_INFO, |
David Hendricks | 14935fe | 2014-08-14 17:38:24 -0700 | [diff] [blame] | 1005 | 0, NULL, 0, &chip_info, sizeof(chip_info)); |
David Hendricks | 194b3bb | 2013-07-16 14:32:26 -0700 | [diff] [blame] | 1006 | if (rc < 0) { |
| 1007 | msg_perr("%s(): CHIP_INFO returned %d.\n", __func__, rc); |
| 1008 | return 0; |
| 1009 | } |
| 1010 | if (!strncmp(chip_info.name, "stm32l", 6)) |
| 1011 | flash->feature_bits |= FEATURE_ERASE_TO_ZERO; |
| 1012 | |
David Hendricks | fbd5e6d | 2014-08-21 15:01:43 -0700 | [diff] [blame] | 1013 | rc = set_ideal_write_size(priv); |
| 1014 | if (rc < 0) { |
| 1015 | msg_perr("%s(): Unable to set write size\n", __func__); |
| 1016 | return 0; |
| 1017 | } |
David Hendricks | f9461c7 | 2013-07-11 19:02:13 -0700 | [diff] [blame] | 1018 | |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 1019 | /* FIXME: EC_IMAGE_* is ordered differently from EC_FLASH_REGION_*, |
| 1020 | * so we need to be careful about using these enums as array indices */ |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 1021 | rc = cros_ec_get_region_info(priv, EC_FLASH_REGION_RO, |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 1022 | &priv->region[EC_IMAGE_RO]); |
| 1023 | if (rc) { |
| 1024 | msg_perr("%s(): Failed to probe (cannot find RO region): %d\n", |
| 1025 | __func__, rc); |
| 1026 | return 0; |
| 1027 | } |
| 1028 | |
David Hendricks | b907de3 | 2014-08-11 16:47:09 -0700 | [diff] [blame] | 1029 | rc = cros_ec_get_region_info(priv, EC_FLASH_REGION_RW, |
Simon Glass | c453a64 | 2013-07-01 18:08:53 +0900 | [diff] [blame] | 1030 | &priv->region[EC_IMAGE_RW]); |
| 1031 | if (rc) { |
| 1032 | msg_perr("%s(): Failed to probe (cannot find RW region): %d\n", |
| 1033 | __func__, rc); |
| 1034 | return 0; |
| 1035 | } |
| 1036 | |
Louis Yung-Chieh Lo | edb0cba | 2011-12-09 17:06:54 +0800 | [diff] [blame] | 1037 | return 1; |
| 1038 | }; |