hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2009,2010 Carl-Daniel Hailfinger |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | /* Driver for various LPT adapters. |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 17 | * |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 18 | * This driver uses non-portable direct I/O port accesses which won't work on |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 19 | * any non-x86 platform, and even on x86 there is a high chance there will be |
| 20 | * collisions with any loaded parallel port drivers. |
| 21 | * The big advantage of direct port I/O is OS independence and speed because |
| 22 | * most OS parport drivers will perform many unnecessary accesses although |
| 23 | * this driver just treats the parallel port as a GPIO set. |
| 24 | */ |
| 25 | #if defined(__i386__) || defined(__x86_64__) |
| 26 | |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 27 | #include <stdlib.h> |
Edward O'Callaghan | b4300ca | 2019-09-03 16:15:21 +1000 | [diff] [blame] | 28 | #include <strings.h> |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 29 | #include <string.h> |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 30 | #include "flash.h" |
hailfinger | 428f685 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 31 | #include "programmer.h" |
Mayur Panchal | f479686 | 2019-08-05 15:46:12 +1000 | [diff] [blame] | 32 | #include "hwaccess.h" |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 33 | |
Anastasia Klimchuk | 1ae3947 | 2021-03-17 12:11:35 +1100 | [diff] [blame] | 34 | static uint16_t lpt_iobase; |
| 35 | |
| 36 | /* Cached value of last byte sent. */ |
| 37 | static uint8_t lpt_outbyte; |
| 38 | |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 39 | /* We have two sets of pins, out and in. The numbers for both sets are |
| 40 | * independent and are bitshift values, not real pin numbers. |
stefanct | 98d917c | 2011-10-21 12:33:07 +0000 | [diff] [blame] | 41 | * Default settings are for the RayeR hardware. |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 42 | */ |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 43 | |
| 44 | struct rayer_programmer { |
| 45 | const char *type; |
| 46 | const enum test_state status; |
| 47 | const char *description; |
| 48 | const void *dev_data; |
| 49 | }; |
| 50 | |
| 51 | struct rayer_pinout { |
| 52 | uint8_t cs_bit; |
| 53 | uint8_t sck_bit; |
| 54 | uint8_t mosi_bit; |
| 55 | uint8_t miso_bit; |
| 56 | void (*preinit)(const void *); |
| 57 | int (*shutdown)(void *); |
| 58 | }; |
| 59 | |
| 60 | static const struct rayer_pinout rayer_spipgm = { |
| 61 | .cs_bit = 5, |
| 62 | .sck_bit = 6, |
| 63 | .mosi_bit = 7, |
| 64 | .miso_bit = 6, |
| 65 | }; |
| 66 | |
Anastasia Klimchuk | 1ae3947 | 2021-03-17 12:11:35 +1100 | [diff] [blame] | 67 | static void dlc5_preinit(const void *data) { |
| 68 | msg_pdbg("dlc5_preinit\n"); |
| 69 | /* Assert pin 6 to receive MISO. */ |
| 70 | lpt_outbyte |= (1<<4); |
| 71 | OUTB(lpt_outbyte, lpt_iobase); |
| 72 | } |
| 73 | |
| 74 | static int dlc5_shutdown(void *data) { |
| 75 | msg_pdbg("dlc5_shutdown\n"); |
| 76 | /* De-assert pin 6 to force MISO low. */ |
| 77 | lpt_outbyte &= ~(1<<4); |
| 78 | OUTB(lpt_outbyte, lpt_iobase); |
| 79 | return 0; |
| 80 | } |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 81 | |
| 82 | static const struct rayer_pinout xilinx_dlc5 = { |
| 83 | .cs_bit = 2, |
| 84 | .sck_bit = 1, |
| 85 | .mosi_bit = 0, |
| 86 | .miso_bit = 4, |
| 87 | .preinit = dlc5_preinit, |
| 88 | .shutdown = dlc5_shutdown, |
| 89 | }; |
| 90 | |
Anastasia Klimchuk | 1ae3947 | 2021-03-17 12:11:35 +1100 | [diff] [blame] | 91 | static void byteblaster_preinit(const void *data){ |
| 92 | msg_pdbg("byteblaster_preinit\n"); |
| 93 | /* Assert #EN signal. */ |
| 94 | OUTB(2, lpt_iobase + 2 ); |
| 95 | } |
| 96 | |
| 97 | static int byteblaster_shutdown(void *data){ |
| 98 | msg_pdbg("byteblaster_shutdown\n"); |
| 99 | /* De-Assert #EN signal. */ |
| 100 | OUTB(0, lpt_iobase + 2 ); |
| 101 | return 0; |
| 102 | } |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 103 | |
| 104 | static const struct rayer_pinout altera_byteblastermv = { |
| 105 | .cs_bit = 1, |
| 106 | .sck_bit = 0, |
| 107 | .mosi_bit = 6, |
| 108 | .miso_bit = 7, |
| 109 | .preinit = byteblaster_preinit, |
| 110 | .shutdown = byteblaster_shutdown, |
| 111 | }; |
| 112 | |
Anastasia Klimchuk | 1ae3947 | 2021-03-17 12:11:35 +1100 | [diff] [blame] | 113 | static void stk200_preinit(const void *data) { |
| 114 | msg_pdbg("stk200_init\n"); |
| 115 | /* Assert #EN signals, set LED signal. */ |
| 116 | lpt_outbyte = (1 << 6) ; |
| 117 | OUTB(lpt_outbyte, lpt_iobase); |
| 118 | } |
| 119 | |
| 120 | static int stk200_shutdown(void *data) { |
| 121 | msg_pdbg("stk200_shutdown\n"); |
| 122 | /* Assert #EN signals, clear LED signal. */ |
| 123 | lpt_outbyte = (1 << 2) | (1 << 3); |
| 124 | OUTB(lpt_outbyte, lpt_iobase); |
| 125 | return 0; |
| 126 | } |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 127 | |
| 128 | static const struct rayer_pinout atmel_stk200 = { |
| 129 | .cs_bit = 7, |
| 130 | .sck_bit = 4, |
| 131 | .mosi_bit = 5, |
| 132 | .miso_bit = 6, |
| 133 | .preinit = stk200_preinit, |
| 134 | .shutdown = stk200_shutdown, |
| 135 | }; |
| 136 | |
| 137 | static const struct rayer_pinout wiggler_lpt = { |
| 138 | .cs_bit = 1, |
| 139 | .sck_bit = 2, |
| 140 | .mosi_bit = 3, |
| 141 | .miso_bit = 7, |
| 142 | }; |
| 143 | |
| 144 | static const struct rayer_pinout spi_tt = { |
| 145 | .cs_bit = 2, |
| 146 | .sck_bit = 0, |
| 147 | .mosi_bit = 4, |
| 148 | .miso_bit = 7, |
| 149 | }; |
| 150 | |
| 151 | static const struct rayer_programmer rayer_spi_types[] = { |
| 152 | {"rayer", NT, "RayeR SPIPGM", &rayer_spipgm}, |
| 153 | {"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5}, |
| 154 | {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv}, |
| 155 | {"stk200", NT, "Atmel STK200/300 adapter", &atmel_stk200}, |
| 156 | {"wiggler", OK, "Wiggler LPT", &wiggler_lpt}, |
| 157 | {"spi_tt", NT, "SPI Tiny Tools (SPI_TT LPT)", &spi_tt}, |
| 158 | {0}, |
| 159 | }; |
| 160 | |
| 161 | static const struct rayer_pinout *pinout = NULL; |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 162 | |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 163 | static void rayer_bitbang_set_cs(int val) |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 164 | { |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 165 | lpt_outbyte &= ~(1 << pinout->cs_bit); |
| 166 | lpt_outbyte |= (val << pinout->cs_bit); |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 167 | OUTB(lpt_outbyte, lpt_iobase); |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 168 | } |
| 169 | |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 170 | static void rayer_bitbang_set_sck(int val) |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 171 | { |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 172 | lpt_outbyte &= ~(1 << pinout->sck_bit); |
| 173 | lpt_outbyte |= (val << pinout->sck_bit); |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 174 | OUTB(lpt_outbyte, lpt_iobase); |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 175 | } |
| 176 | |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 177 | static void rayer_bitbang_set_mosi(int val) |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 178 | { |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 179 | lpt_outbyte &= ~(1 << pinout->mosi_bit); |
| 180 | lpt_outbyte |= (val << pinout->mosi_bit); |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 181 | OUTB(lpt_outbyte, lpt_iobase); |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 182 | } |
| 183 | |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 184 | static int rayer_bitbang_get_miso(void) |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 185 | { |
| 186 | uint8_t tmp; |
| 187 | |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 188 | tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted |
| 189 | tmp = (tmp >> pinout->miso_bit) & 0x1; |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 190 | return tmp; |
| 191 | } |
| 192 | |
| 193 | static const struct bitbang_spi_master bitbang_spi_master_rayer = { |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 194 | .set_cs = rayer_bitbang_set_cs, |
| 195 | .set_sck = rayer_bitbang_set_sck, |
| 196 | .set_mosi = rayer_bitbang_set_mosi, |
| 197 | .get_miso = rayer_bitbang_get_miso, |
Patrick Georgi | e081d5d | 2017-03-22 21:18:18 +0100 | [diff] [blame] | 198 | .half_period = 0, |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 199 | }; |
| 200 | |
David Hendricks | ac1d25c | 2016-08-09 17:00:58 -0700 | [diff] [blame] | 201 | int rayer_spi_init(void) |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 202 | { |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 203 | const struct rayer_programmer *prog = rayer_spi_types; |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 204 | char *arg = NULL; |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 205 | |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 206 | /* Non-default port requested? */ |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 207 | arg = extract_programmer_param("iobase"); |
| 208 | if (arg) { |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 209 | char *endptr = NULL; |
| 210 | unsigned long tmp; |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 211 | tmp = strtoul(arg, &endptr, 0); |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 212 | /* Port 0, port >0x10000, unaligned ports and garbage strings |
| 213 | * are rejected. |
| 214 | */ |
| 215 | if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) || |
| 216 | (*endptr != '\0')) { |
| 217 | /* Using ports below 0x100 is a really bad idea, and |
| 218 | * should only be done if no port between 0x100 and |
| 219 | * 0xfffc works due to routing issues. |
| 220 | */ |
| 221 | msg_perr("Error: iobase= specified, but the I/O base " |
| 222 | "given was invalid.\nIt must be a multiple of " |
| 223 | "0x4 and lie between 0x100 and 0xfffc.\n"); |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 224 | free(arg); |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 225 | return 1; |
| 226 | } else { |
| 227 | lpt_iobase = (uint16_t)tmp; |
| 228 | msg_pinfo("Non-default I/O base requested. This will " |
| 229 | "not change the hardware settings.\n"); |
| 230 | } |
| 231 | } else { |
| 232 | /* Pick a default value for the I/O base. */ |
| 233 | lpt_iobase = 0x378; |
| 234 | } |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 235 | free(arg); |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 236 | |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 237 | msg_pdbg("Using address 0x%x as I/O base for parallel port access.\n", |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 238 | lpt_iobase); |
| 239 | |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 240 | arg = extract_programmer_param("type"); |
| 241 | if (arg) { |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 242 | for (; prog->type != NULL; prog++) { |
| 243 | if (strcasecmp(arg, prog->type) == 0) { |
| 244 | break; |
| 245 | } |
| 246 | } |
| 247 | if (prog->type == NULL) { |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 248 | msg_perr("Error: Invalid device type specified.\n"); |
| 249 | free(arg); |
| 250 | return 1; |
| 251 | } |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 252 | free(arg); |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 253 | } |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 254 | msg_pinfo("Using %s pinout.\n", prog->description); |
| 255 | pinout = (struct rayer_pinout *)prog->dev_data; |
hailfinger | b9b9ccf | 2011-09-12 06:17:06 +0000 | [diff] [blame] | 256 | |
Patrick Georgi | 2a2d67f | 2017-03-09 10:15:39 +0100 | [diff] [blame] | 257 | if (rget_io_perms()) |
| 258 | return 1; |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 259 | |
hailfinger | 08cf2ed | 2010-10-05 19:19:48 +0000 | [diff] [blame] | 260 | /* Get the initial value before writing to any line. */ |
| 261 | lpt_outbyte = INB(lpt_iobase); |
| 262 | |
Edward O'Callaghan | de19193 | 2019-09-09 00:50:34 +1000 | [diff] [blame] | 263 | if (pinout->shutdown) |
| 264 | register_shutdown(pinout->shutdown, (void*)pinout); |
| 265 | if (pinout->preinit) |
| 266 | pinout->preinit(pinout); |
| 267 | |
Craig Hesling | 65eb881 | 2019-08-01 09:33:56 -0700 | [diff] [blame] | 268 | if (register_spi_bitbang_master(&bitbang_spi_master_rayer)) |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 269 | return 1; |
| 270 | |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 271 | return 0; |
| 272 | } |
| 273 | |
hailfinger | 52c4fa0 | 2010-07-21 10:26:01 +0000 | [diff] [blame] | 274 | #else |
| 275 | #error PCI port I/O access is not supported on this architecture yet. |
| 276 | #endif |