blob: e8a2760d5c8d5f2435633cb0bbd0895983dac751 [file] [log] [blame]
David Hendricksd1c55d72010-08-24 15:14:19 -07001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
David Hendricksf7924d12010-06-10 21:26:44 -070021#include <stdlib.h>
22#include <string.h>
23
24#include "flash.h"
25#include "flashchips.h"
26#include "chipdrivers.h"
Louis Yung-Chieh Lo52aa9302010-09-06 10:45:02 +080027#include "spi.h"
David Hendricks23cd7782010-08-25 12:42:38 -070028#include "writeprotect.h"
David Hendricksf7924d12010-06-10 21:26:44 -070029
Louis Yung-Chieh Lo96222b12010-11-01 11:48:11 +080030/* When update flash's status register, it takes few time to erase register.
31 * After surveying some flash vendor specs, such as Winbond, MXIC, EON,
32 * all of their update time are less than 20ms. After refering the spi25.c,
33 * use 100ms delay.
34 */
35#define WRITE_STATUS_REGISTER_DELAY 100 * 1000 /* unit: us */
36
David Hendricksf7924d12010-06-10 21:26:44 -070037/*
38 * The following procedures rely on look-up tables to match the user-specified
39 * range with the chip's supported ranges. This turned out to be the most
40 * elegant approach since diferent flash chips use different levels of
41 * granularity and methods to determine protected ranges. In other words,
42 * be stupid and simple since clever arithmetic will not for many chips.
43 */
44
45struct wp_range {
46 unsigned int start; /* starting address */
47 unsigned int len; /* len */
48};
49
50enum bit_state {
51 OFF = 0,
52 ON = 1,
53 X = 0 /* don't care */
54};
55
56struct w25q_range {
57 enum bit_state sec; /* if 1, bp[2:0] describe sectors */
58 enum bit_state tb; /* top/bottom select */
59 unsigned short int bp : 3; /* block protect bitfield */
60 struct wp_range range;
61};
62
David Hendricks57566ed2010-08-16 18:24:45 -070063struct w25q_range en25f40_ranges[] = {
64 { X, X, 0, {0, 0} }, /* none */
65 { 0, 0, 0x1, {0x000000, 504 * 1024} },
66 { 0, 0, 0x2, {0x000000, 496 * 1024} },
67 { 0, 0, 0x3, {0x000000, 480 * 1024} },
68 { 0, 0, 0x4, {0x000000, 448 * 1024} },
69 { 0, 0, 0x5, {0x000000, 384 * 1024} },
70 { 0, 0, 0x6, {0x000000, 256 * 1024} },
71 { 0, 0, 0x7, {0x000000, 512 * 1024} },
72};
73
David Hendricksac72e362010-08-16 18:20:03 -070074static struct w25q_range mx25l3205d_ranges[] = {
75 { X, 0, 0, {0, 0} }, /* none */
76 { X, 0, 0x1, {0x3f0000, 64 * 1024} },
77 { X, 0, 0x2, {0x3e0000, 128 * 1024} },
78 { X, 0, 0x3, {0x3c0000, 256 * 1024} },
79 { X, 0, 0x4, {0x380000, 512 * 1024} },
80 { X, 0, 0x5, {0x300000, 1024 * 1024} },
81 { X, 0, 0x6, {0x200000, 2048 * 1024} },
82 { X, 0, 0x7, {0x000000, 4096 * 1024} },
83
84 { X, 1, 0x0, {0x000000, 4096 * 1024} },
85 { X, 1, 0x1, {0x000000, 2048 * 1024} },
86 { X, 1, 0x2, {0x000000, 3072 * 1024} },
87 { X, 1, 0x3, {0x000000, 3584 * 1024} },
88 { X, 1, 0x4, {0x000000, 3840 * 1024} },
89 { X, 1, 0x5, {0x000000, 3968 * 1024} },
90 { X, 1, 0x6, {0x000000, 4032 * 1024} },
91 { X, 1, 0x7, {0x000000, 4096 * 1024} },
92};
93
David Hendricksf7924d12010-06-10 21:26:44 -070094static struct w25q_range w25q16_ranges[] = {
95 { X, X, 0, {0, 0} }, /* none */
96 { 0, 0, 0x1, {0x1f0000, 64 * 1024} },
97 { 0, 0, 0x2, {0x1e0000, 128 * 1024} },
98 { 0, 0, 0x3, {0x1c0000, 256 * 1024} },
99 { 0, 0, 0x4, {0x180000, 512 * 1024} },
100 { 0, 0, 0x5, {0x100000, 1024 * 1024} },
101
102 { 0, 1, 0x1, {0x000000, 64 * 1024} },
103 { 0, 1, 0x2, {0x000000, 128 * 1024} },
104 { 0, 1, 0x3, {0x000000, 256 * 1024} },
105 { 0, 1, 0x4, {0x000000, 512 * 1024} },
106 { 0, 1, 0x5, {0x000000, 1024 * 1024} },
107 { X, X, 0x6, {0x000000, 2048 * 1024} },
108 { X, X, 0x7, {0x000000, 2048 * 1024} },
109
110 { 1, 0, 0x1, {0x1ff000, 4 * 1024} },
111 { 1, 0, 0x2, {0x1fe000, 8 * 1024} },
112 { 1, 0, 0x3, {0x1fc000, 16 * 1024} },
113 { 1, 0, 0x4, {0x1f8000, 32 * 1024} },
114 { 1, 0, 0x5, {0x1f8000, 32 * 1024} },
115
116 { 1, 1, 0x1, {0x000000, 4 * 1024} },
117 { 1, 1, 0x2, {0x000000, 8 * 1024} },
118 { 1, 1, 0x3, {0x000000, 16 * 1024} },
119 { 1, 1, 0x4, {0x000000, 32 * 1024} },
120 { 1, 1, 0x5, {0x000000, 32 * 1024} },
121};
122
123static struct w25q_range w25q32_ranges[] = {
124 { X, X, 0, {0, 0} }, /* none */
125 { 0, 0, 0x1, {0x3f0000, 64 * 1024} },
126 { 0, 0, 0x2, {0x3e0000, 128 * 1024} },
127 { 0, 0, 0x3, {0x3c0000, 256 * 1024} },
128 { 0, 0, 0x4, {0x380000, 512 * 1024} },
129 { 0, 0, 0x5, {0x300000, 1024 * 1024} },
David Hendricks05653ff2010-06-15 16:05:12 -0700130 { 0, 0, 0x6, {0x200000, 2048 * 1024} },
David Hendricksf7924d12010-06-10 21:26:44 -0700131
132 { 0, 1, 0x1, {0x000000, 64 * 1024} },
133 { 0, 1, 0x2, {0x000000, 128 * 1024} },
134 { 0, 1, 0x3, {0x000000, 256 * 1024} },
135 { 0, 1, 0x4, {0x000000, 512 * 1024} },
136 { 0, 1, 0x5, {0x000000, 1024 * 1024} },
137 { 0, 1, 0x6, {0x000000, 2048 * 1024} },
138 { X, X, 0x7, {0x000000, 4096 * 1024} },
139
140 { 1, 0, 0x1, {0x3ff000, 4 * 1024} },
141 { 1, 0, 0x2, {0x3fe000, 8 * 1024} },
142 { 1, 0, 0x3, {0x3fc000, 16 * 1024} },
143 { 1, 0, 0x4, {0x3f8000, 32 * 1024} },
144 { 1, 0, 0x5, {0x3f8000, 32 * 1024} },
145
146 { 1, 1, 0x1, {0x000000, 4 * 1024} },
147 { 1, 1, 0x2, {0x000000, 8 * 1024} },
148 { 1, 1, 0x3, {0x000000, 16 * 1024} },
149 { 1, 1, 0x4, {0x000000, 32 * 1024} },
150 { 1, 1, 0x5, {0x000000, 32 * 1024} },
151};
152
153static struct w25q_range w25q80_ranges[] = {
154 { X, X, 0, {0, 0} }, /* none */
155 { 0, 0, 0x1, {0x0f0000, 64 * 1024} },
156 { 0, 0, 0x2, {0x0e0000, 128 * 1024} },
157 { 0, 0, 0x3, {0x0c0000, 256 * 1024} },
158 { 0, 0, 0x4, {0x080000, 512 * 1024} },
159
160 { 0, 1, 0x1, {0x000000, 64 * 1024} },
161 { 0, 1, 0x2, {0x000000, 128 * 1024} },
162 { 0, 1, 0x3, {0x000000, 256 * 1024} },
163 { 0, 1, 0x4, {0x000000, 512 * 1024} },
David Hendricks05653ff2010-06-15 16:05:12 -0700164 { X, X, 0x6, {0x000000, 1024 * 1024} },
165 { X, X, 0x7, {0x000000, 1024 * 1024} },
David Hendricksf7924d12010-06-10 21:26:44 -0700166
167 { 1, 0, 0x1, {0x1ff000, 4 * 1024} },
168 { 1, 0, 0x2, {0x1fe000, 8 * 1024} },
169 { 1, 0, 0x3, {0x1fc000, 16 * 1024} },
170 { 1, 0, 0x4, {0x1f8000, 32 * 1024} },
171 { 1, 0, 0x5, {0x1f8000, 32 * 1024} },
172
173 { 1, 1, 0x1, {0x000000, 4 * 1024} },
174 { 1, 1, 0x2, {0x000000, 8 * 1024} },
175 { 1, 1, 0x3, {0x000000, 16 * 1024} },
176 { 1, 1, 0x4, {0x000000, 32 * 1024} },
177 { 1, 1, 0x5, {0x000000, 32 * 1024} },
178};
179
David Hendricks2c4a76c2010-06-28 14:00:43 -0700180static struct w25q_range w25q64_ranges[] = {
181 { X, X, 0, {0, 0} }, /* none */
182
183 { 0, 0, 0x1, {0x7e0000, 128 * 1024} },
184 { 0, 0, 0x2, {0x7c0000, 256 * 1024} },
185 { 0, 0, 0x3, {0x780000, 512 * 1024} },
186 { 0, 0, 0x4, {0x700000, 1024 * 1024} },
187 { 0, 0, 0x5, {0x600000, 2048 * 1024} },
188 { 0, 0, 0x6, {0x400000, 4096 * 1024} },
189
190 { 0, 1, 0x1, {0x000000, 128 * 1024} },
191 { 0, 1, 0x2, {0x000000, 256 * 1024} },
192 { 0, 1, 0x3, {0x000000, 512 * 1024} },
193 { 0, 1, 0x4, {0x000000, 1024 * 1024} },
194 { 0, 1, 0x5, {0x000000, 2048 * 1024} },
195 { 0, 1, 0x6, {0x000000, 4096 * 1024} },
196 { X, X, 0x7, {0x000000, 8192 * 1024} },
197
198 { 1, 0, 0x1, {0x7ff000, 4 * 1024} },
199 { 1, 0, 0x2, {0x7fe000, 8 * 1024} },
200 { 1, 0, 0x3, {0x7fc000, 16 * 1024} },
201 { 1, 0, 0x4, {0x7f8000, 32 * 1024} },
202 { 1, 0, 0x5, {0x7f8000, 32 * 1024} },
203
204 { 1, 1, 0x1, {0x000000, 4 * 1024} },
205 { 1, 1, 0x2, {0x000000, 8 * 1024} },
206 { 1, 1, 0x3, {0x000000, 16 * 1024} },
207 { 1, 1, 0x4, {0x000000, 32 * 1024} },
208 { 1, 1, 0x5, {0x000000, 32 * 1024} },
209};
210
Louis Yung-Chieh Lo232951f2010-09-16 11:30:00 +0800211struct w25q_range w25x10_ranges[] = {
212 { X, X, 0, {0, 0} }, /* none */
213 { 0, 0, 0x1, {0x010000, 64 * 1024} },
214 { 0, 1, 0x1, {0x000000, 64 * 1024} },
215 { X, X, 0x2, {0x000000, 128 * 1024} },
216 { X, X, 0x3, {0x000000, 128 * 1024} },
217};
218
219struct w25q_range w25x20_ranges[] = {
220 { X, X, 0, {0, 0} }, /* none */
221 { 0, 0, 0x1, {0x030000, 64 * 1024} },
222 { 0, 0, 0x2, {0x020000, 128 * 1024} },
223 { 0, 1, 0x1, {0x000000, 64 * 1024} },
224 { 0, 1, 0x2, {0x000000, 128 * 1024} },
225 { 0, X, 0x3, {0x000000, 256 * 1024} },
226};
227
David Hendricks470ca952010-08-13 14:01:53 -0700228struct w25q_range w25x40_ranges[] = {
229 { X, X, 0, {0, 0} }, /* none */
230 { 0, 0, 0x1, {0x070000, 64 * 1024} },
231 { 0, 0, 0x2, {0x060000, 128 * 1024} },
232 { 0, 0, 0x3, {0x040000, 256 * 1024} },
233 { 0, 1, 0x1, {0x000000, 64 * 1024} },
234 { 0, 1, 0x2, {0x000000, 128 * 1024} },
235 { 0, 1, 0x3, {0x000000, 256 * 1024} },
236 { 0, X, 0x4, {0x000000, 512 * 1024} },
237};
238
Louis Yung-Chieh Lo232951f2010-09-16 11:30:00 +0800239struct w25q_range w25x80_ranges[] = {
240 { X, X, 0, {0, 0} }, /* none */
241 { 0, 0, 0x1, {0x0F0000, 64 * 1024} },
242 { 0, 0, 0x2, {0x0E0000, 128 * 1024} },
243 { 0, 0, 0x3, {0x0C0000, 256 * 1024} },
244 { 0, 0, 0x4, {0x080000, 512 * 1024} },
245 { 0, 1, 0x1, {0x000000, 64 * 1024} },
246 { 0, 1, 0x2, {0x000000, 128 * 1024} },
247 { 0, 1, 0x3, {0x000000, 256 * 1024} },
248 { 0, 1, 0x4, {0x000000, 512 * 1024} },
249 { 0, X, 0x5, {0x000000, 1024 * 1024} },
250 { 0, X, 0x6, {0x000000, 1024 * 1024} },
251 { 0, X, 0x7, {0x000000, 1024 * 1024} },
252};
253
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800254/* Given a flash chip, this function returns its range table. */
255static int w25_range_table(const struct flashchip *flash,
256 struct w25q_range **w25q_ranges,
257 int *num_entries)
David Hendricksf7924d12010-06-10 21:26:44 -0700258{
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800259 *w25q_ranges = 0;
260 *num_entries = 0;
David Hendricksf7924d12010-06-10 21:26:44 -0700261
David Hendricksd494b0a2010-08-16 16:28:50 -0700262 switch (flash->manufacture_id) {
263 case WINBOND_NEX_ID:
264 switch(flash->model_id) {
Louis Yung-Chieh Lo232951f2010-09-16 11:30:00 +0800265 case W_25X10:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800266 *w25q_ranges = w25x10_ranges;
267 *num_entries = ARRAY_SIZE(w25x10_ranges);
Louis Yung-Chieh Lo232951f2010-09-16 11:30:00 +0800268 break;
269 case W_25X20:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800270 *w25q_ranges = w25x20_ranges;
271 *num_entries = ARRAY_SIZE(w25x20_ranges);
Louis Yung-Chieh Lo232951f2010-09-16 11:30:00 +0800272 break;
David Hendricksd494b0a2010-08-16 16:28:50 -0700273 case W_25X40:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800274 *w25q_ranges = w25x40_ranges;
275 *num_entries = ARRAY_SIZE(w25x40_ranges);
David Hendricksd494b0a2010-08-16 16:28:50 -0700276 break;
Louis Yung-Chieh Lo232951f2010-09-16 11:30:00 +0800277 case W_25X80:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800278 *w25q_ranges = w25x80_ranges;
279 *num_entries = ARRAY_SIZE(w25x80_ranges);
Louis Yung-Chieh Lo232951f2010-09-16 11:30:00 +0800280 break;
David Hendricksd494b0a2010-08-16 16:28:50 -0700281 case W_25Q80:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800282 *w25q_ranges = w25q80_ranges;
283 *num_entries = ARRAY_SIZE(w25q80_ranges);
David Hendricksd494b0a2010-08-16 16:28:50 -0700284 break;
285 case W_25Q16:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800286 *w25q_ranges = w25q16_ranges;
287 *num_entries = ARRAY_SIZE(w25q16_ranges);
David Hendricksd494b0a2010-08-16 16:28:50 -0700288 break;
289 case W_25Q32:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800290 *w25q_ranges = w25q32_ranges;
291 *num_entries = ARRAY_SIZE(w25q32_ranges);
David Hendricksd494b0a2010-08-16 16:28:50 -0700292 break;
293 case W_25Q64:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800294 *w25q_ranges = w25q64_ranges;
295 *num_entries = ARRAY_SIZE(w25q64_ranges);
David Hendricksd494b0a2010-08-16 16:28:50 -0700296 break;
297 default:
298 msg_cerr("%s() %d: WINBOND flash chip mismatch (0x%04x)"
299 ", aborting\n", __func__, __LINE__,
300 flash->model_id);
301 return -1;
302 }
David Hendricks2c4a76c2010-06-28 14:00:43 -0700303 break;
David Hendricks57566ed2010-08-16 18:24:45 -0700304 case EON_ID_NOPREFIX:
305 switch (flash->model_id) {
306 case EN_25F40:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800307 *w25q_ranges = en25f40_ranges;
308 *num_entries = ARRAY_SIZE(en25f40_ranges);
David Hendricks57566ed2010-08-16 18:24:45 -0700309 break;
310 default:
311 msg_cerr("%s():%d: EON flash chip mismatch (0x%04x)"
312 ", aborting\n", __func__, __LINE__,
313 flash->model_id);
314 return -1;
315 }
316 break;
David Hendricksac72e362010-08-16 18:20:03 -0700317 case MX_ID:
318 switch (flash->model_id) {
319 case MX_25L3205:
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800320 *w25q_ranges = mx25l3205d_ranges;
321 *num_entries = ARRAY_SIZE(mx25l3205d_ranges);
David Hendricksac72e362010-08-16 18:20:03 -0700322 break;
323 default:
324 msg_cerr("%s():%d: MXIC flash chip mismatch (0x%04x)"
325 ", aborting\n", __func__, __LINE__,
326 flash->model_id);
327 return -1;
328 }
329 break;
David Hendricksf7924d12010-06-10 21:26:44 -0700330 default:
David Hendricksd494b0a2010-08-16 16:28:50 -0700331 msg_cerr("%s: flash vendor (0x%x) not found, aborting\n",
332 __func__, flash->manufacture_id);
David Hendricksf7924d12010-06-10 21:26:44 -0700333 return -1;
334 }
335
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800336 return 0;
337}
338
339int w25_range_to_status(const struct flashchip *flash,
340 unsigned int start, unsigned int len,
341 struct w25q_status *status)
342{
343 struct w25q_range *w25q_ranges;
344 int i, range_found = 0;
345 int num_entries;
346
347 if (w25_range_table(flash, &w25q_ranges, &num_entries)) return -1;
David Hendricksf7924d12010-06-10 21:26:44 -0700348 for (i = 0; i < num_entries; i++) {
349 struct wp_range *r = &w25q_ranges[i].range;
350
351 msg_cspew("comparing range 0x%x 0x%x / 0x%x 0x%x\n",
352 start, len, r->start, r->len);
353 if ((start == r->start) && (len == r->len)) {
David Hendricksd494b0a2010-08-16 16:28:50 -0700354 status->bp0 = w25q_ranges[i].bp & 1;
355 status->bp1 = w25q_ranges[i].bp >> 1;
356 status->bp2 = w25q_ranges[i].bp >> 2;
357 status->tb = w25q_ranges[i].tb;
358 status->sec = w25q_ranges[i].sec;
David Hendricksf7924d12010-06-10 21:26:44 -0700359
360 range_found = 1;
361 break;
362 }
363 }
364
365 if (!range_found) {
366 msg_cerr("matching range not found\n");
367 return -1;
368 }
David Hendricksd494b0a2010-08-16 16:28:50 -0700369 return 0;
370}
371
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800372int w25_status_to_range(const struct flashchip *flash,
373 const struct w25q_status *status,
374 unsigned int *start, unsigned int *len)
375{
376 struct w25q_range *w25q_ranges;
377 int i, status_found = 0;
378 int num_entries;
379
380 if (w25_range_table(flash, &w25q_ranges, &num_entries)) return -1;
381 for (i = 0; i < num_entries; i++) {
382 int bp;
383
384 bp = status->bp0 | (status->bp1 << 1) | (status->bp2 << 2);
385 msg_cspew("comparing 0x%x 0x%x / 0x%x 0x%x / 0x%x 0x%x\n",
386 bp, w25q_ranges[i].bp,
387 status->tb, w25q_ranges[i].tb,
388 status->sec, w25q_ranges[i].sec);
389 if ((bp == w25q_ranges[i].bp) &&
390 (status->tb == w25q_ranges[i].tb) &&
391 (status->sec == w25q_ranges[i].sec)) {
392 *start = w25q_ranges[i].range.start;
393 *len = w25q_ranges[i].range.len;
394
395 status_found = 1;
396 break;
397 }
398 }
399
400 if (!status_found) {
401 msg_cerr("matching status not found\n");
402 return -1;
403 }
404 return 0;
405}
406
Louis Yung-Chieh Lo52aa9302010-09-06 10:45:02 +0800407/* Since most chips we use must be WREN-ed before WRSR,
408 * we copy a write status function here before we have a good solution. */
409static int spi_write_status_register_WREN(int status)
410{
411 int result;
412 struct spi_command cmds[] = {
413 {
414 /* FIXME: WRSR requires either EWSR or WREN depending on chip type. */
415 .writecnt = JEDEC_WREN_OUTSIZE,
416 .writearr = (const unsigned char[]){ JEDEC_WREN },
417 .readcnt = 0,
418 .readarr = NULL,
419 }, {
420 .writecnt = JEDEC_WRSR_OUTSIZE,
421 .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status },
422 .readcnt = 0,
423 .readarr = NULL,
424 }, {
425 .writecnt = 0,
426 .writearr = NULL,
427 .readcnt = 0,
428 .readarr = NULL,
429 }};
430
431 result = spi_send_multicommand(cmds);
432 if (result) {
433 msg_cerr("%s failed during command execution\n",
434 __func__);
435 }
Louis Yung-Chieh Lo96222b12010-11-01 11:48:11 +0800436
437 /* WRSR performs a self-timed erase before the changes take effect. */
438 programmer_delay(WRITE_STATUS_REGISTER_DELAY);
439
Louis Yung-Chieh Lo52aa9302010-09-06 10:45:02 +0800440 return result;
441}
442
David Hendricksd494b0a2010-08-16 16:28:50 -0700443static int w25_set_range(struct flashchip *flash,
444 unsigned int start, unsigned int len)
445{
446 struct w25q_status status;
447 int tmp;
448
449 memset(&status, 0, sizeof(status));
450 tmp = spi_read_status_register();
451 memcpy(&status, &tmp, 1);
452 msg_cdbg("%s: old status: 0x%02x\n", __func__, tmp);
453
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800454 if (w25_range_to_status(flash, start, len, &status)) return -1;
David Hendricksf7924d12010-06-10 21:26:44 -0700455
456 msg_cdbg("status.busy: %x\n", status.busy);
457 msg_cdbg("status.wel: %x\n", status.wel);
458 msg_cdbg("status.bp0: %x\n", status.bp0);
459 msg_cdbg("status.bp1: %x\n", status.bp1);
460 msg_cdbg("status.bp2: %x\n", status.bp2);
461 msg_cdbg("status.tb: %x\n", status.tb);
462 msg_cdbg("status.sec: %x\n", status.sec);
463 msg_cdbg("status.srp0: %x\n", status.srp0);
464
465 memcpy(&tmp, &status, sizeof(status));
Louis Yung-Chieh Lo52aa9302010-09-06 10:45:02 +0800466 spi_write_status_register_WREN(tmp);
Louis Yung-Chieh Loc19d3c52010-10-08 11:59:16 +0800467 msg_cinfo("%s: new status: 0x%02x\n",
David Hendricksf7924d12010-06-10 21:26:44 -0700468 __func__, spi_read_status_register());
469
470 return 0;
471}
472
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800473static int w25_wp_status(struct flashchip *flash)
474{
475 struct w25q_status status;
476 int tmp;
David Hendricksce8ded32010-10-08 11:23:38 -0700477 unsigned int start, len;
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800478 int ret = 0;
479
480 tmp = spi_read_status_register();
481 /* FIXME: this is NOT endian-free copy. */
482 memcpy(&status, &tmp, 1);
483 msg_cinfo("WP: status: 0x%02x\n", tmp);
484 msg_cinfo("WP: status.srp0: %x\n", status.srp0);
485 msg_cinfo("WP: write protect is %s.\n",
486 status.srp0 ? "enabled" : "disabled");
487
488 msg_cinfo("WP: write protect range: ");
489 if (w25_status_to_range(flash, &status, &start, &len)) {
490 msg_cinfo("(cannot resolve the range)\n");
491 ret = -1;
492 } else {
493 msg_cinfo("start=0x%08x, len=0x%08x\n", start, len);
494 }
495
496 return ret;
497}
498
Louis Yung-Chieh Loc19d3c52010-10-08 11:59:16 +0800499static int w25_set_srp0(struct flashchip *flash, int enable)
David Hendricksf7924d12010-06-10 21:26:44 -0700500{
501 struct w25q_status status;
502 int tmp = 0;
503
504 memset(&status, 0, sizeof(status));
505 tmp = spi_read_status_register();
506 memcpy(&status, &tmp, 1);
507 msg_cdbg("%s: old status: 0x%02x\n", __func__, tmp);
508
Louis Yung-Chieh Loc19d3c52010-10-08 11:59:16 +0800509 status.srp0 = enable ? 1 : 0;
David Hendricksf7924d12010-06-10 21:26:44 -0700510 memcpy(&tmp, &status, sizeof(status));
Louis Yung-Chieh Lo52aa9302010-09-06 10:45:02 +0800511 spi_write_status_register_WREN(tmp);
David Hendricksf7924d12010-06-10 21:26:44 -0700512 msg_cdbg("%s: new status: 0x%02x\n",
513 __func__, spi_read_status_register());
514
515 return 0;
516}
517
Louis Yung-Chieh Loc19d3c52010-10-08 11:59:16 +0800518static int w25_enable_writeprotect(struct flashchip *flash)
519{
520 int ret;
521
522 ret = w25_set_srp0(flash, 1);
523 if (!ret)
524 msg_cinfo("SUCCESS.\n");
525 else
526 msg_cinfo("FAILED, error=%d.\n", ret);
527 return ret;
528}
529
530static int w25_disable_writeprotect(struct flashchip *flash)
531{
532 int ret;
533
534 ret = w25_set_srp0(flash, 0);
535 if (!ret)
536 msg_cinfo("SUCCESS.\n");
537 else
538 msg_cinfo("FAILED, error=%d.\n", ret);
539 return ret;
540}
541
David Hendricksf7924d12010-06-10 21:26:44 -0700542struct wp wp_w25 = {
543 .set_range = w25_set_range,
544 .enable = w25_enable_writeprotect,
Louis Yung-Chieh Loc19d3c52010-10-08 11:59:16 +0800545 .disable = w25_disable_writeprotect,
Louis Yung-Chieh Loa92e8b22010-10-08 13:31:27 +0800546 .wp_status = w25_wp_status,
David Hendricksf7924d12010-06-10 21:26:44 -0700547};