blob: f737bfd5b46459d369273dd074be58b70f155268 [file] [log] [blame]
JB Tsai0c16a0f2015-03-19 14:30:31 +08001/*
2 * Copyright 2015 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_MEDIATEK
JB Tsai0c16a0f2015-03-19 14:30:31 +08008
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -08009// clang-format off
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -070010#include <errno.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010011#include <fcntl.h>
Nicolas Boichatd7c83382019-08-29 21:46:29 +080012#include <inttypes.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010013#include <poll.h>
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -070014#include <stdio.h>
JB Tsai0c16a0f2015-03-19 14:30:31 +080015#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070016#include <sys/mman.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010017#include <unistd.h>
JB Tsai0c16a0f2015-03-19 14:30:31 +080018#include <xf86drm.h>
19#include <mediatek_drm.h>
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080020// clang-format on
Gurchetan Singhef920532016-08-12 16:38:25 -070021
Yiwei Zhangb7a64442021-09-30 05:13:10 +000022#include "drv_helpers.h"
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070023#include "drv_priv.h"
Gurchetan Singh179687e2016-10-28 10:07:35 -070024#include "util.h"
25
Miguel Casasdea0ccb2018-07-02 09:40:25 -040026#define TILE_TYPE_LINEAR 0
27
Fei Shaocb639822022-11-02 16:05:58 +080028// clang-format off
29#if defined(MTK_MT8183) || \
30 defined(MTK_MT8186)
31// clang-format on
Yiwei Zhang185a1392022-09-08 19:21:19 +000032#define SUPPORTS_YUV422
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080033#endif
34
35// All platforms except MT8173 should USE_NV12_FOR_HW_VIDEO_DECODING.
Fei Shaocb639822022-11-02 16:05:58 +080036// clang-format off
37#if defined(MTK_MT8183) || \
38 defined(MTK_MT8186) || \
39 defined(MTK_MT8192) || \
40 defined(MTK_MT8195)
41// clang-format on
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080042#define USE_NV12_FOR_HW_VIDEO_DECODING
Miguel Casas35fd7d22022-02-18 10:52:28 -080043#else
44#define DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080045#endif
46
Yiwei Zhang5c937422022-08-10 18:23:30 +000047// For Mali Sigurd based GPUs, the texture unit reads outside the specified texture dimensions.
48// Therefore, certain formats require extra memory padding to its allocated surface to prevent the
49// hardware from reading outside an allocation. For YVU420, we need additional padding for the last
50// chroma plane.
51#if defined(MTK_MT8186)
52#define USE_EXTRA_PADDING_FOR_YVU420
53#endif
54
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070055struct mediatek_private_map_data {
56 void *cached_addr;
57 void *gem_addr;
Luigi Santivetti500928f2018-08-28 10:09:20 +010058 int prime_fd;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070059};
60
Gurchetan Singh767c5382018-05-05 00:42:12 +000061static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
Gurchetan Singh71bc6652018-09-17 17:42:05 -070062 DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
63 DRM_FORMAT_XRGB8888 };
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070064
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080065// clang-format off
Yiwei Zhangf4c17252021-10-30 08:29:48 +000066static const uint32_t texture_source_formats[] = {
Yiwei Zhang185a1392022-09-08 19:21:19 +000067#ifdef SUPPORTS_YUV422
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080068 DRM_FORMAT_NV21,
69 DRM_FORMAT_YUYV,
Yiwei Zhang185a1392022-09-08 19:21:19 +000070#endif
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080071 DRM_FORMAT_ABGR2101010,
72 DRM_FORMAT_ABGR16161616F,
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080073 DRM_FORMAT_NV12,
74 DRM_FORMAT_YVU420,
75 DRM_FORMAT_YVU420_ANDROID
76};
Miguel Casas35fd7d22022-02-18 10:52:28 -080077
Miguel Casas35fd7d22022-02-18 10:52:28 -080078static const uint32_t video_yuv_formats[] = {
79 DRM_FORMAT_NV21,
80 DRM_FORMAT_NV12,
Justin Greenc9f64622022-08-22 16:46:16 -040081 DRM_FORMAT_YUYV,
Miguel Casas35fd7d22022-02-18 10:52:28 -080082 DRM_FORMAT_YVU420,
83 DRM_FORMAT_YVU420_ANDROID
84};
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080085// clang-format on
Gurchetan Singh179687e2016-10-28 10:07:35 -070086
Miguel Casas35fd7d22022-02-18 10:52:28 -080087static bool is_video_yuv_format(uint32_t format)
88{
89 size_t i;
90 for (i = 0; i < ARRAY_SIZE(video_yuv_formats); ++i) {
91 if (format == video_yuv_formats[i])
92 return true;
93 }
94 return false;
95}
Miguel Casas35fd7d22022-02-18 10:52:28 -080096
Gurchetan Singh179687e2016-10-28 10:07:35 -070097static int mediatek_init(struct driver *drv)
98{
Miguel Casasdea0ccb2018-07-02 09:40:25 -040099 struct format_metadata metadata;
100
Gurchetan Singhd3001452017-11-03 17:18:36 -0700101 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
Gurchetan Singh1914f982020-03-24 13:53:51 -0700102 &LINEAR_METADATA, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700103
Gurchetan Singhd3001452017-11-03 17:18:36 -0700104 drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
105 &LINEAR_METADATA, BO_USE_TEXTURE_MASK);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700106
Gurchetan Singhbbba9dd2020-10-12 17:31:10 -0700107 drv_add_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA, BO_USE_SW_MASK | BO_USE_LINEAR);
Hirokazu Hondafd8b8ab2020-06-16 15:28:56 +0900108
Justin Greenc9f64622022-08-22 16:46:16 -0400109 /* YUYV format for video overlay and camera subsystem. */
110 drv_add_combination(drv, DRM_FORMAT_YUYV, &LINEAR_METADATA,
Justin Green18051932022-08-30 13:04:29 -0400111 BO_USE_HW_VIDEO_DECODER | BO_USE_SCANOUT | BO_USE_LINEAR |
112 BO_USE_TEXTURE);
Justin Greenc9f64622022-08-22 16:46:16 -0400113
Gurchetan Singh71bc6652018-09-17 17:42:05 -0700114 /* Android CTS tests require this. */
115 drv_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK);
116
Miguel Casasdea0ccb2018-07-02 09:40:25 -0400117 /* Support BO_USE_HW_VIDEO_DECODER for protected content minigbm allocations. */
118 metadata.tiling = TILE_TYPE_LINEAR;
119 metadata.priority = 1;
120 metadata.modifier = DRM_FORMAT_MOD_LINEAR;
121 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata, BO_USE_HW_VIDEO_DECODER);
122 drv_modify_combination(drv, DRM_FORMAT_YVU420_ANDROID, &metadata, BO_USE_HW_VIDEO_DECODER);
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +0800123#ifdef USE_NV12_FOR_HW_VIDEO_DECODING
Wei Lee2f02cfb2020-08-05 17:24:45 +0800124 // TODO(hiroh): Switch to use NV12 for video decoder on MT8173 as well.
Hirokazu Honda0f0ce6f2019-07-24 19:40:20 +0900125 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, BO_USE_HW_VIDEO_DECODER);
Wei Lee2f02cfb2020-08-05 17:24:45 +0800126#endif
Miguel Casasdea0ccb2018-07-02 09:40:25 -0400127
David Stevens49518142020-06-15 13:48:48 +0900128 /*
129 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB for input/output from
130 * hardware decoder/encoder.
131 */
132 drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
Wei Leee03625b2020-07-21 11:27:14 +0800133 BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER |
Yiwei Zhangbbe1fd32022-07-20 20:44:22 +0000134 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE |
Jason Macnak80f664c2022-07-19 16:44:22 -0700135 BO_USE_GPU_DATA_BUFFER | BO_USE_SENSOR_DIRECT_DATA);
David Stevens49518142020-06-15 13:48:48 +0900136
Hirokazu Honda3bd681c2020-06-23 17:52:20 +0900137 /* NV12 format for encoding and display. */
138 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
Wei Leee03625b2020-07-21 11:27:14 +0800139 BO_USE_SCANOUT | BO_USE_HW_VIDEO_ENCODER | BO_USE_CAMERA_READ |
140 BO_USE_CAMERA_WRITE);
Hirokazu Honda3bd681c2020-06-23 17:52:20 +0900141
Wei Leee03625b2020-07-21 11:27:14 +0800142#ifdef MTK_MT8183
Nick Fan01c40142018-10-08 11:53:26 +0800143 /* Only for MT8183 Camera subsystem */
Nick Fan01c40142018-10-08 11:53:26 +0800144 drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata,
145 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
146 drv_modify_combination(drv, DRM_FORMAT_YUYV, &metadata,
147 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
148 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata,
149 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
Jasmine Chenc7aa9742019-08-14 15:28:22 +0800150 /* Private formats for private reprocessing in camera */
151 drv_add_combination(drv, DRM_FORMAT_MTISP_SXYZW10, &metadata,
152 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SW_MASK);
Nick Fan01c40142018-10-08 11:53:26 +0800153#endif
154
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700155 return drv_modify_linear_combinations(drv);
Gurchetan Singh179687e2016-10-28 10:07:35 -0700156}
JB Tsai0c16a0f2015-03-19 14:30:31 +0800157
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700158static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
159 uint32_t format, const uint64_t *modifiers,
160 uint32_t count)
JB Tsai0c16a0f2015-03-19 14:30:31 +0800161{
JB Tsai0c16a0f2015-03-19 14:30:31 +0800162 int ret;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700163 size_t plane;
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700164 uint32_t stride;
Gurchetan Singh99644382020-10-07 15:28:11 -0700165 struct drm_mtk_gem_create gem_create = { 0 };
Hsin-Yi Wang2581c472022-04-06 17:34:33 +0800166 /*
167 * We identify the ChromeOS Camera App buffers via these two USE flags. Those buffers need
168 * the same alignment as the video hardware encoding.
169 */
170 const bool is_camera_preview =
171 (bo->meta.use_flags & BO_USE_SCANOUT) && (bo->meta.use_flags & BO_USE_CAMERA_WRITE);
JB Tsai0c16a0f2015-03-19 14:30:31 +0800172
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700173 if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
174 errno = EINVAL;
Yiwei Zhang04954732022-07-13 23:34:33 +0000175 drv_loge("no usable modifier found\n");
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700176 return -EINVAL;
177 }
178
Yiwei Zhang6fb145b2022-10-07 16:20:38 +0000179 /*
180 * Since the ARM L1 cache line size is 64 bytes, align to that as a
181 * performance optimization, except for video buffers on certain platforms,
182 * these should only be accessed from the GPU and VCODEC subsystems (maybe
183 * also MDP), so it's better to align to macroblocks.
184 */
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700185 stride = drv_stride_from_format(format, width, 0);
Yiwei Zhang6fb145b2022-10-07 16:20:38 +0000186#ifdef DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
187 const uint32_t alignment = is_video_yuv_format(format) ? 16 : 64;
188 stride = ALIGN(stride, alignment);
189#else
190 stride = ALIGN(stride, 64);
191#endif
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900192
Hsin-Yi Wang2581c472022-04-06 17:34:33 +0800193 if ((bo->meta.use_flags & BO_USE_HW_VIDEO_ENCODER) || is_camera_preview) {
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900194 uint32_t aligned_height = ALIGN(height, 32);
195 uint32_t padding[DRV_MAX_PLANES] = { 0 };
196
197 for (plane = 0; plane < bo->meta.num_planes; ++plane) {
198 uint32_t plane_stride = drv_stride_from_format(format, stride, plane);
199 padding[plane] = plane_stride *
200 (32 / drv_vertical_subsampling_from_format(format, plane));
201 }
202
203 drv_bo_from_format_and_padding(bo, stride, aligned_height, format, padding);
204 } else {
Yiwei Zhang185a1392022-09-08 19:21:19 +0000205#ifdef SUPPORTS_YUV422
Moja Hsu059ac082019-10-02 14:47:10 +0800206 /*
207 * JPEG Encoder Accelerator requires 16x16 alignment. We want the buffer
208 * from camera can be put in JEA directly so align the height to 16
209 * bytes.
210 */
211 if (format == DRM_FORMAT_NV12)
212 height = ALIGN(height, 16);
213#endif
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900214 drv_bo_from_format(bo, stride, height, format);
Yiwei Zhang5c937422022-08-10 18:23:30 +0000215
216#ifdef USE_EXTRA_PADDING_FOR_YVU420
Yiwei Zhangb2dde012022-09-27 04:12:54 +0000217 /*
218 * Apply extra padding for YV12 if the height does not meet round up requirement and
219 * the image is to be sampled by gpu.
220 */
221 static const uint32_t required_round_up = 4;
222 const uint32_t height_mod = height % required_round_up;
Yiwei Zhang5c937422022-08-10 18:23:30 +0000223 if ((format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID) &&
Yiwei Zhangb2dde012022-09-27 04:12:54 +0000224 (bo->meta.use_flags & BO_USE_TEXTURE) && height_mod) {
225 const uint32_t height_padding = required_round_up - height_mod;
226 const uint32_t u_padding =
227 drv_size_from_format(format, bo->meta.strides[2], height_padding, 2);
228
229 bo->meta.total_size += u_padding;
230
231 /*
232 * Since we are not aligning Y, we must make sure that its padding fits
233 * inside the rest of the space allocated for the V/U planes.
234 */
235 const uint32_t y_padding =
236 drv_size_from_format(format, bo->meta.strides[0], height_padding, 0);
237 const uint32_t vu_size = drv_bo_get_plane_size(bo, 2) * 2;
238 if (y_padding > vu_size) {
239 /* Align with mali workaround to pad all 3 planes. */
240 bo->meta.total_size += y_padding + u_padding;
241 }
Yiwei Zhang5c937422022-08-10 18:23:30 +0000242 }
243#endif
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900244 }
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500245
Gurchetan Singh298b7572019-09-19 09:55:18 -0700246 gem_create.size = bo->meta.total_size;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800247
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700248 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_CREATE, &gem_create);
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700249 if (ret) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000250 drv_loge("DRM_IOCTL_MTK_GEM_CREATE failed (size=%" PRIu64 ")\n", gem_create.size);
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700251 return -errno;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700252 }
JB Tsai0c16a0f2015-03-19 14:30:31 +0800253
Gurchetan Singh298b7572019-09-19 09:55:18 -0700254 for (plane = 0; plane < bo->meta.num_planes; plane++)
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700255 bo->handles[plane].u32 = gem_create.handle;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800256
257 return 0;
258}
259
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700260static int mediatek_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
261 uint64_t use_flags)
262{
263 uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
264 return mediatek_bo_create_with_modifiers(bo, width, height, format, modifiers,
265 ARRAY_SIZE(modifiers));
266}
267
Gurchetan Singhee43c302017-11-14 18:20:27 -0800268static void *mediatek_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
Gurchetan Singhef920532016-08-12 16:38:25 -0700269{
Luigi Santivetti500928f2018-08-28 10:09:20 +0100270 int ret, prime_fd;
Gurchetan Singh99644382020-10-07 15:28:11 -0700271 struct drm_mtk_gem_map_off gem_map = { 0 };
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700272 struct mediatek_private_map_data *priv;
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000273 void *addr = NULL;
Gurchetan Singhef920532016-08-12 16:38:25 -0700274
Gurchetan Singhef920532016-08-12 16:38:25 -0700275 gem_map.handle = bo->handles[0].u32;
276
277 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_MAP_OFFSET, &gem_map);
278 if (ret) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000279 drv_loge("DRM_IOCTL_MTK_GEM_MAP_OFFSET failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700280 return MAP_FAILED;
281 }
282
David Stevensddb56b52020-03-13 15:24:37 +0900283 prime_fd = drv_bo_get_plane_fd(bo, 0);
284 if (prime_fd < 0) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000285 drv_loge("Failed to get a prime fd\n");
Luigi Santivetti500928f2018-08-28 10:09:20 +0100286 return MAP_FAILED;
287 }
288
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000289 addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
290 gem_map.offset);
291 if (addr == MAP_FAILED)
292 goto out_close_prime_fd;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700293
Gurchetan Singh298b7572019-09-19 09:55:18 -0700294 vma->length = bo->meta.total_size;
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700295
Luigi Santivetti500928f2018-08-28 10:09:20 +0100296 priv = calloc(1, sizeof(*priv));
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000297 if (!priv)
298 goto out_unmap_addr;
Luigi Santivetti500928f2018-08-28 10:09:20 +0100299
Gurchetan Singh298b7572019-09-19 09:55:18 -0700300 if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) {
301 priv->cached_addr = calloc(1, bo->meta.total_size);
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000302 if (!priv->cached_addr)
303 goto out_free_priv;
304
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700305 priv->gem_addr = addr;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700306 addr = priv->cached_addr;
307 }
308
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000309 priv->prime_fd = prime_fd;
310 vma->priv = priv;
311
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700312 return addr;
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000313
314out_free_priv:
315 free(priv);
316out_unmap_addr:
317 munmap(addr, bo->meta.total_size);
318out_close_prime_fd:
319 close(prime_fd);
320 return MAP_FAILED;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700321}
322
Gurchetan Singhee43c302017-11-14 18:20:27 -0800323static int mediatek_bo_unmap(struct bo *bo, struct vma *vma)
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700324{
Gurchetan Singhee43c302017-11-14 18:20:27 -0800325 if (vma->priv) {
326 struct mediatek_private_map_data *priv = vma->priv;
Luigi Santivettia72f4422018-09-12 16:28:21 +0100327
328 if (priv->cached_addr) {
329 vma->addr = priv->gem_addr;
330 free(priv->cached_addr);
331 }
332
Luigi Santivetti500928f2018-08-28 10:09:20 +0100333 close(priv->prime_fd);
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700334 free(priv);
Gurchetan Singhee43c302017-11-14 18:20:27 -0800335 vma->priv = NULL;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700336 }
337
Gurchetan Singhee43c302017-11-14 18:20:27 -0800338 return munmap(vma->addr, vma->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700339}
340
Gurchetan Singhef262d82017-11-28 16:56:17 -0800341static int mediatek_bo_invalidate(struct bo *bo, struct mapping *mapping)
342{
Luigi Santivetti500928f2018-08-28 10:09:20 +0100343 struct mediatek_private_map_data *priv = mapping->vma->priv;
344
345 if (priv) {
346 struct pollfd fds = {
347 .fd = priv->prime_fd,
348 };
349
350 if (mapping->vma->map_flags & BO_MAP_WRITE)
351 fds.events |= POLLOUT;
352
353 if (mapping->vma->map_flags & BO_MAP_READ)
354 fds.events |= POLLIN;
355
356 poll(&fds, 1, -1);
357 if (fds.revents != fds.events)
Yiwei Zhang04954732022-07-13 23:34:33 +0000358 drv_loge("poll prime_fd failed\n");
Luigi Santivetti500928f2018-08-28 10:09:20 +0100359
360 if (priv->cached_addr)
Gurchetan Singh298b7572019-09-19 09:55:18 -0700361 memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size);
Gurchetan Singhef262d82017-11-28 16:56:17 -0800362 }
363
364 return 0;
365}
366
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700367static int mediatek_bo_flush(struct bo *bo, struct mapping *mapping)
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700368{
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700369 struct mediatek_private_map_data *priv = mapping->vma->priv;
Luigi Santivetti500928f2018-08-28 10:09:20 +0100370 if (priv && priv->cached_addr && (mapping->vma->map_flags & BO_MAP_WRITE))
Gurchetan Singh298b7572019-09-19 09:55:18 -0700371 memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size);
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700372
373 return 0;
374}
375
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000376static void mediatek_resolve_format_and_use_flags(struct driver *drv, uint32_t format,
377 uint64_t use_flags, uint32_t *out_format,
378 uint64_t *out_use_flags)
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700379{
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000380 *out_format = format;
381 *out_use_flags = use_flags;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700382 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800383 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Nick Fan01c40142018-10-08 11:53:26 +0800384#ifdef MTK_MT8183
Jasmine Chenc7aa9742019-08-14 15:28:22 +0800385 /* Only MT8183 Camera subsystem offers private reprocessing
386 * capability. CAMERA_READ indicates the buffer is intended for
387 * reprocessing and hence given the private format for MTK. */
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000388 if (use_flags & BO_USE_CAMERA_READ) {
389 *out_format = DRM_FORMAT_MTISP_SXYZW10;
390 break;
391 }
Nick Fan01c40142018-10-08 11:53:26 +0800392#endif
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000393 if (use_flags & BO_USE_CAMERA_WRITE) {
394 *out_format = DRM_FORMAT_NV12;
395 break;
396 }
Wei Leee03625b2020-07-21 11:27:14 +0800397
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000398 /* HACK: See b/28671744 */
399 *out_format = DRM_FORMAT_XBGR8888;
Yiwei Zhang3a171db2021-10-01 22:12:05 +0000400 *out_use_flags &= ~BO_USE_HW_VIDEO_ENCODER;
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000401 break;
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800402 case DRM_FORMAT_FLEX_YCbCr_420_888:
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +0800403#ifdef USE_NV12_FOR_HW_VIDEO_DECODING
Wei Lee2f02cfb2020-08-05 17:24:45 +0800404 // TODO(hiroh): Switch to use NV12 for video decoder on MT8173 as well.
405 if (use_flags & (BO_USE_HW_VIDEO_DECODER)) {
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000406 *out_format = DRM_FORMAT_NV12;
407 break;
Wei Lee2f02cfb2020-08-05 17:24:45 +0800408 }
409#endif
410 if (use_flags &
411 (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_ENCODER)) {
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000412 *out_format = DRM_FORMAT_NV12;
413 break;
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900414 }
Yiwei Zhangb3caf222021-10-01 21:55:58 +0000415
416 /* HACK: See b/139714614 */
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000417 *out_format = DRM_FORMAT_YVU420;
Yiwei Zhangb3caf222021-10-01 21:55:58 +0000418 *out_use_flags &= ~BO_USE_SCANOUT;
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000419 break;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700420 default:
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000421 break;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700422 }
Hsin-Yi Wangd4df3d52022-03-28 13:29:06 +0800423 /* Mediatek doesn't support YUV overlays */
424 if (is_video_yuv_format(format))
425 *out_use_flags &= ~BO_USE_SCANOUT;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700426}
427
Gurchetan Singh3e9d3832017-10-31 10:36:25 -0700428const struct backend backend_mediatek = {
JB Tsai0c16a0f2015-03-19 14:30:31 +0800429 .name = "mediatek",
Gurchetan Singh179687e2016-10-28 10:07:35 -0700430 .init = mediatek_init,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700431 .bo_create = mediatek_bo_create,
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700432 .bo_create_with_modifiers = mediatek_bo_create_with_modifiers,
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700433 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singh71611d62017-01-03 16:49:56 -0800434 .bo_import = drv_prime_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700435 .bo_map = mediatek_bo_map,
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700436 .bo_unmap = mediatek_bo_unmap,
Gurchetan Singhef262d82017-11-28 16:56:17 -0800437 .bo_invalidate = mediatek_bo_invalidate,
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700438 .bo_flush = mediatek_bo_flush,
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000439 .resolve_format_and_use_flags = mediatek_resolve_format_and_use_flags,
JB Tsai0c16a0f2015-03-19 14:30:31 +0800440};
441
442#endif