blob: 7956cdcef795db1f7158825a211a96d3d98482c5 [file] [log] [blame]
JB Tsai0c16a0f2015-03-19 14:30:31 +08001/*
2 * Copyright 2015 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_MEDIATEK
JB Tsai0c16a0f2015-03-19 14:30:31 +08008
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -08009// clang-format off
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -070010#include <errno.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010011#include <fcntl.h>
Nicolas Boichatd7c83382019-08-29 21:46:29 +080012#include <inttypes.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010013#include <poll.h>
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -070014#include <stdio.h>
JB Tsai0c16a0f2015-03-19 14:30:31 +080015#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070016#include <sys/mman.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010017#include <unistd.h>
JB Tsai0c16a0f2015-03-19 14:30:31 +080018#include <xf86drm.h>
19#include <mediatek_drm.h>
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080020// clang-format on
Gurchetan Singhef920532016-08-12 16:38:25 -070021
Yiwei Zhangb7a64442021-09-30 05:13:10 +000022#include "drv_helpers.h"
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070023#include "drv_priv.h"
Gurchetan Singh179687e2016-10-28 10:07:35 -070024#include "util.h"
25
Miguel Casasdea0ccb2018-07-02 09:40:25 -040026#define TILE_TYPE_LINEAR 0
27
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080028#if defined(MTK_MT8183) || defined(MTK_MT8186)
Yiwei Zhang185a1392022-09-08 19:21:19 +000029#define SUPPORTS_YUV422
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080030#endif
31
32// All platforms except MT8173 should USE_NV12_FOR_HW_VIDEO_DECODING.
33#if defined(MTK_MT8183) || defined(MTK_MT8186) || defined(MTK_MT8192) || defined(MTK_MT8195)
34#define USE_NV12_FOR_HW_VIDEO_DECODING
Miguel Casas35fd7d22022-02-18 10:52:28 -080035#else
36#define DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080037#endif
38
Yiwei Zhang5c937422022-08-10 18:23:30 +000039// For Mali Sigurd based GPUs, the texture unit reads outside the specified texture dimensions.
40// Therefore, certain formats require extra memory padding to its allocated surface to prevent the
41// hardware from reading outside an allocation. For YVU420, we need additional padding for the last
42// chroma plane.
43#if defined(MTK_MT8186)
44#define USE_EXTRA_PADDING_FOR_YVU420
45#endif
46
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070047struct mediatek_private_map_data {
48 void *cached_addr;
49 void *gem_addr;
Luigi Santivetti500928f2018-08-28 10:09:20 +010050 int prime_fd;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070051};
52
Gurchetan Singh767c5382018-05-05 00:42:12 +000053static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
Gurchetan Singh71bc6652018-09-17 17:42:05 -070054 DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
55 DRM_FORMAT_XRGB8888 };
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070056
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080057// clang-format off
Yiwei Zhangf4c17252021-10-30 08:29:48 +000058static const uint32_t texture_source_formats[] = {
Yiwei Zhang185a1392022-09-08 19:21:19 +000059#ifdef SUPPORTS_YUV422
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080060 DRM_FORMAT_NV21,
61 DRM_FORMAT_YUYV,
Yiwei Zhang185a1392022-09-08 19:21:19 +000062#endif
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080063 DRM_FORMAT_ABGR2101010,
64 DRM_FORMAT_ABGR16161616F,
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080065 DRM_FORMAT_NV12,
66 DRM_FORMAT_YVU420,
67 DRM_FORMAT_YVU420_ANDROID
68};
Miguel Casas35fd7d22022-02-18 10:52:28 -080069
Miguel Casas35fd7d22022-02-18 10:52:28 -080070static const uint32_t video_yuv_formats[] = {
71 DRM_FORMAT_NV21,
72 DRM_FORMAT_NV12,
Justin Greenc9f64622022-08-22 16:46:16 -040073 DRM_FORMAT_YUYV,
Miguel Casas35fd7d22022-02-18 10:52:28 -080074 DRM_FORMAT_YVU420,
75 DRM_FORMAT_YVU420_ANDROID
76};
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080077// clang-format on
Gurchetan Singh179687e2016-10-28 10:07:35 -070078
Miguel Casas35fd7d22022-02-18 10:52:28 -080079static bool is_video_yuv_format(uint32_t format)
80{
81 size_t i;
82 for (i = 0; i < ARRAY_SIZE(video_yuv_formats); ++i) {
83 if (format == video_yuv_formats[i])
84 return true;
85 }
86 return false;
87}
Miguel Casas35fd7d22022-02-18 10:52:28 -080088
Gurchetan Singh179687e2016-10-28 10:07:35 -070089static int mediatek_init(struct driver *drv)
90{
Miguel Casasdea0ccb2018-07-02 09:40:25 -040091 struct format_metadata metadata;
92
Gurchetan Singhd3001452017-11-03 17:18:36 -070093 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
Gurchetan Singh1914f982020-03-24 13:53:51 -070094 &LINEAR_METADATA, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070095
Gurchetan Singhd3001452017-11-03 17:18:36 -070096 drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
97 &LINEAR_METADATA, BO_USE_TEXTURE_MASK);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070098
Gurchetan Singhbbba9dd2020-10-12 17:31:10 -070099 drv_add_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA, BO_USE_SW_MASK | BO_USE_LINEAR);
Hirokazu Hondafd8b8ab2020-06-16 15:28:56 +0900100
Justin Greenc9f64622022-08-22 16:46:16 -0400101 /* YUYV format for video overlay and camera subsystem. */
102 drv_add_combination(drv, DRM_FORMAT_YUYV, &LINEAR_METADATA,
Justin Green18051932022-08-30 13:04:29 -0400103 BO_USE_HW_VIDEO_DECODER | BO_USE_SCANOUT | BO_USE_LINEAR |
104 BO_USE_TEXTURE);
Justin Greenc9f64622022-08-22 16:46:16 -0400105
Gurchetan Singh71bc6652018-09-17 17:42:05 -0700106 /* Android CTS tests require this. */
107 drv_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK);
108
Miguel Casasdea0ccb2018-07-02 09:40:25 -0400109 /* Support BO_USE_HW_VIDEO_DECODER for protected content minigbm allocations. */
110 metadata.tiling = TILE_TYPE_LINEAR;
111 metadata.priority = 1;
112 metadata.modifier = DRM_FORMAT_MOD_LINEAR;
113 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata, BO_USE_HW_VIDEO_DECODER);
114 drv_modify_combination(drv, DRM_FORMAT_YVU420_ANDROID, &metadata, BO_USE_HW_VIDEO_DECODER);
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +0800115#ifdef USE_NV12_FOR_HW_VIDEO_DECODING
Wei Lee2f02cfb2020-08-05 17:24:45 +0800116 // TODO(hiroh): Switch to use NV12 for video decoder on MT8173 as well.
Hirokazu Honda0f0ce6f2019-07-24 19:40:20 +0900117 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, BO_USE_HW_VIDEO_DECODER);
Wei Lee2f02cfb2020-08-05 17:24:45 +0800118#endif
Miguel Casasdea0ccb2018-07-02 09:40:25 -0400119
David Stevens49518142020-06-15 13:48:48 +0900120 /*
121 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB for input/output from
122 * hardware decoder/encoder.
123 */
124 drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
Wei Leee03625b2020-07-21 11:27:14 +0800125 BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER |
Yiwei Zhangbbe1fd32022-07-20 20:44:22 +0000126 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE |
Jason Macnak80f664c2022-07-19 16:44:22 -0700127 BO_USE_GPU_DATA_BUFFER | BO_USE_SENSOR_DIRECT_DATA);
David Stevens49518142020-06-15 13:48:48 +0900128
Hirokazu Honda3bd681c2020-06-23 17:52:20 +0900129 /* NV12 format for encoding and display. */
130 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
Wei Leee03625b2020-07-21 11:27:14 +0800131 BO_USE_SCANOUT | BO_USE_HW_VIDEO_ENCODER | BO_USE_CAMERA_READ |
132 BO_USE_CAMERA_WRITE);
Hirokazu Honda3bd681c2020-06-23 17:52:20 +0900133
Wei Leee03625b2020-07-21 11:27:14 +0800134#ifdef MTK_MT8183
Nick Fan01c40142018-10-08 11:53:26 +0800135 /* Only for MT8183 Camera subsystem */
Nick Fan01c40142018-10-08 11:53:26 +0800136 drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata,
137 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
138 drv_modify_combination(drv, DRM_FORMAT_YUYV, &metadata,
139 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
140 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata,
141 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
Jasmine Chenc7aa9742019-08-14 15:28:22 +0800142 /* Private formats for private reprocessing in camera */
143 drv_add_combination(drv, DRM_FORMAT_MTISP_SXYZW10, &metadata,
144 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SW_MASK);
Nick Fan01c40142018-10-08 11:53:26 +0800145#endif
146
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700147 return drv_modify_linear_combinations(drv);
Gurchetan Singh179687e2016-10-28 10:07:35 -0700148}
JB Tsai0c16a0f2015-03-19 14:30:31 +0800149
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700150static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
151 uint32_t format, const uint64_t *modifiers,
152 uint32_t count)
JB Tsai0c16a0f2015-03-19 14:30:31 +0800153{
JB Tsai0c16a0f2015-03-19 14:30:31 +0800154 int ret;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700155 size_t plane;
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700156 uint32_t stride;
Gurchetan Singh99644382020-10-07 15:28:11 -0700157 struct drm_mtk_gem_create gem_create = { 0 };
Hsin-Yi Wang2581c472022-04-06 17:34:33 +0800158 /*
159 * We identify the ChromeOS Camera App buffers via these two USE flags. Those buffers need
160 * the same alignment as the video hardware encoding.
161 */
162 const bool is_camera_preview =
163 (bo->meta.use_flags & BO_USE_SCANOUT) && (bo->meta.use_flags & BO_USE_CAMERA_WRITE);
JB Tsai0c16a0f2015-03-19 14:30:31 +0800164
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700165 if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
166 errno = EINVAL;
Yiwei Zhang04954732022-07-13 23:34:33 +0000167 drv_loge("no usable modifier found\n");
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700168 return -EINVAL;
169 }
170
Yiwei Zhang6fb145b2022-10-07 16:20:38 +0000171 /*
172 * Since the ARM L1 cache line size is 64 bytes, align to that as a
173 * performance optimization, except for video buffers on certain platforms,
174 * these should only be accessed from the GPU and VCODEC subsystems (maybe
175 * also MDP), so it's better to align to macroblocks.
176 */
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700177 stride = drv_stride_from_format(format, width, 0);
Yiwei Zhang6fb145b2022-10-07 16:20:38 +0000178#ifdef DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
179 const uint32_t alignment = is_video_yuv_format(format) ? 16 : 64;
180 stride = ALIGN(stride, alignment);
181#else
182 stride = ALIGN(stride, 64);
183#endif
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900184
Hsin-Yi Wang2581c472022-04-06 17:34:33 +0800185 if ((bo->meta.use_flags & BO_USE_HW_VIDEO_ENCODER) || is_camera_preview) {
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900186 uint32_t aligned_height = ALIGN(height, 32);
187 uint32_t padding[DRV_MAX_PLANES] = { 0 };
188
189 for (plane = 0; plane < bo->meta.num_planes; ++plane) {
190 uint32_t plane_stride = drv_stride_from_format(format, stride, plane);
191 padding[plane] = plane_stride *
192 (32 / drv_vertical_subsampling_from_format(format, plane));
193 }
194
195 drv_bo_from_format_and_padding(bo, stride, aligned_height, format, padding);
196 } else {
Yiwei Zhang185a1392022-09-08 19:21:19 +0000197#ifdef SUPPORTS_YUV422
Moja Hsu059ac082019-10-02 14:47:10 +0800198 /*
199 * JPEG Encoder Accelerator requires 16x16 alignment. We want the buffer
200 * from camera can be put in JEA directly so align the height to 16
201 * bytes.
202 */
203 if (format == DRM_FORMAT_NV12)
204 height = ALIGN(height, 16);
205#endif
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900206 drv_bo_from_format(bo, stride, height, format);
Yiwei Zhang5c937422022-08-10 18:23:30 +0000207
208#ifdef USE_EXTRA_PADDING_FOR_YVU420
Yiwei Zhangb2dde012022-09-27 04:12:54 +0000209 /*
210 * Apply extra padding for YV12 if the height does not meet round up requirement and
211 * the image is to be sampled by gpu.
212 */
213 static const uint32_t required_round_up = 4;
214 const uint32_t height_mod = height % required_round_up;
Yiwei Zhang5c937422022-08-10 18:23:30 +0000215 if ((format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID) &&
Yiwei Zhangb2dde012022-09-27 04:12:54 +0000216 (bo->meta.use_flags & BO_USE_TEXTURE) && height_mod) {
217 const uint32_t height_padding = required_round_up - height_mod;
218 const uint32_t u_padding =
219 drv_size_from_format(format, bo->meta.strides[2], height_padding, 2);
220
221 bo->meta.total_size += u_padding;
222
223 /*
224 * Since we are not aligning Y, we must make sure that its padding fits
225 * inside the rest of the space allocated for the V/U planes.
226 */
227 const uint32_t y_padding =
228 drv_size_from_format(format, bo->meta.strides[0], height_padding, 0);
229 const uint32_t vu_size = drv_bo_get_plane_size(bo, 2) * 2;
230 if (y_padding > vu_size) {
231 /* Align with mali workaround to pad all 3 planes. */
232 bo->meta.total_size += y_padding + u_padding;
233 }
Yiwei Zhang5c937422022-08-10 18:23:30 +0000234 }
235#endif
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900236 }
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500237
Gurchetan Singh298b7572019-09-19 09:55:18 -0700238 gem_create.size = bo->meta.total_size;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800239
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700240 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_CREATE, &gem_create);
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700241 if (ret) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000242 drv_loge("DRM_IOCTL_MTK_GEM_CREATE failed (size=%" PRIu64 ")\n", gem_create.size);
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700243 return -errno;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700244 }
JB Tsai0c16a0f2015-03-19 14:30:31 +0800245
Gurchetan Singh298b7572019-09-19 09:55:18 -0700246 for (plane = 0; plane < bo->meta.num_planes; plane++)
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700247 bo->handles[plane].u32 = gem_create.handle;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800248
249 return 0;
250}
251
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700252static int mediatek_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
253 uint64_t use_flags)
254{
255 uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
256 return mediatek_bo_create_with_modifiers(bo, width, height, format, modifiers,
257 ARRAY_SIZE(modifiers));
258}
259
Gurchetan Singhee43c302017-11-14 18:20:27 -0800260static void *mediatek_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
Gurchetan Singhef920532016-08-12 16:38:25 -0700261{
Luigi Santivetti500928f2018-08-28 10:09:20 +0100262 int ret, prime_fd;
Gurchetan Singh99644382020-10-07 15:28:11 -0700263 struct drm_mtk_gem_map_off gem_map = { 0 };
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700264 struct mediatek_private_map_data *priv;
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000265 void *addr = NULL;
Gurchetan Singhef920532016-08-12 16:38:25 -0700266
Gurchetan Singhef920532016-08-12 16:38:25 -0700267 gem_map.handle = bo->handles[0].u32;
268
269 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_MAP_OFFSET, &gem_map);
270 if (ret) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000271 drv_loge("DRM_IOCTL_MTK_GEM_MAP_OFFSET failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700272 return MAP_FAILED;
273 }
274
David Stevensddb56b52020-03-13 15:24:37 +0900275 prime_fd = drv_bo_get_plane_fd(bo, 0);
276 if (prime_fd < 0) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000277 drv_loge("Failed to get a prime fd\n");
Luigi Santivetti500928f2018-08-28 10:09:20 +0100278 return MAP_FAILED;
279 }
280
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000281 addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
282 gem_map.offset);
283 if (addr == MAP_FAILED)
284 goto out_close_prime_fd;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700285
Gurchetan Singh298b7572019-09-19 09:55:18 -0700286 vma->length = bo->meta.total_size;
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700287
Luigi Santivetti500928f2018-08-28 10:09:20 +0100288 priv = calloc(1, sizeof(*priv));
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000289 if (!priv)
290 goto out_unmap_addr;
Luigi Santivetti500928f2018-08-28 10:09:20 +0100291
Gurchetan Singh298b7572019-09-19 09:55:18 -0700292 if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) {
293 priv->cached_addr = calloc(1, bo->meta.total_size);
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000294 if (!priv->cached_addr)
295 goto out_free_priv;
296
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700297 priv->gem_addr = addr;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700298 addr = priv->cached_addr;
299 }
300
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000301 priv->prime_fd = prime_fd;
302 vma->priv = priv;
303
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700304 return addr;
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000305
306out_free_priv:
307 free(priv);
308out_unmap_addr:
309 munmap(addr, bo->meta.total_size);
310out_close_prime_fd:
311 close(prime_fd);
312 return MAP_FAILED;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700313}
314
Gurchetan Singhee43c302017-11-14 18:20:27 -0800315static int mediatek_bo_unmap(struct bo *bo, struct vma *vma)
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700316{
Gurchetan Singhee43c302017-11-14 18:20:27 -0800317 if (vma->priv) {
318 struct mediatek_private_map_data *priv = vma->priv;
Luigi Santivettia72f4422018-09-12 16:28:21 +0100319
320 if (priv->cached_addr) {
321 vma->addr = priv->gem_addr;
322 free(priv->cached_addr);
323 }
324
Luigi Santivetti500928f2018-08-28 10:09:20 +0100325 close(priv->prime_fd);
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700326 free(priv);
Gurchetan Singhee43c302017-11-14 18:20:27 -0800327 vma->priv = NULL;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700328 }
329
Gurchetan Singhee43c302017-11-14 18:20:27 -0800330 return munmap(vma->addr, vma->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700331}
332
Gurchetan Singhef262d82017-11-28 16:56:17 -0800333static int mediatek_bo_invalidate(struct bo *bo, struct mapping *mapping)
334{
Luigi Santivetti500928f2018-08-28 10:09:20 +0100335 struct mediatek_private_map_data *priv = mapping->vma->priv;
336
337 if (priv) {
338 struct pollfd fds = {
339 .fd = priv->prime_fd,
340 };
341
342 if (mapping->vma->map_flags & BO_MAP_WRITE)
343 fds.events |= POLLOUT;
344
345 if (mapping->vma->map_flags & BO_MAP_READ)
346 fds.events |= POLLIN;
347
348 poll(&fds, 1, -1);
349 if (fds.revents != fds.events)
Yiwei Zhang04954732022-07-13 23:34:33 +0000350 drv_loge("poll prime_fd failed\n");
Luigi Santivetti500928f2018-08-28 10:09:20 +0100351
352 if (priv->cached_addr)
Gurchetan Singh298b7572019-09-19 09:55:18 -0700353 memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size);
Gurchetan Singhef262d82017-11-28 16:56:17 -0800354 }
355
356 return 0;
357}
358
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700359static int mediatek_bo_flush(struct bo *bo, struct mapping *mapping)
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700360{
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700361 struct mediatek_private_map_data *priv = mapping->vma->priv;
Luigi Santivetti500928f2018-08-28 10:09:20 +0100362 if (priv && priv->cached_addr && (mapping->vma->map_flags & BO_MAP_WRITE))
Gurchetan Singh298b7572019-09-19 09:55:18 -0700363 memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size);
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700364
365 return 0;
366}
367
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000368static void mediatek_resolve_format_and_use_flags(struct driver *drv, uint32_t format,
369 uint64_t use_flags, uint32_t *out_format,
370 uint64_t *out_use_flags)
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700371{
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000372 *out_format = format;
373 *out_use_flags = use_flags;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700374 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800375 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Nick Fan01c40142018-10-08 11:53:26 +0800376#ifdef MTK_MT8183
Jasmine Chenc7aa9742019-08-14 15:28:22 +0800377 /* Only MT8183 Camera subsystem offers private reprocessing
378 * capability. CAMERA_READ indicates the buffer is intended for
379 * reprocessing and hence given the private format for MTK. */
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000380 if (use_flags & BO_USE_CAMERA_READ) {
381 *out_format = DRM_FORMAT_MTISP_SXYZW10;
382 break;
383 }
Nick Fan01c40142018-10-08 11:53:26 +0800384#endif
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000385 if (use_flags & BO_USE_CAMERA_WRITE) {
386 *out_format = DRM_FORMAT_NV12;
387 break;
388 }
Wei Leee03625b2020-07-21 11:27:14 +0800389
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000390 /* HACK: See b/28671744 */
391 *out_format = DRM_FORMAT_XBGR8888;
Yiwei Zhang3a171db2021-10-01 22:12:05 +0000392 *out_use_flags &= ~BO_USE_HW_VIDEO_ENCODER;
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000393 break;
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800394 case DRM_FORMAT_FLEX_YCbCr_420_888:
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +0800395#ifdef USE_NV12_FOR_HW_VIDEO_DECODING
Wei Lee2f02cfb2020-08-05 17:24:45 +0800396 // TODO(hiroh): Switch to use NV12 for video decoder on MT8173 as well.
397 if (use_flags & (BO_USE_HW_VIDEO_DECODER)) {
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000398 *out_format = DRM_FORMAT_NV12;
399 break;
Wei Lee2f02cfb2020-08-05 17:24:45 +0800400 }
401#endif
402 if (use_flags &
403 (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_ENCODER)) {
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000404 *out_format = DRM_FORMAT_NV12;
405 break;
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900406 }
Yiwei Zhangb3caf222021-10-01 21:55:58 +0000407
408 /* HACK: See b/139714614 */
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000409 *out_format = DRM_FORMAT_YVU420;
Yiwei Zhangb3caf222021-10-01 21:55:58 +0000410 *out_use_flags &= ~BO_USE_SCANOUT;
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000411 break;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700412 default:
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000413 break;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700414 }
Hsin-Yi Wangd4df3d52022-03-28 13:29:06 +0800415 /* Mediatek doesn't support YUV overlays */
416 if (is_video_yuv_format(format))
417 *out_use_flags &= ~BO_USE_SCANOUT;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700418}
419
Gurchetan Singh3e9d3832017-10-31 10:36:25 -0700420const struct backend backend_mediatek = {
JB Tsai0c16a0f2015-03-19 14:30:31 +0800421 .name = "mediatek",
Gurchetan Singh179687e2016-10-28 10:07:35 -0700422 .init = mediatek_init,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700423 .bo_create = mediatek_bo_create,
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700424 .bo_create_with_modifiers = mediatek_bo_create_with_modifiers,
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700425 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singh71611d62017-01-03 16:49:56 -0800426 .bo_import = drv_prime_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700427 .bo_map = mediatek_bo_map,
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700428 .bo_unmap = mediatek_bo_unmap,
Gurchetan Singhef262d82017-11-28 16:56:17 -0800429 .bo_invalidate = mediatek_bo_invalidate,
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700430 .bo_flush = mediatek_bo_flush,
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000431 .resolve_format_and_use_flags = mediatek_resolve_format_and_use_flags,
JB Tsai0c16a0f2015-03-19 14:30:31 +0800432};
433
434#endif