H. Peter Anvin | 9e6747c | 2009-06-28 17:13:04 -0700 | [diff] [blame] | 1 | /* ----------------------------------------------------------------------- * |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2 | * |
H. Peter Anvin | d24dd5f | 2016-02-08 10:32:13 -0800 | [diff] [blame] | 3 | * Copyright 1996-2016 The NASM Authors - All Rights Reserved |
H. Peter Anvin | 9e6747c | 2009-06-28 17:13:04 -0700 | [diff] [blame] | 4 | * See the file AUTHORS included with the NASM distribution for |
| 5 | * the specific copyright holders. |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 6 | * |
H. Peter Anvin | 9e6747c | 2009-06-28 17:13:04 -0700 | [diff] [blame] | 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following |
| 9 | * conditions are met: |
| 10 | * |
| 11 | * * Redistributions of source code must retain the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer. |
| 13 | * * Redistributions in binary form must reproduce the above |
| 14 | * copyright notice, this list of conditions and the following |
| 15 | * disclaimer in the documentation and/or other materials provided |
| 16 | * with the distribution. |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 17 | * |
H. Peter Anvin | 9e6747c | 2009-06-28 17:13:04 -0700 | [diff] [blame] | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND |
| 19 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
| 20 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 21 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
| 23 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 24 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 25 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 26 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 27 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| 29 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
| 30 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 31 | * |
| 32 | * ----------------------------------------------------------------------- */ |
| 33 | |
| 34 | /* |
| 35 | * assemble.c code generation for the Netwide Assembler |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 36 | * |
Cyrill Gorcunov | 5d488a3 | 2014-08-25 17:50:53 +0400 | [diff] [blame] | 37 | * Bytecode specification |
| 38 | * ---------------------- |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 39 | * |
Cyrill Gorcunov | 5d488a3 | 2014-08-25 17:50:53 +0400 | [diff] [blame] | 40 | * |
| 41 | * Codes Mnemonic Explanation |
| 42 | * |
| 43 | * \0 terminates the code. (Unless it's a literal of course.) |
| 44 | * \1..\4 that many literal bytes follow in the code stream |
| 45 | * \5 add 4 to the primary operand number (b, low octdigit) |
| 46 | * \6 add 4 to the secondary operand number (a, middle octdigit) |
| 47 | * \7 add 4 to both the primary and the secondary operand number |
| 48 | * \10..\13 a literal byte follows in the code stream, to be added |
| 49 | * to the register value of operand 0..3 |
| 50 | * \14..\17 the position of index register operand in MIB (BND insns) |
| 51 | * \20..\23 ib a byte immediate operand, from operand 0..3 |
| 52 | * \24..\27 ib,u a zero-extended byte immediate operand, from operand 0..3 |
| 53 | * \30..\33 iw a word immediate operand, from operand 0..3 |
| 54 | * \34..\37 iwd select between \3[0-3] and \4[0-3] depending on 16/32 bit |
| 55 | * assembly mode or the operand-size override on the operand |
| 56 | * \40..\43 id a long immediate operand, from operand 0..3 |
| 57 | * \44..\47 iwdq select between \3[0-3], \4[0-3] and \5[4-7] |
| 58 | * depending on the address size of the instruction. |
| 59 | * \50..\53 rel8 a byte relative operand, from operand 0..3 |
| 60 | * \54..\57 iq a qword immediate operand, from operand 0..3 |
| 61 | * \60..\63 rel16 a word relative operand, from operand 0..3 |
| 62 | * \64..\67 rel select between \6[0-3] and \7[0-3] depending on 16/32 bit |
| 63 | * assembly mode or the operand-size override on the operand |
| 64 | * \70..\73 rel32 a long relative operand, from operand 0..3 |
| 65 | * \74..\77 seg a word constant, from the _segment_ part of operand 0..3 |
| 66 | * \1ab a ModRM, calculated on EA in operand a, with the spare |
| 67 | * field the register value of operand b. |
| 68 | * \172\ab the register number from operand a in bits 7..4, with |
| 69 | * the 4-bit immediate from operand b in bits 3..0. |
| 70 | * \173\xab the register number from operand a in bits 7..4, with |
| 71 | * the value b in bits 3..0. |
| 72 | * \174..\177 the register number from operand 0..3 in bits 7..4, and |
| 73 | * an arbitrary value in bits 3..0 (assembled as zero.) |
| 74 | * \2ab a ModRM, calculated on EA in operand a, with the spare |
| 75 | * field equal to digit b. |
| 76 | * |
| 77 | * \240..\243 this instruction uses EVEX rather than REX or VEX/XOP, with the |
| 78 | * V field taken from operand 0..3. |
| 79 | * \250 this instruction uses EVEX rather than REX or VEX/XOP, with the |
| 80 | * V field set to 1111b. |
| 81 | * |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 82 | * EVEX prefixes are followed by the sequence: |
| 83 | * \cm\wlp\tup where cm is: |
| 84 | * cc 000 0mm |
| 85 | * c = 2 for EVEX and m is the legacy escape (0f, 0f38, 0f3a) |
| 86 | * and wlp is: |
| 87 | * 00 wwl lpp |
| 88 | * [l0] ll = 0 (.128, .lz) |
| 89 | * [l1] ll = 1 (.256) |
| 90 | * [l2] ll = 2 (.512) |
| 91 | * [lig] ll = 3 for EVEX.L'L don't care (always assembled as 0) |
| 92 | * |
| 93 | * [w0] ww = 0 for W = 0 |
| 94 | * [w1] ww = 1 for W = 1 |
| 95 | * [wig] ww = 2 for W don't care (always assembled as 0) |
| 96 | * [ww] ww = 3 for W used as REX.W |
| 97 | * |
| 98 | * [p0] pp = 0 for no prefix |
| 99 | * [60] pp = 1 for legacy prefix 60 |
| 100 | * [f3] pp = 2 |
| 101 | * [f2] pp = 3 |
| 102 | * |
| 103 | * tup is tuple type for Disp8*N from %tuple_codes in insns.pl |
| 104 | * (compressed displacement encoding) |
| 105 | * |
Cyrill Gorcunov | 5d488a3 | 2014-08-25 17:50:53 +0400 | [diff] [blame] | 106 | * \254..\257 id,s a signed 32-bit operand to be extended to 64 bits. |
| 107 | * \260..\263 this instruction uses VEX/XOP rather than REX, with the |
| 108 | * V field taken from operand 0..3. |
| 109 | * \270 this instruction uses VEX/XOP rather than REX, with the |
| 110 | * V field set to 1111b. |
H. Peter Anvin | d85d250 | 2008-05-04 17:53:31 -0700 | [diff] [blame] | 111 | * |
H. Peter Anvin | a04019c | 2009-05-03 21:42:34 -0700 | [diff] [blame] | 112 | * VEX/XOP prefixes are followed by the sequence: |
| 113 | * \tmm\wlp where mm is the M field; and wlp is: |
H. Peter Anvin | 421059c | 2010-08-16 14:56:33 -0700 | [diff] [blame] | 114 | * 00 wwl lpp |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 115 | * [l0] ll = 0 for L = 0 (.128, .lz) |
| 116 | * [l1] ll = 1 for L = 1 (.256) |
| 117 | * [lig] ll = 2 for L don't care (always assembled as 0) |
H. Peter Anvin | 421059c | 2010-08-16 14:56:33 -0700 | [diff] [blame] | 118 | * |
H. Peter Anvin | 978c217 | 2010-08-16 13:48:43 -0700 | [diff] [blame] | 119 | * [w0] ww = 0 for W = 0 |
| 120 | * [w1 ] ww = 1 for W = 1 |
| 121 | * [wig] ww = 2 for W don't care (always assembled as 0) |
| 122 | * [ww] ww = 3 for W used as REX.W |
H. Peter Anvin | bd420c7 | 2008-05-22 11:24:35 -0700 | [diff] [blame] | 123 | * |
H. Peter Anvin | a04019c | 2009-05-03 21:42:34 -0700 | [diff] [blame] | 124 | * t = 0 for VEX (C4/C5), t = 1 for XOP (8F). |
H. Peter Anvin | d85d250 | 2008-05-04 17:53:31 -0700 | [diff] [blame] | 125 | * |
Cyrill Gorcunov | 5d488a3 | 2014-08-25 17:50:53 +0400 | [diff] [blame] | 126 | * \271 hlexr instruction takes XRELEASE (F3) with or without lock |
| 127 | * \272 hlenl instruction takes XACQUIRE/XRELEASE with or without lock |
| 128 | * \273 hle instruction takes XACQUIRE/XRELEASE with lock only |
| 129 | * \274..\277 ib,s a byte immediate operand, from operand 0..3, sign-extended |
| 130 | * to the operand size (if o16/o32/o64 present) or the bit size |
| 131 | * \310 a16 indicates fixed 16-bit address size, i.e. optional 0x67. |
| 132 | * \311 a32 indicates fixed 32-bit address size, i.e. optional 0x67. |
| 133 | * \312 adf (disassembler only) invalid with non-default address size. |
| 134 | * \313 a64 indicates fixed 64-bit address size, 0x67 invalid. |
| 135 | * \314 norexb (disassembler only) invalid with REX.B |
| 136 | * \315 norexx (disassembler only) invalid with REX.X |
| 137 | * \316 norexr (disassembler only) invalid with REX.R |
| 138 | * \317 norexw (disassembler only) invalid with REX.W |
| 139 | * \320 o16 indicates fixed 16-bit operand size, i.e. optional 0x66. |
| 140 | * \321 o32 indicates fixed 32-bit operand size, i.e. optional 0x66. |
| 141 | * \322 odf indicates that this instruction is only valid when the |
| 142 | * operand size is the default (instruction to disassembler, |
| 143 | * generates no code in the assembler) |
| 144 | * \323 o64nw indicates fixed 64-bit operand size, REX on extensions only. |
| 145 | * \324 o64 indicates 64-bit operand size requiring REX prefix. |
| 146 | * \325 nohi instruction which always uses spl/bpl/sil/dil |
| 147 | * \326 nof3 instruction not valid with 0xF3 REP prefix. Hint for |
| 148 | disassembler only; for SSE instructions. |
| 149 | * \330 a literal byte follows in the code stream, to be added |
| 150 | * to the condition code value of the instruction. |
| 151 | * \331 norep instruction not valid with REP prefix. Hint for |
| 152 | * disassembler only; for SSE instructions. |
| 153 | * \332 f2i REP prefix (0xF2 byte) used as opcode extension. |
| 154 | * \333 f3i REP prefix (0xF3 byte) used as opcode extension. |
| 155 | * \334 rex.l LOCK prefix used as REX.R (used in non-64-bit mode) |
| 156 | * \335 repe disassemble a rep (0xF3 byte) prefix as repe not rep. |
| 157 | * \336 mustrep force a REP(E) prefix (0xF3) even if not specified. |
| 158 | * \337 mustrepne force a REPNE prefix (0xF2) even if not specified. |
| 159 | * \336-\337 are still listed as prefixes in the disassembler. |
| 160 | * \340 resb reserve <operand 0> bytes of uninitialized storage. |
| 161 | * Operand 0 had better be a segmentless constant. |
| 162 | * \341 wait this instruction needs a WAIT "prefix" |
Cyrill Gorcunov | 8a5d3e6 | 2014-08-25 20:04:30 +0400 | [diff] [blame] | 163 | * \360 np no SSE prefix (== \364\331) |
Cyrill Gorcunov | 5d488a3 | 2014-08-25 17:50:53 +0400 | [diff] [blame] | 164 | * \361 66 SSE prefix (== \366\331) |
| 165 | * \364 !osp operand-size prefix (0x66) not permitted |
| 166 | * \365 !asp address-size prefix (0x67) not permitted |
| 167 | * \366 operand-size prefix (0x66) used as opcode extension |
| 168 | * \367 address-size prefix (0x67) used as opcode extension |
| 169 | * \370,\371 jcc8 match only if operand 0 meets byte jump criteria. |
| 170 | * jmp8 370 is used for Jcc, 371 is used for JMP. |
| 171 | * \373 jlen assemble 0x03 if bits==16, 0x05 if bits==32; |
| 172 | * used for conditional jump over longer jump |
| 173 | * \374 vsibx|vm32x|vm64x this instruction takes an XMM VSIB memory EA |
| 174 | * \375 vsiby|vm32y|vm64y this instruction takes an YMM VSIB memory EA |
| 175 | * \376 vsibz|vm32z|vm64z this instruction takes an ZMM VSIB memory EA |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 176 | */ |
| 177 | |
H. Peter Anvin | fe50195 | 2007-10-02 21:53:51 -0700 | [diff] [blame] | 178 | #include "compiler.h" |
| 179 | |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 180 | #include <stdio.h> |
| 181 | #include <string.h> |
H. Peter Anvin | 89a2ac0 | 2013-11-26 18:23:20 -0800 | [diff] [blame] | 182 | #include <stdlib.h> |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 183 | #include <inttypes.h> |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 184 | |
| 185 | #include "nasm.h" |
H. Peter Anvin | 6768eb7 | 2002-04-30 20:52:26 +0000 | [diff] [blame] | 186 | #include "nasmlib.h" |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 187 | #include "assemble.h" |
| 188 | #include "insns.h" |
H. Peter Anvin | a4835d4 | 2008-05-20 14:21:29 -0700 | [diff] [blame] | 189 | #include "tables.h" |
Jin Kyu Song | 5f3bfee | 2013-11-20 15:32:52 -0800 | [diff] [blame] | 190 | #include "disp8.h" |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 191 | |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 192 | enum match_result { |
| 193 | /* |
| 194 | * Matching errors. These should be sorted so that more specific |
| 195 | * errors come later in the sequence. |
| 196 | */ |
| 197 | MERR_INVALOP, |
| 198 | MERR_OPSIZEMISSING, |
| 199 | MERR_OPSIZEMISMATCH, |
Jin Kyu Song | 25c2212 | 2013-10-30 03:12:45 -0700 | [diff] [blame] | 200 | MERR_BRNUMMISMATCH, |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 201 | MERR_BADCPU, |
| 202 | MERR_BADMODE, |
H. Peter Anvin | fb3f4e6 | 2012-02-25 22:22:07 -0800 | [diff] [blame] | 203 | MERR_BADHLE, |
Jin Kyu Song | 66c6192 | 2013-08-26 20:28:43 -0700 | [diff] [blame] | 204 | MERR_ENCMISMATCH, |
Jin Kyu Song | 0304109 | 2013-10-15 19:38:51 -0700 | [diff] [blame] | 205 | MERR_BADBND, |
Jin Kyu Song | b287ff0 | 2013-12-04 20:05:55 -0800 | [diff] [blame] | 206 | MERR_BADREPNE, |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 207 | /* |
| 208 | * Matching success; the conditional ones first |
| 209 | */ |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 210 | MOK_JUMP, /* Matching OK but needs jmp_match() */ |
| 211 | MOK_GOOD /* Matching unconditionally OK */ |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 212 | }; |
| 213 | |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 214 | typedef struct { |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 215 | enum ea_type type; /* what kind of EA is this? */ |
| 216 | int sib_present; /* is a SIB byte necessary? */ |
| 217 | int bytes; /* # of bytes of offset needed */ |
| 218 | int size; /* lazy - this is sib+bytes+1 */ |
| 219 | uint8_t modrm, sib, rex, rip; /* the bytes themselves */ |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 220 | int8_t disp8; /* compressed displacement for EVEX */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 221 | } ea; |
| 222 | |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 223 | #define GEN_SIB(scale, index, base) \ |
| 224 | (((scale) << 6) | ((index) << 3) | ((base))) |
| 225 | |
| 226 | #define GEN_MODRM(mod, reg, rm) \ |
| 227 | (((mod) << 6) | (((reg) & 7) << 3) | ((rm) & 7)) |
| 228 | |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 229 | static iflag_t cpu; /* cpu level received from nasm.c */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 230 | static efunc errfunc; |
| 231 | static struct ofmt *outfmt; |
H. Peter Anvin | 6768eb7 | 2002-04-30 20:52:26 +0000 | [diff] [blame] | 232 | static ListGen *list; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 233 | |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 234 | static int64_t calcsize(int32_t, int64_t, int, insn *, |
| 235 | const struct itemplate *); |
H. Peter Anvin | 833caea | 2008-10-04 19:02:30 -0700 | [diff] [blame] | 236 | static void gencode(int32_t segment, int64_t offset, int bits, |
| 237 | insn * ins, const struct itemplate *temp, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 238 | int64_t insn_end); |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 239 | static enum match_result find_match(const struct itemplate **tempp, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 240 | insn *instruction, |
| 241 | int32_t segment, int64_t offset, int bits); |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 242 | static enum match_result matches(const struct itemplate *, insn *, int bits); |
H. Peter Anvin | f8563f7 | 2009-10-13 12:28:14 -0700 | [diff] [blame] | 243 | static opflags_t regflag(const operand *); |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 244 | static int32_t regval(const operand *); |
H. Peter Anvin | f8563f7 | 2009-10-13 12:28:14 -0700 | [diff] [blame] | 245 | static int rexflags(int, opflags_t, int); |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 246 | static int op_rexflags(const operand *, int); |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 247 | static int op_evexflags(const operand *, int, uint8_t); |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 248 | static void add_asp(insn *, int); |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 249 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 250 | static enum ea_type process_ea(operand *, ea *, int, int, opflags_t, insn *); |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 251 | |
Cyrill Gorcunov | 18914e6 | 2011-11-12 11:41:51 +0400 | [diff] [blame] | 252 | static int has_prefix(insn * ins, enum prefix_pos pos, int prefix) |
H. Peter Anvin | 0db11e2 | 2007-04-17 20:23:11 +0000 | [diff] [blame] | 253 | { |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 254 | return ins->prefixes[pos] == prefix; |
| 255 | } |
| 256 | |
| 257 | static void assert_no_prefix(insn * ins, enum prefix_pos pos) |
| 258 | { |
| 259 | if (ins->prefixes[pos]) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 260 | errfunc(ERR_NONFATAL, "invalid %s prefix", |
| 261 | prefix_name(ins->prefixes[pos])); |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 262 | } |
| 263 | |
| 264 | static const char *size_name(int size) |
| 265 | { |
| 266 | switch (size) { |
| 267 | case 1: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 268 | return "byte"; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 269 | case 2: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 270 | return "word"; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 271 | case 4: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 272 | return "dword"; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 273 | case 8: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 274 | return "qword"; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 275 | case 10: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 276 | return "tword"; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 277 | case 16: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 278 | return "oword"; |
H. Peter Anvin | dfb9180 | 2008-05-20 11:43:53 -0700 | [diff] [blame] | 279 | case 32: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 280 | return "yword"; |
Jin Kyu Song | d4760c1 | 2013-08-21 19:29:11 -0700 | [diff] [blame] | 281 | case 64: |
| 282 | return "zword"; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 283 | default: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 284 | return "???"; |
H. Peter Anvin | 0db11e2 | 2007-04-17 20:23:11 +0000 | [diff] [blame] | 285 | } |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 286 | } |
| 287 | |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 288 | static void warn_overflow(int pass, int size) |
| 289 | { |
| 290 | errfunc(ERR_WARNING | pass | ERR_WARN_NOV, |
| 291 | "%s data exceeds bounds", size_name(size)); |
| 292 | } |
| 293 | |
| 294 | static void warn_overflow_const(int64_t data, int size) |
| 295 | { |
| 296 | if (overflow_general(data, size)) |
| 297 | warn_overflow(ERR_PASS1, size); |
| 298 | } |
| 299 | |
| 300 | static void warn_overflow_opd(const struct operand *o, int size) |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 301 | { |
Victor van den Elzen | 0d268fb | 2010-01-24 21:24:57 +0100 | [diff] [blame] | 302 | if (o->wrt == NO_SEG && o->segment == NO_SEG) { |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 303 | if (overflow_general(o->offset, size)) |
| 304 | warn_overflow(ERR_PASS2, size); |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 305 | } |
| 306 | } |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 307 | |
H. Peter Anvin | 6768eb7 | 2002-04-30 20:52:26 +0000 | [diff] [blame] | 308 | /* |
| 309 | * This routine wrappers the real output format's output routine, |
| 310 | * in order to pass a copy of the data off to the listing file |
H. Peter Anvin | d24dd5f | 2016-02-08 10:32:13 -0800 | [diff] [blame] | 311 | * generator at the same time, flatten unnecessary relocations, |
| 312 | * and verify backend compatibility. |
H. Peter Anvin | 6768eb7 | 2002-04-30 20:52:26 +0000 | [diff] [blame] | 313 | */ |
Charles Crayne | 1f8bc4c | 2007-11-06 18:27:23 -0800 | [diff] [blame] | 314 | static void out(int64_t offset, int32_t segto, const void *data, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 315 | enum out_type type, uint64_t size, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 316 | int32_t segment, int32_t wrt) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 317 | { |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 318 | static int32_t lineno = 0; /* static!!! */ |
Keith Kanios | a6dfa78 | 2007-04-13 16:47:53 +0000 | [diff] [blame] | 319 | static char *lnfname = NULL; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 320 | uint8_t p[8]; |
H. Peter Anvin | d24dd5f | 2016-02-08 10:32:13 -0800 | [diff] [blame] | 321 | const int asize = abs((int)size); /* True address size */ |
H. Peter Anvin | 3381413 | 2016-02-11 20:40:07 -0800 | [diff] [blame^] | 322 | const int amax = outfmt->maxbits >> 3; /* Maximum address size in bytes */ |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 323 | |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 324 | if (type == OUT_ADDRESS && segment == NO_SEG && wrt == NO_SEG) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 325 | /* |
| 326 | * This is a non-relocated address, and we're going to |
| 327 | * convert it into RAWDATA format. |
| 328 | */ |
| 329 | uint8_t *q = p; |
H. Peter Anvin | 89a2ac0 | 2013-11-26 18:23:20 -0800 | [diff] [blame] | 330 | |
H. Peter Anvin | d24dd5f | 2016-02-08 10:32:13 -0800 | [diff] [blame] | 331 | if (asize > 8) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 332 | errfunc(ERR_PANIC, "OUT_ADDRESS with size > 8"); |
| 333 | return; |
| 334 | } |
H. Peter Anvin | d85d250 | 2008-05-04 17:53:31 -0700 | [diff] [blame] | 335 | |
H. Peter Anvin | d24dd5f | 2016-02-08 10:32:13 -0800 | [diff] [blame] | 336 | WRITEADDR(q, *(int64_t *)data, asize); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 337 | data = p; |
| 338 | type = OUT_RAWDATA; |
H. Peter Anvin | 6768eb7 | 2002-04-30 20:52:26 +0000 | [diff] [blame] | 339 | } |
| 340 | |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 341 | list->output(offset, data, type, size); |
| 342 | |
Frank Kotler | abebb08 | 2003-09-06 04:45:37 +0000 | [diff] [blame] | 343 | /* |
| 344 | * this call to src_get determines when we call the |
| 345 | * debug-format-specific "linenum" function |
| 346 | * it updates lineno and lnfname to the current values |
| 347 | * returning 0 if "same as last time", -2 if lnfname |
| 348 | * changed, and the amount by which lineno changed, |
| 349 | * if it did. thus, these variables must be static |
| 350 | */ |
| 351 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 352 | if (src_get(&lineno, &lnfname)) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 353 | outfmt->current_dfmt->linenum(lnfname, lineno, segto); |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 354 | |
H. Peter Anvin | 3381413 | 2016-02-11 20:40:07 -0800 | [diff] [blame^] | 355 | if (type == OUT_ADDRESS && asize > amax) { |
H. Peter Anvin | d24dd5f | 2016-02-08 10:32:13 -0800 | [diff] [blame] | 356 | if (asize < 0) { |
| 357 | errfunc(ERR_NONFATAL, |
| 358 | "%d-bit signed relocation unsupported by output format %s\n", |
H. Peter Anvin | 3381413 | 2016-02-11 20:40:07 -0800 | [diff] [blame^] | 359 | asize << 3, outfmt->shortname); |
H. Peter Anvin | d24dd5f | 2016-02-08 10:32:13 -0800 | [diff] [blame] | 360 | } else { |
| 361 | errfunc(ERR_WARNING | ERR_WARN_ZEXTRELOC, |
H. Peter Anvin | ecc9e0e | 2016-02-11 20:29:34 -0800 | [diff] [blame] | 362 | "%d-bit unsigned relocation zero-extended from %d bits\n", |
H. Peter Anvin | 3381413 | 2016-02-11 20:40:07 -0800 | [diff] [blame^] | 363 | asize << 4, outfmt->maxbits); |
H. Peter Anvin | d24dd5f | 2016-02-08 10:32:13 -0800 | [diff] [blame] | 364 | outfmt->output(segto, data, type, amax, segment, wrt); |
| 365 | size -= amax; |
| 366 | } |
| 367 | data = zero_buffer; |
| 368 | type = OUT_RAWDATA; |
| 369 | } |
| 370 | |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 371 | outfmt->output(segto, data, type, size, segment, wrt); |
H. Peter Anvin | 6768eb7 | 2002-04-30 20:52:26 +0000 | [diff] [blame] | 372 | } |
| 373 | |
H. Peter Anvin | 89a2ac0 | 2013-11-26 18:23:20 -0800 | [diff] [blame] | 374 | static void out_imm8(int64_t offset, int32_t segment, |
| 375 | struct operand *opx, int asize) |
Ben Rudiak-Gould | 4e8396b | 2013-03-01 10:28:32 +0400 | [diff] [blame] | 376 | { |
| 377 | if (opx->segment != NO_SEG) { |
| 378 | uint64_t data = opx->offset; |
H. Peter Anvin | 89a2ac0 | 2013-11-26 18:23:20 -0800 | [diff] [blame] | 379 | out(offset, segment, &data, OUT_ADDRESS, asize, opx->segment, opx->wrt); |
Ben Rudiak-Gould | 4e8396b | 2013-03-01 10:28:32 +0400 | [diff] [blame] | 380 | } else { |
| 381 | uint8_t byte = opx->offset; |
| 382 | out(offset, segment, &byte, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
| 383 | } |
| 384 | } |
| 385 | |
H. Peter Anvin | 2d5baaa | 2008-09-30 16:31:06 -0700 | [diff] [blame] | 386 | static bool jmp_match(int32_t segment, int64_t offset, int bits, |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 387 | insn * ins, const struct itemplate *temp) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 388 | { |
Charles Crayne | 5fbbc8c | 2007-11-07 19:03:46 -0800 | [diff] [blame] | 389 | int64_t isize; |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 390 | const uint8_t *code = temp->code; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 391 | uint8_t c = code[0]; |
Jin Kyu Song | 305f3ce | 2013-11-21 19:40:42 -0800 | [diff] [blame] | 392 | bool is_byte; |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 393 | |
H. Peter Anvin | 755f521 | 2012-02-25 11:41:34 -0800 | [diff] [blame] | 394 | if (((c & ~1) != 0370) || (ins->oprs[0].type & STRICT)) |
H. Peter Anvin | 2d5baaa | 2008-09-30 16:31:06 -0700 | [diff] [blame] | 395 | return false; |
| 396 | if (!optimizing) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 397 | return false; |
H. Peter Anvin | 2d5baaa | 2008-09-30 16:31:06 -0700 | [diff] [blame] | 398 | if (optimizing < 0 && c == 0371) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 399 | return false; |
H. Peter Anvin | 2d5baaa | 2008-09-30 16:31:06 -0700 | [diff] [blame] | 400 | |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 401 | isize = calcsize(segment, offset, bits, ins, temp); |
Victor van den Elzen | ccafc3c | 2009-02-23 04:35:00 +0100 | [diff] [blame] | 402 | |
Victor van den Elzen | 154e592 | 2009-02-25 17:32:00 +0100 | [diff] [blame] | 403 | if (ins->oprs[0].opflags & OPFLAG_UNKNOWN) |
Victor van den Elzen | ccafc3c | 2009-02-23 04:35:00 +0100 | [diff] [blame] | 404 | /* Be optimistic in pass 1 */ |
| 405 | return true; |
| 406 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 407 | if (ins->oprs[0].segment != segment) |
H. Peter Anvin | 2d5baaa | 2008-09-30 16:31:06 -0700 | [diff] [blame] | 408 | return false; |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 409 | |
H. Peter Anvin | 2d5baaa | 2008-09-30 16:31:06 -0700 | [diff] [blame] | 410 | isize = ins->oprs[0].offset - offset - isize; /* isize is delta */ |
Jin Kyu Song | 305f3ce | 2013-11-21 19:40:42 -0800 | [diff] [blame] | 411 | is_byte = (isize >= -128 && isize <= 127); /* is it byte size? */ |
| 412 | |
| 413 | if (is_byte && c == 0371 && ins->prefixes[PPS_REP] == P_BND) { |
| 414 | /* jmp short (opcode eb) cannot be used with bnd prefix. */ |
| 415 | ins->prefixes[PPS_REP] = P_none; |
Jin Kyu Song | bb8cf3f | 2013-11-29 00:38:29 -0800 | [diff] [blame] | 416 | errfunc(ERR_WARNING | ERR_WARN_BND | ERR_PASS2 , |
| 417 | "jmp short does not init bnd regs - bnd prefix dropped."); |
Jin Kyu Song | 305f3ce | 2013-11-21 19:40:42 -0800 | [diff] [blame] | 418 | } |
| 419 | |
| 420 | return is_byte; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 421 | } |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 422 | |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 423 | int64_t assemble(int32_t segment, int64_t offset, int bits, iflag_t cp, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 424 | insn * instruction, struct ofmt *output, efunc error, |
| 425 | ListGen * listgen) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 426 | { |
H. Peter Anvin | 3360d79 | 2007-09-11 04:16:57 +0000 | [diff] [blame] | 427 | const struct itemplate *temp; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 428 | int j; |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 429 | enum match_result m; |
Charles Crayne | 1f8bc4c | 2007-11-06 18:27:23 -0800 | [diff] [blame] | 430 | int64_t insn_end; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 431 | int32_t itimes; |
Charles Crayne | 1f8bc4c | 2007-11-06 18:27:23 -0800 | [diff] [blame] | 432 | int64_t start = offset; |
Cyrill Gorcunov | bafd877 | 2009-10-31 20:02:14 +0300 | [diff] [blame] | 433 | int64_t wsize; /* size for DB etc. */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 434 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 435 | errfunc = error; /* to pass to other functions */ |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 436 | cpu = cp; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 437 | outfmt = output; /* likewise */ |
| 438 | list = listgen; /* and again */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 439 | |
Cyrill Gorcunov | bafd877 | 2009-10-31 20:02:14 +0300 | [diff] [blame] | 440 | wsize = idata_bytes(instruction->opcode); |
| 441 | if (wsize == -1) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 442 | return 0; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 443 | |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 444 | if (wsize) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 445 | extop *e; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 446 | int32_t t = instruction->times; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 447 | if (t < 0) |
| 448 | errfunc(ERR_PANIC, |
| 449 | "instruction->times < 0 (%ld) in assemble()", t); |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 450 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 451 | while (t--) { /* repeat TIMES times */ |
Cyrill Gorcunov | a92a3a5 | 2009-07-27 22:33:59 +0400 | [diff] [blame] | 452 | list_for_each(e, instruction->eops) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 453 | if (e->type == EOT_DB_NUMBER) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 454 | if (wsize > 8) { |
H. Peter Anvin | 3be5d85 | 2008-05-20 14:49:32 -0700 | [diff] [blame] | 455 | errfunc(ERR_NONFATAL, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 456 | "integer supplied to a DT, DO or DY" |
Keith Kanios | 61ff53c | 2007-04-14 18:54:52 +0000 | [diff] [blame] | 457 | " instruction"); |
H. Peter Anvin | 55ae120 | 2010-05-06 15:25:43 -0700 | [diff] [blame] | 458 | } else { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 459 | out(offset, segment, &e->offset, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 460 | OUT_ADDRESS, wsize, e->segment, e->wrt); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 461 | offset += wsize; |
| 462 | } |
H. Peter Anvin | 518df30 | 2008-06-14 16:53:48 -0700 | [diff] [blame] | 463 | } else if (e->type == EOT_DB_STRING || |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 464 | e->type == EOT_DB_STRING_FREE) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 465 | int align; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 466 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 467 | out(offset, segment, e->stringval, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 468 | OUT_RAWDATA, e->stringlen, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 469 | align = e->stringlen % wsize; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 470 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 471 | if (align) { |
| 472 | align = wsize - align; |
H. Peter Anvin | 999868f | 2009-02-09 11:03:33 +0100 | [diff] [blame] | 473 | out(offset, segment, zero_buffer, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 474 | OUT_RAWDATA, align, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 475 | } |
| 476 | offset += e->stringlen + align; |
| 477 | } |
| 478 | } |
| 479 | if (t > 0 && t == instruction->times - 1) { |
| 480 | /* |
| 481 | * Dummy call to list->output to give the offset to the |
| 482 | * listing module. |
| 483 | */ |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 484 | list->output(offset, NULL, OUT_RAWDATA, 0); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 485 | list->uplevel(LIST_TIMES); |
| 486 | } |
| 487 | } |
| 488 | if (instruction->times > 1) |
| 489 | list->downlevel(LIST_TIMES); |
| 490 | return offset - start; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 491 | } |
| 492 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 493 | if (instruction->opcode == I_INCBIN) { |
H. Peter Anvin | 518df30 | 2008-06-14 16:53:48 -0700 | [diff] [blame] | 494 | const char *fname = instruction->eops->stringval; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 495 | FILE *fp; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 496 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 497 | fp = fopen(fname, "rb"); |
| 498 | if (!fp) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 499 | error(ERR_NONFATAL, "`incbin': unable to open file `%s'", |
| 500 | fname); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 501 | } else if (fseek(fp, 0L, SEEK_END) < 0) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 502 | error(ERR_NONFATAL, "`incbin': unable to seek on file `%s'", |
| 503 | fname); |
Philipp Kloke | dae212d | 2013-03-31 12:02:30 +0200 | [diff] [blame] | 504 | fclose(fp); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 505 | } else { |
H. Peter Anvin | 518df30 | 2008-06-14 16:53:48 -0700 | [diff] [blame] | 506 | static char buf[4096]; |
| 507 | size_t t = instruction->times; |
| 508 | size_t base = 0; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 509 | size_t len; |
H. Peter Anvin | d7ed89e | 2002-04-30 20:52:08 +0000 | [diff] [blame] | 510 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 511 | len = ftell(fp); |
| 512 | if (instruction->eops->next) { |
| 513 | base = instruction->eops->next->offset; |
| 514 | len -= base; |
| 515 | if (instruction->eops->next->next && |
H. Peter Anvin | 518df30 | 2008-06-14 16:53:48 -0700 | [diff] [blame] | 516 | len > (size_t)instruction->eops->next->next->offset) |
| 517 | len = (size_t)instruction->eops->next->next->offset; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 518 | } |
| 519 | /* |
| 520 | * Dummy call to list->output to give the offset to the |
| 521 | * listing module. |
| 522 | */ |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 523 | list->output(offset, NULL, OUT_RAWDATA, 0); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 524 | list->uplevel(LIST_INCBIN); |
| 525 | while (t--) { |
H. Peter Anvin | 518df30 | 2008-06-14 16:53:48 -0700 | [diff] [blame] | 526 | size_t l; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 527 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 528 | fseek(fp, base, SEEK_SET); |
| 529 | l = len; |
| 530 | while (l > 0) { |
H. Peter Anvin | 4a5a6df | 2009-06-27 16:14:18 -0700 | [diff] [blame] | 531 | int32_t m; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 532 | m = fread(buf, 1, l > sizeof(buf) ? sizeof(buf) : l, fp); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 533 | if (!m) { |
| 534 | /* |
| 535 | * This shouldn't happen unless the file |
| 536 | * actually changes while we are reading |
| 537 | * it. |
| 538 | */ |
| 539 | error(ERR_NONFATAL, |
| 540 | "`incbin': unexpected EOF while" |
| 541 | " reading file `%s'", fname); |
| 542 | t = 0; /* Try to exit cleanly */ |
| 543 | break; |
| 544 | } |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 545 | out(offset, segment, buf, OUT_RAWDATA, m, |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 546 | NO_SEG, NO_SEG); |
| 547 | l -= m; |
| 548 | } |
| 549 | } |
| 550 | list->downlevel(LIST_INCBIN); |
| 551 | if (instruction->times > 1) { |
| 552 | /* |
| 553 | * Dummy call to list->output to give the offset to the |
| 554 | * listing module. |
| 555 | */ |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 556 | list->output(offset, NULL, OUT_RAWDATA, 0); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 557 | list->uplevel(LIST_TIMES); |
| 558 | list->downlevel(LIST_TIMES); |
| 559 | } |
| 560 | fclose(fp); |
| 561 | return instruction->times * len; |
| 562 | } |
| 563 | return 0; /* if we're here, there's an error */ |
H. Peter Anvin | d7ed89e | 2002-04-30 20:52:08 +0000 | [diff] [blame] | 564 | } |
| 565 | |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 566 | /* Check to see if we need an address-size prefix */ |
| 567 | add_asp(instruction, bits); |
| 568 | |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 569 | m = find_match(&temp, instruction, segment, offset, bits); |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 570 | |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 571 | if (m == MOK_GOOD) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 572 | /* Matches! */ |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 573 | int64_t insn_size = calcsize(segment, offset, bits, instruction, temp); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 574 | itimes = instruction->times; |
| 575 | if (insn_size < 0) /* shouldn't be, on pass two */ |
| 576 | error(ERR_PANIC, "errors made it through from pass one"); |
| 577 | else |
| 578 | while (itimes--) { |
| 579 | for (j = 0; j < MAXPREFIX; j++) { |
| 580 | uint8_t c = 0; |
| 581 | switch (instruction->prefixes[j]) { |
| 582 | case P_WAIT: |
| 583 | c = 0x9B; |
| 584 | break; |
| 585 | case P_LOCK: |
| 586 | c = 0xF0; |
| 587 | break; |
| 588 | case P_REPNE: |
| 589 | case P_REPNZ: |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 590 | case P_XACQUIRE: |
Jin Kyu Song | 0304109 | 2013-10-15 19:38:51 -0700 | [diff] [blame] | 591 | case P_BND: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 592 | c = 0xF2; |
| 593 | break; |
| 594 | case P_REPE: |
| 595 | case P_REPZ: |
| 596 | case P_REP: |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 597 | case P_XRELEASE: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 598 | c = 0xF3; |
| 599 | break; |
| 600 | case R_CS: |
| 601 | if (bits == 64) { |
| 602 | error(ERR_WARNING | ERR_PASS2, |
| 603 | "cs segment base generated, but will be ignored in 64-bit mode"); |
| 604 | } |
| 605 | c = 0x2E; |
| 606 | break; |
| 607 | case R_DS: |
| 608 | if (bits == 64) { |
| 609 | error(ERR_WARNING | ERR_PASS2, |
| 610 | "ds segment base generated, but will be ignored in 64-bit mode"); |
| 611 | } |
| 612 | c = 0x3E; |
| 613 | break; |
| 614 | case R_ES: |
| 615 | if (bits == 64) { |
| 616 | error(ERR_WARNING | ERR_PASS2, |
| 617 | "es segment base generated, but will be ignored in 64-bit mode"); |
| 618 | } |
| 619 | c = 0x26; |
| 620 | break; |
| 621 | case R_FS: |
| 622 | c = 0x64; |
| 623 | break; |
| 624 | case R_GS: |
| 625 | c = 0x65; |
| 626 | break; |
| 627 | case R_SS: |
| 628 | if (bits == 64) { |
| 629 | error(ERR_WARNING | ERR_PASS2, |
| 630 | "ss segment base generated, but will be ignored in 64-bit mode"); |
| 631 | } |
| 632 | c = 0x36; |
| 633 | break; |
| 634 | case R_SEGR6: |
| 635 | case R_SEGR7: |
| 636 | error(ERR_NONFATAL, |
| 637 | "segr6 and segr7 cannot be used as prefixes"); |
| 638 | break; |
| 639 | case P_A16: |
| 640 | if (bits == 64) { |
| 641 | error(ERR_NONFATAL, |
| 642 | "16-bit addressing is not supported " |
| 643 | "in 64-bit mode"); |
| 644 | } else if (bits != 16) |
| 645 | c = 0x67; |
| 646 | break; |
| 647 | case P_A32: |
| 648 | if (bits != 32) |
| 649 | c = 0x67; |
| 650 | break; |
| 651 | case P_A64: |
| 652 | if (bits != 64) { |
| 653 | error(ERR_NONFATAL, |
| 654 | "64-bit addressing is only supported " |
| 655 | "in 64-bit mode"); |
| 656 | } |
| 657 | break; |
| 658 | case P_ASP: |
| 659 | c = 0x67; |
| 660 | break; |
| 661 | case P_O16: |
| 662 | if (bits != 16) |
| 663 | c = 0x66; |
| 664 | break; |
| 665 | case P_O32: |
| 666 | if (bits == 16) |
| 667 | c = 0x66; |
| 668 | break; |
| 669 | case P_O64: |
| 670 | /* REX.W */ |
| 671 | break; |
| 672 | case P_OSP: |
| 673 | c = 0x66; |
| 674 | break; |
Jin Kyu Song | 945b1b8 | 2013-10-25 19:29:53 -0700 | [diff] [blame] | 675 | case P_EVEX: |
H. Peter Anvin | 621a69a | 2013-11-28 12:11:24 -0800 | [diff] [blame] | 676 | case P_VEX3: |
| 677 | case P_VEX2: |
Jin Kyu Song | b287ff0 | 2013-12-04 20:05:55 -0800 | [diff] [blame] | 678 | case P_NOBND: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 679 | case P_none: |
| 680 | break; |
| 681 | default: |
| 682 | error(ERR_PANIC, "invalid instruction prefix"); |
| 683 | } |
| 684 | if (c != 0) { |
| 685 | out(offset, segment, &c, OUT_RAWDATA, 1, |
| 686 | NO_SEG, NO_SEG); |
| 687 | offset++; |
| 688 | } |
| 689 | } |
| 690 | insn_end = offset + insn_size; |
| 691 | gencode(segment, offset, bits, instruction, |
| 692 | temp, insn_end); |
| 693 | offset += insn_size; |
| 694 | if (itimes > 0 && itimes == instruction->times - 1) { |
| 695 | /* |
| 696 | * Dummy call to list->output to give the offset to the |
| 697 | * listing module. |
| 698 | */ |
| 699 | list->output(offset, NULL, OUT_RAWDATA, 0); |
| 700 | list->uplevel(LIST_TIMES); |
| 701 | } |
| 702 | } |
| 703 | if (instruction->times > 1) |
| 704 | list->downlevel(LIST_TIMES); |
| 705 | return offset - start; |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 706 | } else { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 707 | /* No match */ |
| 708 | switch (m) { |
| 709 | case MERR_OPSIZEMISSING: |
| 710 | error(ERR_NONFATAL, "operation size not specified"); |
| 711 | break; |
| 712 | case MERR_OPSIZEMISMATCH: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 713 | error(ERR_NONFATAL, "mismatch in operand sizes"); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 714 | break; |
Jin Kyu Song | 25c2212 | 2013-10-30 03:12:45 -0700 | [diff] [blame] | 715 | case MERR_BRNUMMISMATCH: |
| 716 | error(ERR_NONFATAL, |
| 717 | "mismatch in the number of broadcasting elements"); |
| 718 | break; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 719 | case MERR_BADCPU: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 720 | error(ERR_NONFATAL, "no instruction for this cpu level"); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 721 | break; |
| 722 | case MERR_BADMODE: |
H. Peter Anvin | 6cda414 | 2008-12-29 20:52:28 -0800 | [diff] [blame] | 723 | error(ERR_NONFATAL, "instruction not supported in %d-bit mode", |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 724 | bits); |
| 725 | break; |
Jin Kyu Song | 6cfa968 | 2013-11-26 17:27:48 -0800 | [diff] [blame] | 726 | case MERR_ENCMISMATCH: |
| 727 | error(ERR_NONFATAL, "specific encoding scheme not available"); |
| 728 | break; |
Jin Kyu Song | 305f3ce | 2013-11-21 19:40:42 -0800 | [diff] [blame] | 729 | case MERR_BADBND: |
| 730 | error(ERR_NONFATAL, "bnd prefix is not allowed"); |
| 731 | break; |
Jin Kyu Song | b287ff0 | 2013-12-04 20:05:55 -0800 | [diff] [blame] | 732 | case MERR_BADREPNE: |
| 733 | error(ERR_NONFATAL, "%s prefix is not allowed", |
| 734 | (has_prefix(instruction, PPS_REP, P_REPNE) ? |
| 735 | "repne" : "repnz")); |
| 736 | break; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 737 | default: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 738 | error(ERR_NONFATAL, |
| 739 | "invalid combination of opcode and operands"); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 740 | break; |
| 741 | } |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 742 | } |
| 743 | return 0; |
| 744 | } |
| 745 | |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 746 | int64_t insn_size(int32_t segment, int64_t offset, int bits, iflag_t cp, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 747 | insn * instruction, efunc error) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 748 | { |
H. Peter Anvin | 3360d79 | 2007-09-11 04:16:57 +0000 | [diff] [blame] | 749 | const struct itemplate *temp; |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 750 | enum match_result m; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 751 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 752 | errfunc = error; /* to pass to other functions */ |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 753 | cpu = cp; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 754 | |
Cyrill Gorcunov | 3757524 | 2009-08-16 12:00:01 +0400 | [diff] [blame] | 755 | if (instruction->opcode == I_none) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 756 | return 0; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 757 | |
H. Peter Anvin | cfbe7c3 | 2007-09-18 17:49:09 -0700 | [diff] [blame] | 758 | if (instruction->opcode == I_DB || instruction->opcode == I_DW || |
| 759 | instruction->opcode == I_DD || instruction->opcode == I_DQ || |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 760 | instruction->opcode == I_DT || instruction->opcode == I_DO || |
| 761 | instruction->opcode == I_DY) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 762 | extop *e; |
Cyrill Gorcunov | bafd877 | 2009-10-31 20:02:14 +0300 | [diff] [blame] | 763 | int32_t isize, osize, wsize; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 764 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 765 | isize = 0; |
Cyrill Gorcunov | bafd877 | 2009-10-31 20:02:14 +0300 | [diff] [blame] | 766 | wsize = idata_bytes(instruction->opcode); |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 767 | |
Cyrill Gorcunov | a92a3a5 | 2009-07-27 22:33:59 +0400 | [diff] [blame] | 768 | list_for_each(e, instruction->eops) { |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 769 | int32_t align; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 770 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 771 | osize = 0; |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 772 | if (e->type == EOT_DB_NUMBER) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 773 | osize = 1; |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 774 | warn_overflow_const(e->offset, wsize); |
| 775 | } else if (e->type == EOT_DB_STRING || |
| 776 | e->type == EOT_DB_STRING_FREE) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 777 | osize = e->stringlen; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 778 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 779 | align = (-osize) % wsize; |
| 780 | if (align < 0) |
| 781 | align += wsize; |
| 782 | isize += osize + align; |
| 783 | } |
| 784 | return isize * instruction->times; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 785 | } |
| 786 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 787 | if (instruction->opcode == I_INCBIN) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 788 | const char *fname = instruction->eops->stringval; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 789 | FILE *fp; |
Cyrill Gorcunov | 6531d6d | 2009-12-05 14:04:55 +0300 | [diff] [blame] | 790 | int64_t val = 0; |
H. Peter Anvin | 518df30 | 2008-06-14 16:53:48 -0700 | [diff] [blame] | 791 | size_t len; |
H. Peter Anvin | d7ed89e | 2002-04-30 20:52:08 +0000 | [diff] [blame] | 792 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 793 | fp = fopen(fname, "rb"); |
| 794 | if (!fp) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 795 | error(ERR_NONFATAL, "`incbin': unable to open file `%s'", |
| 796 | fname); |
| 797 | else if (fseek(fp, 0L, SEEK_END) < 0) |
| 798 | error(ERR_NONFATAL, "`incbin': unable to seek on file `%s'", |
| 799 | fname); |
| 800 | else { |
| 801 | len = ftell(fp); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 802 | if (instruction->eops->next) { |
| 803 | len -= instruction->eops->next->offset; |
| 804 | if (instruction->eops->next->next && |
H. Peter Anvin | 518df30 | 2008-06-14 16:53:48 -0700 | [diff] [blame] | 805 | len > (size_t)instruction->eops->next->next->offset) { |
| 806 | len = (size_t)instruction->eops->next->next->offset; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 807 | } |
| 808 | } |
Cyrill Gorcunov | 6531d6d | 2009-12-05 14:04:55 +0300 | [diff] [blame] | 809 | val = instruction->times * len; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 810 | } |
Cyrill Gorcunov | 6531d6d | 2009-12-05 14:04:55 +0300 | [diff] [blame] | 811 | if (fp) |
| 812 | fclose(fp); |
| 813 | return val; |
H. Peter Anvin | d7ed89e | 2002-04-30 20:52:08 +0000 | [diff] [blame] | 814 | } |
| 815 | |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 816 | /* Check to see if we need an address-size prefix */ |
| 817 | add_asp(instruction, bits); |
| 818 | |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 819 | m = find_match(&temp, instruction, segment, offset, bits); |
| 820 | if (m == MOK_GOOD) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 821 | /* we've matched an instruction. */ |
| 822 | int64_t isize; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 823 | int j; |
Victor van den Elzen | 0d268fb | 2010-01-24 21:24:57 +0100 | [diff] [blame] | 824 | |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 825 | isize = calcsize(segment, offset, bits, instruction, temp); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 826 | if (isize < 0) |
| 827 | return -1; |
| 828 | for (j = 0; j < MAXPREFIX; j++) { |
| 829 | switch (instruction->prefixes[j]) { |
| 830 | case P_A16: |
| 831 | if (bits != 16) |
| 832 | isize++; |
| 833 | break; |
| 834 | case P_A32: |
| 835 | if (bits != 32) |
| 836 | isize++; |
| 837 | break; |
| 838 | case P_O16: |
| 839 | if (bits != 16) |
| 840 | isize++; |
| 841 | break; |
| 842 | case P_O32: |
| 843 | if (bits == 16) |
| 844 | isize++; |
| 845 | break; |
| 846 | case P_A64: |
| 847 | case P_O64: |
Jin Kyu Song | 945b1b8 | 2013-10-25 19:29:53 -0700 | [diff] [blame] | 848 | case P_EVEX: |
H. Peter Anvin | 621a69a | 2013-11-28 12:11:24 -0800 | [diff] [blame] | 849 | case P_VEX3: |
| 850 | case P_VEX2: |
Jin Kyu Song | b287ff0 | 2013-12-04 20:05:55 -0800 | [diff] [blame] | 851 | case P_NOBND: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 852 | case P_none: |
| 853 | break; |
| 854 | default: |
| 855 | isize++; |
| 856 | break; |
| 857 | } |
| 858 | } |
| 859 | return isize * instruction->times; |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 860 | } else { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 861 | return -1; /* didn't match any instruction */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 862 | } |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 863 | } |
| 864 | |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 865 | static void bad_hle_warn(const insn * ins, uint8_t hleok) |
| 866 | { |
| 867 | enum prefixes rep_pfx = ins->prefixes[PPS_REP]; |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 868 | enum whatwarn { w_none, w_lock, w_inval } ww; |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 869 | static const enum whatwarn warn[2][4] = |
| 870 | { |
| 871 | { w_inval, w_inval, w_none, w_lock }, /* XACQUIRE */ |
| 872 | { w_inval, w_none, w_none, w_lock }, /* XRELEASE */ |
| 873 | }; |
| 874 | unsigned int n; |
| 875 | |
| 876 | n = (unsigned int)rep_pfx - P_XACQUIRE; |
| 877 | if (n > 1) |
| 878 | return; /* Not XACQUIRE/XRELEASE */ |
| 879 | |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 880 | ww = warn[n][hleok]; |
| 881 | if (!is_class(MEMORY, ins->oprs[0].type)) |
| 882 | ww = w_inval; /* HLE requires operand 0 to be memory */ |
| 883 | |
| 884 | switch (ww) { |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 885 | case w_none: |
| 886 | break; |
| 887 | |
| 888 | case w_lock: |
| 889 | if (ins->prefixes[PPS_LOCK] != P_LOCK) { |
H. Peter Anvin | 5a24fdd | 2012-02-25 15:10:04 -0800 | [diff] [blame] | 890 | errfunc(ERR_WARNING | ERR_WARN_HLE | ERR_PASS2, |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 891 | "%s with this instruction requires lock", |
| 892 | prefix_name(rep_pfx)); |
| 893 | } |
| 894 | break; |
| 895 | |
| 896 | case w_inval: |
H. Peter Anvin | 5a24fdd | 2012-02-25 15:10:04 -0800 | [diff] [blame] | 897 | errfunc(ERR_WARNING | ERR_WARN_HLE | ERR_PASS2, |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 898 | "%s invalid with this instruction", |
| 899 | prefix_name(rep_pfx)); |
| 900 | break; |
| 901 | } |
| 902 | } |
| 903 | |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 904 | /* Common construct */ |
Cyrill Gorcunov | 62576a0 | 2012-12-02 02:47:16 +0400 | [diff] [blame] | 905 | #define case3(x) case (x): case (x)+1: case (x)+2 |
| 906 | #define case4(x) case3(x): case (x)+3 |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 907 | |
Charles Crayne | 1f8bc4c | 2007-11-06 18:27:23 -0800 | [diff] [blame] | 908 | static int64_t calcsize(int32_t segment, int64_t offset, int bits, |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 909 | insn * ins, const struct itemplate *temp) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 910 | { |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 911 | const uint8_t *codes = temp->code; |
Charles Crayne | 1f8bc4c | 2007-11-06 18:27:23 -0800 | [diff] [blame] | 912 | int64_t length = 0; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 913 | uint8_t c; |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 914 | int rex_mask = ~0; |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 915 | int op1, op2; |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 916 | struct operand *opx; |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 917 | uint8_t opex = 0; |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 918 | enum ea_type eat; |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 919 | uint8_t hleok = 0; |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 920 | bool lockcheck = true; |
Jin Kyu Song | 164d607 | 2013-10-15 19:10:13 -0700 | [diff] [blame] | 921 | enum reg_enum mib_index = R_none; /* For a separate index MIB reg form */ |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 922 | |
H. Peter Anvin | e3917fc | 2007-11-01 14:53:32 -0700 | [diff] [blame] | 923 | ins->rex = 0; /* Ensure REX is reset */ |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 924 | eat = EA_SCALAR; /* Expect a scalar EA */ |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 925 | memset(ins->evex_p, 0, 3); /* Ensure EVEX is reset */ |
H. Peter Anvin | e3917fc | 2007-11-01 14:53:32 -0700 | [diff] [blame] | 926 | |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 927 | if (ins->prefixes[PPS_OSIZE] == P_O64) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 928 | ins->rex |= REX_W; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 929 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 930 | (void)segment; /* Don't warn that this parameter is unused */ |
| 931 | (void)offset; /* Don't warn that this parameter is unused */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 932 | |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 933 | while (*codes) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 934 | c = *codes++; |
| 935 | op1 = (c & 3) + ((opex & 1) << 2); |
| 936 | op2 = ((c >> 3) & 3) + ((opex & 2) << 1); |
| 937 | opx = &ins->oprs[op1]; |
| 938 | opex = 0; /* For the next iteration */ |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 939 | |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 940 | switch (c) { |
Cyrill Gorcunov | 59df421 | 2012-12-02 02:51:18 +0400 | [diff] [blame] | 941 | case4(01): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 942 | codes += c, length += c; |
| 943 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 944 | |
Cyrill Gorcunov | 59df421 | 2012-12-02 02:51:18 +0400 | [diff] [blame] | 945 | case3(05): |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 946 | opex = c; |
| 947 | break; |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 948 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 949 | case4(010): |
| 950 | ins->rex |= |
| 951 | op_rexflags(opx, REX_B|REX_H|REX_P|REX_W); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 952 | codes++, length++; |
| 953 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 954 | |
Jin Kyu Song | 164d607 | 2013-10-15 19:10:13 -0700 | [diff] [blame] | 955 | case4(014): |
| 956 | /* this is an index reg of MIB operand */ |
| 957 | mib_index = opx->basereg; |
| 958 | break; |
| 959 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 960 | case4(020): |
| 961 | case4(024): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 962 | length++; |
| 963 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 964 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 965 | case4(030): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 966 | length += 2; |
| 967 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 968 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 969 | case4(034): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 970 | if (opx->type & (BITS16 | BITS32 | BITS64)) |
| 971 | length += (opx->type & BITS16) ? 2 : 4; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 972 | else |
| 973 | length += (bits == 16) ? 2 : 4; |
| 974 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 975 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 976 | case4(040): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 977 | length += 4; |
| 978 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 979 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 980 | case4(044): |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 981 | length += ins->addr_size >> 3; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 982 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 983 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 984 | case4(050): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 985 | length++; |
| 986 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 987 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 988 | case4(054): |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 989 | length += 8; /* MOV reg64/imm */ |
| 990 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 991 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 992 | case4(060): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 993 | length += 2; |
| 994 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 995 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 996 | case4(064): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 997 | if (opx->type & (BITS16 | BITS32 | BITS64)) |
| 998 | length += (opx->type & BITS16) ? 2 : 4; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 999 | else |
| 1000 | length += (bits == 16) ? 2 : 4; |
| 1001 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1002 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1003 | case4(070): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1004 | length += 4; |
| 1005 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1006 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1007 | case4(074): |
H. Peter Anvin | 7eb4a38 | 2007-09-17 15:49:30 -0700 | [diff] [blame] | 1008 | length += 2; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1009 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1010 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1011 | case 0172: |
| 1012 | case 0173: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1013 | codes++; |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1014 | length++; |
| 1015 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1016 | |
H. Peter Anvin | cffe61e | 2011-07-07 17:21:24 -0700 | [diff] [blame] | 1017 | case4(0174): |
| 1018 | length++; |
| 1019 | break; |
| 1020 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1021 | case4(0240): |
| 1022 | ins->rex |= REX_EV; |
| 1023 | ins->vexreg = regval(opx); |
| 1024 | ins->evex_p[2] |= op_evexflags(opx, EVEX_P2VP, 2); /* High-16 NDS */ |
| 1025 | ins->vex_cm = *codes++; |
| 1026 | ins->vex_wlp = *codes++; |
| 1027 | ins->evex_tuple = (*codes++ - 0300); |
| 1028 | break; |
| 1029 | |
| 1030 | case 0250: |
| 1031 | ins->rex |= REX_EV; |
| 1032 | ins->vexreg = 0; |
| 1033 | ins->vex_cm = *codes++; |
| 1034 | ins->vex_wlp = *codes++; |
| 1035 | ins->evex_tuple = (*codes++ - 0300); |
| 1036 | break; |
| 1037 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1038 | case4(0254): |
| 1039 | length += 4; |
| 1040 | break; |
| 1041 | |
| 1042 | case4(0260): |
| 1043 | ins->rex |= REX_V; |
H. Peter Anvin | fc56120 | 2011-07-07 16:58:22 -0700 | [diff] [blame] | 1044 | ins->vexreg = regval(opx); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1045 | ins->vex_cm = *codes++; |
| 1046 | ins->vex_wlp = *codes++; |
| 1047 | break; |
| 1048 | |
| 1049 | case 0270: |
| 1050 | ins->rex |= REX_V; |
H. Peter Anvin | fc56120 | 2011-07-07 16:58:22 -0700 | [diff] [blame] | 1051 | ins->vexreg = 0; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1052 | ins->vex_cm = *codes++; |
| 1053 | ins->vex_wlp = *codes++; |
| 1054 | break; |
| 1055 | |
Cyrill Gorcunov | 59df421 | 2012-12-02 02:51:18 +0400 | [diff] [blame] | 1056 | case3(0271): |
H. Peter Anvin | 574784d | 2012-02-25 22:33:46 -0800 | [diff] [blame] | 1057 | hleok = c & 3; |
| 1058 | break; |
| 1059 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1060 | case4(0274): |
| 1061 | length++; |
| 1062 | break; |
| 1063 | |
| 1064 | case4(0300): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1065 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1066 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1067 | case 0310: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1068 | if (bits == 64) |
| 1069 | return -1; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 1070 | length += (bits != 16) && !has_prefix(ins, PPS_ASIZE, P_A16); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1071 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1072 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1073 | case 0311: |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 1074 | length += (bits != 32) && !has_prefix(ins, PPS_ASIZE, P_A32); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1075 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1076 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1077 | case 0312: |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 1078 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1079 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1080 | case 0313: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1081 | if (bits != 64 || has_prefix(ins, PPS_ASIZE, P_A16) || |
| 1082 | has_prefix(ins, PPS_ASIZE, P_A32)) |
| 1083 | return -1; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1084 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1085 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1086 | case4(0314): |
| 1087 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1088 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1089 | case 0320: |
Victor van den Elzen | 6dfbddb | 2010-12-29 17:13:38 +0000 | [diff] [blame] | 1090 | { |
| 1091 | enum prefixes pfx = ins->prefixes[PPS_OSIZE]; |
| 1092 | if (pfx == P_O16) |
| 1093 | break; |
| 1094 | if (pfx != P_none) |
| 1095 | errfunc(ERR_WARNING | ERR_PASS2, "invalid operand size prefix"); |
| 1096 | else |
| 1097 | ins->prefixes[PPS_OSIZE] = P_O16; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1098 | break; |
Victor van den Elzen | 6dfbddb | 2010-12-29 17:13:38 +0000 | [diff] [blame] | 1099 | } |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1100 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1101 | case 0321: |
Victor van den Elzen | 6dfbddb | 2010-12-29 17:13:38 +0000 | [diff] [blame] | 1102 | { |
| 1103 | enum prefixes pfx = ins->prefixes[PPS_OSIZE]; |
| 1104 | if (pfx == P_O32) |
| 1105 | break; |
| 1106 | if (pfx != P_none) |
| 1107 | errfunc(ERR_WARNING | ERR_PASS2, "invalid operand size prefix"); |
| 1108 | else |
| 1109 | ins->prefixes[PPS_OSIZE] = P_O32; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1110 | break; |
Victor van den Elzen | 6dfbddb | 2010-12-29 17:13:38 +0000 | [diff] [blame] | 1111 | } |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1112 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1113 | case 0322: |
| 1114 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1115 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1116 | case 0323: |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1117 | rex_mask &= ~REX_W; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1118 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1119 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1120 | case 0324: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1121 | ins->rex |= REX_W; |
H. Peter Anvin | 8d7316a | 2007-04-18 02:27:18 +0000 | [diff] [blame] | 1122 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1123 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1124 | case 0325: |
| 1125 | ins->rex |= REX_NH; |
| 1126 | break; |
H. Peter Anvin | 9472dab | 2009-06-24 21:38:29 -0700 | [diff] [blame] | 1127 | |
Ben Rudiak-Gould | d7ab1f9 | 2013-02-20 23:25:54 +0400 | [diff] [blame] | 1128 | case 0326: |
| 1129 | break; |
| 1130 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1131 | case 0330: |
| 1132 | codes++, length++; |
| 1133 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1134 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1135 | case 0331: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1136 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1137 | |
H. Peter Anvin | cb9b690 | 2007-09-12 21:58:51 -0700 | [diff] [blame] | 1138 | case 0332: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1139 | case 0333: |
| 1140 | length++; |
| 1141 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1142 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1143 | case 0334: |
| 1144 | ins->rex |= REX_L; |
| 1145 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1146 | |
H. Peter Anvin | cb9b690 | 2007-09-12 21:58:51 -0700 | [diff] [blame] | 1147 | case 0335: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1148 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1149 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1150 | case 0336: |
H. Peter Anvin | 10da41e | 2012-02-24 20:57:04 -0800 | [diff] [blame] | 1151 | if (!ins->prefixes[PPS_REP]) |
| 1152 | ins->prefixes[PPS_REP] = P_REP; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1153 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1154 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1155 | case 0337: |
H. Peter Anvin | 10da41e | 2012-02-24 20:57:04 -0800 | [diff] [blame] | 1156 | if (!ins->prefixes[PPS_REP]) |
| 1157 | ins->prefixes[PPS_REP] = P_REPNE; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1158 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1159 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1160 | case 0340: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1161 | if (ins->oprs[0].segment != NO_SEG) |
| 1162 | errfunc(ERR_NONFATAL, "attempt to reserve non-constant" |
| 1163 | " quantity of BSS space"); |
| 1164 | else |
H. Peter Anvin | 428fd67 | 2007-11-15 10:25:52 -0800 | [diff] [blame] | 1165 | length += ins->oprs[0].offset; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1166 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1167 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1168 | case 0341: |
| 1169 | if (!ins->prefixes[PPS_WAIT]) |
| 1170 | ins->prefixes[PPS_WAIT] = P_WAIT; |
| 1171 | break; |
H. Peter Anvin | c2acf7b | 2009-02-21 18:22:56 -0800 | [diff] [blame] | 1172 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1173 | case 0360: |
| 1174 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1175 | |
Ben Rudiak-Gould | 94ba02f | 2013-03-10 21:46:12 +0400 | [diff] [blame] | 1176 | case 0361: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1177 | length++; |
| 1178 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1179 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1180 | case 0364: |
| 1181 | case 0365: |
| 1182 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1183 | |
Keith Kanios | 48af177 | 2007-08-17 07:37:52 +0000 | [diff] [blame] | 1184 | case 0366: |
H. Peter Anvin | 62cb606 | 2007-09-11 22:44:03 +0000 | [diff] [blame] | 1185 | case 0367: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1186 | length++; |
| 1187 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1188 | |
Jin Kyu Song | b4e1ae1 | 2013-11-08 13:31:58 -0800 | [diff] [blame] | 1189 | case 0370: |
| 1190 | case 0371: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1191 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1192 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1193 | case 0373: |
| 1194 | length++; |
| 1195 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1196 | |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 1197 | case 0374: |
| 1198 | eat = EA_XMMVSIB; |
| 1199 | break; |
| 1200 | |
| 1201 | case 0375: |
| 1202 | eat = EA_YMMVSIB; |
| 1203 | break; |
| 1204 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1205 | case 0376: |
| 1206 | eat = EA_ZMMVSIB; |
| 1207 | break; |
| 1208 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1209 | case4(0100): |
| 1210 | case4(0110): |
| 1211 | case4(0120): |
| 1212 | case4(0130): |
| 1213 | case4(0200): |
| 1214 | case4(0204): |
| 1215 | case4(0210): |
| 1216 | case4(0214): |
| 1217 | case4(0220): |
| 1218 | case4(0224): |
| 1219 | case4(0230): |
| 1220 | case4(0234): |
| 1221 | { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1222 | ea ea_data; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1223 | int rfield; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1224 | opflags_t rflags; |
| 1225 | struct operand *opy = &ins->oprs[op2]; |
Jin Kyu Song | e3a06b9 | 2013-08-28 19:15:23 -0700 | [diff] [blame] | 1226 | struct operand *op_er_sae; |
H. Peter Anvin | ae64c9d | 2008-10-25 00:41:00 -0700 | [diff] [blame] | 1227 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1228 | ea_data.rex = 0; /* Ensure ea.REX is initially 0 */ |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 1229 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1230 | if (c <= 0177) { |
| 1231 | /* pick rfield from operand b (opx) */ |
| 1232 | rflags = regflag(opx); |
| 1233 | rfield = nasm_regvals[opx->basereg]; |
| 1234 | } else { |
| 1235 | rflags = 0; |
| 1236 | rfield = c & 7; |
| 1237 | } |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1238 | |
Jin Kyu Song | e3a06b9 | 2013-08-28 19:15:23 -0700 | [diff] [blame] | 1239 | /* EVEX.b1 : evex_brerop contains the operand position */ |
| 1240 | op_er_sae = (ins->evex_brerop >= 0 ? |
| 1241 | &ins->oprs[ins->evex_brerop] : NULL); |
| 1242 | |
Jin Kyu Song | c47ef94 | 2013-08-30 18:10:35 -0700 | [diff] [blame] | 1243 | if (op_er_sae && (op_er_sae->decoflags & (ER | SAE))) { |
| 1244 | /* set EVEX.b */ |
| 1245 | ins->evex_p[2] |= EVEX_P2B; |
| 1246 | if (op_er_sae->decoflags & ER) { |
| 1247 | /* set EVEX.RC (rounding control) */ |
| 1248 | ins->evex_p[2] |= ((ins->evex_rm - BRC_RN) << 5) |
| 1249 | & EVEX_P2RC; |
| 1250 | } |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1251 | } else { |
| 1252 | /* set EVEX.L'L (vector length) */ |
| 1253 | ins->evex_p[2] |= ((ins->vex_wlp << (5 - 2)) & EVEX_P2LL); |
Jin Kyu Song | 5f3bfee | 2013-11-20 15:32:52 -0800 | [diff] [blame] | 1254 | ins->evex_p[1] |= ((ins->vex_wlp << (7 - 4)) & EVEX_P1W); |
Jin Kyu Song | c47ef94 | 2013-08-30 18:10:35 -0700 | [diff] [blame] | 1255 | if (opy->decoflags & BRDCAST_MASK) { |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1256 | /* set EVEX.b */ |
| 1257 | ins->evex_p[2] |= EVEX_P2B; |
| 1258 | } |
| 1259 | } |
| 1260 | |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 1261 | if (itemp_has(temp, IF_MIB)) { |
| 1262 | opy->eaflags |= EAF_MIB; |
| 1263 | /* |
| 1264 | * if a separate form of MIB (ICC style) is used, |
| 1265 | * the index reg info is merged into mem operand |
| 1266 | */ |
| 1267 | if (mib_index != R_none) { |
| 1268 | opy->indexreg = mib_index; |
| 1269 | opy->scale = 1; |
| 1270 | opy->hintbase = mib_index; |
| 1271 | opy->hinttype = EAH_NOTBASE; |
| 1272 | } |
Jin Kyu Song | 3b65323 | 2013-11-08 11:41:12 -0800 | [diff] [blame] | 1273 | } |
| 1274 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1275 | if (process_ea(opy, &ea_data, bits, |
| 1276 | rfield, rflags, ins) != eat) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1277 | errfunc(ERR_NONFATAL, "invalid effective address"); |
| 1278 | return -1; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1279 | } else { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1280 | ins->rex |= ea_data.rex; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1281 | length += ea_data.size; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1282 | } |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1283 | } |
| 1284 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1285 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1286 | default: |
| 1287 | errfunc(ERR_PANIC, "internal instruction table corrupt" |
| 1288 | ": instruction code \\%o (0x%02X) given", c, c); |
| 1289 | break; |
| 1290 | } |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1291 | } |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 1292 | |
H. Peter Anvin | 0db11e2 | 2007-04-17 20:23:11 +0000 | [diff] [blame] | 1293 | ins->rex &= rex_mask; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 1294 | |
H. Peter Anvin | 9472dab | 2009-06-24 21:38:29 -0700 | [diff] [blame] | 1295 | if (ins->rex & REX_NH) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1296 | if (ins->rex & REX_H) { |
| 1297 | errfunc(ERR_NONFATAL, "instruction cannot use high registers"); |
| 1298 | return -1; |
| 1299 | } |
| 1300 | ins->rex &= ~REX_P; /* Don't force REX prefix due to high reg */ |
H. Peter Anvin | 9472dab | 2009-06-24 21:38:29 -0700 | [diff] [blame] | 1301 | } |
| 1302 | |
H. Peter Anvin | 621a69a | 2013-11-28 12:11:24 -0800 | [diff] [blame] | 1303 | switch (ins->prefixes[PPS_VEX]) { |
| 1304 | case P_EVEX: |
| 1305 | if (!(ins->rex & REX_EV)) |
| 1306 | return -1; |
| 1307 | break; |
| 1308 | case P_VEX3: |
| 1309 | case P_VEX2: |
| 1310 | if (!(ins->rex & REX_V)) |
| 1311 | return -1; |
| 1312 | break; |
| 1313 | default: |
| 1314 | break; |
| 1315 | } |
| 1316 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1317 | if (ins->rex & (REX_V | REX_EV)) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1318 | int bad32 = REX_R|REX_W|REX_X|REX_B; |
H. Peter Anvin | d85d250 | 2008-05-04 17:53:31 -0700 | [diff] [blame] | 1319 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1320 | if (ins->rex & REX_H) { |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1321 | errfunc(ERR_NONFATAL, "cannot use high register in AVX instruction"); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1322 | return -1; |
| 1323 | } |
H. Peter Anvin | 421059c | 2010-08-16 14:56:33 -0700 | [diff] [blame] | 1324 | switch (ins->vex_wlp & 060) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1325 | case 000: |
H. Peter Anvin | 229fa6c | 2010-08-16 15:21:48 -0700 | [diff] [blame] | 1326 | case 040: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1327 | ins->rex &= ~REX_W; |
| 1328 | break; |
H. Peter Anvin | 229fa6c | 2010-08-16 15:21:48 -0700 | [diff] [blame] | 1329 | case 020: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1330 | ins->rex |= REX_W; |
| 1331 | bad32 &= ~REX_W; |
| 1332 | break; |
H. Peter Anvin | 421059c | 2010-08-16 14:56:33 -0700 | [diff] [blame] | 1333 | case 060: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1334 | /* Follow REX_W */ |
| 1335 | break; |
| 1336 | } |
H. Peter Anvin | d85d250 | 2008-05-04 17:53:31 -0700 | [diff] [blame] | 1337 | |
H. Peter Anvin | fc56120 | 2011-07-07 16:58:22 -0700 | [diff] [blame] | 1338 | if (bits != 64 && ((ins->rex & bad32) || ins->vexreg > 7)) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1339 | errfunc(ERR_NONFATAL, "invalid operands in non-64-bit mode"); |
| 1340 | return -1; |
Jin Kyu Song | 66c6192 | 2013-08-26 20:28:43 -0700 | [diff] [blame] | 1341 | } else if (!(ins->rex & REX_EV) && |
| 1342 | ((ins->vexreg > 15) || (ins->evex_p[0] & 0xf0))) { |
| 1343 | errfunc(ERR_NONFATAL, "invalid high-16 register in non-AVX-512"); |
| 1344 | return -1; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1345 | } |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1346 | if (ins->rex & REX_EV) |
| 1347 | length += 4; |
H. Peter Anvin | 621a69a | 2013-11-28 12:11:24 -0800 | [diff] [blame] | 1348 | else if (ins->vex_cm != 1 || (ins->rex & (REX_W|REX_X|REX_B)) || |
| 1349 | ins->prefixes[PPS_VEX] == P_VEX3) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1350 | length += 3; |
| 1351 | else |
| 1352 | length += 2; |
Cyrill Gorcunov | 5b14475 | 2014-05-06 01:50:22 +0400 | [diff] [blame] | 1353 | } else if (ins->rex & REX_MASK) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1354 | if (ins->rex & REX_H) { |
| 1355 | errfunc(ERR_NONFATAL, "cannot use high register in rex instruction"); |
| 1356 | return -1; |
| 1357 | } else if (bits == 64) { |
| 1358 | length++; |
| 1359 | } else if ((ins->rex & REX_L) && |
| 1360 | !(ins->rex & (REX_P|REX_W|REX_X|REX_B)) && |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 1361 | iflag_ffs(&cpu) >= IF_X86_64) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1362 | /* LOCK-as-REX.R */ |
H. Peter Anvin | 10da41e | 2012-02-24 20:57:04 -0800 | [diff] [blame] | 1363 | assert_no_prefix(ins, PPS_LOCK); |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 1364 | lockcheck = false; /* Already errored, no need for warning */ |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1365 | length++; |
| 1366 | } else { |
| 1367 | errfunc(ERR_NONFATAL, "invalid operands in non-64-bit mode"); |
| 1368 | return -1; |
| 1369 | } |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1370 | } |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 1371 | |
| 1372 | if (has_prefix(ins, PPS_LOCK, P_LOCK) && lockcheck && |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 1373 | (!itemp_has(temp,IF_LOCK) || !is_class(MEMORY, ins->oprs[0].type))) { |
H. Peter Anvin | 5a24fdd | 2012-02-25 15:10:04 -0800 | [diff] [blame] | 1374 | errfunc(ERR_WARNING | ERR_WARN_LOCK | ERR_PASS2 , |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 1375 | "instruction is not lockable"); |
| 1376 | } |
| 1377 | |
H. Peter Anvin | 4ecd5d7 | 2012-02-24 21:51:46 -0800 | [diff] [blame] | 1378 | bad_hle_warn(ins, hleok); |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1379 | |
Jin Kyu Song | b287ff0 | 2013-12-04 20:05:55 -0800 | [diff] [blame] | 1380 | /* |
| 1381 | * when BND prefix is set by DEFAULT directive, |
| 1382 | * BND prefix is added to every appropriate instruction line |
| 1383 | * unless it is overridden by NOBND prefix. |
| 1384 | */ |
| 1385 | if (globalbnd && |
| 1386 | (itemp_has(temp, IF_BND) && !has_prefix(ins, PPS_REP, P_NOBND))) |
| 1387 | ins->prefixes[PPS_REP] = P_BND; |
| 1388 | |
H. Peter Anvin | 0db11e2 | 2007-04-17 20:23:11 +0000 | [diff] [blame] | 1389 | return length; |
| 1390 | } |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1391 | |
Cyrill Gorcunov | 9823876 | 2013-03-02 02:48:23 +0400 | [diff] [blame] | 1392 | static inline unsigned int emit_rex(insn *ins, int32_t segment, int64_t offset, int bits) |
| 1393 | { |
| 1394 | if (bits == 64) { |
H. Peter Anvin | 89f78f5 | 2014-05-21 08:30:40 -0700 | [diff] [blame] | 1395 | if ((ins->rex & REX_MASK) && |
H. Peter Anvin | 0a9250c | 2014-05-21 08:19:16 -0700 | [diff] [blame] | 1396 | !(ins->rex & (REX_V | REX_EV)) && |
| 1397 | !ins->rex_done) { |
Cyrill Gorcunov | 5b14475 | 2014-05-06 01:50:22 +0400 | [diff] [blame] | 1398 | int rex = (ins->rex & REX_MASK) | REX_P; |
Cyrill Gorcunov | aa29b1d | 2014-05-05 00:30:58 +0400 | [diff] [blame] | 1399 | out(offset, segment, &rex, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
H. Peter Anvin | 0a9250c | 2014-05-21 08:19:16 -0700 | [diff] [blame] | 1400 | ins->rex_done = true; |
Cyrill Gorcunov | 9823876 | 2013-03-02 02:48:23 +0400 | [diff] [blame] | 1401 | return 1; |
| 1402 | } |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1403 | } |
| 1404 | |
Cyrill Gorcunov | 9823876 | 2013-03-02 02:48:23 +0400 | [diff] [blame] | 1405 | return 0; |
| 1406 | } |
| 1407 | |
Charles Crayne | 1f8bc4c | 2007-11-06 18:27:23 -0800 | [diff] [blame] | 1408 | static void gencode(int32_t segment, int64_t offset, int bits, |
H. Peter Anvin | 833caea | 2008-10-04 19:02:30 -0700 | [diff] [blame] | 1409 | insn * ins, const struct itemplate *temp, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1410 | int64_t insn_end) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1411 | { |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1412 | uint8_t c; |
| 1413 | uint8_t bytes[4]; |
Charles Crayne | 1f8bc4c | 2007-11-06 18:27:23 -0800 | [diff] [blame] | 1414 | int64_t size; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1415 | int64_t data; |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 1416 | int op1, op2; |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1417 | struct operand *opx; |
H. Peter Anvin | 833caea | 2008-10-04 19:02:30 -0700 | [diff] [blame] | 1418 | const uint8_t *codes = temp->code; |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 1419 | uint8_t opex = 0; |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 1420 | enum ea_type eat = EA_SCALAR; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 1421 | |
H. Peter Anvin | 0a9250c | 2014-05-21 08:19:16 -0700 | [diff] [blame] | 1422 | ins->rex_done = false; |
| 1423 | |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1424 | while (*codes) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1425 | c = *codes++; |
| 1426 | op1 = (c & 3) + ((opex & 1) << 2); |
| 1427 | op2 = ((c >> 3) & 3) + ((opex & 2) << 1); |
| 1428 | opx = &ins->oprs[op1]; |
| 1429 | opex = 0; /* For the next iteration */ |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 1430 | |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1431 | switch (c) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1432 | case 01: |
| 1433 | case 02: |
| 1434 | case 03: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1435 | case 04: |
Cyrill Gorcunov | 9823876 | 2013-03-02 02:48:23 +0400 | [diff] [blame] | 1436 | offset += emit_rex(ins, segment, offset, bits); |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1437 | out(offset, segment, codes, OUT_RAWDATA, c, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1438 | codes += c; |
| 1439 | offset += c; |
| 1440 | break; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 1441 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1442 | case 05: |
| 1443 | case 06: |
| 1444 | case 07: |
| 1445 | opex = c; |
| 1446 | break; |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 1447 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1448 | case4(010): |
Cyrill Gorcunov | 9823876 | 2013-03-02 02:48:23 +0400 | [diff] [blame] | 1449 | offset += emit_rex(ins, segment, offset, bits); |
H. Peter Anvin | dcffe4b | 2008-10-10 22:10:31 -0700 | [diff] [blame] | 1450 | bytes[0] = *codes++ + (regval(opx) & 7); |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1451 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1452 | offset += 1; |
| 1453 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1454 | |
Jin Kyu Song | 164d607 | 2013-10-15 19:10:13 -0700 | [diff] [blame] | 1455 | case4(014): |
| 1456 | break; |
| 1457 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1458 | case4(020): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1459 | if (opx->offset < -256 || opx->offset > 255) { |
H. Peter Anvin | e9d7f1a | 2008-10-05 19:42:55 -0700 | [diff] [blame] | 1460 | errfunc(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1461 | "byte value exceeds bounds"); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1462 | } |
H. Peter Anvin | 89a2ac0 | 2013-11-26 18:23:20 -0800 | [diff] [blame] | 1463 | out_imm8(offset, segment, opx, -1); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1464 | offset += 1; |
| 1465 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1466 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1467 | case4(024): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1468 | if (opx->offset < 0 || opx->offset > 255) |
H. Peter Anvin | e9d7f1a | 2008-10-05 19:42:55 -0700 | [diff] [blame] | 1469 | errfunc(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1470 | "unsigned byte value exceeds bounds"); |
H. Peter Anvin | 89a2ac0 | 2013-11-26 18:23:20 -0800 | [diff] [blame] | 1471 | out_imm8(offset, segment, opx, 1); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1472 | offset += 1; |
| 1473 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1474 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1475 | case4(030): |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 1476 | warn_overflow_opd(opx, 2); |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1477 | data = opx->offset; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1478 | out(offset, segment, &data, OUT_ADDRESS, 2, |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1479 | opx->segment, opx->wrt); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1480 | offset += 2; |
| 1481 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1482 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1483 | case4(034): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1484 | if (opx->type & (BITS16 | BITS32)) |
| 1485 | size = (opx->type & BITS16) ? 2 : 4; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1486 | else |
| 1487 | size = (bits == 16) ? 2 : 4; |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 1488 | warn_overflow_opd(opx, size); |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1489 | data = opx->offset; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1490 | out(offset, segment, &data, OUT_ADDRESS, size, |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1491 | opx->segment, opx->wrt); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1492 | offset += size; |
| 1493 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1494 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1495 | case4(040): |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 1496 | warn_overflow_opd(opx, 4); |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1497 | data = opx->offset; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1498 | out(offset, segment, &data, OUT_ADDRESS, 4, |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1499 | opx->segment, opx->wrt); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1500 | offset += 4; |
| 1501 | break; |
H. Peter Anvin | 3ba4677 | 2002-05-27 23:19:35 +0000 | [diff] [blame] | 1502 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1503 | case4(044): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1504 | data = opx->offset; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 1505 | size = ins->addr_size >> 3; |
Cyrill Gorcunov | 9ccabd2 | 2009-09-21 00:56:20 +0400 | [diff] [blame] | 1506 | warn_overflow_opd(opx, size); |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1507 | out(offset, segment, &data, OUT_ADDRESS, size, |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1508 | opx->segment, opx->wrt); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1509 | offset += size; |
| 1510 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1511 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1512 | case4(050): |
H. Peter Anvin | fea84d7 | 2010-05-06 15:32:20 -0700 | [diff] [blame] | 1513 | if (opx->segment != segment) { |
| 1514 | data = opx->offset; |
| 1515 | out(offset, segment, &data, |
| 1516 | OUT_REL1ADR, insn_end - offset, |
| 1517 | opx->segment, opx->wrt); |
| 1518 | } else { |
| 1519 | data = opx->offset - insn_end; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1520 | if (data > 127 || data < -128) |
| 1521 | errfunc(ERR_NONFATAL, "short jump is out of range"); |
H. Peter Anvin | fea84d7 | 2010-05-06 15:32:20 -0700 | [diff] [blame] | 1522 | out(offset, segment, &data, |
| 1523 | OUT_ADDRESS, 1, NO_SEG, NO_SEG); |
| 1524 | } |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1525 | offset += 1; |
| 1526 | break; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 1527 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1528 | case4(054): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1529 | data = (int64_t)opx->offset; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1530 | out(offset, segment, &data, OUT_ADDRESS, 8, |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1531 | opx->segment, opx->wrt); |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1532 | offset += 8; |
| 1533 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1534 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1535 | case4(060): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1536 | if (opx->segment != segment) { |
| 1537 | data = opx->offset; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1538 | out(offset, segment, &data, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1539 | OUT_REL2ADR, insn_end - offset, |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1540 | opx->segment, opx->wrt); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1541 | } else { |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1542 | data = opx->offset - insn_end; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1543 | out(offset, segment, &data, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1544 | OUT_ADDRESS, 2, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1545 | } |
| 1546 | offset += 2; |
| 1547 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1548 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1549 | case4(064): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1550 | if (opx->type & (BITS16 | BITS32 | BITS64)) |
| 1551 | size = (opx->type & BITS16) ? 2 : 4; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1552 | else |
| 1553 | size = (bits == 16) ? 2 : 4; |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1554 | if (opx->segment != segment) { |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1555 | data = opx->offset; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1556 | out(offset, segment, &data, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1557 | size == 2 ? OUT_REL2ADR : OUT_REL4ADR, |
| 1558 | insn_end - offset, opx->segment, opx->wrt); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1559 | } else { |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1560 | data = opx->offset - insn_end; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1561 | out(offset, segment, &data, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1562 | OUT_ADDRESS, size, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1563 | } |
| 1564 | offset += size; |
| 1565 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1566 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1567 | case4(070): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1568 | if (opx->segment != segment) { |
| 1569 | data = opx->offset; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1570 | out(offset, segment, &data, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1571 | OUT_REL4ADR, insn_end - offset, |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1572 | opx->segment, opx->wrt); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1573 | } else { |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1574 | data = opx->offset - insn_end; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1575 | out(offset, segment, &data, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1576 | OUT_ADDRESS, 4, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1577 | } |
| 1578 | offset += 4; |
| 1579 | break; |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 1580 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1581 | case4(074): |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1582 | if (opx->segment == NO_SEG) |
H. Peter Anvin | 7eb4a38 | 2007-09-17 15:49:30 -0700 | [diff] [blame] | 1583 | errfunc(ERR_NONFATAL, "value referenced by FAR is not" |
| 1584 | " relocatable"); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1585 | data = 0; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1586 | out(offset, segment, &data, OUT_ADDRESS, 2, |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1587 | outfmt->segbase(1 + opx->segment), |
| 1588 | opx->wrt); |
H. Peter Anvin | 7eb4a38 | 2007-09-17 15:49:30 -0700 | [diff] [blame] | 1589 | offset += 2; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1590 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1591 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1592 | case 0172: |
| 1593 | c = *codes++; |
| 1594 | opx = &ins->oprs[c >> 3]; |
| 1595 | bytes[0] = nasm_regvals[opx->basereg] << 4; |
| 1596 | opx = &ins->oprs[c & 7]; |
| 1597 | if (opx->segment != NO_SEG || opx->wrt != NO_SEG) { |
| 1598 | errfunc(ERR_NONFATAL, |
| 1599 | "non-absolute expression not permitted as argument %d", |
| 1600 | c & 7); |
| 1601 | } else { |
| 1602 | if (opx->offset & ~15) { |
| 1603 | errfunc(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, |
| 1604 | "four-bit argument exceeds bounds"); |
| 1605 | } |
| 1606 | bytes[0] |= opx->offset & 15; |
| 1607 | } |
| 1608 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
| 1609 | offset++; |
| 1610 | break; |
H. Peter Anvin | d85d250 | 2008-05-04 17:53:31 -0700 | [diff] [blame] | 1611 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1612 | case 0173: |
| 1613 | c = *codes++; |
| 1614 | opx = &ins->oprs[c >> 4]; |
| 1615 | bytes[0] = nasm_regvals[opx->basereg] << 4; |
| 1616 | bytes[0] |= c & 15; |
| 1617 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
| 1618 | offset++; |
| 1619 | break; |
H. Peter Anvin | d58656f | 2008-05-06 20:11:14 -0700 | [diff] [blame] | 1620 | |
H. Peter Anvin | cffe61e | 2011-07-07 17:21:24 -0700 | [diff] [blame] | 1621 | case4(0174): |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1622 | bytes[0] = nasm_regvals[opx->basereg] << 4; |
| 1623 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
| 1624 | offset++; |
| 1625 | break; |
H. Peter Anvin | 52dc353 | 2008-05-20 19:29:04 -0700 | [diff] [blame] | 1626 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1627 | case4(0254): |
H. Peter Anvin | 588df78 | 2008-10-07 10:05:10 -0700 | [diff] [blame] | 1628 | data = opx->offset; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1629 | if (opx->wrt == NO_SEG && opx->segment == NO_SEG && |
| 1630 | (int32_t)data != (int64_t)data) { |
| 1631 | errfunc(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, |
| 1632 | "signed dword immediate exceeds bounds"); |
| 1633 | } |
H. Peter Anvin | 89a2ac0 | 2013-11-26 18:23:20 -0800 | [diff] [blame] | 1634 | out(offset, segment, &data, OUT_ADDRESS, -4, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1635 | opx->segment, opx->wrt); |
| 1636 | offset += 4; |
H. Peter Anvin | 588df78 | 2008-10-07 10:05:10 -0700 | [diff] [blame] | 1637 | break; |
| 1638 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1639 | case4(0240): |
| 1640 | case 0250: |
| 1641 | codes += 3; |
| 1642 | ins->evex_p[2] |= op_evexflags(&ins->oprs[0], |
| 1643 | EVEX_P2Z | EVEX_P2AAA, 2); |
| 1644 | ins->evex_p[2] ^= EVEX_P2VP; /* 1's complement */ |
| 1645 | bytes[0] = 0x62; |
| 1646 | /* EVEX.X can be set by either REX or EVEX for different reasons */ |
Jin Kyu Song | 1be09ee | 2013-11-08 01:14:39 -0800 | [diff] [blame] | 1647 | bytes[1] = ((((ins->rex & 7) << 5) | |
| 1648 | (ins->evex_p[0] & (EVEX_P0X | EVEX_P0RP))) ^ 0xf0) | |
| 1649 | (ins->vex_cm & 3); |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1650 | bytes[2] = ((ins->rex & REX_W) << (7 - 3)) | |
| 1651 | ((~ins->vexreg & 15) << 3) | |
| 1652 | (1 << 2) | (ins->vex_wlp & 3); |
| 1653 | bytes[3] = ins->evex_p[2]; |
| 1654 | out(offset, segment, &bytes, OUT_RAWDATA, 4, NO_SEG, NO_SEG); |
| 1655 | offset += 4; |
| 1656 | break; |
| 1657 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1658 | case4(0260): |
| 1659 | case 0270: |
| 1660 | codes += 2; |
H. Peter Anvin | 621a69a | 2013-11-28 12:11:24 -0800 | [diff] [blame] | 1661 | if (ins->vex_cm != 1 || (ins->rex & (REX_W|REX_X|REX_B)) || |
| 1662 | ins->prefixes[PPS_VEX] == P_VEX3) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1663 | bytes[0] = (ins->vex_cm >> 6) ? 0x8f : 0xc4; |
| 1664 | bytes[1] = (ins->vex_cm & 31) | ((~ins->rex & 7) << 5); |
| 1665 | bytes[2] = ((ins->rex & REX_W) << (7-3)) | |
H. Peter Anvin | fc56120 | 2011-07-07 16:58:22 -0700 | [diff] [blame] | 1666 | ((~ins->vexreg & 15)<< 3) | (ins->vex_wlp & 07); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1667 | out(offset, segment, &bytes, OUT_RAWDATA, 3, NO_SEG, NO_SEG); |
| 1668 | offset += 3; |
| 1669 | } else { |
| 1670 | bytes[0] = 0xc5; |
| 1671 | bytes[1] = ((~ins->rex & REX_R) << (7-2)) | |
H. Peter Anvin | fc56120 | 2011-07-07 16:58:22 -0700 | [diff] [blame] | 1672 | ((~ins->vexreg & 15) << 3) | (ins->vex_wlp & 07); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1673 | out(offset, segment, &bytes, OUT_RAWDATA, 2, NO_SEG, NO_SEG); |
| 1674 | offset += 2; |
| 1675 | } |
| 1676 | break; |
H. Peter Anvin | d85d250 | 2008-05-04 17:53:31 -0700 | [diff] [blame] | 1677 | |
H. Peter Anvin | e014f35 | 2012-02-25 22:35:19 -0800 | [diff] [blame] | 1678 | case 0271: |
| 1679 | case 0272: |
| 1680 | case 0273: |
H. Peter Anvin | 8ea2200 | 2012-02-25 10:24:24 -0800 | [diff] [blame] | 1681 | break; |
| 1682 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1683 | case4(0274): |
| 1684 | { |
| 1685 | uint64_t uv, um; |
| 1686 | int s; |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1687 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1688 | if (ins->rex & REX_W) |
| 1689 | s = 64; |
| 1690 | else if (ins->prefixes[PPS_OSIZE] == P_O16) |
| 1691 | s = 16; |
| 1692 | else if (ins->prefixes[PPS_OSIZE] == P_O32) |
| 1693 | s = 32; |
| 1694 | else |
| 1695 | s = bits; |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1696 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1697 | um = (uint64_t)2 << (s-1); |
| 1698 | uv = opx->offset; |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1699 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1700 | if (uv > 127 && uv < (uint64_t)-128 && |
| 1701 | (uv < um-128 || uv > um-1)) { |
Ben Rudiak-Gould | 4e8396b | 2013-03-01 10:28:32 +0400 | [diff] [blame] | 1702 | /* If this wasn't explicitly byte-sized, warn as though we |
| 1703 | * had fallen through to the imm16/32/64 case. |
| 1704 | */ |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1705 | errfunc(ERR_WARNING | ERR_PASS2 | ERR_WARN_NOV, |
Ben Rudiak-Gould | 4e8396b | 2013-03-01 10:28:32 +0400 | [diff] [blame] | 1706 | "%s value exceeds bounds", |
| 1707 | (opx->type & BITS8) ? "signed byte" : |
| 1708 | s == 16 ? "word" : |
| 1709 | s == 32 ? "dword" : |
| 1710 | "signed dword"); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1711 | } |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1712 | if (opx->segment != NO_SEG) { |
H. Peter Anvin | 779ed8b | 2008-10-16 13:01:43 -0700 | [diff] [blame] | 1713 | data = uv; |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1714 | out(offset, segment, &data, OUT_ADDRESS, 1, |
| 1715 | opx->segment, opx->wrt); |
| 1716 | } else { |
H. Peter Anvin | 779ed8b | 2008-10-16 13:01:43 -0700 | [diff] [blame] | 1717 | bytes[0] = uv; |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1718 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, |
| 1719 | NO_SEG); |
| 1720 | } |
| 1721 | offset += 1; |
| 1722 | break; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1723 | } |
H. Peter Anvin | c1377e9 | 2008-10-06 23:40:31 -0700 | [diff] [blame] | 1724 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1725 | case4(0300): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1726 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1727 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1728 | case 0310: |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 1729 | if (bits == 32 && !has_prefix(ins, PPS_ASIZE, P_A16)) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1730 | *bytes = 0x67; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1731 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1732 | offset += 1; |
| 1733 | } else |
| 1734 | offset += 0; |
| 1735 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1736 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1737 | case 0311: |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 1738 | if (bits != 32 && !has_prefix(ins, PPS_ASIZE, P_A32)) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1739 | *bytes = 0x67; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1740 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1741 | offset += 1; |
| 1742 | } else |
| 1743 | offset += 0; |
| 1744 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1745 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1746 | case 0312: |
| 1747 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1748 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1749 | case 0313: |
| 1750 | ins->rex = 0; |
| 1751 | break; |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 1752 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1753 | case4(0314): |
| 1754 | break; |
H. Peter Anvin | 2344010 | 2007-11-12 21:02:33 -0800 | [diff] [blame] | 1755 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1756 | case 0320: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1757 | case 0321: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1758 | break; |
H. Peter Anvin | ef7468f | 2002-04-30 20:57:59 +0000 | [diff] [blame] | 1759 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1760 | case 0322: |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 1761 | case 0323: |
| 1762 | break; |
| 1763 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1764 | case 0324: |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1765 | ins->rex |= REX_W; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1766 | break; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 1767 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1768 | case 0325: |
| 1769 | break; |
H. Peter Anvin | 9472dab | 2009-06-24 21:38:29 -0700 | [diff] [blame] | 1770 | |
Ben Rudiak-Gould | d7ab1f9 | 2013-02-20 23:25:54 +0400 | [diff] [blame] | 1771 | case 0326: |
| 1772 | break; |
| 1773 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1774 | case 0330: |
Cyrill Gorcunov | 83e6924 | 2013-03-03 14:34:31 +0400 | [diff] [blame] | 1775 | *bytes = *codes++ ^ get_cond_opcode(ins->condition); |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1776 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1777 | offset += 1; |
| 1778 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1779 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1780 | case 0331: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1781 | break; |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 1782 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1783 | case 0332: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1784 | case 0333: |
H. Peter Anvin | cb9b690 | 2007-09-12 21:58:51 -0700 | [diff] [blame] | 1785 | *bytes = c - 0332 + 0xF2; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1786 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1787 | offset += 1; |
| 1788 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1789 | |
Keith Kanios | 48af177 | 2007-08-17 07:37:52 +0000 | [diff] [blame] | 1790 | case 0334: |
| 1791 | if (ins->rex & REX_R) { |
| 1792 | *bytes = 0xF0; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1793 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
Keith Kanios | 48af177 | 2007-08-17 07:37:52 +0000 | [diff] [blame] | 1794 | offset += 1; |
| 1795 | } |
| 1796 | ins->rex &= ~(REX_L|REX_R); |
| 1797 | break; |
H. Peter Anvin | 0db11e2 | 2007-04-17 20:23:11 +0000 | [diff] [blame] | 1798 | |
H. Peter Anvin | cb9b690 | 2007-09-12 21:58:51 -0700 | [diff] [blame] | 1799 | case 0335: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1800 | break; |
H. Peter Anvin | cb9b690 | 2007-09-12 21:58:51 -0700 | [diff] [blame] | 1801 | |
H. Peter Anvin | 962e305 | 2008-08-28 17:47:16 -0700 | [diff] [blame] | 1802 | case 0336: |
| 1803 | case 0337: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1804 | break; |
H. Peter Anvin | 962e305 | 2008-08-28 17:47:16 -0700 | [diff] [blame] | 1805 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1806 | case 0340: |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1807 | if (ins->oprs[0].segment != NO_SEG) |
| 1808 | errfunc(ERR_PANIC, "non-constant BSS size in pass two"); |
| 1809 | else { |
H. Peter Anvin | 428fd67 | 2007-11-15 10:25:52 -0800 | [diff] [blame] | 1810 | int64_t size = ins->oprs[0].offset; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1811 | if (size > 0) |
| 1812 | out(offset, segment, NULL, |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1813 | OUT_RESERVE, size, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1814 | offset += size; |
| 1815 | } |
| 1816 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1817 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1818 | case 0341: |
| 1819 | break; |
H. Peter Anvin | c2acf7b | 2009-02-21 18:22:56 -0800 | [diff] [blame] | 1820 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1821 | case 0360: |
| 1822 | break; |
H. Peter Anvin | fff5a47 | 2008-05-20 09:46:24 -0700 | [diff] [blame] | 1823 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1824 | case 0361: |
| 1825 | bytes[0] = 0x66; |
H. Peter Anvin | fff5a47 | 2008-05-20 09:46:24 -0700 | [diff] [blame] | 1826 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
| 1827 | offset += 1; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1828 | break; |
H. Peter Anvin | fff5a47 | 2008-05-20 09:46:24 -0700 | [diff] [blame] | 1829 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1830 | case 0364: |
| 1831 | case 0365: |
| 1832 | break; |
H. Peter Anvin | 62cb606 | 2007-09-11 22:44:03 +0000 | [diff] [blame] | 1833 | |
Keith Kanios | 48af177 | 2007-08-17 07:37:52 +0000 | [diff] [blame] | 1834 | case 0366: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1835 | case 0367: |
H. Peter Anvin | 62cb606 | 2007-09-11 22:44:03 +0000 | [diff] [blame] | 1836 | *bytes = c - 0366 + 0x66; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1837 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
Keith Kanios | 48af177 | 2007-08-17 07:37:52 +0000 | [diff] [blame] | 1838 | offset += 1; |
| 1839 | break; |
H. Peter Anvin | 62cb606 | 2007-09-11 22:44:03 +0000 | [diff] [blame] | 1840 | |
Jin Kyu Song | 0304109 | 2013-10-15 19:38:51 -0700 | [diff] [blame] | 1841 | case3(0370): |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1842 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1843 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1844 | case 0373: |
| 1845 | *bytes = bits == 16 ? 3 : 5; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1846 | out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1847 | offset += 1; |
| 1848 | break; |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1849 | |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 1850 | case 0374: |
| 1851 | eat = EA_XMMVSIB; |
| 1852 | break; |
| 1853 | |
| 1854 | case 0375: |
| 1855 | eat = EA_YMMVSIB; |
| 1856 | break; |
| 1857 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1858 | case 0376: |
| 1859 | eat = EA_ZMMVSIB; |
| 1860 | break; |
| 1861 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1862 | case4(0100): |
| 1863 | case4(0110): |
| 1864 | case4(0120): |
| 1865 | case4(0130): |
| 1866 | case4(0200): |
| 1867 | case4(0204): |
| 1868 | case4(0210): |
| 1869 | case4(0214): |
| 1870 | case4(0220): |
| 1871 | case4(0224): |
| 1872 | case4(0230): |
| 1873 | case4(0234): |
| 1874 | { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1875 | ea ea_data; |
| 1876 | int rfield; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1877 | opflags_t rflags; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 1878 | uint8_t *p; |
| 1879 | int32_t s; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1880 | struct operand *opy = &ins->oprs[op2]; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 1881 | |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1882 | if (c <= 0177) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1883 | /* pick rfield from operand b (opx) */ |
| 1884 | rflags = regflag(opx); |
H. Peter Anvin | 33d5fc0 | 2008-10-23 23:07:53 -0700 | [diff] [blame] | 1885 | rfield = nasm_regvals[opx->basereg]; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1886 | } else { |
| 1887 | /* rfield is constant */ |
| 1888 | rflags = 0; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1889 | rfield = c & 7; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1890 | } |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1891 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1892 | if (process_ea(opy, &ea_data, bits, |
| 1893 | rfield, rflags, ins) != eat) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1894 | errfunc(ERR_NONFATAL, "invalid effective address"); |
Charles Crayne | 7e97555 | 2007-11-03 22:06:13 -0700 | [diff] [blame] | 1895 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1896 | p = bytes; |
| 1897 | *p++ = ea_data.modrm; |
| 1898 | if (ea_data.sib_present) |
| 1899 | *p++ = ea_data.sib; |
| 1900 | |
| 1901 | s = p - bytes; |
H. Peter Anvin | 34f6fb0 | 2007-11-09 14:44:02 -0800 | [diff] [blame] | 1902 | out(offset, segment, bytes, OUT_RAWDATA, s, NO_SEG, NO_SEG); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1903 | |
Victor van den Elzen | cf9332c | 2008-10-01 12:18:28 +0200 | [diff] [blame] | 1904 | /* |
| 1905 | * Make sure the address gets the right offset in case |
| 1906 | * the line breaks in the .lst file (BR 1197827) |
| 1907 | */ |
| 1908 | offset += s; |
| 1909 | s = 0; |
| 1910 | |
H. Peter Anvin | 72bf3fe | 2013-11-26 20:19:53 -0800 | [diff] [blame] | 1911 | if (ea_data.bytes) { |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1912 | /* use compressed displacement, if available */ |
| 1913 | data = ea_data.disp8 ? ea_data.disp8 : opy->offset; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1914 | s += ea_data.bytes; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1915 | if (ea_data.rip) { |
| 1916 | if (opy->segment == segment) { |
| 1917 | data -= insn_end; |
Victor van den Elzen | 0d268fb | 2010-01-24 21:24:57 +0100 | [diff] [blame] | 1918 | if (overflow_signed(data, ea_data.bytes)) |
| 1919 | warn_overflow(ERR_PASS2, ea_data.bytes); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1920 | out(offset, segment, &data, OUT_ADDRESS, |
| 1921 | ea_data.bytes, NO_SEG, NO_SEG); |
| 1922 | } else { |
Victor van den Elzen | 0d268fb | 2010-01-24 21:24:57 +0100 | [diff] [blame] | 1923 | /* overflow check in output/linker? */ |
H. Peter Anvin | 89a2ac0 | 2013-11-26 18:23:20 -0800 | [diff] [blame] | 1924 | out(offset, segment, &data, OUT_REL4ADR, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1925 | insn_end - offset, opy->segment, opy->wrt); |
| 1926 | } |
| 1927 | } else { |
H. Peter Anvin | 72bf3fe | 2013-11-26 20:19:53 -0800 | [diff] [blame] | 1928 | int asize = ins->addr_size >> 3; |
| 1929 | int atype = ea_data.bytes; |
| 1930 | |
| 1931 | if (overflow_general(data, asize) || |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 1932 | signed_bits(data, ins->addr_size) != |
H. Peter Anvin | 72bf3fe | 2013-11-26 20:19:53 -0800 | [diff] [blame] | 1933 | signed_bits(data, ea_data.bytes << 3)) |
Victor van den Elzen | 0d268fb | 2010-01-24 21:24:57 +0100 | [diff] [blame] | 1934 | warn_overflow(ERR_PASS2, ea_data.bytes); |
| 1935 | |
H. Peter Anvin | 72bf3fe | 2013-11-26 20:19:53 -0800 | [diff] [blame] | 1936 | if (asize > ea_data.bytes) { |
| 1937 | /* |
| 1938 | * If the address isn't the full width of |
| 1939 | * the address size, treat is as signed... |
| 1940 | */ |
| 1941 | atype = -atype; |
| 1942 | } |
| 1943 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1944 | out(offset, segment, &data, OUT_ADDRESS, |
H. Peter Anvin | 72bf3fe | 2013-11-26 20:19:53 -0800 | [diff] [blame] | 1945 | atype, opy->segment, opy->wrt); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1946 | } |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1947 | } |
| 1948 | offset += s; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1949 | } |
| 1950 | break; |
H. Peter Anvin | 507ae03 | 2008-10-09 15:37:10 -0700 | [diff] [blame] | 1951 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1952 | default: |
| 1953 | errfunc(ERR_PANIC, "internal instruction table corrupt" |
| 1954 | ": instruction code \\%o (0x%02X) given", c, c); |
| 1955 | break; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1956 | } |
H. Peter Anvin | 839eca2 | 2007-10-29 23:12:47 -0700 | [diff] [blame] | 1957 | } |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 1958 | } |
| 1959 | |
H. Peter Anvin | f8563f7 | 2009-10-13 12:28:14 -0700 | [diff] [blame] | 1960 | static opflags_t regflag(const operand * o) |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1961 | { |
Cyrill Gorcunov | 2124b7b | 2010-07-25 01:16:33 +0400 | [diff] [blame] | 1962 | if (!is_register(o->basereg)) |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1963 | errfunc(ERR_PANIC, "invalid operand passed to regflag()"); |
H. Peter Anvin | a4835d4 | 2008-05-20 14:21:29 -0700 | [diff] [blame] | 1964 | return nasm_reg_flags[o->basereg]; |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1965 | } |
| 1966 | |
H. Peter Anvin | 5b0e3ec | 2007-07-07 02:01:08 +0000 | [diff] [blame] | 1967 | static int32_t regval(const operand * o) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 1968 | { |
Cyrill Gorcunov | 2124b7b | 2010-07-25 01:16:33 +0400 | [diff] [blame] | 1969 | if (!is_register(o->basereg)) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 1970 | errfunc(ERR_PANIC, "invalid operand passed to regval()"); |
H. Peter Anvin | a4835d4 | 2008-05-20 14:21:29 -0700 | [diff] [blame] | 1971 | return nasm_regvals[o->basereg]; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 1972 | } |
| 1973 | |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1974 | static int op_rexflags(const operand * o, int mask) |
| 1975 | { |
H. Peter Anvin | f8563f7 | 2009-10-13 12:28:14 -0700 | [diff] [blame] | 1976 | opflags_t flags; |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1977 | int val; |
| 1978 | |
Cyrill Gorcunov | 2124b7b | 2010-07-25 01:16:33 +0400 | [diff] [blame] | 1979 | if (!is_register(o->basereg)) |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1980 | errfunc(ERR_PANIC, "invalid operand passed to op_rexflags()"); |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1981 | |
H. Peter Anvin | a4835d4 | 2008-05-20 14:21:29 -0700 | [diff] [blame] | 1982 | flags = nasm_reg_flags[o->basereg]; |
| 1983 | val = nasm_regvals[o->basereg]; |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1984 | |
| 1985 | return rexflags(val, flags, mask); |
| 1986 | } |
| 1987 | |
H. Peter Anvin | f8563f7 | 2009-10-13 12:28:14 -0700 | [diff] [blame] | 1988 | static int rexflags(int val, opflags_t flags, int mask) |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1989 | { |
| 1990 | int rex = 0; |
| 1991 | |
H. Peter Anvin | c6c750c | 2013-11-08 15:28:19 -0800 | [diff] [blame] | 1992 | if (val >= 0 && (val & 8)) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1993 | rex |= REX_B|REX_X|REX_R; |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 1994 | if (flags & BITS64) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 1995 | rex |= REX_W; |
| 1996 | if (!(REG_HIGH & ~flags)) /* AH, CH, DH, BH */ |
| 1997 | rex |= REX_H; |
| 1998 | else if (!(REG8 & ~flags) && val >= 4) /* SPL, BPL, SIL, DIL */ |
| 1999 | rex |= REX_P; |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2000 | |
| 2001 | return rex & mask; |
| 2002 | } |
| 2003 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2004 | static int evexflags(int val, decoflags_t deco, |
| 2005 | int mask, uint8_t byte) |
| 2006 | { |
| 2007 | int evex = 0; |
| 2008 | |
Jin Kyu Song | 1be09ee | 2013-11-08 01:14:39 -0800 | [diff] [blame] | 2009 | switch (byte) { |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2010 | case 0: |
H. Peter Anvin | c6c750c | 2013-11-08 15:28:19 -0800 | [diff] [blame] | 2011 | if (val >= 0 && (val & 16)) |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2012 | evex |= (EVEX_P0RP | EVEX_P0X); |
| 2013 | break; |
| 2014 | case 2: |
H. Peter Anvin | c6c750c | 2013-11-08 15:28:19 -0800 | [diff] [blame] | 2015 | if (val >= 0 && (val & 16)) |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2016 | evex |= EVEX_P2VP; |
| 2017 | if (deco & Z) |
| 2018 | evex |= EVEX_P2Z; |
| 2019 | if (deco & OPMASK_MASK) |
| 2020 | evex |= deco & EVEX_P2AAA; |
| 2021 | break; |
| 2022 | } |
| 2023 | return evex & mask; |
| 2024 | } |
| 2025 | |
| 2026 | static int op_evexflags(const operand * o, int mask, uint8_t byte) |
| 2027 | { |
| 2028 | int val; |
| 2029 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2030 | val = nasm_regvals[o->basereg]; |
| 2031 | |
| 2032 | return evexflags(val, o->decoflags, mask, byte); |
| 2033 | } |
| 2034 | |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 2035 | static enum match_result find_match(const struct itemplate **tempp, |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2036 | insn *instruction, |
| 2037 | int32_t segment, int64_t offset, int bits) |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 2038 | { |
| 2039 | const struct itemplate *temp; |
| 2040 | enum match_result m, merr; |
H. Peter Anvin | a7643f4 | 2009-10-13 12:32:20 -0700 | [diff] [blame] | 2041 | opflags_t xsizeflags[MAX_OPERANDS]; |
H. Peter Anvin | a81655b | 2009-07-25 18:15:28 -0700 | [diff] [blame] | 2042 | bool opsizemissing = false; |
Jin Kyu Song | e3a06b9 | 2013-08-28 19:15:23 -0700 | [diff] [blame] | 2043 | int8_t broadcast = instruction->evex_brerop; |
H. Peter Anvin | a81655b | 2009-07-25 18:15:28 -0700 | [diff] [blame] | 2044 | int i; |
| 2045 | |
Jin Kyu Song | 4d1fc3f | 2013-08-21 19:29:10 -0700 | [diff] [blame] | 2046 | /* broadcasting uses a different data element size */ |
| 2047 | for (i = 0; i < instruction->operands; i++) |
| 2048 | if (i == broadcast) |
| 2049 | xsizeflags[i] = instruction->oprs[i].decoflags & BRSIZE_MASK; |
| 2050 | else |
| 2051 | xsizeflags[i] = instruction->oprs[i].type & SIZE_MASK; |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 2052 | |
| 2053 | merr = MERR_INVALOP; |
| 2054 | |
| 2055 | for (temp = nasm_instructions[instruction->opcode]; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2056 | temp->opcode != I_none; temp++) { |
| 2057 | m = matches(temp, instruction, bits); |
| 2058 | if (m == MOK_JUMP) { |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 2059 | if (jmp_match(segment, offset, bits, instruction, temp)) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2060 | m = MOK_GOOD; |
| 2061 | else |
| 2062 | m = MERR_INVALOP; |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2063 | } else if (m == MERR_OPSIZEMISSING && !itemp_has(temp, IF_SX)) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2064 | /* |
| 2065 | * Missing operand size and a candidate for fuzzy matching... |
| 2066 | */ |
Ben Rudiak-Gould | 6e87893 | 2013-02-27 10:13:14 -0800 | [diff] [blame] | 2067 | for (i = 0; i < temp->operands; i++) |
Jin Kyu Song | 4d1fc3f | 2013-08-21 19:29:10 -0700 | [diff] [blame] | 2068 | if (i == broadcast) |
| 2069 | xsizeflags[i] |= temp->deco[i] & BRSIZE_MASK; |
| 2070 | else |
| 2071 | xsizeflags[i] |= temp->opd[i] & SIZE_MASK; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2072 | opsizemissing = true; |
| 2073 | } |
| 2074 | if (m > merr) |
| 2075 | merr = m; |
| 2076 | if (merr == MOK_GOOD) |
| 2077 | goto done; |
H. Peter Anvin | a81655b | 2009-07-25 18:15:28 -0700 | [diff] [blame] | 2078 | } |
| 2079 | |
| 2080 | /* No match, but see if we can get a fuzzy operand size match... */ |
| 2081 | if (!opsizemissing) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2082 | goto done; |
H. Peter Anvin | a81655b | 2009-07-25 18:15:28 -0700 | [diff] [blame] | 2083 | |
| 2084 | for (i = 0; i < instruction->operands; i++) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2085 | /* |
| 2086 | * We ignore extrinsic operand sizes on registers, so we should |
| 2087 | * never try to fuzzy-match on them. This also resolves the case |
| 2088 | * when we have e.g. "xmmrm128" in two different positions. |
| 2089 | */ |
| 2090 | if (is_class(REGISTER, instruction->oprs[i].type)) |
| 2091 | continue; |
H. Peter Anvin | ff5d656 | 2009-10-05 14:08:05 -0700 | [diff] [blame] | 2092 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2093 | /* This tests if xsizeflags[i] has more than one bit set */ |
| 2094 | if ((xsizeflags[i] & (xsizeflags[i]-1))) |
| 2095 | goto done; /* No luck */ |
H. Peter Anvin | a81655b | 2009-07-25 18:15:28 -0700 | [diff] [blame] | 2096 | |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2097 | if (i == broadcast) { |
Jin Kyu Song | 4d1fc3f | 2013-08-21 19:29:10 -0700 | [diff] [blame] | 2098 | instruction->oprs[i].decoflags |= xsizeflags[i]; |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2099 | instruction->oprs[i].type |= (xsizeflags[i] == BR_BITS32 ? |
| 2100 | BITS32 : BITS64); |
| 2101 | } else { |
Jin Kyu Song | 4d1fc3f | 2013-08-21 19:29:10 -0700 | [diff] [blame] | 2102 | instruction->oprs[i].type |= xsizeflags[i]; /* Set the size */ |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2103 | } |
H. Peter Anvin | a81655b | 2009-07-25 18:15:28 -0700 | [diff] [blame] | 2104 | } |
| 2105 | |
| 2106 | /* Try matching again... */ |
| 2107 | for (temp = nasm_instructions[instruction->opcode]; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2108 | temp->opcode != I_none; temp++) { |
| 2109 | m = matches(temp, instruction, bits); |
| 2110 | if (m == MOK_JUMP) { |
H. Peter Anvin | 8cc8a1d | 2012-02-25 11:11:42 -0800 | [diff] [blame] | 2111 | if (jmp_match(segment, offset, bits, instruction, temp)) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2112 | m = MOK_GOOD; |
| 2113 | else |
| 2114 | m = MERR_INVALOP; |
| 2115 | } |
| 2116 | if (m > merr) |
| 2117 | merr = m; |
| 2118 | if (merr == MOK_GOOD) |
| 2119 | goto done; |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 2120 | } |
| 2121 | |
H. Peter Anvin | a81655b | 2009-07-25 18:15:28 -0700 | [diff] [blame] | 2122 | done: |
H. Peter Anvin | 23595f5 | 2009-07-25 17:44:25 -0700 | [diff] [blame] | 2123 | *tempp = temp; |
| 2124 | return merr; |
| 2125 | } |
| 2126 | |
Mark Charney | dcaef4b | 2014-10-09 13:45:17 -0400 | [diff] [blame] | 2127 | static uint8_t get_broadcast_num(opflags_t opflags, opflags_t brsize) |
| 2128 | { |
| 2129 | opflags_t opsize = opflags & SIZE_MASK; |
| 2130 | uint8_t brcast_num; |
| 2131 | |
| 2132 | /* |
| 2133 | * Due to discontinuity between BITS64 and BITS128 (BITS80), |
| 2134 | * this cannot be a simple arithmetic calculation. |
| 2135 | */ |
| 2136 | if (brsize > BITS64) |
| 2137 | errfunc(ERR_FATAL, |
| 2138 | "size of broadcasting element is greater than 64 bits"); |
| 2139 | |
| 2140 | switch (opsize) { |
| 2141 | case BITS64: |
| 2142 | brcast_num = BITS64 / brsize; |
| 2143 | break; |
| 2144 | default: |
| 2145 | brcast_num = (opsize / BITS128) * (BITS64 / brsize) * 2; |
| 2146 | break; |
| 2147 | } |
| 2148 | |
| 2149 | return brcast_num; |
| 2150 | } |
| 2151 | |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 2152 | static enum match_result matches(const struct itemplate *itemp, |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2153 | insn *instruction, int bits) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 2154 | { |
Cyrill Gorcunov | 167917a | 2012-09-10 00:19:12 +0400 | [diff] [blame] | 2155 | opflags_t size[MAX_OPERANDS], asize; |
H. Peter Anvin | 3fb86f2 | 2009-07-25 19:12:10 -0700 | [diff] [blame] | 2156 | bool opsizemissing = false; |
Cyrill Gorcunov | 167917a | 2012-09-10 00:19:12 +0400 | [diff] [blame] | 2157 | int i, oprs; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2158 | |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2159 | /* |
| 2160 | * Check the opcode |
| 2161 | */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2162 | if (itemp->opcode != instruction->opcode) |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 2163 | return MERR_INVALOP; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2164 | |
| 2165 | /* |
| 2166 | * Count the operands |
| 2167 | */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2168 | if (itemp->operands != instruction->operands) |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 2169 | return MERR_INVALOP; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2170 | |
| 2171 | /* |
H. Peter Anvin | 47fb7bc | 2010-08-24 13:53:22 -0700 | [diff] [blame] | 2172 | * Is it legal? |
| 2173 | */ |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2174 | if (!(optimizing > 0) && itemp_has(itemp, IF_OPT)) |
H. Peter Anvin | 47fb7bc | 2010-08-24 13:53:22 -0700 | [diff] [blame] | 2175 | return MERR_INVALOP; |
| 2176 | |
| 2177 | /* |
Jin Kyu Song | 6cfa968 | 2013-11-26 17:27:48 -0800 | [diff] [blame] | 2178 | * {evex} available? |
| 2179 | */ |
H. Peter Anvin | 621a69a | 2013-11-28 12:11:24 -0800 | [diff] [blame] | 2180 | switch (instruction->prefixes[PPS_VEX]) { |
| 2181 | case P_EVEX: |
| 2182 | if (!itemp_has(itemp, IF_EVEX)) |
| 2183 | return MERR_ENCMISMATCH; |
| 2184 | break; |
| 2185 | case P_VEX3: |
| 2186 | case P_VEX2: |
| 2187 | if (!itemp_has(itemp, IF_VEX)) |
| 2188 | return MERR_ENCMISMATCH; |
| 2189 | break; |
| 2190 | default: |
| 2191 | break; |
Jin Kyu Song | 6cfa968 | 2013-11-26 17:27:48 -0800 | [diff] [blame] | 2192 | } |
| 2193 | |
| 2194 | /* |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2195 | * Check that no spurious colons or TOs are present |
| 2196 | */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2197 | for (i = 0; i < itemp->operands; i++) |
| 2198 | if (instruction->oprs[i].type & ~itemp->opd[i] & (COLON | TO)) |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 2199 | return MERR_INVALOP; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2200 | |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2201 | /* |
H. Peter Anvin | 32cd4c2 | 2008-04-04 13:34:53 -0700 | [diff] [blame] | 2202 | * Process size flags |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2203 | */ |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2204 | switch (itemp_smask(itemp)) { |
| 2205 | case IF_GENBIT(IF_SB): |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2206 | asize = BITS8; |
| 2207 | break; |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2208 | case IF_GENBIT(IF_SW): |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2209 | asize = BITS16; |
| 2210 | break; |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2211 | case IF_GENBIT(IF_SD): |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2212 | asize = BITS32; |
| 2213 | break; |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2214 | case IF_GENBIT(IF_SQ): |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2215 | asize = BITS64; |
| 2216 | break; |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2217 | case IF_GENBIT(IF_SO): |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2218 | asize = BITS128; |
| 2219 | break; |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2220 | case IF_GENBIT(IF_SY): |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2221 | asize = BITS256; |
| 2222 | break; |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2223 | case IF_GENBIT(IF_SZ): |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2224 | asize = BITS512; |
| 2225 | break; |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2226 | case IF_GENBIT(IF_SIZE): |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2227 | switch (bits) { |
| 2228 | case 16: |
| 2229 | asize = BITS16; |
| 2230 | break; |
| 2231 | case 32: |
| 2232 | asize = BITS32; |
| 2233 | break; |
| 2234 | case 64: |
| 2235 | asize = BITS64; |
| 2236 | break; |
| 2237 | default: |
| 2238 | asize = 0; |
| 2239 | break; |
| 2240 | } |
| 2241 | break; |
H. Peter Anvin | 6092624 | 2009-07-26 16:25:38 -0700 | [diff] [blame] | 2242 | default: |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2243 | asize = 0; |
| 2244 | break; |
H. Peter Anvin | 6092624 | 2009-07-26 16:25:38 -0700 | [diff] [blame] | 2245 | } |
| 2246 | |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2247 | if (itemp_armask(itemp)) { |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2248 | /* S- flags only apply to a specific operand */ |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2249 | i = itemp_arg(itemp); |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2250 | memset(size, 0, sizeof size); |
| 2251 | size[i] = asize; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2252 | } else { |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2253 | /* S- flags apply to all operands */ |
| 2254 | for (i = 0; i < MAX_OPERANDS; i++) |
| 2255 | size[i] = asize; |
H. Peter Anvin | ef7468f | 2002-04-30 20:57:59 +0000 | [diff] [blame] | 2256 | } |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2257 | |
H. Peter Anvin | 32cd4c2 | 2008-04-04 13:34:53 -0700 | [diff] [blame] | 2258 | /* |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2259 | * Check that the operand flags all match up, |
| 2260 | * it's a bit tricky so lets be verbose: |
| 2261 | * |
| 2262 | * 1) Find out the size of operand. If instruction |
| 2263 | * doesn't have one specified -- we're trying to |
| 2264 | * guess it either from template (IF_S* flag) or |
| 2265 | * from code bits. |
| 2266 | * |
Ben Rudiak-Gould | 6e87893 | 2013-02-27 10:13:14 -0800 | [diff] [blame] | 2267 | * 2) If template operand do not match the instruction OR |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2268 | * template has an operand size specified AND this size differ |
| 2269 | * from which instruction has (perhaps we got it from code bits) |
| 2270 | * we are: |
| 2271 | * a) Check that only size of instruction and operand is differ |
| 2272 | * other characteristics do match |
| 2273 | * b) Perhaps it's a register specified in instruction so |
| 2274 | * for such a case we just mark that operand as "size |
| 2275 | * missing" and this will turn on fuzzy operand size |
| 2276 | * logic facility (handled by a caller) |
H. Peter Anvin | 32cd4c2 | 2008-04-04 13:34:53 -0700 | [diff] [blame] | 2277 | */ |
| 2278 | for (i = 0; i < itemp->operands; i++) { |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2279 | opflags_t type = instruction->oprs[i].type; |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2280 | decoflags_t deco = instruction->oprs[i].decoflags; |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2281 | bool is_broadcast = deco & BRDCAST_MASK; |
Jin Kyu Song | 25c2212 | 2013-10-30 03:12:45 -0700 | [diff] [blame] | 2282 | uint8_t brcast_num = 0; |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2283 | opflags_t template_opsize, insn_opsize; |
| 2284 | |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2285 | if (!(type & SIZE_MASK)) |
| 2286 | type |= size[i]; |
H. Peter Anvin | d85d250 | 2008-05-04 17:53:31 -0700 | [diff] [blame] | 2287 | |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2288 | insn_opsize = type & SIZE_MASK; |
| 2289 | if (!is_broadcast) { |
| 2290 | template_opsize = itemp->opd[i] & SIZE_MASK; |
| 2291 | } else { |
| 2292 | decoflags_t deco_brsize = itemp->deco[i] & BRSIZE_MASK; |
| 2293 | /* |
| 2294 | * when broadcasting, the element size depends on |
| 2295 | * the instruction type. decorator flag should match. |
| 2296 | */ |
| 2297 | |
| 2298 | if (deco_brsize) { |
| 2299 | template_opsize = (deco_brsize == BR_BITS32 ? BITS32 : BITS64); |
Jin Kyu Song | 25c2212 | 2013-10-30 03:12:45 -0700 | [diff] [blame] | 2300 | /* calculate the proper number : {1to<brcast_num>} */ |
Mark Charney | dcaef4b | 2014-10-09 13:45:17 -0400 | [diff] [blame] | 2301 | brcast_num = get_broadcast_num(itemp->opd[i], template_opsize); |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2302 | } else { |
| 2303 | template_opsize = 0; |
| 2304 | } |
| 2305 | } |
| 2306 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2307 | if ((itemp->opd[i] & ~type & ~SIZE_MASK) || |
Jin Kyu Song | 25c2212 | 2013-10-30 03:12:45 -0700 | [diff] [blame] | 2308 | (deco & ~itemp->deco[i] & ~BRNUM_MASK)) { |
Ben Rudiak-Gould | 4e8396b | 2013-03-01 10:28:32 +0400 | [diff] [blame] | 2309 | return MERR_INVALOP; |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2310 | } else if (template_opsize) { |
| 2311 | if (template_opsize != insn_opsize) { |
| 2312 | if (insn_opsize) { |
Jin Kyu Song | 4d1fc3f | 2013-08-21 19:29:10 -0700 | [diff] [blame] | 2313 | return MERR_INVALOP; |
Jin Kyu Song | 7903c07 | 2013-10-30 03:00:12 -0700 | [diff] [blame] | 2314 | } else if (!is_class(REGISTER, type)) { |
| 2315 | /* |
| 2316 | * Note: we don't honor extrinsic operand sizes for registers, |
| 2317 | * so "missing operand size" for a register should be |
| 2318 | * considered a wildcard match rather than an error. |
| 2319 | */ |
| 2320 | opsizemissing = true; |
Jin Kyu Song | 4d1fc3f | 2013-08-21 19:29:10 -0700 | [diff] [blame] | 2321 | } |
Jin Kyu Song | 25c2212 | 2013-10-30 03:12:45 -0700 | [diff] [blame] | 2322 | } else if (is_broadcast && |
| 2323 | (brcast_num != |
Mark Charney | dcaef4b | 2014-10-09 13:45:17 -0400 | [diff] [blame] | 2324 | (2U << ((deco & BRNUM_MASK) >> BRNUM_SHIFT)))) { |
Jin Kyu Song | 25c2212 | 2013-10-30 03:12:45 -0700 | [diff] [blame] | 2325 | /* |
| 2326 | * broadcasting opsize matches but the number of repeated memory |
| 2327 | * element does not match. |
Mark Charney | dcaef4b | 2014-10-09 13:45:17 -0400 | [diff] [blame] | 2328 | * if 64b double precision float is broadcasted to ymm (256b), |
| 2329 | * broadcasting decorator must be {1to4}. |
Jin Kyu Song | 25c2212 | 2013-10-30 03:12:45 -0700 | [diff] [blame] | 2330 | */ |
| 2331 | return MERR_BRNUMMISMATCH; |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2332 | } |
H. Peter Anvin | 32cd4c2 | 2008-04-04 13:34:53 -0700 | [diff] [blame] | 2333 | } |
| 2334 | } |
| 2335 | |
H. Peter Anvin | 3fb86f2 | 2009-07-25 19:12:10 -0700 | [diff] [blame] | 2336 | if (opsizemissing) |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2337 | return MERR_OPSIZEMISSING; |
H. Peter Anvin | 3fb86f2 | 2009-07-25 19:12:10 -0700 | [diff] [blame] | 2338 | |
H. Peter Anvin | 32cd4c2 | 2008-04-04 13:34:53 -0700 | [diff] [blame] | 2339 | /* |
| 2340 | * Check operand sizes |
| 2341 | */ |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2342 | if (itemp_has(itemp, IF_SM) || itemp_has(itemp, IF_SM2)) { |
| 2343 | oprs = (itemp_has(itemp, IF_SM2) ? 2 : itemp->operands); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2344 | for (i = 0; i < oprs; i++) { |
Cyrill Gorcunov | bc31bee | 2009-11-01 23:16:01 +0300 | [diff] [blame] | 2345 | asize = itemp->opd[i] & SIZE_MASK; |
| 2346 | if (asize) { |
| 2347 | for (i = 0; i < oprs; i++) |
| 2348 | size[i] = asize; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2349 | break; |
| 2350 | } |
| 2351 | } |
H. Peter Anvin | ef7468f | 2002-04-30 20:57:59 +0000 | [diff] [blame] | 2352 | } else { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2353 | oprs = itemp->operands; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2354 | } |
| 2355 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2356 | for (i = 0; i < itemp->operands; i++) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2357 | if (!(itemp->opd[i] & SIZE_MASK) && |
| 2358 | (instruction->oprs[i].type & SIZE_MASK & ~size[i])) |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 2359 | return MERR_OPSIZEMISMATCH; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2360 | } |
| 2361 | |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 2362 | /* |
| 2363 | * Check template is okay at the set cpu level |
| 2364 | */ |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2365 | if (iflag_cmp_cpu_level(&insns_flags[itemp->iflag_idx], &cpu) > 0) |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 2366 | return MERR_BADCPU; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2367 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2368 | /* |
H. Peter Anvin | 6cda414 | 2008-12-29 20:52:28 -0800 | [diff] [blame] | 2369 | * Verify the appropriate long mode flag. |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2370 | */ |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2371 | if (itemp_has(itemp, (bits == 64 ? IF_NOLONG : IF_LONG))) |
H. Peter Anvin | 65289e8 | 2009-07-25 17:25:11 -0700 | [diff] [blame] | 2372 | return MERR_BADMODE; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2373 | |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 2374 | /* |
H. Peter Anvin | fb3f4e6 | 2012-02-25 22:22:07 -0800 | [diff] [blame] | 2375 | * If we have a HLE prefix, look for the NOHLE flag |
| 2376 | */ |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2377 | if (itemp_has(itemp, IF_NOHLE) && |
H. Peter Anvin | fb3f4e6 | 2012-02-25 22:22:07 -0800 | [diff] [blame] | 2378 | (has_prefix(instruction, PPS_REP, P_XACQUIRE) || |
| 2379 | has_prefix(instruction, PPS_REP, P_XRELEASE))) |
| 2380 | return MERR_BADHLE; |
| 2381 | |
| 2382 | /* |
H. Peter Anvin | af535c1 | 2002-04-30 20:59:21 +0000 | [diff] [blame] | 2383 | * Check if special handling needed for Jumps |
| 2384 | */ |
H. Peter Anvin | 755f521 | 2012-02-25 11:41:34 -0800 | [diff] [blame] | 2385 | if ((itemp->code[0] & ~1) == 0370) |
Cyrill Gorcunov | 1de9500 | 2009-11-06 00:08:38 +0300 | [diff] [blame] | 2386 | return MOK_JUMP; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2387 | |
Jin Kyu Song | 0304109 | 2013-10-15 19:38:51 -0700 | [diff] [blame] | 2388 | /* |
Jin Kyu Song | b287ff0 | 2013-12-04 20:05:55 -0800 | [diff] [blame] | 2389 | * Check if BND prefix is allowed. |
| 2390 | * Other 0xF2 (REPNE/REPNZ) prefix is prohibited. |
Jin Kyu Song | 0304109 | 2013-10-15 19:38:51 -0700 | [diff] [blame] | 2391 | */ |
Cyrill Gorcunov | 0835915 | 2013-11-09 22:16:11 +0400 | [diff] [blame] | 2392 | if (!itemp_has(itemp, IF_BND) && |
Jin Kyu Song | b287ff0 | 2013-12-04 20:05:55 -0800 | [diff] [blame] | 2393 | (has_prefix(instruction, PPS_REP, P_BND) || |
| 2394 | has_prefix(instruction, PPS_REP, P_NOBND))) |
Jin Kyu Song | 0304109 | 2013-10-15 19:38:51 -0700 | [diff] [blame] | 2395 | return MERR_BADBND; |
Jin Kyu Song | b287ff0 | 2013-12-04 20:05:55 -0800 | [diff] [blame] | 2396 | else if (itemp_has(itemp, IF_BND) && |
| 2397 | (has_prefix(instruction, PPS_REP, P_REPNE) || |
| 2398 | has_prefix(instruction, PPS_REP, P_REPNZ))) |
| 2399 | return MERR_BADREPNE; |
Jin Kyu Song | 0304109 | 2013-10-15 19:38:51 -0700 | [diff] [blame] | 2400 | |
H. Peter Anvin | 6092624 | 2009-07-26 16:25:38 -0700 | [diff] [blame] | 2401 | return MOK_GOOD; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2402 | } |
| 2403 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2404 | /* |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2405 | * Check if ModR/M.mod should/can be 01. |
| 2406 | * - EAF_BYTEOFFS is set |
| 2407 | * - offset can fit in a byte when EVEX is not used |
| 2408 | * - offset can be compressed when EVEX is used |
| 2409 | */ |
| 2410 | #define IS_MOD_01() (input->eaflags & EAF_BYTEOFFS || \ |
| 2411 | (o >= -128 && o <= 127 && \ |
| 2412 | seg == NO_SEG && !forw_ref && \ |
| 2413 | !(input->eaflags & EAF_WORDOFFS) && \ |
| 2414 | !(ins->rex & REX_EV)) || \ |
| 2415 | (ins->rex & REX_EV && \ |
| 2416 | is_disp8n(input, ins, &output->disp8))) |
| 2417 | |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2418 | static enum ea_type process_ea(operand *input, ea *output, int bits, |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2419 | int rfield, opflags_t rflags, insn *ins) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 2420 | { |
H. Peter Anvin | ab5bd05 | 2010-07-25 12:43:30 -0700 | [diff] [blame] | 2421 | bool forw_ref = !!(input->opflags & OPFLAG_UNKNOWN); |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2422 | int addrbits = ins->addr_size; |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2423 | int eaflags = input->eaflags; |
H. Peter Anvin | 1c3277b | 2008-07-19 21:38:56 -0700 | [diff] [blame] | 2424 | |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2425 | output->type = EA_SCALAR; |
| 2426 | output->rip = false; |
Jin Kyu Song | db358a2 | 2013-09-20 20:36:19 -0700 | [diff] [blame] | 2427 | output->disp8 = 0; |
H. Peter Anvin | 99c4ecd | 2007-08-28 23:06:00 +0000 | [diff] [blame] | 2428 | |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2429 | /* REX flags for the rfield operand */ |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2430 | output->rex |= rexflags(rfield, rflags, REX_R | REX_P | REX_W | REX_H); |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2431 | /* EVEX.R' flag for the REG operand */ |
| 2432 | ins->evex_p[0] |= evexflags(rfield, 0, EVEX_P0RP, 0); |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2433 | |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2434 | if (is_class(REGISTER, input->type)) { |
| 2435 | /* |
| 2436 | * It's a direct register. |
| 2437 | */ |
Cyrill Gorcunov | 2124b7b | 2010-07-25 01:16:33 +0400 | [diff] [blame] | 2438 | if (!is_register(input->basereg)) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2439 | goto err; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2440 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2441 | if (!is_reg_class(REG_EA, input->basereg)) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2442 | goto err; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2443 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2444 | /* broadcasting is not available with a direct register operand. */ |
| 2445 | if (input->decoflags & BRDCAST_MASK) { |
| 2446 | nasm_error(ERR_NONFATAL, "Broadcasting not allowed from a register"); |
| 2447 | goto err; |
| 2448 | } |
| 2449 | |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2450 | output->rex |= op_rexflags(input, REX_B | REX_P | REX_W | REX_H); |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2451 | ins->evex_p[0] |= op_evexflags(input, EVEX_P0X, 0); |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2452 | output->sib_present = false; /* no SIB necessary */ |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2453 | output->bytes = 0; /* no offset necessary either */ |
| 2454 | output->modrm = GEN_MODRM(3, rfield, nasm_regvals[input->basereg]); |
| 2455 | } else { |
| 2456 | /* |
| 2457 | * It's a memory reference. |
| 2458 | */ |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2459 | |
| 2460 | /* Embedded rounding or SAE is not available with a mem ref operand. */ |
| 2461 | if (input->decoflags & (ER | SAE)) { |
| 2462 | nasm_error(ERR_NONFATAL, |
| 2463 | "Embedded rounding is available only with reg-reg op."); |
| 2464 | return -1; |
| 2465 | } |
| 2466 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2467 | if (input->basereg == -1 && |
| 2468 | (input->indexreg == -1 || input->scale == 0)) { |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2469 | /* |
| 2470 | * It's a pure offset. |
| 2471 | */ |
Victor van den Elzen | 0d268fb | 2010-01-24 21:24:57 +0100 | [diff] [blame] | 2472 | if (bits == 64 && ((input->type & IP_REL) == IP_REL) && |
| 2473 | input->segment == NO_SEG) { |
| 2474 | nasm_error(ERR_WARNING | ERR_PASS1, "absolute address can not be RIP-relative"); |
| 2475 | input->type &= ~IP_REL; |
| 2476 | input->type |= MEMORY; |
| 2477 | } |
| 2478 | |
Jin Kyu Song | 97f6fae | 2013-12-18 21:28:17 -0800 | [diff] [blame] | 2479 | if (bits == 64 && |
| 2480 | !(IP_REL & ~input->type) && (eaflags & EAF_MIB)) { |
| 2481 | nasm_error(ERR_NONFATAL, "RIP-relative addressing is prohibited for mib."); |
| 2482 | return -1; |
| 2483 | } |
| 2484 | |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2485 | if (eaflags & EAF_BYTEOFFS || |
| 2486 | (eaflags & EAF_WORDOFFS && |
Victor van den Elzen | 0d268fb | 2010-01-24 21:24:57 +0100 | [diff] [blame] | 2487 | input->disp_size != (addrbits != 16 ? 32 : 16))) { |
| 2488 | nasm_error(ERR_WARNING | ERR_PASS1, "displacement size ignored on absolute address"); |
| 2489 | } |
| 2490 | |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2491 | if (bits == 64 && (~input->type & IP_REL)) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2492 | output->sib_present = true; |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2493 | output->sib = GEN_SIB(0, 4, 5); |
| 2494 | output->bytes = 4; |
| 2495 | output->modrm = GEN_MODRM(0, rfield, 4); |
| 2496 | output->rip = false; |
Chuck Crayne | 42fe6ce | 2007-06-03 02:42:41 +0000 | [diff] [blame] | 2497 | } else { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2498 | output->sib_present = false; |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2499 | output->bytes = (addrbits != 16 ? 4 : 2); |
| 2500 | output->modrm = GEN_MODRM(0, rfield, (addrbits != 16 ? 5 : 6)); |
| 2501 | output->rip = bits == 64; |
Chuck Crayne | 42fe6ce | 2007-06-03 02:42:41 +0000 | [diff] [blame] | 2502 | } |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2503 | } else { |
| 2504 | /* |
| 2505 | * It's an indirection. |
| 2506 | */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2507 | int i = input->indexreg, b = input->basereg, s = input->scale; |
H. Peter Anvin | ab5bd05 | 2010-07-25 12:43:30 -0700 | [diff] [blame] | 2508 | int32_t seg = input->segment; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2509 | int hb = input->hintbase, ht = input->hinttype; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2510 | int t, it, bt; /* register numbers */ |
| 2511 | opflags_t x, ix, bx; /* register flags */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2512 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2513 | if (s == 0) |
| 2514 | i = -1; /* make this easy, at least */ |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2515 | |
Cyrill Gorcunov | 2124b7b | 2010-07-25 01:16:33 +0400 | [diff] [blame] | 2516 | if (is_register(i)) { |
H. Peter Anvin | a4835d4 | 2008-05-20 14:21:29 -0700 | [diff] [blame] | 2517 | it = nasm_regvals[i]; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2518 | ix = nasm_reg_flags[i]; |
| 2519 | } else { |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2520 | it = -1; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2521 | ix = 0; |
| 2522 | } |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2523 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2524 | if (is_register(b)) { |
H. Peter Anvin | a4835d4 | 2008-05-20 14:21:29 -0700 | [diff] [blame] | 2525 | bt = nasm_regvals[b]; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2526 | bx = nasm_reg_flags[b]; |
| 2527 | } else { |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2528 | bt = -1; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2529 | bx = 0; |
| 2530 | } |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2531 | |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2532 | /* if either one are a vector register... */ |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2533 | if ((ix|bx) & (XMMREG|YMMREG|ZMMREG) & ~REG_EA) { |
Cyrill Gorcunov | 167917a | 2012-09-10 00:19:12 +0400 | [diff] [blame] | 2534 | opflags_t sok = BITS32 | BITS64; |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2535 | int32_t o = input->offset; |
| 2536 | int mod, scale, index, base; |
| 2537 | |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2538 | /* |
| 2539 | * For a vector SIB, one has to be a vector and the other, |
| 2540 | * if present, a GPR. The vector must be the index operand. |
| 2541 | */ |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2542 | if (it == -1 || (bx & (XMMREG|YMMREG|ZMMREG) & ~REG_EA)) { |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2543 | if (s == 0) |
| 2544 | s = 1; |
| 2545 | else if (s != 1) |
| 2546 | goto err; |
| 2547 | |
| 2548 | t = bt, bt = it, it = t; |
| 2549 | x = bx, bx = ix, ix = x; |
| 2550 | } |
| 2551 | |
| 2552 | if (bt != -1) { |
| 2553 | if (REG_GPR & ~bx) |
| 2554 | goto err; |
| 2555 | if (!(REG64 & ~bx) || !(REG32 & ~bx)) |
| 2556 | sok &= bx; |
| 2557 | else |
| 2558 | goto err; |
| 2559 | } |
| 2560 | |
| 2561 | /* |
| 2562 | * While we're here, ensure the user didn't specify |
| 2563 | * WORD or QWORD |
| 2564 | */ |
| 2565 | if (input->disp_size == 16 || input->disp_size == 64) |
| 2566 | goto err; |
| 2567 | |
| 2568 | if (addrbits == 16 || |
| 2569 | (addrbits == 32 && !(sok & BITS32)) || |
| 2570 | (addrbits == 64 && !(sok & BITS64))) |
| 2571 | goto err; |
| 2572 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2573 | output->type = ((ix & ZMMREG & ~REG_EA) ? EA_ZMMVSIB |
| 2574 | : ((ix & YMMREG & ~REG_EA) |
| 2575 | ? EA_YMMVSIB : EA_XMMVSIB)); |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2576 | |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2577 | output->rex |= rexflags(it, ix, REX_X); |
| 2578 | output->rex |= rexflags(bt, bx, REX_B); |
| 2579 | ins->evex_p[2] |= evexflags(it, 0, EVEX_P2VP, 2); |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2580 | |
| 2581 | index = it & 7; /* it is known to be != -1 */ |
| 2582 | |
| 2583 | switch (s) { |
| 2584 | case 1: |
| 2585 | scale = 0; |
| 2586 | break; |
| 2587 | case 2: |
| 2588 | scale = 1; |
| 2589 | break; |
| 2590 | case 4: |
| 2591 | scale = 2; |
| 2592 | break; |
| 2593 | case 8: |
| 2594 | scale = 3; |
| 2595 | break; |
| 2596 | default: /* then what the smeg is it? */ |
| 2597 | goto err; /* panic */ |
| 2598 | } |
| 2599 | |
| 2600 | if (bt == -1) { |
| 2601 | base = 5; |
| 2602 | mod = 0; |
| 2603 | } else { |
| 2604 | base = (bt & 7); |
| 2605 | if (base != REG_NUM_EBP && o == 0 && |
| 2606 | seg == NO_SEG && !forw_ref && |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2607 | !(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS))) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2608 | mod = 0; |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2609 | else if (IS_MOD_01()) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2610 | mod = 1; |
| 2611 | else |
| 2612 | mod = 2; |
| 2613 | } |
| 2614 | |
| 2615 | output->sib_present = true; |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2616 | output->bytes = (bt == -1 || mod == 2 ? 4 : mod); |
| 2617 | output->modrm = GEN_MODRM(mod, rfield, 4); |
| 2618 | output->sib = GEN_SIB(scale, index, base); |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2619 | } else if ((ix|bx) & (BITS32|BITS64)) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2620 | /* |
| 2621 | * it must be a 32/64-bit memory reference. Firstly we have |
| 2622 | * to check that all registers involved are type E/Rxx. |
| 2623 | */ |
Cyrill Gorcunov | 167917a | 2012-09-10 00:19:12 +0400 | [diff] [blame] | 2624 | opflags_t sok = BITS32 | BITS64; |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2625 | int32_t o = input->offset; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2626 | |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2627 | if (it != -1) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2628 | if (!(REG64 & ~ix) || !(REG32 & ~ix)) |
| 2629 | sok &= ix; |
| 2630 | else |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2631 | goto err; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2632 | } |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2633 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2634 | if (bt != -1) { |
| 2635 | if (REG_GPR & ~bx) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2636 | goto err; /* Invalid register */ |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2637 | if (~sok & bx & SIZE_MASK) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2638 | goto err; /* Invalid size */ |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2639 | sok &= bx; |
| 2640 | } |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2641 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2642 | /* |
| 2643 | * While we're here, ensure the user didn't specify |
| 2644 | * WORD or QWORD |
| 2645 | */ |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2646 | if (input->disp_size == 16 || input->disp_size == 64) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2647 | goto err; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2648 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2649 | if (addrbits == 16 || |
| 2650 | (addrbits == 32 && !(sok & BITS32)) || |
| 2651 | (addrbits == 64 && !(sok & BITS64))) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2652 | goto err; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2653 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2654 | /* now reorganize base/index */ |
| 2655 | if (s == 1 && bt != it && bt != -1 && it != -1 && |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2656 | ((hb == b && ht == EAH_NOTBASE) || |
| 2657 | (hb == i && ht == EAH_MAKEBASE))) { |
| 2658 | /* swap if hints say so */ |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2659 | t = bt, bt = it, it = t; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2660 | x = bx, bx = ix, ix = x; |
| 2661 | } |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2662 | |
Jin Kyu Song | 164d607 | 2013-10-15 19:10:13 -0700 | [diff] [blame] | 2663 | if (bt == -1 && s == 1 && !(hb == i && ht == EAH_NOTBASE)) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2664 | /* make single reg base, unless hint */ |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2665 | bt = it, bx = ix, it = -1, ix = 0; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2666 | } |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2667 | if (eaflags & EAF_MIB) { |
| 2668 | /* only for mib operands */ |
| 2669 | if (it == -1 && (hb == b && ht == EAH_NOTBASE)) { |
| 2670 | /* |
| 2671 | * make a single reg index [reg*1]. |
| 2672 | * gas uses this form for an explicit index register. |
| 2673 | */ |
| 2674 | it = bt, ix = bx, bt = -1, bx = 0, s = 1; |
| 2675 | } |
| 2676 | if ((ht == EAH_SUMMED) && bt == -1) { |
| 2677 | /* separate once summed index into [base, index] */ |
| 2678 | bt = it, bx = ix, s--; |
| 2679 | } |
| 2680 | } else { |
| 2681 | if (((s == 2 && it != REG_NUM_ESP && |
Jin Kyu Song | 3d06af2 | 2013-12-18 21:28:41 -0800 | [diff] [blame] | 2682 | (!(eaflags & EAF_TIMESTWO) || (ht == EAH_SUMMED))) || |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2683 | s == 3 || s == 5 || s == 9) && bt == -1) { |
| 2684 | /* convert 3*EAX to EAX+2*EAX */ |
| 2685 | bt = it, bx = ix, s--; |
| 2686 | } |
| 2687 | if (it == -1 && (bt & 7) != REG_NUM_ESP && |
Jin Kyu Song | 26ddad6 | 2013-12-18 22:01:14 -0800 | [diff] [blame] | 2688 | (eaflags & EAF_TIMESTWO) && |
| 2689 | (hb == b && ht == EAH_NOTBASE)) { |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2690 | /* |
Jin Kyu Song | 26ddad6 | 2013-12-18 22:01:14 -0800 | [diff] [blame] | 2691 | * convert [NOSPLIT EAX*1] |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2692 | * to sib format with 0x0 displacement - [EAX*1+0]. |
| 2693 | */ |
| 2694 | it = bt, ix = bx, bt = -1, bx = 0, s = 1; |
| 2695 | } |
| 2696 | } |
Keith Kanios | 48af177 | 2007-08-17 07:37:52 +0000 | [diff] [blame] | 2697 | if (s == 1 && it == REG_NUM_ESP) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2698 | /* swap ESP into base if scale is 1 */ |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2699 | t = it, it = bt, bt = t; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2700 | x = ix, ix = bx, bx = x; |
| 2701 | } |
| 2702 | if (it == REG_NUM_ESP || |
| 2703 | (s != 1 && s != 2 && s != 4 && s != 8 && it != -1)) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2704 | goto err; /* wrong, for various reasons */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2705 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2706 | output->rex |= rexflags(it, ix, REX_X); |
| 2707 | output->rex |= rexflags(bt, bx, REX_B); |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2708 | |
Keith Kanios | 48af177 | 2007-08-17 07:37:52 +0000 | [diff] [blame] | 2709 | if (it == -1 && (bt & 7) != REG_NUM_ESP) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2710 | /* no SIB needed */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2711 | int mod, rm; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2712 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2713 | if (bt == -1) { |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2714 | rm = 5; |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2715 | mod = 0; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2716 | } else { |
| 2717 | rm = (bt & 7); |
H. Peter Anvin | ab5bd05 | 2010-07-25 12:43:30 -0700 | [diff] [blame] | 2718 | if (rm != REG_NUM_EBP && o == 0 && |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2719 | seg == NO_SEG && !forw_ref && |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2720 | !(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS))) |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2721 | mod = 0; |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2722 | else if (IS_MOD_01()) |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2723 | mod = 1; |
| 2724 | else |
| 2725 | mod = 2; |
| 2726 | } |
H. Peter Anvin | ea83827 | 2002-04-30 20:51:53 +0000 | [diff] [blame] | 2727 | |
H. Peter Anvin | 6867acc | 2007-10-10 14:58:45 -0700 | [diff] [blame] | 2728 | output->sib_present = false; |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2729 | output->bytes = (bt == -1 || mod == 2 ? 4 : mod); |
| 2730 | output->modrm = GEN_MODRM(mod, rfield, rm); |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2731 | } else { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2732 | /* we need a SIB */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2733 | int mod, scale, index, base; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2734 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2735 | if (it == -1) |
| 2736 | index = 4, s = 1; |
| 2737 | else |
| 2738 | index = (it & 7); |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2739 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2740 | switch (s) { |
| 2741 | case 1: |
| 2742 | scale = 0; |
| 2743 | break; |
| 2744 | case 2: |
| 2745 | scale = 1; |
| 2746 | break; |
| 2747 | case 4: |
| 2748 | scale = 2; |
| 2749 | break; |
| 2750 | case 8: |
| 2751 | scale = 3; |
| 2752 | break; |
| 2753 | default: /* then what the smeg is it? */ |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2754 | goto err; /* panic */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2755 | } |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2756 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2757 | if (bt == -1) { |
| 2758 | base = 5; |
| 2759 | mod = 0; |
| 2760 | } else { |
| 2761 | base = (bt & 7); |
H. Peter Anvin | ab5bd05 | 2010-07-25 12:43:30 -0700 | [diff] [blame] | 2762 | if (base != REG_NUM_EBP && o == 0 && |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2763 | seg == NO_SEG && !forw_ref && |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2764 | !(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS))) |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2765 | mod = 0; |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2766 | else if (IS_MOD_01()) |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2767 | mod = 1; |
| 2768 | else |
| 2769 | mod = 2; |
| 2770 | } |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2771 | |
H. Peter Anvin | 6867acc | 2007-10-10 14:58:45 -0700 | [diff] [blame] | 2772 | output->sib_present = true; |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2773 | output->bytes = (bt == -1 || mod == 2 ? 4 : mod); |
| 2774 | output->modrm = GEN_MODRM(mod, rfield, 4); |
| 2775 | output->sib = GEN_SIB(scale, index, base); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2776 | } |
| 2777 | } else { /* it's 16-bit */ |
| 2778 | int mod, rm; |
H. Peter Anvin | ab5bd05 | 2010-07-25 12:43:30 -0700 | [diff] [blame] | 2779 | int16_t o = input->offset; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2780 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2781 | /* check for 64-bit long mode */ |
| 2782 | if (addrbits == 64) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2783 | goto err; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2784 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2785 | /* check all registers are BX, BP, SI or DI */ |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2786 | if ((b != -1 && b != R_BP && b != R_BX && b != R_SI && b != R_DI) || |
| 2787 | (i != -1 && i != R_BP && i != R_BX && i != R_SI && i != R_DI)) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2788 | goto err; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2789 | |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2790 | /* ensure the user didn't specify DWORD/QWORD */ |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2791 | if (input->disp_size == 32 || input->disp_size == 64) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2792 | goto err; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2793 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2794 | if (s != 1 && i != -1) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2795 | goto err; /* no can do, in 16-bit EA */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2796 | if (b == -1 && i != -1) { |
| 2797 | int tmp = b; |
| 2798 | b = i; |
| 2799 | i = tmp; |
| 2800 | } /* swap */ |
| 2801 | if ((b == R_SI || b == R_DI) && i != -1) { |
| 2802 | int tmp = b; |
| 2803 | b = i; |
| 2804 | i = tmp; |
| 2805 | } |
| 2806 | /* have BX/BP as base, SI/DI index */ |
| 2807 | if (b == i) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2808 | goto err; /* shouldn't ever happen, in theory */ |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2809 | if (i != -1 && b != -1 && |
| 2810 | (i == R_BP || i == R_BX || b == R_SI || b == R_DI)) |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2811 | goto err; /* invalid combinations */ |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2812 | if (b == -1) /* pure offset: handled above */ |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2813 | goto err; /* so if it gets to here, panic! */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2814 | |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2815 | rm = -1; |
| 2816 | if (i != -1) |
| 2817 | switch (i * 256 + b) { |
| 2818 | case R_SI * 256 + R_BX: |
| 2819 | rm = 0; |
| 2820 | break; |
| 2821 | case R_DI * 256 + R_BX: |
| 2822 | rm = 1; |
| 2823 | break; |
| 2824 | case R_SI * 256 + R_BP: |
| 2825 | rm = 2; |
| 2826 | break; |
| 2827 | case R_DI * 256 + R_BP: |
| 2828 | rm = 3; |
| 2829 | break; |
| 2830 | } else |
| 2831 | switch (b) { |
| 2832 | case R_SI: |
| 2833 | rm = 4; |
| 2834 | break; |
| 2835 | case R_DI: |
| 2836 | rm = 5; |
| 2837 | break; |
| 2838 | case R_BP: |
| 2839 | rm = 6; |
| 2840 | break; |
| 2841 | case R_BX: |
| 2842 | rm = 7; |
| 2843 | break; |
| 2844 | } |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2845 | if (rm == -1) /* can't happen, in theory */ |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2846 | goto err; /* so panic if it does */ |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2847 | |
H. Peter Anvin | ab5bd05 | 2010-07-25 12:43:30 -0700 | [diff] [blame] | 2848 | if (o == 0 && seg == NO_SEG && !forw_ref && rm != 6 && |
Jin Kyu Song | 4360ba2 | 2013-12-10 16:24:45 -0800 | [diff] [blame] | 2849 | !(eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS))) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2850 | mod = 0; |
Jin Kyu Song | cc1dc9d | 2013-08-15 19:01:25 -0700 | [diff] [blame] | 2851 | else if (IS_MOD_01()) |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2852 | mod = 1; |
| 2853 | else |
| 2854 | mod = 2; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2855 | |
H. Peter Anvin | 6867acc | 2007-10-10 14:58:45 -0700 | [diff] [blame] | 2856 | output->sib_present = false; /* no SIB - it's 16-bit */ |
Cyrill Gorcunov | 10734c7 | 2011-08-29 00:07:17 +0400 | [diff] [blame] | 2857 | output->bytes = mod; /* bytes of offset needed */ |
| 2858 | output->modrm = GEN_MODRM(mod, rfield, rm); |
H. Peter Anvin | e2c8018 | 2005-01-15 22:15:51 +0000 | [diff] [blame] | 2859 | } |
| 2860 | } |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2861 | } |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2862 | |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2863 | output->size = 1 + output->sib_present + output->bytes; |
H. Peter Anvin | 3089f7e | 2011-06-22 18:19:28 -0700 | [diff] [blame] | 2864 | return output->type; |
| 2865 | |
| 2866 | err: |
| 2867 | return output->type = EA_INVALID; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2868 | } |
| 2869 | |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2870 | static void add_asp(insn *ins, int addrbits) |
H. Peter Anvin | eba20a7 | 2002-04-30 20:53:55 +0000 | [diff] [blame] | 2871 | { |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 2872 | int j, valid; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2873 | int defdisp; |
Keith Kanios | b7a8954 | 2007-04-12 02:40:54 +0000 | [diff] [blame] | 2874 | |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 2875 | valid = (addrbits == 64) ? 64|32 : 32|16; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2876 | |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2877 | switch (ins->prefixes[PPS_ASIZE]) { |
| 2878 | case P_A16: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2879 | valid &= 16; |
| 2880 | break; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2881 | case P_A32: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2882 | valid &= 32; |
| 2883 | break; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2884 | case P_A64: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2885 | valid &= 64; |
| 2886 | break; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2887 | case P_ASP: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2888 | valid &= (addrbits == 32) ? 16 : 32; |
| 2889 | break; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2890 | default: |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2891 | break; |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2892 | } |
| 2893 | |
| 2894 | for (j = 0; j < ins->operands; j++) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2895 | if (is_class(MEMORY, ins->oprs[j].type)) { |
| 2896 | opflags_t i, b; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2897 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2898 | /* Verify as Register */ |
Cyrill Gorcunov | 2124b7b | 2010-07-25 01:16:33 +0400 | [diff] [blame] | 2899 | if (!is_register(ins->oprs[j].indexreg)) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2900 | i = 0; |
| 2901 | else |
| 2902 | i = nasm_reg_flags[ins->oprs[j].indexreg]; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2903 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2904 | /* Verify as Register */ |
Cyrill Gorcunov | 2124b7b | 2010-07-25 01:16:33 +0400 | [diff] [blame] | 2905 | if (!is_register(ins->oprs[j].basereg)) |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2906 | b = 0; |
| 2907 | else |
| 2908 | b = nasm_reg_flags[ins->oprs[j].basereg]; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2909 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2910 | if (ins->oprs[j].scale == 0) |
| 2911 | i = 0; |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2912 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2913 | if (!i && !b) { |
| 2914 | int ds = ins->oprs[j].disp_size; |
| 2915 | if ((addrbits != 64 && ds > 8) || |
| 2916 | (addrbits == 64 && ds == 16)) |
| 2917 | valid &= ds; |
| 2918 | } else { |
| 2919 | if (!(REG16 & ~b)) |
| 2920 | valid &= 16; |
| 2921 | if (!(REG32 & ~b)) |
| 2922 | valid &= 32; |
| 2923 | if (!(REG64 & ~b)) |
| 2924 | valid &= 64; |
H. Peter Anvin | 7065309 | 2007-10-19 14:42:29 -0700 | [diff] [blame] | 2925 | |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2926 | if (!(REG16 & ~i)) |
| 2927 | valid &= 16; |
| 2928 | if (!(REG32 & ~i)) |
| 2929 | valid &= 32; |
| 2930 | if (!(REG64 & ~i)) |
| 2931 | valid &= 64; |
| 2932 | } |
| 2933 | } |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 2934 | } |
| 2935 | |
| 2936 | if (valid & addrbits) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2937 | ins->addr_size = addrbits; |
H. Peter Anvin | c5b9ce0 | 2007-09-22 21:49:51 -0700 | [diff] [blame] | 2938 | } else if (valid & ((addrbits == 32) ? 16 : 32)) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2939 | /* Add an address size prefix */ |
Cyrill Gorcunov | d6851d4 | 2011-09-25 18:01:45 +0400 | [diff] [blame] | 2940 | ins->prefixes[PPS_ASIZE] = (addrbits == 32) ? P_A16 : P_A32;; |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2941 | ins->addr_size = (addrbits == 32) ? 16 : 32; |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2942 | } else { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2943 | /* Impossible... */ |
| 2944 | errfunc(ERR_NONFATAL, "impossible combination of address sizes"); |
| 2945 | ins->addr_size = addrbits; /* Error recovery */ |
H. Peter Anvin | de4b89b | 2007-10-01 15:41:25 -0700 | [diff] [blame] | 2946 | } |
| 2947 | |
| 2948 | defdisp = ins->addr_size == 16 ? 16 : 32; |
| 2949 | |
| 2950 | for (j = 0; j < ins->operands; j++) { |
Cyrill Gorcunov | d6f3124 | 2010-07-26 23:14:40 +0400 | [diff] [blame] | 2951 | if (!(MEM_OFFS & ~ins->oprs[j].type) && |
| 2952 | (ins->oprs[j].disp_size ? ins->oprs[j].disp_size : defdisp) != ins->addr_size) { |
| 2953 | /* |
| 2954 | * mem_offs sizes must match the address size; if not, |
| 2955 | * strip the MEM_OFFS bit and match only EA instructions |
| 2956 | */ |
| 2957 | ins->oprs[j].type &= ~(MEM_OFFS & ~MEMORY); |
| 2958 | } |
H. Peter Anvin | 3df97a7 | 2007-05-30 03:25:21 +0000 | [diff] [blame] | 2959 | } |
H. Peter Anvin | ea6e34d | 2002-04-30 20:51:32 +0000 | [diff] [blame] | 2960 | } |