Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 2 | /* |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 3 | * Copyright (C) 2006 Micron Technology Inc. |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 6 | #ifndef _MTD_NAND_OMAP2_H |
| 7 | #define _MTD_NAND_OMAP2_H |
| 8 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 9 | #include <linux/mtd/partitions.h> |
| 10 | |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 11 | #define GPMC_BCH_NUM_REMAINDER 8 |
| 12 | |
Sukumar Ghorai | 1b0b323c | 2011-01-28 15:42:04 +0530 | [diff] [blame] | 13 | enum nand_io { |
| 14 | NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */ |
| 15 | NAND_OMAP_POLLED, /* polled mode, without prefetch */ |
Sukumar Ghorai | 4e07037 | 2011-01-28 15:42:06 +0530 | [diff] [blame] | 16 | NAND_OMAP_PREFETCH_DMA, /* prefetch enabled sDMA mode */ |
| 17 | NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */ |
Sukumar Ghorai | 1b0b323c | 2011-01-28 15:42:04 +0530 | [diff] [blame] | 18 | }; |
| 19 | |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 20 | enum omap_ecc { |
Roger Quadros | 7d5929c | 2014-08-25 16:15:32 -0700 | [diff] [blame] | 21 | /* |
| 22 | * 1-bit ECC: calculation and correction by SW |
| 23 | * ECC stored at end of spare area |
| 24 | */ |
| 25 | OMAP_ECC_HAM1_CODE_SW = 0, |
| 26 | |
| 27 | /* |
| 28 | * 1-bit ECC: calculation by GPMC, Error detection by Software |
| 29 | * ECC layout compatible with ROM code layout |
| 30 | */ |
| 31 | OMAP_ECC_HAM1_CODE_HW, |
Pekon Gupta | ac65caf5 | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 32 | /* 4-bit ECC calculation by GPMC, Error detection by Software */ |
| 33 | OMAP_ECC_BCH4_CODE_HW_DETECTION_SW, |
| 34 | /* 4-bit ECC calculation by GPMC, Error detection by ELM */ |
| 35 | OMAP_ECC_BCH4_CODE_HW, |
| 36 | /* 8-bit ECC calculation by GPMC, Error detection by Software */ |
| 37 | OMAP_ECC_BCH8_CODE_HW_DETECTION_SW, |
| 38 | /* 8-bit ECC calculation by GPMC, Error detection by ELM */ |
| 39 | OMAP_ECC_BCH8_CODE_HW, |
pekon gupta | 27c9fd6 | 2014-05-19 13:24:39 +0530 | [diff] [blame] | 40 | /* 16-bit ECC calculation by GPMC, Error detection by ELM */ |
| 41 | OMAP_ECC_BCH16_CODE_HW, |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 42 | }; |
| 43 | |
| 44 | struct gpmc_nand_regs { |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 45 | void __iomem *gpmc_nand_command; |
| 46 | void __iomem *gpmc_nand_address; |
| 47 | void __iomem *gpmc_nand_data; |
| 48 | void __iomem *gpmc_prefetch_config1; |
| 49 | void __iomem *gpmc_prefetch_config2; |
| 50 | void __iomem *gpmc_prefetch_control; |
| 51 | void __iomem *gpmc_prefetch_status; |
| 52 | void __iomem *gpmc_ecc_config; |
| 53 | void __iomem *gpmc_ecc_control; |
| 54 | void __iomem *gpmc_ecc_size_config; |
| 55 | void __iomem *gpmc_ecc1_result; |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 56 | void __iomem *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER]; |
| 57 | void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER]; |
| 58 | void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER]; |
| 59 | void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER]; |
pekon gupta | 27c9fd6 | 2014-05-19 13:24:39 +0530 | [diff] [blame] | 60 | void __iomem *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER]; |
| 61 | void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER]; |
| 62 | void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER]; |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 63 | }; |
stanley.miao | 562468b | 2010-04-20 06:33:26 +0000 | [diff] [blame] | 64 | #endif |