Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 2 | /* |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 3 | * Copyright (C) 2012-2013 Avionic Design GmbH |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 4 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
| 5 | * |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 6 | * Based on the KMS/FB CMA helpers |
| 7 | * Copyright (C) 2012 Analog Device Inc. |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
Thierry Reding | 986c58d | 2015-08-11 13:11:49 +0200 | [diff] [blame] | 10 | #include <linux/console.h> |
| 11 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 12 | #include "drm.h" |
| 13 | #include "gem.h" |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 14 | #include <drm/drm_gem_framebuffer_helper.h> |
Daniel Vetter | fcd70cd | 2019-01-17 22:03:34 +0100 | [diff] [blame] | 15 | #include <drm/drm_modeset_helper.h> |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 16 | |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 17 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 18 | static inline struct tegra_fbdev *to_tegra_fbdev(struct drm_fb_helper *helper) |
| 19 | { |
| 20 | return container_of(helper, struct tegra_fbdev, base); |
| 21 | } |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 22 | #endif |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 23 | |
| 24 | struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer, |
| 25 | unsigned int index) |
| 26 | { |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 27 | return to_tegra_bo(drm_gem_fb_get_obj(framebuffer, index)); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 28 | } |
| 29 | |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 30 | bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer) |
| 31 | { |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 32 | struct tegra_bo *bo = tegra_fb_get_plane(framebuffer, 0); |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 33 | |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 34 | if (bo->flags & TEGRA_BO_BOTTOM_UP) |
Thierry Reding | db7fbdf | 2013-10-07 09:47:58 +0200 | [diff] [blame] | 35 | return true; |
| 36 | |
| 37 | return false; |
| 38 | } |
| 39 | |
Thierry Reding | c134f01 | 2014-06-03 14:48:12 +0200 | [diff] [blame] | 40 | int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer, |
| 41 | struct tegra_bo_tiling *tiling) |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 42 | { |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 43 | uint64_t modifier = framebuffer->modifier; |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 44 | |
Thierry Reding | 268892c | 2017-10-12 16:39:20 +0200 | [diff] [blame] | 45 | switch (modifier) { |
Thierry Reding | 4ae4b5c | 2018-03-15 16:45:45 +0100 | [diff] [blame] | 46 | case DRM_FORMAT_MOD_LINEAR: |
| 47 | tiling->mode = TEGRA_BO_TILING_MODE_PITCH; |
| 48 | tiling->value = 0; |
| 49 | break; |
| 50 | |
Thierry Reding | 268892c | 2017-10-12 16:39:20 +0200 | [diff] [blame] | 51 | case DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED: |
Alexandre Courbot | 5e91144 | 2016-11-08 16:50:42 +0900 | [diff] [blame] | 52 | tiling->mode = TEGRA_BO_TILING_MODE_TILED; |
| 53 | tiling->value = 0; |
| 54 | break; |
| 55 | |
Thierry Reding | 268892c | 2017-10-12 16:39:20 +0200 | [diff] [blame] | 56 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0): |
Alexandre Courbot | 5e91144 | 2016-11-08 16:50:42 +0900 | [diff] [blame] | 57 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
Thierry Reding | 268892c | 2017-10-12 16:39:20 +0200 | [diff] [blame] | 58 | tiling->value = 0; |
| 59 | break; |
| 60 | |
| 61 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1): |
| 62 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 63 | tiling->value = 1; |
| 64 | break; |
| 65 | |
| 66 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2): |
| 67 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 68 | tiling->value = 2; |
| 69 | break; |
| 70 | |
| 71 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3): |
| 72 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 73 | tiling->value = 3; |
| 74 | break; |
| 75 | |
| 76 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4): |
| 77 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 78 | tiling->value = 4; |
| 79 | break; |
| 80 | |
| 81 | case DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5): |
| 82 | tiling->mode = TEGRA_BO_TILING_MODE_BLOCK; |
| 83 | tiling->value = 5; |
Alexandre Courbot | 5e91144 | 2016-11-08 16:50:42 +0900 | [diff] [blame] | 84 | break; |
| 85 | |
| 86 | default: |
Thierry Reding | 4ae4b5c | 2018-03-15 16:45:45 +0100 | [diff] [blame] | 87 | return -EINVAL; |
Alexandre Courbot | 5e91144 | 2016-11-08 16:50:42 +0900 | [diff] [blame] | 88 | } |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 89 | |
Thierry Reding | c134f01 | 2014-06-03 14:48:12 +0200 | [diff] [blame] | 90 | return 0; |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 91 | } |
| 92 | |
Ville Syrjälä | 4ecae78 | 2015-12-15 12:21:13 +0100 | [diff] [blame] | 93 | static const struct drm_framebuffer_funcs tegra_fb_funcs = { |
Daniel Stone | 5cb8b99 | 2018-03-30 15:11:29 +0100 | [diff] [blame] | 94 | .destroy = drm_gem_fb_destroy, |
Daniel Stone | 0bc6af0 | 2018-03-30 15:11:26 +0100 | [diff] [blame] | 95 | .create_handle = drm_gem_fb_create_handle, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 96 | }; |
| 97 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 98 | static struct drm_framebuffer *tegra_fb_alloc(struct drm_device *drm, |
| 99 | const struct drm_mode_fb_cmd2 *mode_cmd, |
| 100 | struct tegra_bo **planes, |
| 101 | unsigned int num_planes) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 102 | { |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 103 | struct drm_framebuffer *fb; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 104 | unsigned int i; |
| 105 | int err; |
| 106 | |
| 107 | fb = kzalloc(sizeof(*fb), GFP_KERNEL); |
| 108 | if (!fb) |
| 109 | return ERR_PTR(-ENOMEM); |
| 110 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 111 | drm_helper_mode_fill_fb_struct(drm, fb, mode_cmd); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 112 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 113 | for (i = 0; i < fb->format->num_planes; i++) |
| 114 | fb->obj[i] = &planes[i]->gem; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 115 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 116 | err = drm_framebuffer_init(drm, fb, &tegra_fb_funcs); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 117 | if (err < 0) { |
| 118 | dev_err(drm->dev, "failed to initialize framebuffer: %d\n", |
| 119 | err); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 120 | kfree(fb); |
| 121 | return ERR_PTR(err); |
| 122 | } |
| 123 | |
| 124 | return fb; |
| 125 | } |
| 126 | |
Thierry Reding | f991421 | 2014-11-26 13:03:57 +0100 | [diff] [blame] | 127 | struct drm_framebuffer *tegra_fb_create(struct drm_device *drm, |
| 128 | struct drm_file *file, |
Ville Syrjälä | 1eb83451 | 2015-11-11 19:11:29 +0200 | [diff] [blame] | 129 | const struct drm_mode_fb_cmd2 *cmd) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 130 | { |
| 131 | unsigned int hsub, vsub, i; |
| 132 | struct tegra_bo *planes[4]; |
| 133 | struct drm_gem_object *gem; |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 134 | struct drm_framebuffer *fb; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 135 | int err; |
| 136 | |
| 137 | hsub = drm_format_horz_chroma_subsampling(cmd->pixel_format); |
| 138 | vsub = drm_format_vert_chroma_subsampling(cmd->pixel_format); |
| 139 | |
| 140 | for (i = 0; i < drm_format_num_planes(cmd->pixel_format); i++) { |
| 141 | unsigned int width = cmd->width / (i ? hsub : 1); |
| 142 | unsigned int height = cmd->height / (i ? vsub : 1); |
| 143 | unsigned int size, bpp; |
| 144 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 145 | gem = drm_gem_object_lookup(file, cmd->handles[i]); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 146 | if (!gem) { |
| 147 | err = -ENXIO; |
| 148 | goto unreference; |
| 149 | } |
| 150 | |
| 151 | bpp = drm_format_plane_cpp(cmd->pixel_format, i); |
| 152 | |
| 153 | size = (height - 1) * cmd->pitches[i] + |
| 154 | width * bpp + cmd->offsets[i]; |
| 155 | |
| 156 | if (gem->size < size) { |
| 157 | err = -EINVAL; |
| 158 | goto unreference; |
| 159 | } |
| 160 | |
| 161 | planes[i] = to_tegra_bo(gem); |
| 162 | } |
| 163 | |
| 164 | fb = tegra_fb_alloc(drm, cmd, planes, i); |
| 165 | if (IS_ERR(fb)) { |
| 166 | err = PTR_ERR(fb); |
| 167 | goto unreference; |
| 168 | } |
| 169 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 170 | return fb; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 171 | |
| 172 | unreference: |
| 173 | while (i--) |
Cihangir Akturk | 7664b2f | 2017-08-11 15:33:07 +0300 | [diff] [blame] | 174 | drm_gem_object_put_unlocked(&planes[i]->gem); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 175 | |
| 176 | return ERR_PTR(err); |
| 177 | } |
| 178 | |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 179 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | b8f3f50 | 2018-02-07 18:45:56 +0100 | [diff] [blame] | 180 | static int tegra_fb_mmap(struct fb_info *info, struct vm_area_struct *vma) |
| 181 | { |
| 182 | struct drm_fb_helper *helper = info->par; |
| 183 | struct tegra_bo *bo; |
| 184 | int err; |
| 185 | |
| 186 | bo = tegra_fb_get_plane(helper->fb, 0); |
| 187 | |
| 188 | err = drm_gem_mmap_obj(&bo->gem, bo->gem.size, vma); |
| 189 | if (err < 0) |
| 190 | return err; |
| 191 | |
| 192 | return __tegra_gem_mmap(&bo->gem, vma); |
| 193 | } |
| 194 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 195 | static struct fb_ops tegra_fb_ops = { |
| 196 | .owner = THIS_MODULE, |
Stefan Christ | 902c255 | 2016-11-14 00:03:22 +0100 | [diff] [blame] | 197 | DRM_FB_HELPER_DEFAULT_OPS, |
Archit Taneja | 0f7d905 | 2015-07-22 14:58:07 +0530 | [diff] [blame] | 198 | .fb_fillrect = drm_fb_helper_sys_fillrect, |
| 199 | .fb_copyarea = drm_fb_helper_sys_copyarea, |
| 200 | .fb_imageblit = drm_fb_helper_sys_imageblit, |
Thierry Reding | b8f3f50 | 2018-02-07 18:45:56 +0100 | [diff] [blame] | 201 | .fb_mmap = tegra_fb_mmap, |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 202 | }; |
| 203 | |
| 204 | static int tegra_fbdev_probe(struct drm_fb_helper *helper, |
| 205 | struct drm_fb_helper_surface_size *sizes) |
| 206 | { |
| 207 | struct tegra_fbdev *fbdev = to_tegra_fbdev(helper); |
Thierry Reding | d1f3e1e | 2014-07-11 08:29:14 +0200 | [diff] [blame] | 208 | struct tegra_drm *tegra = helper->dev->dev_private; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 209 | struct drm_device *drm = helper->dev; |
| 210 | struct drm_mode_fb_cmd2 cmd = { 0 }; |
| 211 | unsigned int bytes_per_pixel; |
| 212 | struct drm_framebuffer *fb; |
| 213 | unsigned long offset; |
| 214 | struct fb_info *info; |
| 215 | struct tegra_bo *bo; |
| 216 | size_t size; |
| 217 | int err; |
| 218 | |
| 219 | bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8); |
| 220 | |
| 221 | cmd.width = sizes->surface_width; |
| 222 | cmd.height = sizes->surface_height; |
Thierry Reding | d1f3e1e | 2014-07-11 08:29:14 +0200 | [diff] [blame] | 223 | cmd.pitches[0] = round_up(sizes->surface_width * bytes_per_pixel, |
| 224 | tegra->pitch_align); |
Thierry Reding | 71835ca | 2017-11-14 16:09:30 +0100 | [diff] [blame] | 225 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 226 | cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, |
| 227 | sizes->surface_depth); |
| 228 | |
| 229 | size = cmd.pitches[0] * cmd.height; |
| 230 | |
Thierry Reding | 773af77 | 2013-10-04 22:34:01 +0200 | [diff] [blame] | 231 | bo = tegra_bo_create(drm, size, 0); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 232 | if (IS_ERR(bo)) |
| 233 | return PTR_ERR(bo); |
| 234 | |
Archit Taneja | 0f7d905 | 2015-07-22 14:58:07 +0530 | [diff] [blame] | 235 | info = drm_fb_helper_alloc_fbi(helper); |
| 236 | if (IS_ERR(info)) { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 237 | dev_err(drm->dev, "failed to allocate framebuffer info\n"); |
Cihangir Akturk | 7664b2f | 2017-08-11 15:33:07 +0300 | [diff] [blame] | 238 | drm_gem_object_put_unlocked(&bo->gem); |
Archit Taneja | 0f7d905 | 2015-07-22 14:58:07 +0530 | [diff] [blame] | 239 | return PTR_ERR(info); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 240 | } |
| 241 | |
| 242 | fbdev->fb = tegra_fb_alloc(drm, &cmd, &bo, 1); |
| 243 | if (IS_ERR(fbdev->fb)) { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 244 | err = PTR_ERR(fbdev->fb); |
Thierry Reding | cb10c81 | 2014-11-06 14:36:19 +0100 | [diff] [blame] | 245 | dev_err(drm->dev, "failed to allocate DRM framebuffer: %d\n", |
| 246 | err); |
Cihangir Akturk | 7664b2f | 2017-08-11 15:33:07 +0300 | [diff] [blame] | 247 | drm_gem_object_put_unlocked(&bo->gem); |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 248 | return PTR_ERR(fbdev->fb); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 249 | } |
| 250 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 251 | fb = fbdev->fb; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 252 | helper->fb = fb; |
| 253 | helper->fbdev = info; |
| 254 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 255 | info->fbops = &tegra_fb_ops; |
| 256 | |
Daniel Vetter | 4a53693 | 2019-03-26 14:20:05 +0100 | [diff] [blame] | 257 | drm_fb_helper_fill_info(info, helper, sizes); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 258 | |
| 259 | offset = info->var.xoffset * bytes_per_pixel + |
| 260 | info->var.yoffset * fb->pitches[0]; |
| 261 | |
Thierry Reding | df06b75 | 2014-06-26 21:41:53 +0200 | [diff] [blame] | 262 | if (bo->pages) { |
| 263 | bo->vaddr = vmap(bo->pages, bo->num_pages, VM_MAP, |
| 264 | pgprot_writecombine(PAGE_KERNEL)); |
| 265 | if (!bo->vaddr) { |
| 266 | dev_err(drm->dev, "failed to vmap() framebuffer\n"); |
| 267 | err = -ENOMEM; |
| 268 | goto destroy; |
| 269 | } |
| 270 | } |
| 271 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 272 | drm->mode_config.fb_base = (resource_size_t)bo->paddr; |
Thierry Reding | 9ab3415 | 2013-11-08 13:18:14 +0100 | [diff] [blame] | 273 | info->screen_base = (void __iomem *)bo->vaddr + offset; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 274 | info->screen_size = size; |
| 275 | info->fix.smem_start = (unsigned long)(bo->paddr + offset); |
| 276 | info->fix.smem_len = size; |
| 277 | |
| 278 | return 0; |
| 279 | |
| 280 | destroy: |
Daniel Vetter | 3e7d2fdd | 2016-12-27 11:49:25 +0100 | [diff] [blame] | 281 | drm_framebuffer_remove(fb); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 282 | return err; |
| 283 | } |
| 284 | |
Thierry Reding | 3a49387 | 2014-06-27 17:19:23 +0200 | [diff] [blame] | 285 | static const struct drm_fb_helper_funcs tegra_fb_helper_funcs = { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 286 | .fb_probe = tegra_fbdev_probe, |
| 287 | }; |
| 288 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 289 | static struct tegra_fbdev *tegra_fbdev_create(struct drm_device *drm) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 290 | { |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 291 | struct tegra_fbdev *fbdev; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 292 | |
| 293 | fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL); |
| 294 | if (!fbdev) { |
| 295 | dev_err(drm->dev, "failed to allocate DRM fbdev\n"); |
| 296 | return ERR_PTR(-ENOMEM); |
| 297 | } |
| 298 | |
Thierry Reding | 10a2310 | 2014-06-27 17:19:24 +0200 | [diff] [blame] | 299 | drm_fb_helper_prepare(drm, &fbdev->base, &tegra_fb_helper_funcs); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 300 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 301 | return fbdev; |
| 302 | } |
| 303 | |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 304 | static void tegra_fbdev_free(struct tegra_fbdev *fbdev) |
| 305 | { |
| 306 | kfree(fbdev); |
| 307 | } |
| 308 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 309 | static int tegra_fbdev_init(struct tegra_fbdev *fbdev, |
| 310 | unsigned int preferred_bpp, |
| 311 | unsigned int num_crtc, |
| 312 | unsigned int max_connectors) |
| 313 | { |
| 314 | struct drm_device *drm = fbdev->base.dev; |
| 315 | int err; |
| 316 | |
Gabriel Krisman Bertazi | e4563f6 | 2017-02-02 14:26:40 -0200 | [diff] [blame] | 317 | err = drm_fb_helper_init(drm, &fbdev->base, max_connectors); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 318 | if (err < 0) { |
Thierry Reding | cb10c81 | 2014-11-06 14:36:19 +0100 | [diff] [blame] | 319 | dev_err(drm->dev, "failed to initialize DRM FB helper: %d\n", |
| 320 | err); |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 321 | return err; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 322 | } |
| 323 | |
| 324 | err = drm_fb_helper_single_add_all_connectors(&fbdev->base); |
| 325 | if (err < 0) { |
Thierry Reding | cb10c81 | 2014-11-06 14:36:19 +0100 | [diff] [blame] | 326 | dev_err(drm->dev, "failed to add connectors: %d\n", err); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 327 | goto fini; |
| 328 | } |
| 329 | |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 330 | err = drm_fb_helper_initial_config(&fbdev->base, preferred_bpp); |
| 331 | if (err < 0) { |
Thierry Reding | cb10c81 | 2014-11-06 14:36:19 +0100 | [diff] [blame] | 332 | dev_err(drm->dev, "failed to set initial configuration: %d\n", |
| 333 | err); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 334 | goto fini; |
| 335 | } |
| 336 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 337 | return 0; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 338 | |
| 339 | fini: |
| 340 | drm_fb_helper_fini(&fbdev->base); |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 341 | return err; |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 342 | } |
| 343 | |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 344 | static void tegra_fbdev_exit(struct tegra_fbdev *fbdev) |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 345 | { |
Archit Taneja | 0f7d905 | 2015-07-22 14:58:07 +0530 | [diff] [blame] | 346 | drm_fb_helper_unregister_fbi(&fbdev->base); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 347 | |
Daniel Stone | c34a997 | 2018-03-30 15:11:28 +0100 | [diff] [blame] | 348 | if (fbdev->fb) { |
| 349 | struct tegra_bo *bo = tegra_fb_get_plane(fbdev->fb, 0); |
| 350 | |
| 351 | /* Undo the special mapping we made in fbdev probe. */ |
| 352 | if (bo && bo->pages) { |
| 353 | vunmap(bo->vaddr); |
Souptick Joarder | 53f1e06 | 2018-08-01 01:37:05 +0530 | [diff] [blame] | 354 | bo->vaddr = NULL; |
Daniel Stone | c34a997 | 2018-03-30 15:11:28 +0100 | [diff] [blame] | 355 | } |
| 356 | |
Daniel Stone | dbc33c7 | 2018-03-30 15:11:27 +0100 | [diff] [blame] | 357 | drm_framebuffer_remove(fbdev->fb); |
Daniel Stone | c34a997 | 2018-03-30 15:11:28 +0100 | [diff] [blame] | 358 | } |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 359 | |
| 360 | drm_fb_helper_fini(&fbdev->base); |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 361 | tegra_fbdev_free(fbdev); |
Arto Merilainen | de2ba66 | 2013-03-22 16:34:08 +0200 | [diff] [blame] | 362 | } |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 363 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 364 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 365 | int tegra_drm_fb_prepare(struct drm_device *drm) |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 366 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 367 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 368 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 369 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 370 | tegra->fbdev = tegra_fbdev_create(drm); |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 371 | if (IS_ERR(tegra->fbdev)) |
| 372 | return PTR_ERR(tegra->fbdev); |
| 373 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 374 | |
| 375 | return 0; |
| 376 | } |
| 377 | |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 378 | void tegra_drm_fb_free(struct drm_device *drm) |
| 379 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 380 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 381 | struct tegra_drm *tegra = drm->dev_private; |
| 382 | |
| 383 | tegra_fbdev_free(tegra->fbdev); |
| 384 | #endif |
| 385 | } |
| 386 | |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 387 | int tegra_drm_fb_init(struct drm_device *drm) |
| 388 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 389 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | e2215321f | 2014-06-27 17:19:25 +0200 | [diff] [blame] | 390 | struct tegra_drm *tegra = drm->dev_private; |
| 391 | int err; |
| 392 | |
| 393 | err = tegra_fbdev_init(tegra->fbdev, 32, drm->mode_config.num_crtc, |
| 394 | drm->mode_config.num_connector); |
| 395 | if (err < 0) |
| 396 | return err; |
| 397 | #endif |
| 398 | |
| 399 | return 0; |
| 400 | } |
| 401 | |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 402 | void tegra_drm_fb_exit(struct drm_device *drm) |
| 403 | { |
Archit Taneja | b110ef3 | 2015-10-27 13:40:59 +0530 | [diff] [blame] | 404 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Thierry Reding | 386a2a7 | 2013-09-24 13:22:17 +0200 | [diff] [blame] | 405 | struct tegra_drm *tegra = drm->dev_private; |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 406 | |
Thierry Reding | 1d1e6fe | 2014-11-06 14:12:08 +0100 | [diff] [blame] | 407 | tegra_fbdev_exit(tegra->fbdev); |
Thierry Reding | 60c2f70 | 2013-10-31 13:28:50 +0100 | [diff] [blame] | 408 | #endif |
Thierry Reding | d8f4a9e | 2012-11-15 21:28:22 +0000 | [diff] [blame] | 409 | } |