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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Quinn Jensen52c543f2007-07-09 22:06:53 +01002/*
Anson Huangdf595742014-01-17 11:39:05 +08003 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
Quinn Jensen52c543f2007-07-09 22:06:53 +01004 */
5
Quinn Jensen52c543f2007-07-09 22:06:53 +01006
7#ifndef __ASM_ARCH_MXC_COMMON_H__
8#define __ASM_ARCH_MXC_COMMON_H__
9
Robin Holt7b6d8642013-07-08 16:01:40 -070010#include <linux/reboot.h>
11
Shawn Guod48866f2013-10-16 19:52:00 +080012struct irq_data;
Sascha Hauer282b13d2008-09-09 10:19:40 +020013struct platform_device;
Shawn Guo009e63f2013-05-08 21:05:53 +080014struct pt_regs;
Sascha Hauer30c730f2009-02-16 14:36:49 +010015struct clk;
Gilles Chanteperdrix876292d2014-04-05 17:57:45 +020016struct device_node;
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080017enum mxc_cpu_pwr_mode;
Steffen Trumtrare57e4ab2014-07-07 11:41:26 +020018struct of_device_id;
Sascha Hauer282b13d2008-09-09 10:19:40 +020019
Shawn Guo803648d2013-10-16 21:05:35 +080020void mx21_map_io(void);
Shawn Guo803648d2013-10-16 21:05:35 +080021void mx27_map_io(void);
22void mx31_map_io(void);
23void mx35_map_io(void);
Shawn Guo803648d2013-10-16 21:05:35 +080024void imx21_init_early(void);
Shawn Guo803648d2013-10-16 21:05:35 +080025void imx27_init_early(void);
26void imx31_init_early(void);
27void imx35_init_early(void);
Shawn Guo803648d2013-10-16 21:05:35 +080028void mxc_init_irq(void __iomem *);
Shawn Guo803648d2013-10-16 21:05:35 +080029void mx21_init_irq(void);
Shawn Guo803648d2013-10-16 21:05:35 +080030void mx27_init_irq(void);
31void mx31_init_irq(void);
32void mx35_init_irq(void);
Shawn Guo803648d2013-10-16 21:05:35 +080033void imx21_soc_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +080034void imx27_soc_init(void);
35void imx31_soc_init(void);
36void imx35_soc_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +080037int mx21_clocks_init(unsigned long lref, unsigned long fref);
Shawn Guo803648d2013-10-16 21:05:35 +080038int mx27_clocks_init(unsigned long fref);
39int mx31_clocks_init(unsigned long fref);
40int mx35_clocks_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +080041struct platform_device *mxc_register_gpio(char *name, int id,
Shawn Guob78d8e52011-06-06 00:07:55 +080042 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
Shawn Guo803648d2013-10-16 21:05:35 +080043void mxc_set_cpu_type(unsigned int type);
44void mxc_restart(enum reboot_mode, const char *);
45void mxc_arch_reset_init(void __iomem *);
Arnd Bergmann6f98cb22016-06-24 12:49:56 +020046void imx1_reset_init(void __iomem *);
Shawn Guo803648d2013-10-16 21:05:35 +080047void imx_set_aips(void __iomem *);
Steffen Trumtrare57e4ab2014-07-07 11:41:26 +020048void imx_aips_allow_unprivileged_access(const char *compat);
Shawn Guo803648d2013-10-16 21:05:35 +080049int mxc_device_init(void);
Shawn Guobfefdff2013-08-13 13:54:02 +080050void imx_set_soc_revision(unsigned int rev);
Shawn Guof1c6f312013-08-13 14:59:43 +080051void imx_init_revision_from_anatop(void);
Shawn Guoa2887542013-08-13 16:59:28 +080052struct device *imx_soc_device_init(void);
Anson Huang05136f02014-12-17 12:24:12 +080053void imx6_enable_rbc(bool enable);
Marc Zyngier14517562015-03-13 16:05:37 +000054void imx_gpc_check_dt(void);
Anson Huang05136f02014-12-17 12:24:12 +080055void imx_gpc_set_arm_power_in_lpm(bool power_off);
Anson Huangc791bbbf2018-06-03 10:33:44 +080056void imx_gpc_set_l2_mem_power_in_lpm(bool power_off);
Anson Huang05136f02014-12-17 12:24:12 +080057void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
58void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
Fabio Estevam8c4300c2016-02-02 19:45:38 -020059void imx25_pm_init(void);
Arnd Bergmann48e076d2016-06-28 10:22:16 +080060void imx27_pm_init(void);
Fabio Estevam26b754f2018-07-10 13:31:48 -030061void imx5_pmu_init(void);
Shawn Guo73d2b4c2011-10-17 08:42:16 +080062
Shawn Guo41e7daf2011-09-28 17:16:06 +080063enum mxc_cpu_pwr_mode {
64 WAIT_CLOCKED, /* wfi only */
65 WAIT_UNCLOCKED, /* WAIT */
66 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
67 STOP_POWER_ON, /* just STOP */
68 STOP_POWER_OFF, /* STOP + SRPG */
69};
70
Anson Huang6d45a402019-01-14 08:54:59 +080071enum ulp_cpu_pwr_mode {
72 ULP_PM_HSRUN, /* High speed run mode */
73 ULP_PM_RUN, /* Run mode */
74 ULP_PM_WAIT, /* Wait mode */
75 ULP_PM_STOP, /* Stop mode */
76 ULP_PM_VLPS, /* Very low power stop mode */
77 ULP_PM_VLLS, /* very low leakage stop mode */
78};
79
Shawn Guo803648d2013-10-16 21:05:35 +080080void imx_enable_cpu(int cpu, bool enable);
81void imx_set_cpu_jump(int cpu, void *jump_addr);
82u32 imx_get_cpu_arg(int cpu);
83void imx_set_cpu_arg(int cpu, u32 arg);
Shawn Guo69c31b72011-09-06 14:59:40 +080084#ifdef CONFIG_SMP
Shawn Guo803648d2013-10-16 21:05:35 +080085void v7_secondary_startup(void);
86void imx_scu_map_io(void);
87void imx_smp_prepare(void);
Shawn Guo13eed982011-09-06 15:05:25 +080088#else
89static inline void imx_scu_map_io(void) {}
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080090static inline void imx_smp_prepare(void) {}
Shawn Guo69c31b72011-09-06 14:59:40 +080091#endif
Shawn Guo803648d2013-10-16 21:05:35 +080092void imx_src_init(void);
Anson Huang80c0ecd2014-06-23 16:42:44 +080093void imx_gpc_pre_suspend(bool arm_power_off);
Shawn Guo803648d2013-10-16 21:05:35 +080094void imx_gpc_post_resume(void);
95void imx_gpc_mask_all(void);
96void imx_gpc_restore_all(void);
Marc Zyngier65bb6882014-12-02 16:05:26 +000097void imx_gpc_hwirq_mask(unsigned int hwirq);
98void imx_gpc_hwirq_unmask(unsigned int hwirq);
Shawn Guo803648d2013-10-16 21:05:35 +080099void imx_anatop_init(void);
100void imx_anatop_pre_suspend(void);
101void imx_anatop_post_resume(void);
Shawn Guo8fb76a02015-04-25 22:59:19 +0800102int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
Anson Huang8765caa2016-08-29 21:49:56 +0800103void imx6_set_int_mem_clk_lpm(bool enable);
Anson Huang751f7e92014-01-09 16:03:16 +0800104void imx6sl_set_wait_clk(bool enter);
Anson Huangec336b22014-09-17 11:11:45 +0800105int imx_mmdc_get_ddr_type(void);
Anson Huang6d45a402019-01-14 08:54:59 +0800106int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode);
Eric Miao46ec1b22011-12-21 22:38:23 +0800107
Shawn Guo803648d2013-10-16 21:05:35 +0800108void imx_cpu_die(unsigned int cpu);
109int imx_cpu_kill(unsigned int cpu);
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100110
Shawn Guoc356bdb2014-02-26 19:48:33 +0800111#ifdef CONFIG_SUSPEND
112void v7_cpu_resume(void);
Martin Fuzzey1579c7b2015-05-12 15:31:03 +0200113void imx53_suspend(void __iomem *ocram_vbase);
114extern const u32 imx53_suspend_sz;
Anson Huangdf595742014-01-17 11:39:05 +0800115void imx6_suspend(void __iomem *ocram_vbase);
Shawn Guoc356bdb2014-02-26 19:48:33 +0800116#else
117static inline void v7_cpu_resume(void) {}
Martin Fuzzey1579c7b2015-05-12 15:31:03 +0200118static inline void imx53_suspend(void __iomem *ocram_vbase) {}
119static const u32 imx53_suspend_sz;
Shawn Guoc356bdb2014-02-26 19:48:33 +0800120static inline void imx6_suspend(void __iomem *ocram_vbase) {}
121#endif
122
Shawn Guo35e29162015-04-29 13:07:03 +0800123void imx6_pm_ccm_init(const char *ccm_compat);
Shawn Guo803648d2013-10-16 21:05:35 +0800124void imx6q_pm_init(void);
Anson Huangdf595742014-01-17 11:39:05 +0800125void imx6dl_pm_init(void);
126void imx6sl_pm_init(void);
Anson Huangff843d62014-06-20 13:20:54 +0800127void imx6sx_pm_init(void);
Anson Huangee4a5f82015-08-05 01:48:37 +0800128void imx6ul_pm_init(void);
A.s. Dongde70d0e2018-11-10 15:13:04 +0000129void imx7ulp_pm_init(void);
Anson Huangdf595742014-01-17 11:39:05 +0800130
Shawn Guo28a9f3b2014-02-18 10:35:05 +0800131#ifdef CONFIG_PM
Shawn Guo36b66c32014-05-20 14:55:15 +0800132void imx51_pm_init(void);
133void imx53_pm_init(void);
Eric Miao46ec1b22011-12-21 22:38:23 +0800134#else
Shawn Guo36b66c32014-05-20 14:55:15 +0800135static inline void imx51_pm_init(void) {}
136static inline void imx53_pm_init(void) {}
Eric Miao46ec1b22011-12-21 22:38:23 +0800137#endif
138
Shawn Guo8321b752012-04-26 11:42:34 +0800139#ifdef CONFIG_NEON
Shawn Guo803648d2013-10-16 21:05:35 +0800140int mx51_neon_fixup(void);
Shawn Guo8321b752012-04-26 11:42:34 +0800141#else
142static inline int mx51_neon_fixup(void) { return 0; }
143#endif
144
Shawn Guoe6a07562013-07-08 21:45:20 +0800145#ifdef CONFIG_CACHE_L2X0
Shawn Guo803648d2013-10-16 21:05:35 +0800146void imx_init_l2cache(void);
Shawn Guoe6a07562013-07-08 21:45:20 +0800147#else
148static inline void imx_init_l2cache(void) {}
149#endif
150
Masahiro Yamada75305272015-11-15 10:39:53 +0900151extern const struct smp_operations imx_smp_ops;
152extern const struct smp_operations ls1021a_smp_ops;
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100153
Quinn Jensen52c543f2007-07-09 22:06:53 +0100154#endif