Thomas Gleixner | 84e5653 | 2019-05-28 09:57:17 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 2 | /* |
| 3 | * at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board |
| 4 | * |
| 5 | * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 6 | */ |
| 7 | /dts-v1/; |
Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 8 | #include "at91sam9263.dtsi" |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 9 | |
| 10 | / { |
| 11 | model = "Atmel at91sam9263ek"; |
| 12 | compatible = "atmel,at91sam9263ek", "atmel,at91sam9263", "atmel,at91sam9"; |
| 13 | |
| 14 | chosen { |
Alexandre Belloni | 11cfbde4 | 2015-06-03 14:24:08 +0200 | [diff] [blame] | 15 | bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs"; |
| 16 | stdout-path = "serial0:115200n8"; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 17 | }; |
| 18 | |
| 19 | memory { |
| 20 | reg = <0x20000000 0x4000000>; |
| 21 | }; |
| 22 | |
| 23 | clocks { |
Alexandre Belloni | c8b41e0 | 2014-06-24 08:21:46 +0200 | [diff] [blame] | 24 | slow_xtal { |
| 25 | clock-frequency = <32768>; |
| 26 | }; |
| 27 | |
| 28 | main_xtal { |
| 29 | clock-frequency = <16367660>; |
| 30 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 31 | }; |
| 32 | |
| 33 | ahb { |
| 34 | apb { |
| 35 | dbgu: serial@ffffee00 { |
| 36 | status = "okay"; |
| 37 | }; |
| 38 | |
Alexandre Belloni | 50567ee | 2016-06-08 18:12:31 +0200 | [diff] [blame] | 39 | tcb0: timer@fff7c000 { |
| 40 | timer@0 { |
| 41 | compatible = "atmel,tcb-timer"; |
| 42 | reg = <0>, <1>; |
| 43 | }; |
| 44 | |
| 45 | timer@2 { |
| 46 | compatible = "atmel,tcb-timer"; |
| 47 | reg = <2>; |
| 48 | }; |
| 49 | }; |
| 50 | |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 51 | usart0: serial@fff8c000 { |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 52 | pinctrl-0 = < |
| 53 | &pinctrl_usart0 |
| 54 | &pinctrl_usart0_rts |
| 55 | &pinctrl_usart0_cts>; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 56 | status = "okay"; |
| 57 | }; |
| 58 | |
| 59 | macb0: ethernet@fffbc000 { |
| 60 | phy-mode = "rmii"; |
| 61 | status = "okay"; |
| 62 | }; |
| 63 | |
| 64 | usb1: gadget@fff78000 { |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 65 | atmel,vbus-gpio = <&pioA 25 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 66 | status = "okay"; |
| 67 | }; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 68 | |
| 69 | mmc0: mmc@fff80000 { |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 70 | pinctrl-0 = < |
| 71 | &pinctrl_board_mmc0 |
| 72 | &pinctrl_mmc0_clk |
| 73 | &pinctrl_mmc0_slot0_cmd_dat0 |
| 74 | &pinctrl_mmc0_slot0_dat1_3>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 75 | status = "okay"; |
| 76 | slot@0 { |
| 77 | reg = <0>; |
| 78 | bus-width = <4>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 79 | cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>; |
| 80 | wp-gpios = <&pioE 19 GPIO_ACTIVE_HIGH>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 81 | }; |
| 82 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 83 | |
| 84 | pinctrl@fffff200 { |
| 85 | mmc0 { |
| 86 | pinctrl_board_mmc0: mmc0-board { |
| 87 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 88 | <AT91_PIOE 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PE18 gpio CD pin pull up and deglitch */ |
| 89 | AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */ |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 90 | }; |
| 91 | }; |
| 92 | }; |
Richard Genoud | b6811e9 | 2013-04-03 14:03:05 +0800 | [diff] [blame] | 93 | |
| 94 | spi0: spi@fffa4000 { |
| 95 | status = "okay"; |
| 96 | cs-gpios = <&pioA 5 0>, <0>, <0>, <0>; |
| 97 | mtd_dataflash@0 { |
| 98 | compatible = "atmel,at45", "atmel,dataflash"; |
| 99 | spi-max-frequency = <50000000>; |
| 100 | reg = <0>; |
| 101 | }; |
| 102 | }; |
Wenyou Yang | c77bcef | 2013-05-31 11:11:33 +0800 | [diff] [blame] | 103 | |
| 104 | watchdog@fffffd40 { |
| 105 | status = "okay"; |
| 106 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 107 | }; |
| 108 | |
Mathieu Malaterre | ed4ced0 | 2017-12-15 13:46:26 +0100 | [diff] [blame] | 109 | fb0: fb@700000 { |
Jean-Christophe PLAGNIOL-VILLARD | 510e378 | 2013-03-29 05:09:00 +0800 | [diff] [blame] | 110 | display = <&display0>; |
| 111 | status = "okay"; |
| 112 | |
| 113 | display0: display { |
| 114 | bits-per-pixel = <16>; |
| 115 | atmel,lcdcon-backlight; |
| 116 | atmel,dmacon = <0x1>; |
| 117 | atmel,lcdcon2 = <0x80008002>; |
| 118 | atmel,guard-time = <1>; |
| 119 | |
| 120 | display-timings { |
| 121 | native-mode = <&timing0>; |
| 122 | timing0: timing0 { |
| 123 | clock-frequency = <4965000>; |
| 124 | hactive = <240>; |
| 125 | vactive = <320>; |
| 126 | hback-porch = <1>; |
| 127 | hfront-porch = <33>; |
| 128 | vback-porch = <1>; |
| 129 | vfront-porch = <0>; |
| 130 | hsync-len = <5>; |
| 131 | vsync-len = <1>; |
| 132 | hsync-active = <1>; |
| 133 | vsync-active = <1>; |
| 134 | }; |
| 135 | }; |
| 136 | }; |
| 137 | }; |
| 138 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 139 | ebi0: ebi@10000000 { |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 140 | status = "okay"; |
| 141 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 142 | nand_controller: nand-controller { |
| 143 | status = "okay"; |
| 144 | pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; |
| 145 | pinctrl-names = "default"; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 146 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 147 | nand@3 { |
| 148 | reg = <0x3 0x0 0x800000>; |
| 149 | rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>; |
| 150 | cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>; |
| 151 | nand-bus-width = <8>; |
| 152 | nand-ecc-mode = "soft"; |
| 153 | nand-on-flash-bbt; |
| 154 | label = "atmel_nand"; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 155 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 156 | partitions { |
| 157 | compatible = "fixed-partitions"; |
| 158 | #address-cells = <1>; |
| 159 | #size-cells = <1>; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 160 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 161 | at91bootstrap@0 { |
| 162 | label = "at91bootstrap"; |
| 163 | reg = <0x0 0x20000>; |
| 164 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 165 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 166 | barebox@20000 { |
| 167 | label = "barebox"; |
| 168 | reg = <0x20000 0x40000>; |
| 169 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 170 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 171 | bareboxenv@60000 { |
| 172 | label = "bareboxenv"; |
| 173 | reg = <0x60000 0x20000>; |
| 174 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 175 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 176 | bareboxenv2@80000 { |
| 177 | label = "bareboxenv2"; |
| 178 | reg = <0x80000 0x20000>; |
| 179 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 180 | |
Boris Brezillon | 1004a29 | 2017-05-30 11:20:53 +0200 | [diff] [blame] | 181 | oftree@80000 { |
| 182 | label = "oftree"; |
| 183 | reg = <0xa0000 0x20000>; |
| 184 | }; |
| 185 | |
| 186 | kernel@a0000 { |
| 187 | label = "kernel"; |
| 188 | reg = <0xc0000 0x400000>; |
| 189 | }; |
| 190 | |
| 191 | rootfs@4a0000 { |
| 192 | label = "rootfs"; |
| 193 | reg = <0x4c0000 0x7800000>; |
| 194 | }; |
| 195 | |
| 196 | data@7ca0000 { |
| 197 | label = "data"; |
| 198 | reg = <0x7cc0000 0x8340000>; |
| 199 | }; |
| 200 | }; |
| 201 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 202 | }; |
| 203 | }; |
| 204 | |
Rob Herring | 8dccafa | 2017-10-13 12:54:51 -0500 | [diff] [blame] | 205 | usb0: ohci@a00000 { |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 206 | num-ports = <2>; |
| 207 | status = "okay"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 208 | atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH |
| 209 | &pioA 21 GPIO_ACTIVE_HIGH |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 210 | >; |
| 211 | }; |
| 212 | }; |
| 213 | |
| 214 | leds { |
| 215 | compatible = "gpio-leds"; |
| 216 | |
| 217 | d3 { |
| 218 | label = "d3"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 219 | gpios = <&pioB 7 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 220 | linux,default-trigger = "heartbeat"; |
| 221 | }; |
| 222 | |
| 223 | d2 { |
| 224 | label = "d2"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 225 | gpios = <&pioC 29 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 226 | linux,default-trigger = "nand-disk"; |
| 227 | }; |
| 228 | }; |
| 229 | |
| 230 | gpio_keys { |
| 231 | compatible = "gpio-keys"; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 232 | |
| 233 | left_click { |
| 234 | label = "left_click"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 235 | gpios = <&pioC 5 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 236 | linux,code = <272>; |
Sudeep Holla | 67ae8b9 | 2015-10-21 11:10:07 +0100 | [diff] [blame] | 237 | wakeup-source; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 238 | }; |
| 239 | |
| 240 | right_click { |
| 241 | label = "right_click"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 242 | gpios = <&pioC 4 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 243 | linux,code = <273>; |
Sudeep Holla | 67ae8b9 | 2015-10-21 11:10:07 +0100 | [diff] [blame] | 244 | wakeup-source; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 245 | }; |
| 246 | }; |
| 247 | |
Alexandre Belloni | e152e3f | 2016-07-14 16:58:11 +0200 | [diff] [blame] | 248 | i2c-gpio-0 { |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 249 | status = "okay"; |
| 250 | |
| 251 | 24c512@50 { |
Bartosz Golaszewski | 6fa65ed | 2018-01-24 22:29:09 +0100 | [diff] [blame] | 252 | compatible = "atmel,24c512"; |
Jean-Christophe PLAGNIOL-VILLARD | 39f31cd | 2012-02-26 19:12:43 +0800 | [diff] [blame] | 253 | reg = <0x50>; |
| 254 | pagesize = <128>; |
| 255 | }; |
| 256 | }; |
| 257 | }; |