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Paul Walmsley21325b252012-10-21 01:01:12 -06001/*
2 * OMAP2+ common Clock Management (CM) IP block functions
3 *
4 * Copyright (C) 2012 Texas Instruments, Inc.
Paul Walmsleyd9a16f92012-10-29 20:57:39 -06005 * Paul Walmsley
Paul Walmsley21325b252012-10-21 01:01:12 -06006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX This code should eventually be moved to a CM driver.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
Peter Ujfalusicc4b1e22012-11-12 16:17:08 +010016#include <linux/errno.h>
Tero Kristo47942082014-05-11 19:41:50 -060017#include <linux/bug.h>
Tero Kristofe874142014-03-12 18:33:45 +020018#include <linux/of.h>
19#include <linux/of_address.h>
Paul Walmsley21325b252012-10-21 01:01:12 -060020
21#include "cm2xxx.h"
22#include "cm3xxx.h"
Tero Kristo425dc8b2014-11-21 15:51:37 +020023#include "cm33xx.h"
Paul Walmsley21325b252012-10-21 01:01:12 -060024#include "cm44xx.h"
Tero Kristofe874142014-03-12 18:33:45 +020025#include "clock.h"
Paul Walmsley21325b252012-10-21 01:01:12 -060026
27/*
28 * cm_ll_data: function pointers to SoC-specific implementations of
29 * common CM functions
30 */
31static struct cm_ll_data null_cm_ll_data;
Bhumika Goyala529f8de2017-11-06 14:15:39 +010032static const struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
Paul Walmsley21325b252012-10-21 01:01:12 -060033
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060034/* cm_base: base virtual address of the CM IP block */
Tero Kristo90129332017-05-31 18:00:00 +030035struct omap_domain_base cm_base;
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060036
37/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
Tero Kristo90129332017-05-31 18:00:00 +030038struct omap_domain_base cm2_base;
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060039
Tero Kristo5970ca22014-11-11 16:51:52 +020040#define CM_NO_CLOCKS 0x1
Tero Kristo425dc8b2014-11-21 15:51:37 +020041#define CM_SINGLE_INSTANCE 0x2
Tero Kristo5970ca22014-11-11 16:51:52 +020042
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060043/**
44 * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
45 * @cm: CM base virtual address
46 * @cm2: CM2 base virtual address (if present on the booted SoC)
47 *
48 * XXX Will be replaced when the PRM/CM drivers are completed.
49 */
50void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
51{
Tero Kristo90129332017-05-31 18:00:00 +030052 cm_base.va = cm;
53 cm2_base.va = cm2;
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060054}
55
Paul Walmsley21325b252012-10-21 01:01:12 -060056/**
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060057 * cm_split_idlest_reg - split CM_IDLEST reg addr into its components
58 * @idlest_reg: CM_IDLEST* virtual address
59 * @prcm_inst: pointer to an s16 to return the PRCM instance offset
60 * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
61 *
62 * Given an absolute CM_IDLEST register address @idlest_reg, passes
63 * the PRCM instance offset and IDLEST register ID back to the caller
64 * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error,
65 * or 0 upon success. XXX This function is only needed until absolute
66 * register addresses are removed from the OMAP struct clk records.
67 */
Tero Kristo6c0afb52017-02-09 11:24:37 +020068int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060069 u8 *idlest_reg_id)
70{
Tero Kristo6301d582017-10-30 11:11:04 +020071 int ret;
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060072 if (!cm_ll_data->split_idlest_reg) {
73 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
74 __func__);
75 return -EINVAL;
76 }
77
Tero Kristo6301d582017-10-30 11:11:04 +020078 ret = cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060079 idlest_reg_id);
Tero Kristo6301d582017-10-30 11:11:04 +020080 *prcm_inst -= cm_base.offset;
81 return ret;
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060082}
83
84/**
Tero Kristo021b6ff2014-10-27 08:39:23 -070085 * omap_cm_wait_module_ready - wait for a module to leave idle or standby
86 * @part: PRCM partition
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060087 * @prcm_mod: PRCM module offset
Tero Kristo021b6ff2014-10-27 08:39:23 -070088 * @idlest_reg: CM_IDLESTx register
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060089 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
90 *
91 * Wait for the PRCM to indicate that the module identified by
92 * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
93 * success, -EBUSY if the module doesn't enable in time, or -EINVAL if
94 * no per-SoC wait_module_ready() function pointer has been registered
95 * or if the idlest register is unknown on the SoC.
96 */
Tero Kristo021b6ff2014-10-27 08:39:23 -070097int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
98 u8 idlest_shift)
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060099{
100 if (!cm_ll_data->wait_module_ready) {
101 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
102 __func__);
103 return -EINVAL;
104 }
105
Tero Kristo021b6ff2014-10-27 08:39:23 -0700106 return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
107 idlest_shift);
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600108}
109
110/**
Tero Kristoa8ae5af2014-10-27 08:39:23 -0700111 * omap_cm_wait_module_idle - wait for a module to enter idle or standby
112 * @part: PRCM partition
113 * @prcm_mod: PRCM module offset
114 * @idlest_reg: CM_IDLESTx register
115 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
116 *
117 * Wait for the PRCM to indicate that the module identified by
118 * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked. Return
119 * 0 upon success, -EBUSY if the module doesn't enable in time, or
120 * -EINVAL if no per-SoC wait_module_idle() function pointer has been
121 * registered or if the idlest register is unknown on the SoC.
122 */
123int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
124 u8 idlest_shift)
125{
126 if (!cm_ll_data->wait_module_idle) {
127 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
128 __func__);
129 return -EINVAL;
130 }
131
132 return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,
133 idlest_shift);
134}
135
136/**
Tero Kristo128603f2014-10-27 08:39:24 -0700137 * omap_cm_module_enable - enable a module
138 * @mode: target mode for the module
139 * @part: PRCM partition
140 * @inst: PRCM instance
141 * @clkctrl_offs: CM_CLKCTRL register offset for the module
142 *
143 * Enables clocks for a module identified by (@part, @inst, @clkctrl_offs)
144 * making its IO space accessible. Return 0 upon success, -EINVAL if no
145 * per-SoC module_enable() function pointer has been registered.
146 */
147int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs)
148{
149 if (!cm_ll_data->module_enable) {
150 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
151 __func__);
152 return -EINVAL;
153 }
154
155 cm_ll_data->module_enable(mode, part, inst, clkctrl_offs);
156 return 0;
157}
158
159/**
160 * omap_cm_module_disable - disable a module
161 * @part: PRCM partition
162 * @inst: PRCM instance
163 * @clkctrl_offs: CM_CLKCTRL register offset for the module
164 *
165 * Disables clocks for a module identified by (@part, @inst, @clkctrl_offs)
166 * makings its IO space inaccessible. Return 0 upon success, -EINVAL if
167 * no per-SoC module_disable() function pointer has been registered.
168 */
169int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
170{
171 if (!cm_ll_data->module_disable) {
172 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
173 __func__);
174 return -EINVAL;
175 }
176
177 cm_ll_data->module_disable(part, inst, clkctrl_offs);
178 return 0;
179}
180
Tero Kristo5fa4a3c2017-08-04 17:37:45 +0300181u32 omap_cm_xlate_clkctrl(u8 part, u16 inst, u16 clkctrl_offs)
182{
183 if (!cm_ll_data->xlate_clkctrl) {
184 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
185 __func__);
186 return 0;
187 }
188 return cm_ll_data->xlate_clkctrl(part, inst, clkctrl_offs);
189}
190
Tero Kristo128603f2014-10-27 08:39:24 -0700191/**
Paul Walmsley21325b252012-10-21 01:01:12 -0600192 * cm_register - register per-SoC low-level data with the CM
193 * @cld: low-level per-SoC OMAP CM data & function pointers to register
194 *
195 * Register per-SoC low-level OMAP CM data and function pointers with
196 * the OMAP CM common interface. The caller must keep the data
197 * pointed to by @cld valid until it calls cm_unregister() and
198 * it returns successfully. Returns 0 upon success, -EINVAL if @cld
199 * is NULL, or -EEXIST if cm_register() has already been called
200 * without an intervening cm_unregister().
201 */
Bhumika Goyala529f8de2017-11-06 14:15:39 +0100202int cm_register(const struct cm_ll_data *cld)
Paul Walmsley21325b252012-10-21 01:01:12 -0600203{
204 if (!cld)
205 return -EINVAL;
206
207 if (cm_ll_data != &null_cm_ll_data)
208 return -EEXIST;
209
210 cm_ll_data = cld;
211
212 return 0;
213}
214
215/**
216 * cm_unregister - unregister per-SoC low-level data & function pointers
217 * @cld: low-level per-SoC OMAP CM data & function pointers to unregister
218 *
219 * Unregister per-SoC low-level OMAP CM data and function pointers
220 * that were previously registered with cm_register(). The
221 * caller may not destroy any of the data pointed to by @cld until
222 * this function returns successfully. Returns 0 upon success, or
223 * -EINVAL if @cld is NULL or if @cld does not match the struct
224 * cm_ll_data * previously registered by cm_register().
225 */
Bhumika Goyala529f8de2017-11-06 14:15:39 +0100226int cm_unregister(const struct cm_ll_data *cld)
Paul Walmsley21325b252012-10-21 01:01:12 -0600227{
228 if (!cld || cm_ll_data != cld)
229 return -EINVAL;
230
231 cm_ll_data = &null_cm_ll_data;
232
233 return 0;
234}
Tero Kristofe874142014-03-12 18:33:45 +0200235
Tero Kristo425dc8b2014-11-21 15:51:37 +0200236#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
237 defined(CONFIG_SOC_DRA7XX)
238static struct omap_prcm_init_data cm_data __initdata = {
Tero Kristofe874142014-03-12 18:33:45 +0200239 .index = TI_CLKM_CM,
Tero Kristo425dc8b2014-11-21 15:51:37 +0200240 .init = omap4_cm_init,
Tero Kristofe874142014-03-12 18:33:45 +0200241};
242
Tero Kristo425dc8b2014-11-21 15:51:37 +0200243static struct omap_prcm_init_data cm2_data __initdata = {
Tero Kristofe874142014-03-12 18:33:45 +0200244 .index = TI_CLKM_CM2,
Tero Kristo425dc8b2014-11-21 15:51:37 +0200245 .init = omap4_cm_init,
Tero Kristofe874142014-03-12 18:33:45 +0200246};
Tero Kristo425dc8b2014-11-21 15:51:37 +0200247#endif
Tero Kristofe874142014-03-12 18:33:45 +0200248
Tero Kristo425dc8b2014-11-21 15:51:37 +0200249#ifdef CONFIG_ARCH_OMAP2
250static struct omap_prcm_init_data omap2_prcm_data __initdata = {
Tero Kristo5970ca22014-11-11 16:51:52 +0200251 .index = TI_CLKM_CM,
Tero Kristo425dc8b2014-11-21 15:51:37 +0200252 .init = omap2xxx_cm_init,
253 .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
Tero Kristo5970ca22014-11-11 16:51:52 +0200254};
Tero Kristo425dc8b2014-11-21 15:51:37 +0200255#endif
Tero Kristo5970ca22014-11-11 16:51:52 +0200256
Tero Kristo425dc8b2014-11-21 15:51:37 +0200257#ifdef CONFIG_ARCH_OMAP3
258static struct omap_prcm_init_data omap3_cm_data __initdata = {
Tero Kristo5970ca22014-11-11 16:51:52 +0200259 .index = TI_CLKM_CM,
Tero Kristo425dc8b2014-11-21 15:51:37 +0200260 .init = omap3xxx_cm_init,
261 .flags = CM_SINGLE_INSTANCE,
Tero Kristo5970ca22014-11-11 16:51:52 +0200262
263 /*
264 * IVA2 offset is a negative value, must offset the cm_base address
265 * by this to get it to positive side on the iomap
266 */
267 .offset = -OMAP3430_IVA2_MOD,
268};
Tero Kristo425dc8b2014-11-21 15:51:37 +0200269#endif
Tero Kristo5970ca22014-11-11 16:51:52 +0200270
Tero Kristo425dc8b2014-11-21 15:51:37 +0200271#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
272static struct omap_prcm_init_data am3_prcm_data __initdata = {
Tero Kristo5970ca22014-11-11 16:51:52 +0200273 .index = TI_CLKM_CM,
Tero Kristo425dc8b2014-11-21 15:51:37 +0200274 .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
275 .init = am33xx_cm_init,
Tero Kristo5970ca22014-11-11 16:51:52 +0200276};
Tero Kristo425dc8b2014-11-21 15:51:37 +0200277#endif
Tero Kristo5970ca22014-11-11 16:51:52 +0200278
Tero Kristo425dc8b2014-11-21 15:51:37 +0200279#ifdef CONFIG_SOC_AM43XX
280static struct omap_prcm_init_data am4_prcm_data __initdata = {
Tero Kristo5970ca22014-11-11 16:51:52 +0200281 .index = TI_CLKM_CM,
Tero Kristo425dc8b2014-11-21 15:51:37 +0200282 .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
283 .init = omap4_cm_init,
Tero Kristo5970ca22014-11-11 16:51:52 +0200284};
Tero Kristo425dc8b2014-11-21 15:51:37 +0200285#endif
Tero Kristo5970ca22014-11-11 16:51:52 +0200286
Tero Kristo425dc8b2014-11-21 15:51:37 +0200287static const struct of_device_id omap_cm_dt_match_table[] __initconst = {
288#ifdef CONFIG_ARCH_OMAP2
Tero Kristo5970ca22014-11-11 16:51:52 +0200289 { .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data },
Tero Kristo425dc8b2014-11-21 15:51:37 +0200290#endif
291#ifdef CONFIG_ARCH_OMAP3
Tero Kristo5970ca22014-11-11 16:51:52 +0200292 { .compatible = "ti,omap3-cm", .data = &omap3_cm_data },
Tero Kristo425dc8b2014-11-21 15:51:37 +0200293#endif
294#ifdef CONFIG_ARCH_OMAP4
Tero Kristofe874142014-03-12 18:33:45 +0200295 { .compatible = "ti,omap4-cm1", .data = &cm_data },
296 { .compatible = "ti,omap4-cm2", .data = &cm2_data },
Tero Kristo425dc8b2014-11-21 15:51:37 +0200297#endif
298#ifdef CONFIG_SOC_OMAP5
Tero Kristofe874142014-03-12 18:33:45 +0200299 { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
300 { .compatible = "ti,omap5-cm-core", .data = &cm2_data },
Tero Kristo425dc8b2014-11-21 15:51:37 +0200301#endif
302#ifdef CONFIG_SOC_DRA7XX
Tero Kristofe874142014-03-12 18:33:45 +0200303 { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
304 { .compatible = "ti,dra7-cm-core", .data = &cm2_data },
Tero Kristo425dc8b2014-11-21 15:51:37 +0200305#endif
306#ifdef CONFIG_SOC_AM33XX
Tero Kristo5970ca22014-11-11 16:51:52 +0200307 { .compatible = "ti,am3-prcm", .data = &am3_prcm_data },
Tero Kristo425dc8b2014-11-21 15:51:37 +0200308#endif
309#ifdef CONFIG_SOC_AM43XX
Tero Kristo5970ca22014-11-11 16:51:52 +0200310 { .compatible = "ti,am4-prcm", .data = &am4_prcm_data },
Tero Kristo425dc8b2014-11-21 15:51:37 +0200311#endif
312#ifdef CONFIG_SOC_TI81XX
313 { .compatible = "ti,dm814-prcm", .data = &am3_prcm_data },
314 { .compatible = "ti,dm816-prcm", .data = &am3_prcm_data },
315#endif
Tero Kristofe874142014-03-12 18:33:45 +0200316 { }
317};
318
319/**
Tero Kristo5970ca22014-11-11 16:51:52 +0200320 * omap2_cm_base_init - initialize iomappings for the CM drivers
321 *
322 * Detects and initializes the iomappings for the CM driver, based
323 * on the DT data. Returns 0 in success, negative error value
324 * otherwise.
325 */
326int __init omap2_cm_base_init(void)
327{
328 struct device_node *np;
329 const struct of_device_id *match;
330 struct omap_prcm_init_data *data;
Tero Kristo90129332017-05-31 18:00:00 +0300331 struct resource res;
332 int ret;
333 struct omap_domain_base *mem = NULL;
Tero Kristo5970ca22014-11-11 16:51:52 +0200334
335 for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
336 data = (struct omap_prcm_init_data *)match->data;
337
Tero Kristo90129332017-05-31 18:00:00 +0300338 ret = of_address_to_resource(np, 0, &res);
339 if (ret)
340 return ret;
Tero Kristo5970ca22014-11-11 16:51:52 +0200341
342 if (data->index == TI_CLKM_CM)
Tero Kristo90129332017-05-31 18:00:00 +0300343 mem = &cm_base;
Tero Kristo5970ca22014-11-11 16:51:52 +0200344
345 if (data->index == TI_CLKM_CM2)
Tero Kristo90129332017-05-31 18:00:00 +0300346 mem = &cm2_base;
Tero Kristo5970ca22014-11-11 16:51:52 +0200347
Tero Kristo90129332017-05-31 18:00:00 +0300348 data->mem = ioremap(res.start, resource_size(&res));
349
350 if (mem) {
351 mem->pa = res.start + data->offset;
352 mem->va = data->mem + data->offset;
Tero Kristo6301d582017-10-30 11:11:04 +0200353 mem->offset = data->offset;
Tero Kristo90129332017-05-31 18:00:00 +0300354 }
Tero Kristo425dc8b2014-11-21 15:51:37 +0200355
356 data->np = np;
357
358 if (data->init && (data->flags & CM_SINGLE_INSTANCE ||
Tero Kristo90129332017-05-31 18:00:00 +0300359 (cm_base.va && cm2_base.va)))
Tero Kristo425dc8b2014-11-21 15:51:37 +0200360 data->init(data);
Tero Kristo5970ca22014-11-11 16:51:52 +0200361 }
362
363 return 0;
364}
365
366/**
Tero Kristofe874142014-03-12 18:33:45 +0200367 * omap_cm_init - low level init for the CM drivers
368 *
369 * Initializes the low level clock infrastructure for CM drivers.
370 * Returns 0 in success, negative error value in failure.
371 */
372int __init omap_cm_init(void)
373{
374 struct device_node *np;
Tero Kristofe874142014-03-12 18:33:45 +0200375 const struct of_device_id *match;
376 const struct omap_prcm_init_data *data;
377 int ret;
378
379 for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
380 data = match->data;
381
Tero Kristo5970ca22014-11-11 16:51:52 +0200382 if (data->flags & CM_NO_CLOCKS)
383 continue;
Tero Kristofe874142014-03-12 18:33:45 +0200384
Tero Kristo80cbb222015-02-06 16:00:32 +0200385 ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
Tero Kristofe874142014-03-12 18:33:45 +0200386 if (ret)
387 return ret;
388 }
389
390 return 0;
391}