Thomas Gleixner | c942fdd | 2019-05-27 08:55:06 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2017 Free Electrons |
| 4 | * Copyright (C) 2017 NextThing Co |
| 5 | * |
| 6 | * Author: Boris Brezillon <boris.brezillon@free-electrons.com> |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 9 | #include <linux/slab.h> |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 10 | |
Boris Brezillon | 348d56a | 2018-09-07 00:38:48 +0200 | [diff] [blame] | 11 | #include "internals.h" |
| 12 | |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 13 | /* |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 14 | * Special Micron status bit 3 indicates that the block has been |
| 15 | * corrected by on-die ECC and should be rewritten. |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 16 | */ |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 17 | #define NAND_ECC_STATUS_WRITE_RECOMMENDED BIT(3) |
| 18 | |
| 19 | /* |
| 20 | * On chips with 8-bit ECC and additional bit can be used to distinguish |
| 21 | * cases where a errors were corrected without needing a rewrite |
| 22 | * |
| 23 | * Bit 4 Bit 3 Bit 0 Description |
| 24 | * ----- ----- ----- ----------- |
| 25 | * 0 0 0 No Errors |
| 26 | * 0 0 1 Multiple uncorrected errors |
| 27 | * 0 1 0 4 - 6 errors corrected, recommend rewrite |
| 28 | * 0 1 1 Reserved |
| 29 | * 1 0 0 1 - 3 errors corrected |
| 30 | * 1 0 1 Reserved |
| 31 | * 1 1 0 7 - 8 errors corrected, recommend rewrite |
| 32 | */ |
| 33 | #define NAND_ECC_STATUS_MASK (BIT(4) | BIT(3) | BIT(0)) |
| 34 | #define NAND_ECC_STATUS_UNCORRECTABLE BIT(0) |
| 35 | #define NAND_ECC_STATUS_4_6_CORRECTED BIT(3) |
| 36 | #define NAND_ECC_STATUS_1_3_CORRECTED BIT(4) |
| 37 | #define NAND_ECC_STATUS_7_8_CORRECTED (BIT(4) | BIT(3)) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 38 | |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 39 | struct nand_onfi_vendor_micron { |
| 40 | u8 two_plane_read; |
| 41 | u8 read_cache; |
| 42 | u8 read_unique_id; |
| 43 | u8 dq_imped; |
| 44 | u8 dq_imped_num_settings; |
| 45 | u8 dq_imped_feat_addr; |
| 46 | u8 rb_pulldown_strength; |
| 47 | u8 rb_pulldown_strength_feat_addr; |
| 48 | u8 rb_pulldown_strength_num_settings; |
| 49 | u8 otp_mode; |
| 50 | u8 otp_page_start; |
| 51 | u8 otp_data_prot_addr; |
| 52 | u8 otp_num_pages; |
| 53 | u8 otp_feat_addr; |
| 54 | u8 read_retry_options; |
| 55 | u8 reserved[72]; |
| 56 | u8 param_revision; |
| 57 | } __packed; |
| 58 | |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 59 | struct micron_on_die_ecc { |
Boris Brezillon | ef422e1 | 2018-07-18 10:42:20 +0200 | [diff] [blame] | 60 | bool forced; |
Boris Brezillon | 317c6d9 | 2018-07-18 10:42:21 +0200 | [diff] [blame] | 61 | bool enabled; |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 62 | void *rawbuf; |
| 63 | }; |
| 64 | |
| 65 | struct micron_nand { |
| 66 | struct micron_on_die_ecc ecc; |
| 67 | }; |
| 68 | |
Boris Brezillon | 2e7f1ce | 2018-09-06 14:05:32 +0200 | [diff] [blame] | 69 | static int micron_nand_setup_read_retry(struct nand_chip *chip, int retry_mode) |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 70 | { |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 71 | u8 feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode}; |
| 72 | |
Miquel Raynal | 97baea1 | 2018-03-19 14:47:20 +0100 | [diff] [blame] | 73 | return nand_set_features(chip, ONFI_FEATURE_ADDR_READ_RETRY, feature); |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | /* |
| 77 | * Configure chip properties from Micron vendor-specific ONFI table |
| 78 | */ |
| 79 | static int micron_nand_onfi_init(struct nand_chip *chip) |
| 80 | { |
Miquel Raynal | a97421c | 2018-03-19 14:47:27 +0100 | [diff] [blame] | 81 | struct nand_parameters *p = &chip->parameters; |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 82 | |
Miquel Raynal | 3d3fe3c | 2018-07-25 15:31:52 +0200 | [diff] [blame] | 83 | if (p->onfi) { |
| 84 | struct nand_onfi_vendor_micron *micron = (void *)p->onfi->vendor; |
| 85 | |
Miquel Raynal | a97421c | 2018-03-19 14:47:27 +0100 | [diff] [blame] | 86 | chip->read_retries = micron->read_retry_options; |
| 87 | chip->setup_read_retry = micron_nand_setup_read_retry; |
| 88 | } |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 89 | |
Miquel Raynal | 789157e | 2018-03-19 14:47:28 +0100 | [diff] [blame] | 90 | if (p->supports_set_get_features) { |
| 91 | set_bit(ONFI_FEATURE_ADDR_READ_RETRY, p->set_feature_list); |
Chris Packham | 12baf77 | 2018-06-19 17:31:24 +1200 | [diff] [blame] | 92 | set_bit(ONFI_FEATURE_ON_DIE_ECC, p->set_feature_list); |
Miquel Raynal | 789157e | 2018-03-19 14:47:28 +0100 | [diff] [blame] | 93 | set_bit(ONFI_FEATURE_ADDR_READ_RETRY, p->get_feature_list); |
Chris Packham | 12baf77 | 2018-06-19 17:31:24 +1200 | [diff] [blame] | 94 | set_bit(ONFI_FEATURE_ON_DIE_ECC, p->get_feature_list); |
Miquel Raynal | 789157e | 2018-03-19 14:47:28 +0100 | [diff] [blame] | 95 | } |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 96 | |
| 97 | return 0; |
| 98 | } |
| 99 | |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 100 | static int micron_nand_on_die_4_ooblayout_ecc(struct mtd_info *mtd, |
| 101 | int section, |
| 102 | struct mtd_oob_region *oobregion) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 103 | { |
| 104 | if (section >= 4) |
| 105 | return -ERANGE; |
| 106 | |
| 107 | oobregion->offset = (section * 16) + 8; |
| 108 | oobregion->length = 8; |
| 109 | |
| 110 | return 0; |
| 111 | } |
| 112 | |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 113 | static int micron_nand_on_die_4_ooblayout_free(struct mtd_info *mtd, |
| 114 | int section, |
| 115 | struct mtd_oob_region *oobregion) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 116 | { |
| 117 | if (section >= 4) |
| 118 | return -ERANGE; |
| 119 | |
| 120 | oobregion->offset = (section * 16) + 2; |
| 121 | oobregion->length = 6; |
| 122 | |
| 123 | return 0; |
| 124 | } |
| 125 | |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 126 | static const struct mtd_ooblayout_ops micron_nand_on_die_4_ooblayout_ops = { |
| 127 | .ecc = micron_nand_on_die_4_ooblayout_ecc, |
| 128 | .free = micron_nand_on_die_4_ooblayout_free, |
| 129 | }; |
| 130 | |
| 131 | static int micron_nand_on_die_8_ooblayout_ecc(struct mtd_info *mtd, |
| 132 | int section, |
| 133 | struct mtd_oob_region *oobregion) |
| 134 | { |
| 135 | struct nand_chip *chip = mtd_to_nand(mtd); |
| 136 | |
| 137 | if (section) |
| 138 | return -ERANGE; |
| 139 | |
| 140 | oobregion->offset = mtd->oobsize - chip->ecc.total; |
| 141 | oobregion->length = chip->ecc.total; |
| 142 | |
| 143 | return 0; |
| 144 | } |
| 145 | |
| 146 | static int micron_nand_on_die_8_ooblayout_free(struct mtd_info *mtd, |
| 147 | int section, |
| 148 | struct mtd_oob_region *oobregion) |
| 149 | { |
| 150 | struct nand_chip *chip = mtd_to_nand(mtd); |
| 151 | |
| 152 | if (section) |
| 153 | return -ERANGE; |
| 154 | |
| 155 | oobregion->offset = 2; |
| 156 | oobregion->length = mtd->oobsize - chip->ecc.total - 2; |
| 157 | |
| 158 | return 0; |
| 159 | } |
| 160 | |
| 161 | static const struct mtd_ooblayout_ops micron_nand_on_die_8_ooblayout_ops = { |
| 162 | .ecc = micron_nand_on_die_8_ooblayout_ecc, |
| 163 | .free = micron_nand_on_die_8_ooblayout_free, |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 164 | }; |
| 165 | |
| 166 | static int micron_nand_on_die_ecc_setup(struct nand_chip *chip, bool enable) |
| 167 | { |
Boris Brezillon | ef422e1 | 2018-07-18 10:42:20 +0200 | [diff] [blame] | 168 | struct micron_nand *micron = nand_get_manufacturer_data(chip); |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 169 | u8 feature[ONFI_SUBFEATURE_PARAM_LEN] = { 0, }; |
Boris Brezillon | 317c6d9 | 2018-07-18 10:42:21 +0200 | [diff] [blame] | 170 | int ret; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 171 | |
Boris Brezillon | ef422e1 | 2018-07-18 10:42:20 +0200 | [diff] [blame] | 172 | if (micron->ecc.forced) |
| 173 | return 0; |
| 174 | |
Boris Brezillon | 317c6d9 | 2018-07-18 10:42:21 +0200 | [diff] [blame] | 175 | if (micron->ecc.enabled == enable) |
| 176 | return 0; |
| 177 | |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 178 | if (enable) |
| 179 | feature[0] |= ONFI_FEATURE_ON_DIE_ECC_EN; |
| 180 | |
Boris Brezillon | 317c6d9 | 2018-07-18 10:42:21 +0200 | [diff] [blame] | 181 | ret = nand_set_features(chip, ONFI_FEATURE_ON_DIE_ECC, feature); |
| 182 | if (!ret) |
| 183 | micron->ecc.enabled = enable; |
| 184 | |
| 185 | return ret; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 186 | } |
| 187 | |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 188 | static int micron_nand_on_die_ecc_status_4(struct nand_chip *chip, u8 status, |
| 189 | void *buf, int page, |
| 190 | int oob_required) |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 191 | { |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 192 | struct micron_nand *micron = nand_get_manufacturer_data(chip); |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 193 | struct mtd_info *mtd = nand_to_mtd(chip); |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 194 | unsigned int step, max_bitflips = 0; |
| 195 | int ret; |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 196 | |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 197 | if (!(status & NAND_ECC_STATUS_WRITE_RECOMMENDED)) { |
| 198 | if (status & NAND_STATUS_FAIL) |
| 199 | mtd->ecc_stats.failed++; |
| 200 | |
| 201 | return 0; |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 202 | } |
| 203 | |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 204 | /* |
| 205 | * The internal ECC doesn't tell us the number of bitflips that have |
| 206 | * been corrected, but tells us if it recommends to rewrite the block. |
| 207 | * If it's the case, we need to read the page in raw mode and compare |
| 208 | * its content to the corrected version to extract the actual number of |
| 209 | * bitflips. |
| 210 | * But before we do that, we must make sure we have all OOB bytes read |
| 211 | * in non-raw mode, even if the user did not request those bytes. |
| 212 | */ |
| 213 | if (!oob_required) { |
| 214 | ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, |
| 215 | false); |
| 216 | if (ret) |
| 217 | return ret; |
| 218 | } |
| 219 | |
| 220 | micron_nand_on_die_ecc_setup(chip, false); |
| 221 | |
| 222 | ret = nand_read_page_op(chip, page, 0, micron->ecc.rawbuf, |
| 223 | mtd->writesize + mtd->oobsize); |
| 224 | if (ret) |
| 225 | return ret; |
| 226 | |
| 227 | for (step = 0; step < chip->ecc.steps; step++) { |
| 228 | unsigned int offs, i, nbitflips = 0; |
| 229 | u8 *rawbuf, *corrbuf; |
| 230 | |
| 231 | offs = step * chip->ecc.size; |
| 232 | rawbuf = micron->ecc.rawbuf + offs; |
| 233 | corrbuf = buf + offs; |
| 234 | |
| 235 | for (i = 0; i < chip->ecc.size; i++) |
| 236 | nbitflips += hweight8(corrbuf[i] ^ rawbuf[i]); |
| 237 | |
| 238 | offs = (step * 16) + 4; |
| 239 | rawbuf = micron->ecc.rawbuf + mtd->writesize + offs; |
| 240 | corrbuf = chip->oob_poi + offs; |
| 241 | |
| 242 | for (i = 0; i < chip->ecc.bytes + 4; i++) |
| 243 | nbitflips += hweight8(corrbuf[i] ^ rawbuf[i]); |
| 244 | |
| 245 | if (WARN_ON(nbitflips > chip->ecc.strength)) |
| 246 | return -EINVAL; |
| 247 | |
| 248 | max_bitflips = max(nbitflips, max_bitflips); |
| 249 | mtd->ecc_stats.corrected += nbitflips; |
| 250 | } |
| 251 | |
| 252 | return max_bitflips; |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | static int micron_nand_on_die_ecc_status_8(struct nand_chip *chip, u8 status) |
| 256 | { |
| 257 | struct mtd_info *mtd = nand_to_mtd(chip); |
| 258 | |
| 259 | /* |
| 260 | * With 8/512 we have more information but still don't know precisely |
| 261 | * how many bit-flips were seen. |
| 262 | */ |
| 263 | switch (status & NAND_ECC_STATUS_MASK) { |
| 264 | case NAND_ECC_STATUS_UNCORRECTABLE: |
| 265 | mtd->ecc_stats.failed++; |
| 266 | return 0; |
| 267 | case NAND_ECC_STATUS_1_3_CORRECTED: |
| 268 | mtd->ecc_stats.corrected += 3; |
| 269 | return 3; |
| 270 | case NAND_ECC_STATUS_4_6_CORRECTED: |
| 271 | mtd->ecc_stats.corrected += 6; |
| 272 | /* rewrite recommended */ |
| 273 | return 6; |
| 274 | case NAND_ECC_STATUS_7_8_CORRECTED: |
| 275 | mtd->ecc_stats.corrected += 8; |
| 276 | /* rewrite recommended */ |
| 277 | return 8; |
| 278 | default: |
| 279 | return 0; |
| 280 | } |
| 281 | } |
| 282 | |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 283 | static int |
Boris Brezillon | b976168 | 2018-09-06 14:05:20 +0200 | [diff] [blame] | 284 | micron_nand_read_page_on_die_ecc(struct nand_chip *chip, uint8_t *buf, |
| 285 | int oob_required, int page) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 286 | { |
Boris Brezillon | b976168 | 2018-09-06 14:05:20 +0200 | [diff] [blame] | 287 | struct mtd_info *mtd = nand_to_mtd(chip); |
Boris Brezillon | 97d90da | 2017-11-30 18:01:29 +0100 | [diff] [blame] | 288 | u8 status; |
| 289 | int ret, max_bitflips = 0; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 290 | |
Boris Brezillon | 97d90da | 2017-11-30 18:01:29 +0100 | [diff] [blame] | 291 | ret = micron_nand_on_die_ecc_setup(chip, true); |
| 292 | if (ret) |
| 293 | return ret; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 294 | |
Boris Brezillon | 97d90da | 2017-11-30 18:01:29 +0100 | [diff] [blame] | 295 | ret = nand_read_page_op(chip, page, 0, NULL, 0); |
| 296 | if (ret) |
| 297 | goto out; |
| 298 | |
| 299 | ret = nand_status_op(chip, &status); |
| 300 | if (ret) |
| 301 | goto out; |
| 302 | |
| 303 | ret = nand_exit_status_op(chip); |
| 304 | if (ret) |
| 305 | goto out; |
| 306 | |
Boris Brezillon | 25f815f | 2017-11-30 18:01:30 +0100 | [diff] [blame] | 307 | ret = nand_read_data_op(chip, buf, mtd->writesize, false); |
| 308 | if (!ret && oob_required) |
| 309 | ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, |
| 310 | false); |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 311 | |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 312 | if (chip->ecc.strength == 4) |
| 313 | max_bitflips = micron_nand_on_die_ecc_status_4(chip, status, |
| 314 | buf, page, |
| 315 | oob_required); |
| 316 | else |
| 317 | max_bitflips = micron_nand_on_die_ecc_status_8(chip, status); |
| 318 | |
Boris Brezillon | 97d90da | 2017-11-30 18:01:29 +0100 | [diff] [blame] | 319 | out: |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 320 | micron_nand_on_die_ecc_setup(chip, false); |
| 321 | |
Boris Brezillon | 97d90da | 2017-11-30 18:01:29 +0100 | [diff] [blame] | 322 | return ret ? ret : max_bitflips; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 323 | } |
| 324 | |
| 325 | static int |
Boris Brezillon | 767eb6f | 2018-09-06 14:05:21 +0200 | [diff] [blame] | 326 | micron_nand_write_page_on_die_ecc(struct nand_chip *chip, const uint8_t *buf, |
| 327 | int oob_required, int page) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 328 | { |
Boris Brezillon | 97d90da | 2017-11-30 18:01:29 +0100 | [diff] [blame] | 329 | int ret; |
Boris Brezillon | 4114564 | 2017-05-16 18:27:49 +0200 | [diff] [blame] | 330 | |
Boris Brezillon | 97d90da | 2017-11-30 18:01:29 +0100 | [diff] [blame] | 331 | ret = micron_nand_on_die_ecc_setup(chip, true); |
| 332 | if (ret) |
| 333 | return ret; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 334 | |
Boris Brezillon | 767eb6f | 2018-09-06 14:05:21 +0200 | [diff] [blame] | 335 | ret = nand_write_page_raw(chip, buf, oob_required, page); |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 336 | micron_nand_on_die_ecc_setup(chip, false); |
| 337 | |
Boris Brezillon | 97d90da | 2017-11-30 18:01:29 +0100 | [diff] [blame] | 338 | return ret; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 339 | } |
| 340 | |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 341 | enum { |
| 342 | /* The NAND flash doesn't support on-die ECC */ |
| 343 | MICRON_ON_DIE_UNSUPPORTED, |
| 344 | |
| 345 | /* |
| 346 | * The NAND flash supports on-die ECC and it can be |
| 347 | * enabled/disabled by a set features command. |
| 348 | */ |
| 349 | MICRON_ON_DIE_SUPPORTED, |
| 350 | |
| 351 | /* |
| 352 | * The NAND flash supports on-die ECC, and it cannot be |
| 353 | * disabled. |
| 354 | */ |
| 355 | MICRON_ON_DIE_MANDATORY, |
| 356 | }; |
| 357 | |
Boris Brezillon | dbc44ed | 2018-07-18 10:42:15 +0200 | [diff] [blame] | 358 | #define MICRON_ID_INTERNAL_ECC_MASK GENMASK(1, 0) |
| 359 | #define MICRON_ID_ECC_ENABLED BIT(7) |
| 360 | |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 361 | /* |
| 362 | * Try to detect if the NAND support on-die ECC. To do this, we enable |
| 363 | * the feature, and read back if it has been enabled as expected. We |
| 364 | * also check if it can be disabled, because some Micron NANDs do not |
| 365 | * allow disabling the on-die ECC and we don't support such NANDs for |
| 366 | * now. |
| 367 | * |
| 368 | * This function also has the side effect of disabling on-die ECC if |
| 369 | * it had been left enabled by the firmware/bootloader. |
| 370 | */ |
| 371 | static int micron_supports_on_die_ecc(struct nand_chip *chip) |
| 372 | { |
Boris Brezillon | dbc44ed | 2018-07-18 10:42:15 +0200 | [diff] [blame] | 373 | u8 id[5]; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 374 | int ret; |
| 375 | |
Miquel Raynal | 3d3fe3c | 2018-07-25 15:31:52 +0200 | [diff] [blame] | 376 | if (!chip->parameters.onfi) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 377 | return MICRON_ON_DIE_UNSUPPORTED; |
| 378 | |
Boris Brezillon | 2981516 | 2018-10-25 17:16:47 +0200 | [diff] [blame] | 379 | if (nanddev_bits_per_cell(&chip->base) != 1) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 380 | return MICRON_ON_DIE_UNSUPPORTED; |
| 381 | |
Boris Brezillon | dbc44ed | 2018-07-18 10:42:15 +0200 | [diff] [blame] | 382 | /* |
| 383 | * We only support on-die ECC of 4/512 or 8/512 |
| 384 | */ |
Boris Brezillon | 6a1b66d | 2018-11-04 16:09:42 +0100 | [diff] [blame] | 385 | if (chip->base.eccreq.strength != 4 && chip->base.eccreq.strength != 8) |
Boris Brezillon | dbc44ed | 2018-07-18 10:42:15 +0200 | [diff] [blame] | 386 | return MICRON_ON_DIE_UNSUPPORTED; |
| 387 | |
| 388 | /* 0x2 means on-die ECC is available. */ |
| 389 | if (chip->id.len != 5 || |
| 390 | (chip->id.data[4] & MICRON_ID_INTERNAL_ECC_MASK) != 0x2) |
| 391 | return MICRON_ON_DIE_UNSUPPORTED; |
| 392 | |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 393 | ret = micron_nand_on_die_ecc_setup(chip, true); |
| 394 | if (ret) |
| 395 | return MICRON_ON_DIE_UNSUPPORTED; |
| 396 | |
Boris Brezillon | dbc44ed | 2018-07-18 10:42:15 +0200 | [diff] [blame] | 397 | ret = nand_readid_op(chip, 0, id, sizeof(id)); |
| 398 | if (ret) |
| 399 | return MICRON_ON_DIE_UNSUPPORTED; |
Miquel Raynal | 97baea1 | 2018-03-19 14:47:20 +0100 | [diff] [blame] | 400 | |
Boris Brezillon | dbc44ed | 2018-07-18 10:42:15 +0200 | [diff] [blame] | 401 | if (!(id[4] & MICRON_ID_ECC_ENABLED)) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 402 | return MICRON_ON_DIE_UNSUPPORTED; |
| 403 | |
| 404 | ret = micron_nand_on_die_ecc_setup(chip, false); |
| 405 | if (ret) |
| 406 | return MICRON_ON_DIE_UNSUPPORTED; |
| 407 | |
Boris Brezillon | dbc44ed | 2018-07-18 10:42:15 +0200 | [diff] [blame] | 408 | ret = nand_readid_op(chip, 0, id, sizeof(id)); |
| 409 | if (ret) |
| 410 | return MICRON_ON_DIE_UNSUPPORTED; |
Miquel Raynal | 97baea1 | 2018-03-19 14:47:20 +0100 | [diff] [blame] | 411 | |
Boris Brezillon | dbc44ed | 2018-07-18 10:42:15 +0200 | [diff] [blame] | 412 | if (id[4] & MICRON_ID_ECC_ENABLED) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 413 | return MICRON_ON_DIE_MANDATORY; |
| 414 | |
| 415 | /* |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 416 | * We only support on-die ECC of 4/512 or 8/512 |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 417 | */ |
Boris Brezillon | 6a1b66d | 2018-11-04 16:09:42 +0100 | [diff] [blame] | 418 | if (chip->base.eccreq.strength != 4 && chip->base.eccreq.strength != 8) |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 419 | return MICRON_ON_DIE_UNSUPPORTED; |
| 420 | |
| 421 | return MICRON_ON_DIE_SUPPORTED; |
| 422 | } |
| 423 | |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 424 | static int micron_nand_init(struct nand_chip *chip) |
| 425 | { |
| 426 | struct mtd_info *mtd = nand_to_mtd(chip); |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 427 | struct micron_nand *micron; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 428 | int ondie; |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 429 | int ret; |
| 430 | |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 431 | micron = kzalloc(sizeof(*micron), GFP_KERNEL); |
| 432 | if (!micron) |
| 433 | return -ENOMEM; |
| 434 | |
| 435 | nand_set_manufacturer_data(chip, micron); |
| 436 | |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 437 | ret = micron_nand_onfi_init(chip); |
| 438 | if (ret) |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 439 | goto err_free_manuf_data; |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 440 | |
| 441 | if (mtd->writesize == 2048) |
Frieder Schrempf | bb59254 | 2019-04-17 12:36:36 +0000 | [diff] [blame] | 442 | chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE; |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 443 | |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 444 | ondie = micron_supports_on_die_ecc(chip); |
| 445 | |
Chris Packham | cb2bf40 | 2018-07-18 10:42:18 +0200 | [diff] [blame] | 446 | if (ondie == MICRON_ON_DIE_MANDATORY && |
| 447 | chip->ecc.mode != NAND_ECC_ON_DIE) { |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 448 | pr_err("On-die ECC forcefully enabled, not supported\n"); |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 449 | ret = -EINVAL; |
| 450 | goto err_free_manuf_data; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 451 | } |
| 452 | |
| 453 | if (chip->ecc.mode == NAND_ECC_ON_DIE) { |
| 454 | if (ondie == MICRON_ON_DIE_UNSUPPORTED) { |
| 455 | pr_err("On-die ECC selected but not supported\n"); |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 456 | ret = -EINVAL; |
| 457 | goto err_free_manuf_data; |
| 458 | } |
| 459 | |
Boris Brezillon | 317c6d9 | 2018-07-18 10:42:21 +0200 | [diff] [blame] | 460 | if (ondie == MICRON_ON_DIE_MANDATORY) { |
Boris Brezillon | ef422e1 | 2018-07-18 10:42:20 +0200 | [diff] [blame] | 461 | micron->ecc.forced = true; |
Boris Brezillon | 317c6d9 | 2018-07-18 10:42:21 +0200 | [diff] [blame] | 462 | micron->ecc.enabled = true; |
| 463 | } |
Boris Brezillon | ef422e1 | 2018-07-18 10:42:20 +0200 | [diff] [blame] | 464 | |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 465 | /* |
| 466 | * In case of 4bit on-die ECC, we need a buffer to store a |
| 467 | * page dumped in raw mode so that we can compare its content |
| 468 | * to the same page after ECC correction happened and extract |
| 469 | * the real number of bitflips from this comparison. |
| 470 | * That's not needed for 8-bit ECC, because the status expose |
| 471 | * a better approximation of the number of bitflips in a page. |
| 472 | */ |
Boris Brezillon | 6a1b66d | 2018-11-04 16:09:42 +0100 | [diff] [blame] | 473 | if (chip->base.eccreq.strength == 4) { |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 474 | micron->ecc.rawbuf = kmalloc(mtd->writesize + |
| 475 | mtd->oobsize, |
| 476 | GFP_KERNEL); |
| 477 | if (!micron->ecc.rawbuf) { |
| 478 | ret = -ENOMEM; |
| 479 | goto err_free_manuf_data; |
| 480 | } |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 481 | } |
| 482 | |
Boris Brezillon | 6a1b66d | 2018-11-04 16:09:42 +0100 | [diff] [blame] | 483 | if (chip->base.eccreq.strength == 4) |
Chris Packham | 3ec7cb3 | 2018-07-18 10:42:16 +0200 | [diff] [blame] | 484 | mtd_set_ooblayout(mtd, |
| 485 | µn_nand_on_die_4_ooblayout_ops); |
| 486 | else |
| 487 | mtd_set_ooblayout(mtd, |
| 488 | µn_nand_on_die_8_ooblayout_ops); |
| 489 | |
Boris Brezillon | 6a1b66d | 2018-11-04 16:09:42 +0100 | [diff] [blame] | 490 | chip->ecc.bytes = chip->base.eccreq.strength * 2; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 491 | chip->ecc.size = 512; |
Boris Brezillon | 6a1b66d | 2018-11-04 16:09:42 +0100 | [diff] [blame] | 492 | chip->ecc.strength = chip->base.eccreq.strength; |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 493 | chip->ecc.algo = NAND_ECC_BCH; |
| 494 | chip->ecc.read_page = micron_nand_read_page_on_die_ecc; |
| 495 | chip->ecc.write_page = micron_nand_write_page_on_die_ecc; |
Chris Packham | cb2bf40 | 2018-07-18 10:42:18 +0200 | [diff] [blame] | 496 | |
| 497 | if (ondie == MICRON_ON_DIE_MANDATORY) { |
| 498 | chip->ecc.read_page_raw = nand_read_page_raw_notsupp; |
| 499 | chip->ecc.write_page_raw = nand_write_page_raw_notsupp; |
| 500 | } else { |
| 501 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 502 | chip->ecc.write_page_raw = nand_write_page_raw; |
| 503 | } |
Thomas Petazzoni | 9748e1d | 2017-04-29 11:06:45 +0200 | [diff] [blame] | 504 | } |
| 505 | |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 506 | return 0; |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 507 | |
| 508 | err_free_manuf_data: |
| 509 | kfree(micron->ecc.rawbuf); |
| 510 | kfree(micron); |
| 511 | |
| 512 | return ret; |
| 513 | } |
| 514 | |
| 515 | static void micron_nand_cleanup(struct nand_chip *chip) |
| 516 | { |
| 517 | struct micron_nand *micron = nand_get_manufacturer_data(chip); |
| 518 | |
| 519 | kfree(micron->ecc.rawbuf); |
| 520 | kfree(micron); |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 521 | } |
| 522 | |
Chris Packham | 243f37c | 2018-06-25 10:44:46 +1200 | [diff] [blame] | 523 | static void micron_fixup_onfi_param_page(struct nand_chip *chip, |
| 524 | struct nand_onfi_params *p) |
| 525 | { |
| 526 | /* |
| 527 | * MT29F1G08ABAFAWP-ITE:F and possibly others report 00 00 for the |
| 528 | * revision number field of the ONFI parameter page. Assume ONFI |
| 529 | * version 1.0 if the revision number is 00 00. |
| 530 | */ |
| 531 | if (le16_to_cpu(p->revision) == 0) |
| 532 | p->revision = cpu_to_le16(ONFI_VERSION_1_0); |
| 533 | } |
| 534 | |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 535 | const struct nand_manufacturer_ops micron_nand_manuf_ops = { |
| 536 | .init = micron_nand_init, |
Boris Brezillon | 2301780 | 2018-07-18 10:42:19 +0200 | [diff] [blame] | 537 | .cleanup = micron_nand_cleanup, |
Chris Packham | 243f37c | 2018-06-25 10:44:46 +1200 | [diff] [blame] | 538 | .fixup_onfi_param_page = micron_fixup_onfi_param_page, |
Boris Brezillon | 10d4e75 | 2016-06-08 10:38:57 +0200 | [diff] [blame] | 539 | }; |