Maxime Ripard | ee38b26 | 2015-07-31 19:46:22 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2015 Maxime Ripard |
| 3 | * |
| 4 | * Maxime Ripard <maxime.ripard@free-electrons.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #include <linux/clk.h> |
| 18 | #include <linux/clk-provider.h> |
Stephen Boyd | 62e59c4 | 2019-04-18 15:20:22 -0700 | [diff] [blame] | 19 | #include <linux/io.h> |
Maxime Ripard | ee38b26 | 2015-07-31 19:46:22 +0200 | [diff] [blame] | 20 | #include <linux/of.h> |
| 21 | #include <linux/of_address.h> |
| 22 | #include <linux/slab.h> |
| 23 | #include <linux/spinlock.h> |
| 24 | |
| 25 | static DEFINE_SPINLOCK(gates_lock); |
| 26 | |
| 27 | static void __init sunxi_simple_gates_setup(struct device_node *node, |
| 28 | const int protected[], |
| 29 | int nprotected) |
| 30 | { |
| 31 | struct clk_onecell_data *clk_data; |
| 32 | const char *clk_parent, *clk_name; |
| 33 | struct property *prop; |
| 34 | struct resource res; |
| 35 | void __iomem *clk_reg; |
| 36 | void __iomem *reg; |
| 37 | const __be32 *p; |
| 38 | int number, i = 0, j; |
| 39 | u8 clk_bit; |
| 40 | u32 index; |
| 41 | |
| 42 | reg = of_io_request_and_map(node, 0, of_node_full_name(node)); |
| 43 | if (IS_ERR(reg)) |
| 44 | return; |
| 45 | |
| 46 | clk_parent = of_clk_get_parent_name(node, 0); |
| 47 | |
| 48 | clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); |
| 49 | if (!clk_data) |
| 50 | goto err_unmap; |
| 51 | |
| 52 | number = of_property_count_u32_elems(node, "clock-indices"); |
| 53 | of_property_read_u32_index(node, "clock-indices", number - 1, &number); |
| 54 | |
| 55 | clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL); |
| 56 | if (!clk_data->clks) |
| 57 | goto err_free_data; |
| 58 | |
| 59 | of_property_for_each_u32(node, "clock-indices", prop, p, index) { |
| 60 | of_property_read_string_index(node, "clock-output-names", |
| 61 | i, &clk_name); |
| 62 | |
| 63 | clk_reg = reg + 4 * (index / 32); |
| 64 | clk_bit = index % 32; |
| 65 | |
| 66 | clk_data->clks[index] = clk_register_gate(NULL, clk_name, |
| 67 | clk_parent, 0, |
| 68 | clk_reg, |
| 69 | clk_bit, |
| 70 | 0, &gates_lock); |
| 71 | i++; |
| 72 | |
| 73 | if (IS_ERR(clk_data->clks[index])) { |
| 74 | WARN_ON(true); |
| 75 | continue; |
| 76 | } |
| 77 | |
| 78 | for (j = 0; j < nprotected; j++) |
| 79 | if (protected[j] == index) |
| 80 | clk_prepare_enable(clk_data->clks[index]); |
| 81 | |
| 82 | } |
| 83 | |
| 84 | clk_data->clk_num = number + 1; |
| 85 | of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
| 86 | |
| 87 | return; |
| 88 | |
| 89 | err_free_data: |
| 90 | kfree(clk_data); |
| 91 | err_unmap: |
| 92 | iounmap(reg); |
| 93 | of_address_to_resource(node, 0, &res); |
| 94 | release_mem_region(res.start, resource_size(&res)); |
| 95 | } |
| 96 | |
| 97 | static void __init sunxi_simple_gates_init(struct device_node *node) |
| 98 | { |
| 99 | sunxi_simple_gates_setup(node, NULL, 0); |
| 100 | } |
| 101 | |
Krzysztof Adamski | 6e17b41 | 2016-02-22 14:03:25 +0100 | [diff] [blame] | 102 | CLK_OF_DECLARE(sun4i_a10_gates, "allwinner,sun4i-a10-gates-clk", |
| 103 | sunxi_simple_gates_init); |
Maxime Ripard | ee38b26 | 2015-07-31 19:46:22 +0200 | [diff] [blame] | 104 | CLK_OF_DECLARE(sun4i_a10_apb0, "allwinner,sun4i-a10-apb0-gates-clk", |
| 105 | sunxi_simple_gates_init); |
| 106 | CLK_OF_DECLARE(sun4i_a10_apb1, "allwinner,sun4i-a10-apb1-gates-clk", |
| 107 | sunxi_simple_gates_init); |
| 108 | CLK_OF_DECLARE(sun4i_a10_axi, "allwinner,sun4i-a10-axi-gates-clk", |
| 109 | sunxi_simple_gates_init); |
| 110 | CLK_OF_DECLARE(sun5i_a10s_apb0, "allwinner,sun5i-a10s-apb0-gates-clk", |
| 111 | sunxi_simple_gates_init); |
| 112 | CLK_OF_DECLARE(sun5i_a10s_apb1, "allwinner,sun5i-a10s-apb1-gates-clk", |
| 113 | sunxi_simple_gates_init); |
| 114 | CLK_OF_DECLARE(sun5i_a13_apb0, "allwinner,sun5i-a13-apb0-gates-clk", |
| 115 | sunxi_simple_gates_init); |
| 116 | CLK_OF_DECLARE(sun5i_a13_apb1, "allwinner,sun5i-a13-apb1-gates-clk", |
| 117 | sunxi_simple_gates_init); |
| 118 | CLK_OF_DECLARE(sun6i_a31_ahb1, "allwinner,sun6i-a31-ahb1-gates-clk", |
| 119 | sunxi_simple_gates_init); |
| 120 | CLK_OF_DECLARE(sun6i_a31_apb1, "allwinner,sun6i-a31-apb1-gates-clk", |
| 121 | sunxi_simple_gates_init); |
| 122 | CLK_OF_DECLARE(sun6i_a31_apb2, "allwinner,sun6i-a31-apb2-gates-clk", |
| 123 | sunxi_simple_gates_init); |
| 124 | CLK_OF_DECLARE(sun7i_a20_apb0, "allwinner,sun7i-a20-apb0-gates-clk", |
| 125 | sunxi_simple_gates_init); |
| 126 | CLK_OF_DECLARE(sun7i_a20_apb1, "allwinner,sun7i-a20-apb1-gates-clk", |
| 127 | sunxi_simple_gates_init); |
| 128 | CLK_OF_DECLARE(sun8i_a23_ahb1, "allwinner,sun8i-a23-ahb1-gates-clk", |
| 129 | sunxi_simple_gates_init); |
| 130 | CLK_OF_DECLARE(sun8i_a23_apb1, "allwinner,sun8i-a23-apb1-gates-clk", |
| 131 | sunxi_simple_gates_init); |
| 132 | CLK_OF_DECLARE(sun8i_a23_apb2, "allwinner,sun8i-a23-apb2-gates-clk", |
| 133 | sunxi_simple_gates_init); |
Maxime Ripard | 7d6ddad | 2015-08-18 19:25:17 +0200 | [diff] [blame] | 134 | CLK_OF_DECLARE(sun8i_a33_ahb1, "allwinner,sun8i-a33-ahb1-gates-clk", |
| 135 | sunxi_simple_gates_init); |
Vishnu Patekar | 2d6f5f0 | 2016-01-31 09:20:54 +0800 | [diff] [blame] | 136 | CLK_OF_DECLARE(sun8i_a83t_apb0, "allwinner,sun8i-a83t-apb0-gates-clk", |
| 137 | sunxi_simple_gates_init); |
Maxime Ripard | ee38b26 | 2015-07-31 19:46:22 +0200 | [diff] [blame] | 138 | CLK_OF_DECLARE(sun9i_a80_ahb0, "allwinner,sun9i-a80-ahb0-gates-clk", |
| 139 | sunxi_simple_gates_init); |
| 140 | CLK_OF_DECLARE(sun9i_a80_ahb1, "allwinner,sun9i-a80-ahb1-gates-clk", |
| 141 | sunxi_simple_gates_init); |
| 142 | CLK_OF_DECLARE(sun9i_a80_ahb2, "allwinner,sun9i-a80-ahb2-gates-clk", |
| 143 | sunxi_simple_gates_init); |
| 144 | CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-gates-clk", |
| 145 | sunxi_simple_gates_init); |
| 146 | CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-gates-clk", |
| 147 | sunxi_simple_gates_init); |
Chen-Yu Tsai | bfcba2e | 2015-11-29 11:03:07 +0800 | [diff] [blame] | 148 | CLK_OF_DECLARE(sun9i_a80_apbs, "allwinner,sun9i-a80-apbs-gates-clk", |
| 149 | sunxi_simple_gates_init); |
Maxime Ripard | ee38b26 | 2015-07-31 19:46:22 +0200 | [diff] [blame] | 150 | |
| 151 | static const int sun4i_a10_ahb_critical_clocks[] __initconst = { |
| 152 | 14, /* ahb_sdram */ |
| 153 | }; |
| 154 | |
| 155 | static void __init sun4i_a10_ahb_init(struct device_node *node) |
| 156 | { |
| 157 | sunxi_simple_gates_setup(node, sun4i_a10_ahb_critical_clocks, |
| 158 | ARRAY_SIZE(sun4i_a10_ahb_critical_clocks)); |
| 159 | } |
| 160 | CLK_OF_DECLARE(sun4i_a10_ahb, "allwinner,sun4i-a10-ahb-gates-clk", |
| 161 | sun4i_a10_ahb_init); |
| 162 | CLK_OF_DECLARE(sun5i_a10s_ahb, "allwinner,sun5i-a10s-ahb-gates-clk", |
| 163 | sun4i_a10_ahb_init); |
| 164 | CLK_OF_DECLARE(sun5i_a13_ahb, "allwinner,sun5i-a13-ahb-gates-clk", |
| 165 | sun4i_a10_ahb_init); |
| 166 | CLK_OF_DECLARE(sun7i_a20_ahb, "allwinner,sun7i-a20-ahb-gates-clk", |
| 167 | sun4i_a10_ahb_init); |
Chen-Yu Tsai | 6d3a47c | 2015-12-05 21:16:42 +0800 | [diff] [blame] | 168 | |
| 169 | static const int sun4i_a10_dram_critical_clocks[] __initconst = { |
| 170 | 15, /* dram_output */ |
| 171 | }; |
| 172 | |
| 173 | static void __init sun4i_a10_dram_init(struct device_node *node) |
| 174 | { |
| 175 | sunxi_simple_gates_setup(node, sun4i_a10_dram_critical_clocks, |
| 176 | ARRAY_SIZE(sun4i_a10_dram_critical_clocks)); |
| 177 | } |
| 178 | CLK_OF_DECLARE(sun4i_a10_dram, "allwinner,sun4i-a10-dram-gates-clk", |
| 179 | sun4i_a10_dram_init); |