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Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -07001/* rtc-ds1343.c
2 *
3 * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
4 * Real Time Clock
5 *
6 * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
Raghavendra Ganiga571eb882014-08-08 14:20:01 -07007 * Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -07008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/device.h>
19#include <linux/spi/spi.h>
20#include <linux/regmap.h>
21#include <linux/rtc.h>
22#include <linux/bcd.h>
23#include <linux/pm.h>
Sudeep Hollacaff0cc2015-09-21 16:47:02 +010024#include <linux/pm_wakeirq.h>
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -070025#include <linux/slab.h>
26
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -070027#define DALLAS_MAXIM_DS1343 0
28#define DALLAS_MAXIM_DS1344 1
29
30/* RTC DS1343 Registers */
31#define DS1343_SECONDS_REG 0x00
32#define DS1343_MINUTES_REG 0x01
33#define DS1343_HOURS_REG 0x02
34#define DS1343_DAY_REG 0x03
35#define DS1343_DATE_REG 0x04
36#define DS1343_MONTH_REG 0x05
37#define DS1343_YEAR_REG 0x06
38#define DS1343_ALM0_SEC_REG 0x07
39#define DS1343_ALM0_MIN_REG 0x08
40#define DS1343_ALM0_HOUR_REG 0x09
41#define DS1343_ALM0_DAY_REG 0x0A
42#define DS1343_ALM1_SEC_REG 0x0B
43#define DS1343_ALM1_MIN_REG 0x0C
44#define DS1343_ALM1_HOUR_REG 0x0D
45#define DS1343_ALM1_DAY_REG 0x0E
46#define DS1343_CONTROL_REG 0x0F
47#define DS1343_STATUS_REG 0x10
48#define DS1343_TRICKLE_REG 0x11
Raghavendra Ganiga571eb882014-08-08 14:20:01 -070049#define DS1343_NVRAM 0x20
50
51#define DS1343_NVRAM_LEN 96
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -070052
53/* DS1343 Control Registers bits */
54#define DS1343_EOSC 0x80
55#define DS1343_DOSF 0x20
56#define DS1343_EGFIL 0x10
57#define DS1343_SQW 0x08
58#define DS1343_INTCN 0x04
59#define DS1343_A1IE 0x02
60#define DS1343_A0IE 0x01
61
62/* DS1343 Status Registers bits */
63#define DS1343_OSF 0x80
64#define DS1343_IRQF1 0x02
65#define DS1343_IRQF0 0x01
66
67/* DS1343 Trickle Charger Registers bits */
68#define DS1343_TRICKLE_MAGIC 0xa0
69#define DS1343_TRICKLE_DS1 0x08
70#define DS1343_TRICKLE_1K 0x01
71#define DS1343_TRICKLE_2K 0x02
72#define DS1343_TRICKLE_4K 0x03
73
74static const struct spi_device_id ds1343_id[] = {
75 { "ds1343", DALLAS_MAXIM_DS1343 },
76 { "ds1344", DALLAS_MAXIM_DS1344 },
77 { }
78};
79MODULE_DEVICE_TABLE(spi, ds1343_id);
80
81struct ds1343_priv {
82 struct spi_device *spi;
83 struct rtc_device *rtc;
84 struct regmap *map;
85 struct mutex mutex;
86 unsigned int irqen;
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -070087 int irq;
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -070088 int alarm_sec;
89 int alarm_min;
90 int alarm_hour;
91 int alarm_mday;
92};
93
94static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
95{
96 switch (cmd) {
97#ifdef RTC_SET_CHARGE
98 case RTC_SET_CHARGE:
99 {
100 int val;
101
102 if (copy_from_user(&val, (int __user *)arg, sizeof(int)))
103 return -EFAULT;
104
105 return regmap_write(priv->map, DS1343_TRICKLE_REG, val);
106 }
107 break;
108#endif
109 }
110
111 return -ENOIOCTLCMD;
112}
113
114static ssize_t ds1343_show_glitchfilter(struct device *dev,
115 struct device_attribute *attr, char *buf)
116{
117 struct ds1343_priv *priv = dev_get_drvdata(dev);
118 int glitch_filt_status, data;
119
120 regmap_read(priv->map, DS1343_CONTROL_REG, &data);
121
122 glitch_filt_status = !!(data & DS1343_EGFIL);
123
124 if (glitch_filt_status)
125 return sprintf(buf, "enabled\n");
126 else
127 return sprintf(buf, "disabled\n");
128}
129
130static ssize_t ds1343_store_glitchfilter(struct device *dev,
131 struct device_attribute *attr,
132 const char *buf, size_t count)
133{
134 struct ds1343_priv *priv = dev_get_drvdata(dev);
135 int data;
136
137 regmap_read(priv->map, DS1343_CONTROL_REG, &data);
138
139 if (strncmp(buf, "enabled", 7) == 0)
140 data |= DS1343_EGFIL;
141
142 else if (strncmp(buf, "disabled", 8) == 0)
143 data &= ~(DS1343_EGFIL);
144
145 else
146 return -EINVAL;
147
148 regmap_write(priv->map, DS1343_CONTROL_REG, data);
149
150 return count;
151}
152
153static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
154 ds1343_store_glitchfilter);
155
Raghavendra Ganiga571eb882014-08-08 14:20:01 -0700156static ssize_t ds1343_nvram_write(struct file *filp, struct kobject *kobj,
157 struct bin_attribute *attr,
158 char *buf, loff_t off, size_t count)
159{
160 int ret;
161 unsigned char address;
162 struct device *dev = kobj_to_dev(kobj);
163 struct ds1343_priv *priv = dev_get_drvdata(dev);
164
Raghavendra Ganiga571eb882014-08-08 14:20:01 -0700165 address = DS1343_NVRAM + off;
166
167 ret = regmap_bulk_write(priv->map, address, buf, count);
168 if (ret < 0)
169 dev_err(&priv->spi->dev, "Error in nvram write %d", ret);
170
171 return (ret < 0) ? ret : count;
172}
173
174
175static ssize_t ds1343_nvram_read(struct file *filp, struct kobject *kobj,
176 struct bin_attribute *attr,
177 char *buf, loff_t off, size_t count)
178{
179 int ret;
180 unsigned char address;
181 struct device *dev = kobj_to_dev(kobj);
182 struct ds1343_priv *priv = dev_get_drvdata(dev);
183
Raghavendra Ganiga571eb882014-08-08 14:20:01 -0700184 address = DS1343_NVRAM + off;
185
186 ret = regmap_bulk_read(priv->map, address, buf, count);
187 if (ret < 0)
188 dev_err(&priv->spi->dev, "Error in nvram read %d\n", ret);
189
190 return (ret < 0) ? ret : count;
191}
192
193
194static struct bin_attribute nvram_attr = {
195 .attr.name = "nvram",
196 .attr.mode = S_IRUGO | S_IWUSR,
197 .read = ds1343_nvram_read,
198 .write = ds1343_nvram_write,
199 .size = DS1343_NVRAM_LEN,
200};
201
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700202static ssize_t ds1343_show_tricklecharger(struct device *dev,
203 struct device_attribute *attr, char *buf)
204{
205 struct ds1343_priv *priv = dev_get_drvdata(dev);
206 int data;
207 char *diodes = "disabled", *resistors = " ";
208
209 regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
210
211 if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
212 switch (data & 0x0c) {
213 case DS1343_TRICKLE_DS1:
214 diodes = "one diode,";
215 break;
216
217 default:
218 diodes = "no diode,";
219 break;
220 }
221
222 switch (data & 0x03) {
223 case DS1343_TRICKLE_1K:
224 resistors = "1k Ohm";
225 break;
226
227 case DS1343_TRICKLE_2K:
228 resistors = "2k Ohm";
229 break;
230
231 case DS1343_TRICKLE_4K:
232 resistors = "4k Ohm";
233 break;
234
235 default:
236 diodes = "disabled";
237 break;
238 }
239 }
240
241 return sprintf(buf, "%s %s\n", diodes, resistors);
242}
243
244static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
245
246static int ds1343_sysfs_register(struct device *dev)
247{
248 int err;
249
250 err = device_create_file(dev, &dev_attr_glitch_filter);
251 if (err)
252 return err;
253
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700254 err = device_create_file(dev, &dev_attr_trickle_charger);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700255 if (err)
256 goto error1;
257
Raghavendra Ganiga571eb882014-08-08 14:20:01 -0700258 err = device_create_bin_file(dev, &nvram_attr);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700259 if (!err)
Alexandre Belloniab392862018-02-12 23:47:37 +0100260 return 0;
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700261
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700262 device_remove_file(dev, &dev_attr_trickle_charger);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700263
264error1:
265 device_remove_file(dev, &dev_attr_glitch_filter);
266
267 return err;
268}
269
270static void ds1343_sysfs_unregister(struct device *dev)
271{
272 device_remove_file(dev, &dev_attr_glitch_filter);
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700273 device_remove_file(dev, &dev_attr_trickle_charger);
Raghavendra Ganiga571eb882014-08-08 14:20:01 -0700274 device_remove_bin_file(dev, &nvram_attr);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700275}
276
277static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
278{
279 struct ds1343_priv *priv = dev_get_drvdata(dev);
280 unsigned char buf[7];
281 int res;
282
283 res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
284 if (res)
285 return res;
286
287 dt->tm_sec = bcd2bin(buf[0]);
288 dt->tm_min = bcd2bin(buf[1]);
289 dt->tm_hour = bcd2bin(buf[2] & 0x3F);
290 dt->tm_wday = bcd2bin(buf[3]) - 1;
291 dt->tm_mday = bcd2bin(buf[4]);
292 dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1;
293 dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */
294
295 return rtc_valid_tm(dt);
296}
297
298static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
299{
300 struct ds1343_priv *priv = dev_get_drvdata(dev);
301 int res;
302
303 res = regmap_write(priv->map, DS1343_SECONDS_REG,
304 bin2bcd(dt->tm_sec));
305 if (res)
306 return res;
307
308 res = regmap_write(priv->map, DS1343_MINUTES_REG,
309 bin2bcd(dt->tm_min));
310 if (res)
311 return res;
312
313 res = regmap_write(priv->map, DS1343_HOURS_REG,
314 bin2bcd(dt->tm_hour) & 0x3F);
315 if (res)
316 return res;
317
318 res = regmap_write(priv->map, DS1343_DAY_REG,
319 bin2bcd(dt->tm_wday + 1));
320 if (res)
321 return res;
322
323 res = regmap_write(priv->map, DS1343_DATE_REG,
324 bin2bcd(dt->tm_mday));
325 if (res)
326 return res;
327
328 res = regmap_write(priv->map, DS1343_MONTH_REG,
329 bin2bcd(dt->tm_mon + 1));
330 if (res)
331 return res;
332
333 dt->tm_year %= 100;
334
335 res = regmap_write(priv->map, DS1343_YEAR_REG,
336 bin2bcd(dt->tm_year));
337 if (res)
338 return res;
339
340 return 0;
341}
342
343static int ds1343_update_alarm(struct device *dev)
344{
345 struct ds1343_priv *priv = dev_get_drvdata(dev);
346 unsigned int control, stat;
347 unsigned char buf[4];
348 int res = 0;
349
350 res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
351 if (res)
352 return res;
353
354 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
355 if (res)
356 return res;
357
358 control &= ~(DS1343_A0IE);
359 stat &= ~(DS1343_IRQF0);
360
361 res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
362 if (res)
363 return res;
364
365 res = regmap_write(priv->map, DS1343_STATUS_REG, stat);
366 if (res)
367 return res;
368
369 buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ?
370 0x80 : bin2bcd(priv->alarm_sec) & 0x7F;
371 buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ?
372 0x80 : bin2bcd(priv->alarm_min) & 0x7F;
373 buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ?
374 0x80 : bin2bcd(priv->alarm_hour) & 0x3F;
375 buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ?
376 0x80 : bin2bcd(priv->alarm_mday) & 0x7F;
377
378 res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
379 if (res)
380 return res;
381
382 if (priv->irqen) {
383 control |= DS1343_A0IE;
384 res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
385 }
386
387 return res;
388}
389
390static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
391{
392 struct ds1343_priv *priv = dev_get_drvdata(dev);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700393 int res = 0;
394 unsigned int stat;
395
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700396 if (priv->irq <= 0)
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700397 return -EINVAL;
398
399 mutex_lock(&priv->mutex);
400
401 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
402 if (res)
403 goto out;
404
405 alarm->enabled = !!(priv->irqen & RTC_AF);
406 alarm->pending = !!(stat & DS1343_IRQF0);
407
408 alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec;
409 alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min;
410 alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour;
411 alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday;
412
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700413out:
414 mutex_unlock(&priv->mutex);
415 return res;
416}
417
418static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
419{
420 struct ds1343_priv *priv = dev_get_drvdata(dev);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700421 int res = 0;
422
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700423 if (priv->irq <= 0)
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700424 return -EINVAL;
425
426 mutex_lock(&priv->mutex);
427
428 priv->alarm_sec = alarm->time.tm_sec;
429 priv->alarm_min = alarm->time.tm_min;
430 priv->alarm_hour = alarm->time.tm_hour;
431 priv->alarm_mday = alarm->time.tm_mday;
432
433 if (alarm->enabled)
434 priv->irqen |= RTC_AF;
435
436 res = ds1343_update_alarm(dev);
437
438 mutex_unlock(&priv->mutex);
439
440 return res;
441}
442
443static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
444{
445 struct ds1343_priv *priv = dev_get_drvdata(dev);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700446 int res = 0;
447
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700448 if (priv->irq <= 0)
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700449 return -EINVAL;
450
451 mutex_lock(&priv->mutex);
452
453 if (enabled)
454 priv->irqen |= RTC_AF;
455 else
456 priv->irqen &= ~RTC_AF;
457
458 res = ds1343_update_alarm(dev);
459
460 mutex_unlock(&priv->mutex);
461
462 return res;
463}
464
465static irqreturn_t ds1343_thread(int irq, void *dev_id)
466{
467 struct ds1343_priv *priv = dev_id;
468 unsigned int stat, control;
469 int res = 0;
470
471 mutex_lock(&priv->mutex);
472
473 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
474 if (res)
475 goto out;
476
477 if (stat & DS1343_IRQF0) {
478 stat &= ~DS1343_IRQF0;
479 regmap_write(priv->map, DS1343_STATUS_REG, stat);
480
481 res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
482 if (res)
483 goto out;
484
485 control &= ~DS1343_A0IE;
486 regmap_write(priv->map, DS1343_CONTROL_REG, control);
487
488 rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
489 }
490
491out:
492 mutex_unlock(&priv->mutex);
493 return IRQ_HANDLED;
494}
495
496static const struct rtc_class_ops ds1343_rtc_ops = {
497 .ioctl = ds1343_ioctl,
498 .read_time = ds1343_read_time,
499 .set_time = ds1343_set_time,
500 .read_alarm = ds1343_read_alarm,
501 .set_alarm = ds1343_set_alarm,
502 .alarm_irq_enable = ds1343_alarm_irq_enable,
503};
504
505static int ds1343_probe(struct spi_device *spi)
506{
507 struct ds1343_priv *priv;
Alexandre Bellonib5086152018-02-12 23:47:35 +0100508 struct regmap_config config = { .reg_bits = 8, .val_bits = 8,
509 .write_flag_mask = 0x80, };
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700510 unsigned int data;
511 int res;
512
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700513 priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
514 if (!priv)
515 return -ENOMEM;
516
517 priv->spi = spi;
518 mutex_init(&priv->mutex);
519
520 /* RTC DS1347 works in spi mode 3 and
521 * its chip select is active high
522 */
523 spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
524 spi->bits_per_word = 8;
525 res = spi_setup(spi);
526 if (res)
527 return res;
528
529 spi_set_drvdata(spi, priv);
530
531 priv->map = devm_regmap_init_spi(spi, &config);
532
533 if (IS_ERR(priv->map)) {
534 dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
535 return PTR_ERR(priv->map);
536 }
537
538 res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
539 if (res)
540 return res;
541
542 regmap_read(priv->map, DS1343_CONTROL_REG, &data);
543 data |= DS1343_INTCN;
544 data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
545 regmap_write(priv->map, DS1343_CONTROL_REG, data);
546
547 regmap_read(priv->map, DS1343_STATUS_REG, &data);
548 data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
549 regmap_write(priv->map, DS1343_STATUS_REG, data);
550
Alexandre Belloni1536f6d2018-02-12 23:47:36 +0100551 priv->rtc = devm_rtc_allocate_device(&spi->dev);
552 if (IS_ERR(priv->rtc))
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700553 return PTR_ERR(priv->rtc);
Alexandre Belloni1536f6d2018-02-12 23:47:36 +0100554
555 priv->rtc->ops = &ds1343_rtc_ops;
556
557 res = rtc_register_device(priv->rtc);
558 if (res)
559 return res;
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700560
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700561 priv->irq = spi->irq;
562
563 if (priv->irq >= 0) {
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700564 res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
Sudeep Hollacaff0cc2015-09-21 16:47:02 +0100565 ds1343_thread, IRQF_ONESHOT,
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700566 "ds1343", priv);
567 if (res) {
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700568 priv->irq = -1;
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700569 dev_err(&spi->dev,
570 "unable to request irq for rtc ds1343\n");
Raghavendra Ganiga10b06b82014-06-06 14:36:01 -0700571 } else {
Sudeep Hollacaff0cc2015-09-21 16:47:02 +0100572 device_init_wakeup(&spi->dev, true);
573 dev_pm_set_wake_irq(&spi->dev, spi->irq);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700574 }
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700575 }
576
577 res = ds1343_sysfs_register(&spi->dev);
578 if (res)
579 dev_err(&spi->dev,
580 "unable to create sysfs entries for rtc ds1343\n");
581
582 return 0;
583}
584
585static int ds1343_remove(struct spi_device *spi)
586{
587 struct ds1343_priv *priv = spi_get_drvdata(spi);
588
589 if (spi->irq) {
590 mutex_lock(&priv->mutex);
591 priv->irqen &= ~RTC_AF;
592 mutex_unlock(&priv->mutex);
593
Sudeep Hollacaff0cc2015-09-21 16:47:02 +0100594 dev_pm_clear_wake_irq(&spi->dev);
595 device_init_wakeup(&spi->dev, false);
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700596 devm_free_irq(&spi->dev, spi->irq, priv);
597 }
598
599 spi_set_drvdata(spi, NULL);
600
601 ds1343_sysfs_unregister(&spi->dev);
602
603 return 0;
604}
605
606#ifdef CONFIG_PM_SLEEP
607
608static int ds1343_suspend(struct device *dev)
609{
610 struct spi_device *spi = to_spi_device(dev);
611
612 if (spi->irq >= 0 && device_may_wakeup(dev))
613 enable_irq_wake(spi->irq);
614
615 return 0;
616}
617
618static int ds1343_resume(struct device *dev)
619{
620 struct spi_device *spi = to_spi_device(dev);
621
622 if (spi->irq >= 0 && device_may_wakeup(dev))
623 disable_irq_wake(spi->irq);
624
625 return 0;
626}
627
628#endif
629
630static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
631
632static struct spi_driver ds1343_driver = {
633 .driver = {
634 .name = "ds1343",
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700635 .pm = &ds1343_pm,
636 },
637 .probe = ds1343_probe,
638 .remove = ds1343_remove,
639 .id_table = ds1343_id,
640};
641
642module_spi_driver(ds1343_driver);
643
644MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
Raghavendra Ganiga571eb882014-08-08 14:20:01 -0700645MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>,"
646 "Ankur Srivastava <sankurece@gmail.com>");
Raghavendra Ganiga1d6316f2014-06-06 14:35:59 -0700647MODULE_LICENSE("GPL v2");